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1 /*
2  * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
3  *
4  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * Licensed under GPLv2 or later.
7  */
8
9 /include/ "skeleton.dtsi"
10
11 / {
12         model = "Marvell PXA2xx family SoC";
13         compatible = "marvell,pxa2xx";
14         interrupt-parent = <&pxairq>;
15
16         aliases {
17                 serial0 = &ffuart;
18                 serial1 = &btuart;
19                 serial2 = &stuart;
20                 serial3 = &hwuart;
21                 i2c0 = &pwri2c;
22                 i2c1 = &pxai2c1;
23         };
24
25         cpus {
26                 #address-cells = <0>;
27                 #size-cells = <0>;
28                 cpu {
29                         compatible = "marvell,xscale";
30                         device_type = "cpu";
31                 };
32         };
33
34         pxabus {
35                 compatible = "simple-bus";
36                 #address-cells = <1>;
37                 #size-cells = <1>;
38                 ranges;
39
40                 pxairq: interrupt-controller@40d00000 {
41                         #interrupt-cells = <1>;
42                         compatible = "marvell,pxa-intc";
43                         interrupt-controller;
44                         interrupt-parent;
45                         marvell,intc-nr-irqs = <32>;
46                         reg = <0x40d00000 0xd0>;
47                 };
48
49                 gpio: gpio@40e00000 {
50                         compatible = "mrvl,pxa-gpio";
51                         #address-cells = <0x1>;
52                         #size-cells = <0x1>;
53                         reg = <0x40e00000 0x10000>;
54                         gpio-controller;
55                         #gpio-cells = <0x2>;
56                         interrupts = <10>;
57                         interrupt-names = "gpio_mux";
58                         interrupt-controller;
59                         #interrupt-cells = <0x2>;
60                         ranges;
61
62                         gcb0: gpio@40e00000 {
63                                 reg = <0x40e00000 0x4>;
64                         };
65
66                         gcb1: gpio@40e00004 {
67                                 reg = <0x40e00004 0x4>;
68                         };
69
70                         gcb2: gpio@40e00008 {
71                                 reg = <0x40e00008 0x4>;
72                         };
73                         gcb3: gpio@40e0000c {
74                                 reg = <0x40e0000c 0x4>;
75                         };
76                 };
77
78                 ffuart: uart@40100000 {
79                         compatible = "mrvl,pxa-uart";
80                         reg = <0x40100000 0x30>;
81                         interrupts = <22>;
82                         status = "disabled";
83                 };
84
85                 btuart: uart@40200000 {
86                         compatible = "mrvl,pxa-uart";
87                         reg = <0x40200000 0x30>;
88                         interrupts = <21>;
89                         status = "disabled";
90                 };
91
92                 stuart: uart@40700000 {
93                         compatible = "mrvl,pxa-uart";
94                         reg = <0x40700000 0x30>;
95                         interrupts = <20>;
96                         status = "disabled";
97                 };
98
99                 hwuart: uart@41100000 {
100                         compatible = "mrvl,pxa-uart";
101                         reg = <0x41100000 0x30>;
102                         interrupts = <7>;
103                         status = "disabled";
104                 };
105
106                 pxai2c1: i2c@40301680 {
107                         compatible = "mrvl,pxa-i2c";
108                         reg = <0x40301680 0x30>;
109                         interrupts = <18>;
110                         #address-cells = <0x1>;
111                         #size-cells = <0>;
112                         status = "disabled";
113                 };
114
115                 usb0: ohci@4c000000 {
116                         compatible = "mrvl,pxa-ohci";
117                         reg = <0x4c000000 0x10000>;
118                         interrupts = <3>;
119                         status = "disabled";
120                 };
121
122                 mmc0: mmc@41100000 {
123                         compatible = "mrvl,pxa-mmc";
124                         reg = <0x41100000 0x1000>;
125                         interrupts = <23>;
126                         status = "disabled";
127                 };
128
129                 rtc@40900000 {
130                         compatible = "marvell,pxa-rtc";
131                         reg = <0x40900000 0x3c>;
132                         interrupts = <30 31>;
133                 };
134         };
135 };