1 /* The pxa3xx skeleton simply augments the 2xx version */
5 model = "Marvell PXA3xx familiy SoC";
6 compatible = "marvell,pxa3xx";
9 pdma: dma-controller@40000000 {
10 compatible = "marvell,pdma-1.0";
11 reg = <0x40000000 0x10000>;
18 pwri2c: i2c@40f500c0 {
19 compatible = "mrvl,pwri2c";
20 reg = <0x40f500c0 0x30>;
22 clocks = <&clks CLK_PWRI2C>;
23 #address-cells = <0x1>;
28 nand0: nand@43100000 {
29 compatible = "marvell,pxa3xx-nand";
30 reg = <0x43100000 90>;
32 clocks = <&clks CLK_NAND>;
40 pxairq: interrupt-controller@40d00000 {
41 marvell,intc-priority;
42 marvell,intc-nr-irqs = <56>;
46 compatible = "intel,pxa3xx-gpio";
47 reg = <0x40e00000 0x10000>;
48 clocks = <&clks CLK_GPIO>;
49 interrupt-names = "gpio0", "gpio1", "gpio_mux";
50 interrupts = <8 9 10>;
54 #interrupt-cells = <0x2>;
60 * The muxing of external clocks/internal dividers for osc* clock
61 * sources has been hidden under the carpet by now.
67 clks: pxa3xx_clks@41300004 {
68 compatible = "marvell,pxa300-clocks";
75 compatible = "marvell,pxa-timer";
76 reg = <0x40a00000 0x20>;
78 clocks = <&clks CLK_OSTIMER>;