2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_PGTABLE_H
17 #define __ASM_PGTABLE_H
20 #include <asm/proc-fns.h>
22 #include <asm/memory.h>
23 #include <asm/pgtable-hwdef.h>
26 * Software defined PTE bits definition.
28 #define PTE_VALID (_AT(pteval_t, 1) << 0)
29 #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
30 #define PTE_DIRTY (_AT(pteval_t, 1) << 55)
31 #define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
32 #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
35 * VMALLOC and SPARSEMEM_VMEMMAP ranges.
37 * VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array
38 * (rounded up to PUD_SIZE).
39 * VMALLOC_START: beginning of the kernel VA space
40 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
41 * fixed mappings and modules
43 #define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
46 #define VMALLOC_START (VA_START)
48 #include <asm/kasan.h>
49 #define VMALLOC_START (KASAN_SHADOW_END + SZ_64K)
52 #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
54 #define vmemmap ((struct page *)(VMALLOC_END + SZ_64K))
56 #define FIRST_USER_ADDRESS 0UL
60 #include <linux/mmdebug.h>
62 extern void __pte_error(const char *file, int line, unsigned long val);
63 extern void __pmd_error(const char *file, int line, unsigned long val);
64 extern void __pud_error(const char *file, int line, unsigned long val);
65 extern void __pgd_error(const char *file, int line, unsigned long val);
67 #define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
68 #define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
70 #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
71 #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
72 #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC))
73 #define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_WT))
74 #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL))
76 #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
77 #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
78 #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
80 #define _PAGE_DEFAULT (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
82 #define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
83 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
84 #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
86 #define PAGE_HYP __pgprot(_PAGE_DEFAULT | PTE_HYP)
87 #define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
89 #define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
90 #define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
92 #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
93 #define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
94 #define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
95 #define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
96 #define PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
97 #define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
98 #define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
100 #define __P000 PAGE_NONE
101 #define __P001 PAGE_READONLY
102 #define __P010 PAGE_COPY
103 #define __P011 PAGE_COPY
104 #define __P100 PAGE_READONLY_EXEC
105 #define __P101 PAGE_READONLY_EXEC
106 #define __P110 PAGE_COPY_EXEC
107 #define __P111 PAGE_COPY_EXEC
109 #define __S000 PAGE_NONE
110 #define __S001 PAGE_READONLY
111 #define __S010 PAGE_SHARED
112 #define __S011 PAGE_SHARED
113 #define __S100 PAGE_READONLY_EXEC
114 #define __S101 PAGE_READONLY_EXEC
115 #define __S110 PAGE_SHARED_EXEC
116 #define __S111 PAGE_SHARED_EXEC
119 * ZERO_PAGE is a global shared page that is always zero: used
120 * for zero-mapped memory areas etc..
122 extern struct page *empty_zero_page;
123 #define ZERO_PAGE(vaddr) (empty_zero_page)
125 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
127 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
129 #define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
131 #define pte_none(pte) (!pte_val(pte))
132 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
133 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
135 /* Find an entry in the third-level page table. */
136 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
138 #define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + pte_index(addr))
140 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
141 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
142 #define pte_unmap(pte) do { } while (0)
143 #define pte_unmap_nested(pte) do { } while (0)
146 * The following only work if pte_present(). Undefined behaviour otherwise.
148 #define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
149 #define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
150 #define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
151 #define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
152 #define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
153 #define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
155 #ifdef CONFIG_ARM64_HW_AFDBM
156 #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
158 #define pte_hw_dirty(pte) (0)
160 #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
161 #define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
163 #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
164 #define pte_valid_user(pte) \
165 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
166 #define pte_valid_not_user(pte) \
167 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
169 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
171 pte_val(pte) &= ~pgprot_val(prot);
175 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
177 pte_val(pte) |= pgprot_val(prot);
181 static inline pte_t pte_wrprotect(pte_t pte)
183 return clear_pte_bit(pte, __pgprot(PTE_WRITE));
186 static inline pte_t pte_mkwrite(pte_t pte)
188 return set_pte_bit(pte, __pgprot(PTE_WRITE));
191 static inline pte_t pte_mkclean(pte_t pte)
193 return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
196 static inline pte_t pte_mkdirty(pte_t pte)
198 return set_pte_bit(pte, __pgprot(PTE_DIRTY));
201 static inline pte_t pte_mkold(pte_t pte)
203 return clear_pte_bit(pte, __pgprot(PTE_AF));
206 static inline pte_t pte_mkyoung(pte_t pte)
208 return set_pte_bit(pte, __pgprot(PTE_AF));
211 static inline pte_t pte_mkspecial(pte_t pte)
213 return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
216 static inline pte_t pte_mkcont(pte_t pte)
218 return set_pte_bit(pte, __pgprot(PTE_CONT));
221 static inline pte_t pte_mknoncont(pte_t pte)
223 return clear_pte_bit(pte, __pgprot(PTE_CONT));
226 static inline void set_pte(pte_t *ptep, pte_t pte)
231 * Only if the new pte is valid and kernel, otherwise TLB maintenance
232 * or update_mmu_cache() have the necessary barriers.
234 if (pte_valid_not_user(pte)) {
241 struct vm_area_struct;
243 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
246 * PTE bits configuration in the presence of hardware Dirty Bit Management
247 * (PTE_WRITE == PTE_DBM):
249 * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw)
255 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
256 * the page fault mechanism. Checking the dirty status of a pte becomes:
258 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
260 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
261 pte_t *ptep, pte_t pte)
263 if (pte_valid_user(pte)) {
264 if (!pte_special(pte) && pte_exec(pte))
265 __sync_icache_dcache(pte, addr);
266 if (pte_sw_dirty(pte) && pte_write(pte))
267 pte_val(pte) &= ~PTE_RDONLY;
269 pte_val(pte) |= PTE_RDONLY;
273 * If the existing pte is valid, check for potential race with
274 * hardware updates of the pte (ptep_set_access_flags safely changes
275 * valid ptes without going through an invalid entry).
277 if (IS_ENABLED(CONFIG_DEBUG_VM) && IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
279 BUG_ON(!pte_young(pte));
280 BUG_ON(pte_write(*ptep) && !pte_dirty(pte));
287 * Huge pte definitions.
289 #define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
290 #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
293 * Hugetlb definitions.
295 #define HUGE_MAX_HSTATE 2
296 #define HPAGE_SHIFT PMD_SHIFT
297 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
298 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
299 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
301 #define __HAVE_ARCH_PTE_SPECIAL
303 static inline pte_t pud_pte(pud_t pud)
305 return __pte(pud_val(pud));
308 static inline pmd_t pud_pmd(pud_t pud)
310 return __pmd(pud_val(pud));
313 static inline pte_t pmd_pte(pmd_t pmd)
315 return __pte(pmd_val(pmd));
318 static inline pmd_t pte_pmd(pte_t pte)
320 return __pmd(pte_val(pte));
323 static inline pgprot_t mk_sect_prot(pgprot_t prot)
325 return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
332 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
333 #define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
334 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
336 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
337 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
338 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
339 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
340 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
341 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
342 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
343 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
344 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
345 #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
347 #define __HAVE_ARCH_PMD_WRITE
348 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
350 #define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
352 #define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
353 #define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
354 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
356 #define pud_write(pud) pte_write(pud_pte(pud))
357 #define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
359 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
361 static inline int has_transparent_hugepage(void)
366 #define __pgprot_modify(prot,mask,bits) \
367 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
370 * Mark the prot value as uncacheable and unbufferable.
372 #define pgprot_noncached(prot) \
373 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
374 #define pgprot_writecombine(prot) \
375 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
376 #define pgprot_device(prot) \
377 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
378 #define __HAVE_PHYS_MEM_ACCESS_PROT
380 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
381 unsigned long size, pgprot_t vma_prot);
383 #define pmd_none(pmd) (!pmd_val(pmd))
384 #define pmd_present(pmd) (pmd_val(pmd))
386 #define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
388 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
390 #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
393 #ifdef CONFIG_ARM64_64K_PAGES
394 #define pud_sect(pud) (0)
395 #define pud_table(pud) (1)
397 #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
399 #define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
403 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
410 static inline void pmd_clear(pmd_t *pmdp)
412 set_pmd(pmdp, __pmd(0));
415 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
417 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
420 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
423 * Conversion functions: convert a page and protection to a page entry,
424 * and a page entry and page directory to the page they refer to.
426 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
428 #if CONFIG_PGTABLE_LEVELS > 2
430 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
432 #define pud_none(pud) (!pud_val(pud))
433 #define pud_bad(pud) (!(pud_val(pud) & 2))
434 #define pud_present(pud) (pud_val(pud))
436 static inline void set_pud(pud_t *pudp, pud_t pud)
443 static inline void pud_clear(pud_t *pudp)
445 set_pud(pudp, __pud(0));
448 static inline pmd_t *pud_page_vaddr(pud_t pud)
450 return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
453 /* Find an entry in the second-level page table. */
454 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
456 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
458 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
461 #define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
463 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
465 #if CONFIG_PGTABLE_LEVELS > 3
467 #define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
469 #define pgd_none(pgd) (!pgd_val(pgd))
470 #define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
471 #define pgd_present(pgd) (pgd_val(pgd))
473 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
479 static inline void pgd_clear(pgd_t *pgdp)
481 set_pgd(pgdp, __pgd(0));
484 static inline pud_t *pgd_page_vaddr(pgd_t pgd)
486 return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
489 /* Find an entry in the frst-level page table. */
490 #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
492 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
494 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
497 #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
499 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
501 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
503 /* to find an entry in a page-table-directory */
504 #define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
506 #define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))
508 /* to find an entry in a kernel page-table-directory */
509 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
511 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
513 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
514 PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
515 /* preserve the hardware dirty information */
516 if (pte_hw_dirty(pte))
517 pte = pte_mkdirty(pte);
518 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
522 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
524 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
527 #ifdef CONFIG_ARM64_HW_AFDBM
529 * Atomic pte/pmd modifications.
531 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
532 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
533 unsigned long address,
537 unsigned int tmp, res;
539 asm volatile("// ptep_test_and_clear_young\n"
540 " prfm pstl1strm, %2\n"
542 " ubfx %w3, %w0, %5, #1 // extract PTE_AF (young)\n"
543 " and %0, %0, %4 // clear PTE_AF\n"
544 " stxr %w1, %0, %2\n"
546 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res)
547 : "L" (~PTE_AF), "I" (ilog2(PTE_AF)));
552 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
553 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
554 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
555 unsigned long address,
558 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
560 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
562 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
563 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
564 unsigned long address, pte_t *ptep)
569 asm volatile("// ptep_get_and_clear\n"
570 " prfm pstl1strm, %2\n"
572 " stxr %w1, xzr, %2\n"
574 : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)));
576 return __pte(old_pteval);
579 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
580 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
581 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
582 unsigned long address, pmd_t *pmdp)
584 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
586 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
589 * ptep_set_wrprotect - mark read-only while trasferring potential hardware
590 * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
592 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
593 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
598 asm volatile("// ptep_set_wrprotect\n"
599 " prfm pstl1strm, %2\n"
601 " tst %0, %4 // check for hw dirty (!PTE_RDONLY)\n"
602 " csel %1, %3, xzr, eq // set PTE_DIRTY|PTE_RDONLY if dirty\n"
603 " orr %0, %0, %1 // if !dirty, PTE_RDONLY is already set\n"
604 " and %0, %0, %5 // clear PTE_WRITE/PTE_DBM\n"
605 " stxr %w1, %0, %2\n"
607 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
608 : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE)
612 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
613 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
614 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
615 unsigned long address, pmd_t *pmdp)
617 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
620 #endif /* CONFIG_ARM64_HW_AFDBM */
622 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
623 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
626 * Encode and decode a swap entry:
627 * bits 0-1: present (must be zero)
628 * bits 2-7: swap type
629 * bits 8-57: swap offset
631 #define __SWP_TYPE_SHIFT 2
632 #define __SWP_TYPE_BITS 6
633 #define __SWP_OFFSET_BITS 50
634 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
635 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
636 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
638 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
639 #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
640 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
642 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
643 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
646 * Ensure that there are not more swap files than can be encoded in the kernel
649 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
651 extern int kern_addr_valid(unsigned long addr);
653 #include <asm-generic/pgtable.h>
655 #define pgtable_cache_init() do { } while (0)
658 * On AArch64, the cache coherency is handled via the set_pte_at() function.
660 static inline void update_mmu_cache(struct vm_area_struct *vma,
661 unsigned long addr, pte_t *ptep)
664 * We don't do anything here, so there's a very small chance of
665 * us retaking a user fault which we just fixed up. The alternative
666 * is doing a dsb(ishst), but that penalises the fastpath.
670 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
672 #define kc_vaddr_to_offset(v) ((v) & ~VA_START)
673 #define kc_offset_to_vaddr(o) ((o) | VA_START)
675 #endif /* !__ASSEMBLY__ */
677 #endif /* __ASM_PGTABLE_H */