2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
19 #include <asm/head-64.h>
22 * There are a few constraints to be concerned with.
23 * - Real mode exceptions code/data must be located at their physical location.
24 * - Virtual mode exceptions must be mapped at their 0xc000... location.
25 * - Fixed location code must not call directly beyond the __end_interrupts
26 * area when built with CONFIG_RELOCATABLE. LOAD_HANDLER / bctr sequence
28 * - LOAD_HANDLER targets must be within first 64K of physical 0 /
30 * - Conditional branch targets must be within +/-32K of caller.
32 * "Virtual exceptions" run with relocation on (MSR_IR=1, MSR_DR=1), and
33 * therefore don't have to run in physically located code or rfid to
34 * virtual mode kernel code. However on relocatable kernels they do have
35 * to branch to KERNELBASE offset because the rest of the kernel (outside
36 * the exception vectors) may be located elsewhere.
38 * Virtual exceptions correspond with physical, except their entry points
39 * are offset by 0xc000000000000000 and also tend to get an added 0x4000
40 * offset applied. Virtual exceptions are enabled with the Alternate
41 * Interrupt Location (AIL) bit set in the LPCR. However this does not
42 * guarantee they will be delivered virtually. Some conditions (see the ISA)
43 * cause exceptions to be delivered in real mode.
45 * It's impossible to receive interrupts below 0x300 via AIL.
47 * KVM: None of the virtual exceptions are from the guest. Anything that
48 * escalated to HV=1 from HV=0 is delivered via real mode handlers.
51 * We layout physical memory as follows:
52 * 0x0000 - 0x00ff : Secondary processor spin code
53 * 0x0100 - 0x18ff : Real mode pSeries interrupt vectors
54 * 0x1900 - 0x3fff : Real mode trampolines
55 * 0x4000 - 0x58ff : Relon (IR=1,DR=1) mode pSeries interrupt vectors
56 * 0x5900 - 0x6fff : Relon mode trampolines
57 * 0x7000 - 0x7fff : FWNMI data area
58 * 0x8000 - .... : Common interrupt handlers, remaining early
59 * setup code, rest of kernel.
61 OPEN_FIXED_SECTION(real_vectors, 0x0100, 0x1900)
62 OPEN_FIXED_SECTION(real_trampolines, 0x1900, 0x4000)
63 OPEN_FIXED_SECTION(virt_vectors, 0x4000, 0x5900)
64 OPEN_FIXED_SECTION(virt_trampolines, 0x5900, 0x7000)
65 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
67 * Data area reserved for FWNMI option.
68 * This address (0x7000) is fixed by the RPA.
69 * pseries and powernv need to keep the whole page from
70 * 0x7000 to 0x8000 free for use by the firmware
72 ZERO_FIXED_SECTION(fwnmi_page, 0x7000, 0x8000)
73 OPEN_TEXT_SECTION(0x8000)
75 OPEN_TEXT_SECTION(0x7000)
78 USE_FIXED_SECTION(real_vectors)
81 * This is the start of the interrupt handlers for pSeries
82 * This code runs with relocation off.
83 * Code from here to __end_interrupts gets copied down to real
84 * address 0x100 when we are running a relocatable kernel.
85 * Therefore any relative branches in this section must only
86 * branch to labels in this section.
88 .globl __start_interrupts
91 EXC_REAL_BEGIN(system_reset, 0x100, 0x200)
93 #ifdef CONFIG_PPC_P7_NAP
95 /* Running native on arch 2.06 or later, check if we are
96 * waking up from nap/sleep/winkle.
99 rlwinm. r13,r13,47-31,30,31
104 bl pnv_restore_hyp_resource
106 li r0,PNV_THREAD_RUNNING
107 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
109 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
110 li r0,KVM_HWTHREAD_IN_KERNEL
111 stb r0,HSTATE_HWTHREAD_STATE(r13)
112 /* Order setting hwthread_state vs. testing hwthread_req */
114 lbz r0,HSTATE_HWTHREAD_REQ(r13)
121 /* Return SRR1 from power7_nap() */
125 2: b pnv_wakeup_noloss
128 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
129 #endif /* CONFIG_PPC_P7_NAP */
130 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
132 EXC_REAL_END(system_reset, 0x100, 0x200)
133 EXC_VIRT_NONE(0x4100, 0x4200)
134 EXC_COMMON(system_reset_common, 0x100, system_reset_exception)
136 #ifdef CONFIG_PPC_PSERIES
138 * Vectors for the FWNMI option. Share common code.
140 TRAMP_REAL_BEGIN(system_reset_fwnmi)
141 SET_SCRATCH0(r13) /* save r13 */
142 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
144 #endif /* CONFIG_PPC_PSERIES */
147 EXC_REAL_BEGIN(machine_check, 0x200, 0x300)
148 /* This is moved out of line as it can be patched by FW, but
149 * some code path might still want to branch into the original
152 SET_SCRATCH0(r13) /* save r13 */
154 * Running native on arch 2.06 or later, we may wakeup from winkle
155 * inside machine check. If yes, then last bit of HSPGR0 would be set
156 * to 1. Hence clear it unconditionally.
161 EXCEPTION_PROLOG_0(PACA_EXMC)
163 b machine_check_powernv_early
165 b machine_check_pSeries_0
166 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
167 EXC_REAL_END(machine_check, 0x200, 0x300)
168 EXC_VIRT_NONE(0x4200, 0x4300)
169 TRAMP_REAL_BEGIN(machine_check_powernv_early)
171 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
176 * Original R9 to R13 is saved on PACA_EXMC
178 * Switch to mc_emergency stack and handle re-entrancy (we limit
179 * the nested MCE upto level 4 to avoid stack overflow).
180 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
182 * We use paca->in_mce to check whether this is the first entry or
183 * nested machine check. We increment paca->in_mce to track nested
186 * If this is the first entry then set stack pointer to
187 * paca->mc_emergency_sp, otherwise r1 is already pointing to
188 * stack frame on mc_emergency stack.
190 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
191 * checkstop if we get another machine check exception before we do
192 * rfid with MSR_ME=1.
194 mr r11,r1 /* Save r1 */
195 lhz r10,PACA_IN_MCE(r13)
196 cmpwi r10,0 /* Are we in nested machine check */
197 bne 0f /* Yes, we are. */
198 /* First machine check entry */
199 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
200 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
201 addi r10,r10,1 /* increment paca->in_mce */
202 sth r10,PACA_IN_MCE(r13)
203 /* Limit nested MCE to level 4 to avoid stack overflow */
205 bgt 2f /* Check if we hit limit of 4 */
206 std r11,GPR1(r1) /* Save r1 on the stack. */
207 std r11,0(r1) /* make stack chain pointer */
208 mfspr r11,SPRN_SRR0 /* Save SRR0 */
210 mfspr r11,SPRN_SRR1 /* Save SRR1 */
212 mfspr r11,SPRN_DAR /* Save DAR */
214 mfspr r11,SPRN_DSISR /* Save DSISR */
216 std r9,_CCR(r1) /* Save CR in stackframe */
217 /* Save r9 through r13 from EXMC save area to stack frame. */
218 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
219 mfmsr r11 /* get MSR value */
220 ori r11,r11,MSR_ME /* turn on ME bit */
221 ori r11,r11,MSR_RI /* turn on RI bit */
222 LOAD_HANDLER(r12, machine_check_handle_early)
223 1: mtspr SPRN_SRR0,r12
226 b . /* prevent speculative execution */
228 /* Stack overflow. Stay on emergency stack and panic.
229 * Keep the ME bit off while panic-ing, so that if we hit
230 * another machine check we checkstop.
232 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
234 LOAD_HANDLER(r12, unrecover_mce)
236 andc r11,r11,r10 /* Turn off MSR_ME */
238 b . /* prevent speculative execution */
239 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
241 TRAMP_REAL_BEGIN(machine_check_pSeries)
242 .globl machine_check_fwnmi
244 SET_SCRATCH0(r13) /* save r13 */
245 EXCEPTION_PROLOG_0(PACA_EXMC)
246 machine_check_pSeries_0:
247 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST_PR, 0x200)
249 * The following is essentially EXCEPTION_PROLOG_PSERIES_1 with the
250 * difference that MSR_RI is not enabled, because PACA_EXMC is being
251 * used, so nested machine check corrupts it. machine_check_common
257 LOAD_HANDLER(r12, machine_check_common)
262 b . /* prevent speculative execution */
264 TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
266 EXC_COMMON_BEGIN(machine_check_common)
268 * Machine check is different because we use a different
269 * save area: PACA_EXMC instead of PACA_EXGEN.
272 std r10,PACA_EXMC+EX_DAR(r13)
274 stw r10,PACA_EXMC+EX_DSISR(r13)
275 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
277 RECONCILE_IRQ_STATE(r10, r11)
278 ld r3,PACA_EXMC+EX_DAR(r13)
279 lwz r4,PACA_EXMC+EX_DSISR(r13)
280 /* Enable MSR_RI when finished with PACA_EXMC */
286 addi r3,r1,STACK_FRAME_OVERHEAD
287 bl machine_check_exception
290 #define MACHINE_CHECK_HANDLER_WINDUP \
291 /* Clear MSR_RI before setting SRR0 and SRR1. */\
293 mfmsr r9; /* get MSR value */ \
295 mtmsrd r9,1; /* Clear MSR_RI */ \
296 /* Move original SRR0 and SRR1 into the respective regs */ \
298 mtspr SPRN_SRR1,r9; \
300 mtspr SPRN_SRR0,r3; \
312 /* Decrement paca->in_mce. */ \
313 lhz r12,PACA_IN_MCE(r13); \
315 sth r12,PACA_IN_MCE(r13); \
317 REST_2GPRS(12, r1); \
318 /* restore original r1. */ \
322 * Handle machine check early in real mode. We come here with
323 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
325 EXC_COMMON_BEGIN(machine_check_handle_early)
326 std r0,GPR0(r1) /* Save r0 */
327 EXCEPTION_PROLOG_COMMON_3(0x200)
329 addi r3,r1,STACK_FRAME_OVERHEAD
330 bl machine_check_early
331 std r3,RESULT(r1) /* Save result */
333 #ifdef CONFIG_PPC_P7_NAP
335 * Check if thread was in power saving mode. We come here when any
336 * of the following is true:
337 * a. thread wasn't in power saving mode
338 * b. thread was in power saving mode with no state loss,
339 * supervisor state loss or hypervisor state loss.
341 * Go back to nap/sleep/winkle mode again if (b) is true.
343 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
344 beq 4f /* No, it wasn;t */
345 /* Thread was in power saving mode. Go back to nap again. */
348 /* Supervisor/Hypervisor state loss */
350 stb r0,PACA_NAPSTATELOST(r13)
351 3: bl machine_check_queue_event
352 MACHINE_CHECK_HANDLER_WINDUP
356 * Check what idle state this CPU was in and go back to same mode
359 lbz r3,PACA_THREAD_IDLE_STATE(r13)
360 cmpwi r3,PNV_THREAD_NAP
362 IDLE_STATE_ENTER_SEQ(PPC_NAP)
365 cmpwi r3,PNV_THREAD_SLEEP
367 IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
372 * Go back to winkle. Please note that this thread was woken up in
373 * machine check from winkle and have not restored the per-subcore
374 * state. Hence before going back to winkle, set last bit of HSPGR0
375 * to 1. This will make sure that if this thread gets woken up
376 * again at reset vector 0x100 then it will get chance to restore
381 IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
386 * Check if we are coming from hypervisor userspace. If yes then we
387 * continue in host kernel in V mode to deliver the MC event.
389 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
391 andi. r11,r12,MSR_PR /* See if coming from user. */
392 bne 9f /* continue in V mode if we are. */
395 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
397 * We are coming from kernel context. Check if we are coming from
398 * guest. if yes, then we can continue. We will fall through
399 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
401 lbz r11,HSTATE_IN_GUEST(r13)
402 cmpwi r11,0 /* Check if coming from guest */
403 bne 9f /* continue if we are. */
406 * At this point we are not sure about what context we come from.
407 * Queue up the MCE event and return from the interrupt.
408 * But before that, check if this is an un-recoverable exception.
409 * If yes, then stay on emergency stack and panic.
413 1: mfspr r11,SPRN_SRR0
414 LOAD_HANDLER(r10,unrecover_mce)
418 * We are going down. But there are chances that we might get hit by
419 * another MCE during panic path and we may run into unstable state
420 * with no way out. Hence, turn ME bit off while going down, so that
421 * when another MCE is hit during panic path, system will checkstop
422 * and hypervisor will get restarted cleanly by SP.
425 andc r10,r10,r3 /* Turn off MSR_ME */
431 * Check if we have successfully handled/recovered from error, if not
432 * then stay on emergency stack and panic.
434 ld r3,RESULT(r1) /* Load result */
435 cmpdi r3,0 /* see if we handled MCE successfully */
437 beq 1b /* if !handled then panic */
439 * Return from MC interrupt.
440 * Queue up the MCE event so that we can log it later, while
441 * returning from kernel or opal call.
443 bl machine_check_queue_event
444 MACHINE_CHECK_HANDLER_WINDUP
447 /* Deliver the machine check to host kernel in V mode. */
448 MACHINE_CHECK_HANDLER_WINDUP
449 b machine_check_pSeries
451 EXC_COMMON_BEGIN(unrecover_mce)
452 /* Invoke machine_check_exception to print MCE event and panic. */
453 addi r3,r1,STACK_FRAME_OVERHEAD
454 bl machine_check_exception
456 * We will not reach here. Even if we did, there is no way out. Call
457 * unrecoverable_exception and die.
459 1: addi r3,r1,STACK_FRAME_OVERHEAD
460 bl unrecoverable_exception
464 EXC_REAL(data_access, 0x300, 0x380)
465 EXC_VIRT(data_access, 0x4300, 0x4380, 0x300)
466 TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
468 EXC_COMMON_BEGIN(data_access_common)
470 * Here r13 points to the paca, r9 contains the saved CR,
471 * SRR0 and SRR1 are saved in r11 and r12,
472 * r9 - r13 are saved in paca->exgen.
475 std r10,PACA_EXGEN+EX_DAR(r13)
477 stw r10,PACA_EXGEN+EX_DSISR(r13)
478 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
479 RECONCILE_IRQ_STATE(r10, r11)
481 ld r3,PACA_EXGEN+EX_DAR(r13)
482 lwz r4,PACA_EXGEN+EX_DSISR(r13)
486 BEGIN_MMU_FTR_SECTION
487 b do_hash_page /* Try to handle as hpte fault */
490 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
493 EXC_REAL_BEGIN(data_access_slb, 0x380, 0x400)
495 EXCEPTION_PROLOG_0(PACA_EXSLB)
496 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
497 std r3,PACA_EXSLB+EX_R3(r13)
501 #ifndef CONFIG_RELOCATABLE
505 * We can't just use a direct branch to slb_miss_realmode
506 * because the distance from here to there depends on where
507 * the kernel ends up being put.
510 LOAD_HANDLER(r10, slb_miss_realmode)
514 EXC_REAL_END(data_access_slb, 0x380, 0x400)
516 EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x4400)
518 EXCEPTION_PROLOG_0(PACA_EXSLB)
519 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
520 std r3,PACA_EXSLB+EX_R3(r13)
524 #ifndef CONFIG_RELOCATABLE
528 * We can't just use a direct branch to slb_miss_realmode
529 * because the distance from here to there depends on where
530 * the kernel ends up being put.
533 LOAD_HANDLER(r10, slb_miss_realmode)
537 EXC_VIRT_END(data_access_slb, 0x4380, 0x4400)
538 TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
541 EXC_REAL(instruction_access, 0x400, 0x480)
542 EXC_VIRT(instruction_access, 0x4400, 0x4480, 0x400)
543 TRAMP_KVM(PACA_EXGEN, 0x400)
545 EXC_COMMON_BEGIN(instruction_access_common)
546 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
547 RECONCILE_IRQ_STATE(r10, r11)
554 BEGIN_MMU_FTR_SECTION
555 b do_hash_page /* Try to handle as hpte fault */
558 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
561 EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x500)
563 EXCEPTION_PROLOG_0(PACA_EXSLB)
564 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
565 std r3,PACA_EXSLB+EX_R3(r13)
566 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
569 #ifndef CONFIG_RELOCATABLE
573 LOAD_HANDLER(r10, slb_miss_realmode)
577 EXC_REAL_END(instruction_access_slb, 0x480, 0x500)
579 EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x4500)
581 EXCEPTION_PROLOG_0(PACA_EXSLB)
582 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
583 std r3,PACA_EXSLB+EX_R3(r13)
584 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
587 #ifndef CONFIG_RELOCATABLE
591 LOAD_HANDLER(r10, slb_miss_realmode)
595 EXC_VIRT_END(instruction_access_slb, 0x4480, 0x4500)
596 TRAMP_KVM(PACA_EXSLB, 0x480)
599 /* This handler is used by both 0x380 and 0x480 slb miss interrupts */
600 EXC_COMMON_BEGIN(slb_miss_realmode)
602 * r13 points to the PACA, r9 contains the saved CR,
603 * r12 contain the saved SRR1, SRR0 is still ready for return
604 * r3 has the faulting address
605 * r9 - r13 are saved in paca->exslb.
606 * r3 is saved in paca->slb_r3
607 * cr6.eq is set for a D-SLB miss, clear for a I-SLB miss
608 * We assume we aren't going to take any exceptions during this
612 #ifdef CONFIG_RELOCATABLE
616 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
617 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
618 std r3,PACA_EXSLB+EX_DAR(r13)
621 #ifdef CONFIG_PPC_STD_MMU_64
622 BEGIN_MMU_FTR_SECTION
623 bl slb_allocate_realmode
624 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
627 ld r10,PACA_EXSLB+EX_LR(r13)
628 ld r3,PACA_EXSLB+EX_R3(r13)
629 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
632 beq 8f /* if bad address, make full stack frame */
634 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
637 /* All done -- return from exception. */
642 mtcrf 0x02,r9 /* I/D indication is in cr6 */
643 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
646 RESTORE_PPR_PACA(PACA_EXSLB, r9)
647 ld r9,PACA_EXSLB+EX_R9(r13)
648 ld r10,PACA_EXSLB+EX_R10(r13)
649 ld r11,PACA_EXSLB+EX_R11(r13)
650 ld r12,PACA_EXSLB+EX_R12(r13)
651 ld r13,PACA_EXSLB+EX_R13(r13)
653 b . /* prevent speculative execution */
655 2: mfspr r11,SPRN_SRR0
656 LOAD_HANDLER(r10,unrecov_slb)
663 8: mfspr r11,SPRN_SRR0
664 LOAD_HANDLER(r10,bad_addr_slb)
671 EXC_COMMON_BEGIN(unrecov_slb)
672 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
673 RECONCILE_IRQ_STATE(r10, r11)
675 1: addi r3,r1,STACK_FRAME_OVERHEAD
676 bl unrecoverable_exception
679 EXC_COMMON_BEGIN(bad_addr_slb)
680 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXSLB)
681 RECONCILE_IRQ_STATE(r10, r11)
682 ld r3, PACA_EXSLB+EX_DAR(r13)
685 li r10, 0x480 /* fix trap number for I-SLB miss */
688 addi r3, r1, STACK_FRAME_OVERHEAD
692 EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x600)
693 .globl hardware_interrupt_hv;
694 hardware_interrupt_hv:
696 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
697 EXC_HV, SOFTEN_TEST_HV)
699 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
701 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
702 EXC_STD, SOFTEN_TEST_PR)
704 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
705 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
706 EXC_REAL_END(hardware_interrupt, 0x500, 0x600)
708 EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x4600)
709 .globl hardware_interrupt_relon_hv;
710 hardware_interrupt_relon_hv:
712 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_HV, SOFTEN_TEST_HV)
714 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_STD, SOFTEN_TEST_PR)
715 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
716 EXC_VIRT_END(hardware_interrupt, 0x4500, 0x4600)
718 EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
721 EXC_REAL(alignment, 0x600, 0x700)
722 EXC_VIRT(alignment, 0x4600, 0x4700, 0x600)
723 TRAMP_KVM(PACA_EXGEN, 0x600)
724 EXC_COMMON_BEGIN(alignment_common)
726 std r10,PACA_EXGEN+EX_DAR(r13)
728 stw r10,PACA_EXGEN+EX_DSISR(r13)
729 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
730 ld r3,PACA_EXGEN+EX_DAR(r13)
731 lwz r4,PACA_EXGEN+EX_DSISR(r13)
735 RECONCILE_IRQ_STATE(r10, r11)
736 addi r3,r1,STACK_FRAME_OVERHEAD
737 bl alignment_exception
741 EXC_REAL(program_check, 0x700, 0x800)
742 EXC_VIRT(program_check, 0x4700, 0x4800, 0x700)
743 TRAMP_KVM(PACA_EXGEN, 0x700)
744 EXC_COMMON_BEGIN(program_check_common)
745 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
747 RECONCILE_IRQ_STATE(r10, r11)
748 addi r3,r1,STACK_FRAME_OVERHEAD
749 bl program_check_exception
753 EXC_REAL(fp_unavailable, 0x800, 0x900)
754 EXC_VIRT(fp_unavailable, 0x4800, 0x4900, 0x800)
755 TRAMP_KVM(PACA_EXGEN, 0x800)
756 EXC_COMMON_BEGIN(fp_unavailable_common)
757 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
758 bne 1f /* if from user, just load it up */
760 RECONCILE_IRQ_STATE(r10, r11)
761 addi r3,r1,STACK_FRAME_OVERHEAD
762 bl kernel_fp_unavailable_exception
765 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
767 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
768 * transaction), go do TM stuff
770 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
772 END_FTR_SECTION_IFSET(CPU_FTR_TM)
775 b fast_exception_return
776 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
777 2: /* User process was in a transaction */
779 RECONCILE_IRQ_STATE(r10, r11)
780 addi r3,r1,STACK_FRAME_OVERHEAD
786 EXC_REAL_MASKABLE(decrementer, 0x900, 0x980)
787 EXC_VIRT_MASKABLE(decrementer, 0x4900, 0x4980, 0x900)
788 TRAMP_KVM(PACA_EXGEN, 0x900)
789 EXC_COMMON_ASYNC(decrementer_common, 0x900, timer_interrupt)
792 EXC_REAL_HV(hdecrementer, 0x980, 0xa00)
793 EXC_VIRT_HV(hdecrementer, 0x4980, 0x4a00, 0x980)
794 TRAMP_KVM_HV(PACA_EXGEN, 0x980)
795 EXC_COMMON(hdecrementer_common, 0x980, hdec_interrupt)
798 EXC_REAL_MASKABLE(doorbell_super, 0xa00, 0xb00)
799 EXC_VIRT_MASKABLE(doorbell_super, 0x4a00, 0x4b00, 0xa00)
800 TRAMP_KVM(PACA_EXGEN, 0xa00)
801 #ifdef CONFIG_PPC_DOORBELL
802 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, doorbell_exception)
804 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, unknown_exception)
808 EXC_REAL(trap_0b, 0xb00, 0xc00)
809 EXC_VIRT(trap_0b, 0x4b00, 0x4c00, 0xb00)
810 TRAMP_KVM(PACA_EXGEN, 0xb00)
811 EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
814 #define LOAD_SYSCALL_HANDLER(reg) \
815 ld reg,PACAKBASE(r13); \
816 ori reg,reg,(ABS_ADDR(system_call_common))@l;
818 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
819 #define SYSCALL_PSERIES_1 \
823 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
826 mfspr r11,SPRN_SRR0 ; \
829 #define SYSCALL_PSERIES_2_RFID \
830 mfspr r12,SPRN_SRR1 ; \
831 LOAD_SYSCALL_HANDLER(r10) ; \
832 mtspr SPRN_SRR0,r10 ; \
833 ld r10,PACAKMSR(r13) ; \
834 mtspr SPRN_SRR1,r10 ; \
836 b . ; /* prevent speculative execution */
838 #define SYSCALL_PSERIES_3 \
839 /* Fast LE/BE switch system call */ \
840 1: mfspr r12,SPRN_SRR1 ; \
841 xori r12,r12,MSR_LE ; \
842 mtspr SPRN_SRR1,r12 ; \
843 rfid ; /* return to userspace */ \
844 b . ; /* prevent speculative execution */
846 #if defined(CONFIG_RELOCATABLE)
848 * We can't branch directly so we do it via the CTR which
849 * is volatile across system calls.
851 #define SYSCALL_PSERIES_2_DIRECT \
852 LOAD_SYSCALL_HANDLER(r12) ; \
854 mfspr r12,SPRN_SRR1 ; \
859 /* We can branch directly */
860 #define SYSCALL_PSERIES_2_DIRECT \
861 mfspr r12,SPRN_SRR1 ; \
863 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
864 b system_call_common ;
867 EXC_REAL_BEGIN(system_call, 0xc00, 0xd00)
869 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
870 * that support it) before changing to HMT_MEDIUM. That allows the KVM
871 * code to save that value into the guest state (it is the guest's PPR
872 * value). Otherwise just change to HMT_MEDIUM as userspace has
873 * already saved the PPR.
875 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
878 std r9,PACA_EXGEN+EX_R9(r13)
879 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
881 std r10,PACA_EXGEN+EX_R10(r13)
882 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
890 SYSCALL_PSERIES_2_RFID
892 EXC_REAL_END(system_call, 0xc00, 0xd00)
894 EXC_VIRT_BEGIN(system_call, 0x4c00, 0x4d00)
897 SYSCALL_PSERIES_2_DIRECT
899 EXC_VIRT_END(system_call, 0x4c00, 0x4d00)
901 TRAMP_KVM(PACA_EXGEN, 0xc00)
904 EXC_REAL(single_step, 0xd00, 0xe00)
905 EXC_VIRT(single_step, 0x4d00, 0x4e00, 0xd00)
906 TRAMP_KVM(PACA_EXGEN, 0xd00)
907 EXC_COMMON(single_step_common, 0xd00, single_step_exception)
910 __EXC_REAL_OOL_HV(h_data_storage, 0xe00, 0xe20)
911 __TRAMP_REAL_REAL_OOL_HV(h_data_storage, 0xe00)
912 EXC_VIRT_BEGIN(unused, 0x4e00, 0x4e20)
913 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
914 EXC_VIRT_END(unused, 0x4e00, 0x4e20)
915 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0xe00)
916 EXC_COMMON_BEGIN(h_data_storage_common)
918 std r10,PACA_EXGEN+EX_DAR(r13)
919 mfspr r10,SPRN_HDSISR
920 stw r10,PACA_EXGEN+EX_DSISR(r13)
921 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
923 RECONCILE_IRQ_STATE(r10, r11)
924 addi r3,r1,STACK_FRAME_OVERHEAD
927 EXC_COMMON(trap_0e_common, 0xe00, unknown_exception)
930 __EXC_REAL_OOL_HV(h_instr_storage, 0xe20, 0xe40)
931 __TRAMP_REAL_REAL_OOL_HV(h_instr_storage, 0xe20)
932 EXC_VIRT_BEGIN(unused, 0x4e20, 0x4e40)
933 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
934 EXC_VIRT_END(unused, 0x4e20, 0x4e40)
935 TRAMP_KVM_HV(PACA_EXGEN, 0xe20)
936 EXC_COMMON(h_instr_storage_common, 0xe20, unknown_exception)
939 __EXC_REAL_OOL_HV(emulation_assist, 0xe40, 0xe60)
940 __TRAMP_REAL_REAL_OOL_HV(emulation_assist, 0xe40)
941 __EXC_VIRT_OOL_HV(emulation_assist, 0x4e40, 0x4e60)
942 __TRAMP_REAL_VIRT_OOL_HV(emulation_assist, 0xe40)
943 TRAMP_KVM_HV(PACA_EXGEN, 0xe40)
944 EXC_COMMON(emulation_assist_common, 0xe40, emulation_assist_interrupt)
947 __EXC_REAL_OOL_HV_DIRECT(hmi_exception, 0xe60, 0xe80, hmi_exception_early)
948 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(hmi_exception, 0xe60)
949 EXC_VIRT_BEGIN(unused, 0x4e60, 0x4e80)
950 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
951 EXC_VIRT_END(unused, 0x4e60, 0x4e80)
952 TRAMP_KVM_HV(PACA_EXGEN, 0xe60)
953 TRAMP_REAL_BEGIN(hmi_exception_early)
954 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, 0xe60)
955 mr r10,r1 /* Save r1 */
956 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
957 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
958 std r9,_CCR(r1) /* save CR in stackframe */
959 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
960 std r11,_NIP(r1) /* save HSRR0 in stackframe */
961 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
962 std r12,_MSR(r1) /* save SRR1 in stackframe */
963 std r10,0(r1) /* make stack chain pointer */
964 std r0,GPR0(r1) /* save r0 in stackframe */
965 std r10,GPR1(r1) /* save r1 in stackframe */
966 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
967 EXCEPTION_PROLOG_COMMON_3(0xe60)
968 addi r3,r1,STACK_FRAME_OVERHEAD
969 bl hmi_exception_realmode
970 /* Windup the stack. */
971 /* Move original HSRR0 and HSRR1 into the respective regs */
989 /* restore original r1. */
993 * Go to virtual mode and pull the HMI event information from
996 .globl hmi_exception_after_realmode
997 hmi_exception_after_realmode:
999 EXCEPTION_PROLOG_0(PACA_EXGEN)
1000 b tramp_real_hmi_exception
1002 EXC_COMMON_ASYNC(hmi_exception_common, 0xe60, handle_hmi_exception)
1005 __EXC_REAL_OOL_MASKABLE_HV(h_doorbell, 0xe80, 0xea0)
1007 __EXC_REAL_OOL_MASKABLE_HV(h_virt_irq, 0xea0, 0xec0)
1009 EXC_REAL_NONE(0xec0, 0xf00)
1011 __EXC_REAL_OOL(performance_monitor, 0xf00, 0xf20)
1013 __EXC_REAL_OOL(altivec_unavailable, 0xf20, 0xf40)
1015 __EXC_REAL_OOL(vsx_unavailable, 0xf40, 0xf60)
1017 __EXC_REAL_OOL(facility_unavailable, 0xf60, 0xf80)
1019 __EXC_REAL_OOL_HV(h_facility_unavailable, 0xf80, 0xfa0)
1021 EXC_REAL_NONE(0xfa0, 0x1200)
1023 #ifdef CONFIG_CBE_RAS
1024 EXC_REAL_HV(cbe_system_error, 0x1200, 0x1300)
1026 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1200)
1028 #else /* CONFIG_CBE_RAS */
1029 EXC_REAL_NONE(0x1200, 0x1300)
1032 EXC_REAL(instruction_breakpoint, 0x1300, 0x1400)
1034 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1300)
1036 EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x1600)
1037 mtspr SPRN_SPRG_HSCRATCH0,r13
1038 EXCEPTION_PROLOG_0(PACA_EXGEN)
1039 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
1041 #ifdef CONFIG_PPC_DENORMALISATION
1042 mfspr r10,SPRN_HSRR1
1043 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
1044 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
1045 addi r11,r11,-4 /* HSRR0 is next instruction */
1050 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
1051 EXC_REAL_END(denorm_exception_hv, 0x1500, 0x1600)
1053 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1500)
1055 #ifdef CONFIG_CBE_RAS
1056 EXC_REAL_HV(cbe_maintenance, 0x1600, 0x1700)
1058 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1600)
1060 #else /* CONFIG_CBE_RAS */
1061 EXC_REAL_NONE(0x1600, 0x1700)
1064 EXC_REAL(altivec_assist, 0x1700, 0x1800)
1066 TRAMP_KVM(PACA_EXGEN, 0x1700)
1068 #ifdef CONFIG_CBE_RAS
1069 EXC_REAL_HV(cbe_thermal, 0x1800, 0x1900)
1071 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1800)
1073 #else /* CONFIG_CBE_RAS */
1074 EXC_REAL_NONE(0x1800, 0x1900)
1078 /*** Out of line interrupts support ***/
1080 /* moved from 0x200 */
1082 #ifdef CONFIG_PPC_DENORMALISATION
1083 TRAMP_REAL_BEGIN(denorm_assist)
1086 * To denormalise we need to move a copy of the register to itself.
1087 * For POWER6 do that here for all FP regs.
1090 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
1091 xori r10,r10,(MSR_FE0|MSR_FE1)
1095 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
1096 #define FMR4(n) FMR2(n) ; FMR2(n+2)
1097 #define FMR8(n) FMR4(n) ; FMR4(n+4)
1098 #define FMR16(n) FMR8(n) ; FMR8(n+8)
1099 #define FMR32(n) FMR16(n) ; FMR16(n+16)
1104 * To denormalise we need to move a copy of the register to itself.
1105 * For POWER7 do that here for the first 32 VSX registers only.
1108 oris r10,r10,MSR_VSX@h
1112 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
1113 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
1114 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
1115 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
1116 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
1119 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
1123 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
1125 * To denormalise we need to move a copy of the register to itself.
1126 * For POWER8 we need to do that for all 64 VSX registers
1130 mtspr SPRN_HSRR0,r11
1132 ld r9,PACA_EXGEN+EX_R9(r13)
1133 RESTORE_PPR_PACA(PACA_EXGEN, r10)
1135 ld r10,PACA_EXGEN+EX_CFAR(r13)
1137 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1138 ld r10,PACA_EXGEN+EX_R10(r13)
1139 ld r11,PACA_EXGEN+EX_R11(r13)
1140 ld r12,PACA_EXGEN+EX_R12(r13)
1141 ld r13,PACA_EXGEN+EX_R13(r13)
1146 /* moved from 0xe00 */
1147 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(h_doorbell, 0xe80)
1148 TRAMP_KVM_HV(PACA_EXGEN, 0xe80)
1150 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(h_virt_irq, 0xea0)
1151 TRAMP_KVM_HV(PACA_EXGEN, 0xea0)
1153 /* moved from 0xf00 */
1154 __TRAMP_REAL_REAL_OOL(performance_monitor, 0xf00)
1155 TRAMP_KVM(PACA_EXGEN, 0xf00)
1157 __TRAMP_REAL_REAL_OOL(altivec_unavailable, 0xf20)
1158 TRAMP_KVM(PACA_EXGEN, 0xf20)
1160 __TRAMP_REAL_REAL_OOL(vsx_unavailable, 0xf40)
1161 TRAMP_KVM(PACA_EXGEN, 0xf40)
1163 __TRAMP_REAL_REAL_OOL(facility_unavailable, 0xf60)
1164 TRAMP_KVM(PACA_EXGEN, 0xf60)
1166 __TRAMP_REAL_REAL_OOL_HV(h_facility_unavailable, 0xf80)
1167 TRAMP_KVM_HV(PACA_EXGEN, 0xf80)
1170 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
1171 * - If it was a decrementer interrupt, we bump the dec to max and and return.
1172 * - If it was a doorbell we return immediately since doorbells are edge
1173 * triggered and won't automatically refire.
1174 * - If it was a HMI we return immediately since we handled it in realmode
1175 * and it won't refire.
1176 * - else we hard disable and return.
1177 * This is called with r10 containing the value to OR to the paca field.
1179 #define MASKED_INTERRUPT(_H) \
1180 masked_##_H##interrupt: \
1181 std r11,PACA_EXGEN+EX_R11(r13); \
1182 lbz r11,PACAIRQHAPPENED(r13); \
1184 stb r11,PACAIRQHAPPENED(r13); \
1185 cmpwi r10,PACA_IRQ_DEC; \
1188 ori r10,r10,0xffff; \
1189 mtspr SPRN_DEC,r10; \
1191 1: cmpwi r10,PACA_IRQ_DBELL; \
1193 cmpwi r10,PACA_IRQ_HMI; \
1195 mfspr r10,SPRN_##_H##SRR1; \
1196 rldicl r10,r10,48,1; /* clear MSR_EE */ \
1197 rotldi r10,r10,16; \
1198 mtspr SPRN_##_H##SRR1,r10; \
1200 ld r9,PACA_EXGEN+EX_R9(r13); \
1201 ld r10,PACA_EXGEN+EX_R10(r13); \
1202 ld r11,PACA_EXGEN+EX_R11(r13); \
1203 GET_SCRATCH0(r13); \
1208 * Real mode exceptions actually use this too, but alternate
1209 * instruction code patches (which end up in the common .text area)
1210 * cannot reach these if they are put there.
1212 USE_FIXED_SECTION(virt_trampolines)
1217 * Called from arch_local_irq_enable when an interrupt needs
1218 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
1219 * which kind of interrupt. MSR:EE is already off. We generate a
1220 * stackframe like if a real interrupt had happened.
1222 * Note: While MSR:EE is off, we need to make sure that _MSR
1223 * in the generated frame has EE set to 1 or the exception
1224 * handler will not properly re-enable them.
1227 _GLOBAL(__replay_interrupt)
1228 /* We are going to jump to the exception common code which
1229 * will retrieve various register values from the PACA which
1230 * we don't give a damn about, so we don't bother storing them.
1237 beq decrementer_common
1239 beq hardware_interrupt_common
1242 beq h_doorbell_common
1244 beq h_virt_irq_common
1246 beq hmi_exception_common
1249 beq doorbell_super_common
1250 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
1253 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1254 TRAMP_REAL_BEGIN(kvmppc_skip_interrupt)
1256 * Here all GPRs are unchanged from when the interrupt happened
1257 * except for r13, which is saved in SPRG_SCRATCH0.
1259 mfspr r13, SPRN_SRR0
1261 mtspr SPRN_SRR0, r13
1266 TRAMP_REAL_BEGIN(kvmppc_skip_Hinterrupt)
1268 * Here all GPRs are unchanged from when the interrupt happened
1269 * except for r13, which is saved in SPRG_SCRATCH0.
1271 mfspr r13, SPRN_HSRR0
1273 mtspr SPRN_HSRR0, r13
1280 * Ensure that any handlers that get invoked from the exception prologs
1281 * above are below the first 64KB (0x10000) of the kernel image because
1282 * the prologs assemble the addresses of these handlers using the
1283 * LOAD_HANDLER macro, which uses an ori instruction.
1286 /*** Common interrupt handlers ***/
1289 #ifdef CONFIG_PPC_DOORBELL
1290 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, doorbell_exception)
1292 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, unknown_exception)
1294 EXC_COMMON_ASYNC(h_virt_irq_common, 0xea0, do_IRQ)
1295 EXC_COMMON_ASYNC(performance_monitor_common, 0xf00, performance_monitor_exception)
1296 EXC_COMMON(instruction_breakpoint_common, 0x1300, instruction_breakpoint_exception)
1297 EXC_COMMON_HV(denorm_common, 0x1500, unknown_exception)
1298 #ifdef CONFIG_ALTIVEC
1299 EXC_COMMON(altivec_assist_common, 0x1700, altivec_assist_exception)
1301 EXC_COMMON(altivec_assist_common, 0x1700, unknown_exception)
1305 * Relocation-on interrupts: A subset of the interrupts can be delivered
1306 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
1307 * it. Addresses are the same as the original interrupt addresses, but
1308 * offset by 0xc000000000004000.
1309 * It's impossible to receive interrupts below 0x300 via this mechanism.
1310 * KVM: None of these traps are from the guest ; anything that escalated
1311 * to HV=1 from HV=0 is delivered via real mode handlers.
1315 * This uses the standard macro, since the original 0x300 vector
1316 * only has extra guff for STAB-based processors -- which never
1320 __EXC_VIRT_OOL_MASKABLE_HV(h_doorbell, 0x4e80, 0x4ea0)
1322 __EXC_VIRT_OOL_MASKABLE_HV(h_virt_irq, 0x4ea0, 0x4ec0)
1324 EXC_VIRT_NONE(0x4ec0, 0x4f00)
1326 __EXC_VIRT_OOL(performance_monitor, 0x4f00, 0x4f20)
1328 __EXC_VIRT_OOL(altivec_unavailable, 0x4f20, 0x4f40)
1330 __EXC_VIRT_OOL(vsx_unavailable, 0x4f40, 0x4f60)
1332 __EXC_VIRT_OOL(facility_unavailable, 0x4f60, 0x4f80)
1334 __EXC_VIRT_OOL_HV(h_facility_unavailable, 0x4f80, 0x4fa0)
1336 EXC_VIRT_NONE(0x4fa0, 0x5200)
1338 EXC_VIRT_NONE(0x5200, 0x5300)
1340 EXC_VIRT(instruction_breakpoint, 0x5300, 0x5400, 0x1300)
1342 #ifdef CONFIG_PPC_DENORMALISATION
1343 EXC_VIRT_BEGIN(denorm_exception, 0x5500, 0x5600)
1344 b exc_real_0x1500_denorm_exception_hv
1345 EXC_VIRT_END(denorm_exception, 0x5500, 0x5600)
1347 EXC_VIRT_NONE(0x5500, 0x5600)
1350 EXC_VIRT_NONE(0x5600, 0x5700)
1352 EXC_VIRT(altivec_assist, 0x5700, 0x5800, 0x1700)
1354 EXC_VIRT_NONE(0x5800, 0x5900)
1356 EXC_COMMON_BEGIN(ppc64_runlatch_on_trampoline)
1357 b __ppc64_runlatch_on
1359 EXC_COMMON_BEGIN(altivec_unavailable_common)
1360 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1361 #ifdef CONFIG_ALTIVEC
1364 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1365 BEGIN_FTR_SECTION_NESTED(69)
1366 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1367 * transaction), go do TM stuff
1369 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1371 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1374 b fast_exception_return
1375 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1376 2: /* User process was in a transaction */
1378 RECONCILE_IRQ_STATE(r10, r11)
1379 addi r3,r1,STACK_FRAME_OVERHEAD
1380 bl altivec_unavailable_tm
1384 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1387 RECONCILE_IRQ_STATE(r10, r11)
1388 addi r3,r1,STACK_FRAME_OVERHEAD
1389 bl altivec_unavailable_exception
1392 EXC_COMMON_BEGIN(vsx_unavailable_common)
1393 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1397 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1398 BEGIN_FTR_SECTION_NESTED(69)
1399 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1400 * transaction), go do TM stuff
1402 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1404 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1407 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1408 2: /* User process was in a transaction */
1410 RECONCILE_IRQ_STATE(r10, r11)
1411 addi r3,r1,STACK_FRAME_OVERHEAD
1412 bl vsx_unavailable_tm
1416 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1419 RECONCILE_IRQ_STATE(r10, r11)
1420 addi r3,r1,STACK_FRAME_OVERHEAD
1421 bl vsx_unavailable_exception
1424 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1425 __TRAMP_REAL_VIRT_OOL_MASKABLE_HV(h_doorbell, 0xe80)
1426 __TRAMP_REAL_VIRT_OOL_MASKABLE_HV(h_virt_irq, 0xea0)
1427 __TRAMP_REAL_VIRT_OOL(performance_monitor, 0xf00)
1428 __TRAMP_REAL_VIRT_OOL(altivec_unavailable, 0xf20)
1429 __TRAMP_REAL_VIRT_OOL(vsx_unavailable, 0xf40)
1430 __TRAMP_REAL_VIRT_OOL(facility_unavailable, 0xf60)
1431 __TRAMP_REAL_VIRT_OOL_HV(h_facility_unavailable, 0xf80)
1433 USE_FIXED_SECTION(virt_trampolines)
1435 * The __end_interrupts marker must be past the out-of-line (OOL)
1436 * handlers, so that they are copied to real address 0x100 when running
1437 * a relocatable kernel. This ensures they can be reached from the short
1438 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1439 * directly, without using LOAD_HANDLER().
1442 .globl __end_interrupts
1444 DEFINE_FIXED_SYMBOL(__end_interrupts)
1446 EXC_COMMON(facility_unavailable_common, 0xf60, facility_unavailable_exception)
1447 EXC_COMMON(h_facility_unavailable_common, 0xf80, facility_unavailable_exception)
1449 #ifdef CONFIG_CBE_RAS
1450 EXC_COMMON(cbe_system_error_common, 0x1200, cbe_system_error_exception)
1451 EXC_COMMON(cbe_maintenance_common, 0x1600, cbe_maintenance_exception)
1452 EXC_COMMON(cbe_thermal_common, 0x1800, cbe_thermal_exception)
1453 #endif /* CONFIG_CBE_RAS */
1456 #ifdef CONFIG_PPC_970_NAP
1457 TRAMP_REAL_BEGIN(power4_fixup_nap)
1459 std r9,TI_LOCAL_FLAGS(r11)
1460 ld r10,_LINK(r1) /* make idle task do the */
1461 std r10,_NIP(r1) /* equivalent of a blr */
1465 CLOSE_FIXED_SECTION(real_vectors);
1466 CLOSE_FIXED_SECTION(real_trampolines);
1467 CLOSE_FIXED_SECTION(virt_vectors);
1468 CLOSE_FIXED_SECTION(virt_trampolines);
1477 #ifdef CONFIG_PPC_STD_MMU_64
1478 andis. r0,r4,0xa410 /* weird error? */
1479 bne- handle_page_fault /* if not, try to insert a HPTE */
1480 andis. r0,r4,DSISR_DABRMATCH@h
1481 bne- handle_dabr_fault
1482 CURRENT_THREAD_INFO(r11, r1)
1483 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1484 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1485 bne 77f /* then don't call hash_page now */
1488 * r3 contains the faulting address
1490 * r5 contains the trap number
1493 * at return r3 = 0 for success, 1 for page fault, negative for error
1497 bl __hash_page /* build HPTE if possible */
1498 cmpdi r3,0 /* see if __hash_page succeeded */
1501 beq fast_exc_return_irq /* Return from exception on success */
1505 #endif /* CONFIG_PPC_STD_MMU_64 */
1507 /* Here we have a page fault that hash_page can't handle. */
1511 addi r3,r1,STACK_FRAME_OVERHEAD
1517 addi r3,r1,STACK_FRAME_OVERHEAD
1522 /* We have a data breakpoint exception - handle it */
1527 addi r3,r1,STACK_FRAME_OVERHEAD
1529 12: b ret_from_except_lite
1532 #ifdef CONFIG_PPC_STD_MMU_64
1533 /* We have a page fault that hash_page could handle but HV refused
1538 addi r3,r1,STACK_FRAME_OVERHEAD
1545 * We come here as a result of a DSI at a point where we don't want
1546 * to call hash_page, such as when we are accessing memory (possibly
1547 * user memory) inside a PMU interrupt that occurred while interrupts
1548 * were soft-disabled. We want to invoke the exception handler for
1549 * the access, or panic if there isn't a handler.
1553 addi r3,r1,STACK_FRAME_OVERHEAD
1559 * Here we have detected that the kernel stack pointer is bad.
1560 * R9 contains the saved CR, r13 points to the paca,
1561 * r10 contains the (bad) kernel stack pointer,
1562 * r11 and r12 contain the saved SRR0 and SRR1.
1563 * We switch to using an emergency stack, save the registers there,
1564 * and call kernel_bad_stack(), which panics.
1567 ld r1,PACAEMERGSP(r13)
1568 subi r1,r1,64+INT_FRAME_SIZE
1574 mfspr r12,SPRN_DSISR
1600 std r10,ORIG_GPR3(r1)
1601 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1604 lhz r12,PACA_TRAP_SAVE(r13)
1606 addi r11,r1,INT_FRAME_SIZE
1611 ld r11,exception_marker@toc(r2)
1613 std r11,STACK_FRAME_OVERHEAD-16(r1)
1614 1: addi r3,r1,STACK_FRAME_OVERHEAD