arch/x86/include/asm/mmu_context.h

   1 #ifndef _ASM_X86_MMU_CONTEXT_H
   2 #define _ASM_X86_MMU_CONTEXT_H
   3
   4 #include <asm/desc.h>
   5 #include <linux/atomic.h>
   6 #include <asm/pgalloc.h>
   7 #include <asm/tlbflush.h>
   8 #include <asm/paravirt.h>
   9 #ifndef CONFIG_PARAVIRT
  10 #include <asm-generic/mm_hooks.h>
  11
  12 static inline void paravirt_activate_mm(struct mm_struct *prev,
  13                                         struct mm_struct *next)
  14 {
  15 }
  16 #endif  /* !CONFIG_PARAVIRT */
  17
  18 /*
  19  * Used for LDT copy/destruction.
  20  */
  21 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  22 void destroy_context(struct mm_struct *mm);
  23
  24
  25 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  26 {
  27 #ifdef CONFIG_SMP
  28         if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
  29                 this_cpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
  30 #endif
  31 }
  32
  33 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  34                              struct task_struct *tsk)
  35 {
  36         unsigned cpu = smp_processor_id();
  37
  38         if (likely(prev != next)) {
  39 #ifdef CONFIG_SMP
  40                 this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
  41                 this_cpu_write(cpu_tlbstate.active_mm, next);
  42 #endif
  43                 cpumask_set_cpu(cpu, mm_cpumask(next));
  44
  45                 /* Re-load page tables */
  46                 load_cr3(next->pgd);
  47
  48                 /* Stop flush ipis for the previous mm */
  49                 cpumask_clear_cpu(cpu, mm_cpumask(prev));
  50
  51                 /* Load the LDT, if the LDT is different: */
  52                 if (unlikely(prev->context.ldt != next->context.ldt))
  53                         load_LDT_nolock(&next->context);
  54         }
  55 #ifdef CONFIG_SMP
  56           else {
  57                 this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
  58                 BUG_ON(this_cpu_read(cpu_tlbstate.active_mm) != next);
  59
  60                 if (!cpumask_test_cpu(cpu, mm_cpumask(next))) {
  61                         /*
  62                          * On established mms, the mm_cpumask is only changed
  63                          * from irq context, from ptep_clear_flush() while in
  64                          * lazy tlb mode, and here. Irqs are blocked during
  65                          * schedule, protecting us from simultaneous changes.
  66                          */
  67                         cpumask_set_cpu(cpu, mm_cpumask(next));
  68                         /*
  69                          * We were in lazy tlb mode and leave_mm disabled
  70                          * tlb flush IPI delivery. We must reload CR3
  71                          * to make sure to use no freed page tables.
  72                          */
  73                         load_cr3(next->pgd);
  74                         load_LDT_nolock(&next->context);
  75                 }
  76         }
  77 #endif
  78 }
  79
  80 #define activate_mm(prev, next)                 \
  81 do {                                            \
  82         paravirt_activate_mm((prev), (next));   \
  83         switch_mm((prev), (next), NULL);        \
  84 } while (0);
  85
  86 #ifdef CONFIG_X86_32
  87 #define deactivate_mm(tsk, mm)                  \
  88 do {                                            \
  89         lazy_load_gs(0);                        \
  90 } while (0)
  91 #else
  92 #define deactivate_mm(tsk, mm)                  \
  93 do {                                            \
  94         load_gs_index(0);                       \
  95         loadsegment(fs, 0);                     \
  96 } while (0)
  97 #endif
  98
  99 #endif /* _ASM_X86_MMU_CONTEXT_H */