arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 166 {
 167         int i;
 168         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 169                 vcpu->arch.apf.gfns[i] = ~0;
 170 }
 171
 172 static void kvm_on_user_return(struct user_return_notifier *urn)
 173 {
 174         unsigned slot;
 175         struct kvm_shared_msrs *locals
 176                 = container_of(urn, struct kvm_shared_msrs, urn);
 177         struct kvm_shared_msr_values *values;
 178
 179         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 180                 values = &locals->values[slot];
 181                 if (values->host != values->curr) {
 182                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 183                         values->curr = values->host;
 184                 }
 185         }
 186         locals->registered = false;
 187         user_return_notifier_unregister(urn);
 188 }
 189
 190 static void shared_msr_update(unsigned slot, u32 msr)
 191 {
 192         u64 value;
 193         unsigned int cpu = smp_processor_id();
 194         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 195
 196         /* only read, and nobody should modify it at this time,
 197          * so don't need lock */
 198         if (slot >= shared_msrs_global.nr) {
 199                 printk(KERN_ERR "kvm: invalid MSR slot!");
 200                 return;
 201         }
 202         rdmsrl_safe(msr, &value);
 203         smsr->values[slot].host = value;
 204         smsr->values[slot].curr = value;
 205 }
 206
 207 void kvm_define_shared_msr(unsigned slot, u32 msr)
 208 {
 209         if (slot >= shared_msrs_global.nr)
 210                 shared_msrs_global.nr = slot + 1;
 211         shared_msrs_global.msrs[slot] = msr;
 212         /* we need ensured the shared_msr_global have been updated */
 213         smp_wmb();
 214 }
 215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 216
 217 static void kvm_shared_msr_cpu_online(void)
 218 {
 219         unsigned i;
 220
 221         for (i = 0; i < shared_msrs_global.nr; ++i)
 222                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 223 }
 224
 225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 226 {
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 231                 return;
 232         smsr->values[slot].curr = value;
 233         wrmsrl(shared_msrs_global.msrs[slot], value);
 234         if (!smsr->registered) {
 235                 smsr->urn.on_user_return = kvm_on_user_return;
 236                 user_return_notifier_register(&smsr->urn);
 237                 smsr->registered = true;
 238         }
 239 }
 240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 241
 242 static void drop_user_return_notifiers(void *ignore)
 243 {
 244         unsigned int cpu = smp_processor_id();
 245         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 asmlinkage void kvm_spurious_fault(void)
 265 {
 266         /* Fault while not rebooting.  We want the trace. */
 267         BUG();
 268 }
 269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 270
 271 #define EXCPT_BENIGN            0
 272 #define EXCPT_CONTRIBUTORY      1
 273 #define EXCPT_PF                2
 274
 275 static int exception_class(int vector)
 276 {
 277         switch (vector) {
 278         case PF_VECTOR:
 279                 return EXCPT_PF;
 280         case DE_VECTOR:
 281         case TS_VECTOR:
 282         case NP_VECTOR:
 283         case SS_VECTOR:
 284         case GP_VECTOR:
 285                 return EXCPT_CONTRIBUTORY;
 286         default:
 287                 break;
 288         }
 289         return EXCPT_BENIGN;
 290 }
 291
 292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 293                 unsigned nr, bool has_error, u32 error_code,
 294                 bool reinject)
 295 {
 296         u32 prev_nr;
 297         int class1, class2;
 298
 299         kvm_make_request(KVM_REQ_EVENT, vcpu);
 300
 301         if (!vcpu->arch.exception.pending) {
 302         queue:
 303                 vcpu->arch.exception.pending = true;
 304                 vcpu->arch.exception.has_error_code = has_error;
 305                 vcpu->arch.exception.nr = nr;
 306                 vcpu->arch.exception.error_code = error_code;
 307                 vcpu->arch.exception.reinject = reinject;
 308                 return;
 309         }
 310
 311         /* to check exception */
 312         prev_nr = vcpu->arch.exception.nr;
 313         if (prev_nr == DF_VECTOR) {
 314                 /* triple fault -> shutdown */
 315                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 316                 return;
 317         }
 318         class1 = exception_class(prev_nr);
 319         class2 = exception_class(nr);
 320         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 321                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 322                 /* generate double fault per SDM Table 5-5 */
 323                 vcpu->arch.exception.pending = true;
 324                 vcpu->arch.exception.has_error_code = true;
 325                 vcpu->arch.exception.nr = DF_VECTOR;
 326                 vcpu->arch.exception.error_code = 0;
 327         } else
 328                 /* replace previous exception with a new one in a hope
 329                    that instruction re-execution will regenerate lost
 330                    exception */
 331                 goto queue;
 332 }
 333
 334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, false);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 339
 340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 341 {
 342         kvm_multiple_exception(vcpu, nr, false, 0, true);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 345
 346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 347 {
 348         if (err)
 349                 kvm_inject_gp(vcpu, 0);
 350         else
 351                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 352 }
 353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 354
 355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 356 {
 357         ++vcpu->stat.pf_guest;
 358         vcpu->arch.cr2 = fault->address;
 359         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 362
 363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 364 {
 365         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 366                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 367         else
 368                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 369 }
 370
 371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 372 {
 373         atomic_inc(&vcpu->arch.nmi_queued);
 374         kvm_make_request(KVM_REQ_NMI, vcpu);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 377
 378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 383
 384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 385 {
 386         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 387 }
 388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 389
 390 /*
 391  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 392  * a #GP and return false.
 393  */
 394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 395 {
 396         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 397                 return true;
 398         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 399         return false;
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 402
 403 /*
 404  * This function will be used to read from the physical memory of the currently
 405  * running guest. The difference to kvm_read_guest_page is that this function
 406  * can read from guest physical or from the guest's guest physical memory.
 407  */
 408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 409                             gfn_t ngfn, void *data, int offset, int len,
 410                             u32 access)
 411 {
 412         gfn_t real_gfn;
 413         gpa_t ngpa;
 414
 415         ngpa     = gfn_to_gpa(ngfn);
 416         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 417         if (real_gfn == UNMAPPED_GVA)
 418                 return -EFAULT;
 419
 420         real_gfn = gpa_to_gfn(real_gfn);
 421
 422         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 425
 426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 427                                void *data, int offset, int len, u32 access)
 428 {
 429         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 430                                        data, offset, len, access);
 431 }
 432
 433 /*
 434  * Load the pae pdptrs.  Return true is they are all valid.
 435  */
 436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 437 {
 438         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 439         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 440         int i;
 441         int ret;
 442         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 443
 444         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 445                                       offset * sizeof(u64), sizeof(pdpte),
 446                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 447         if (ret < 0) {
 448                 ret = 0;
 449                 goto out;
 450         }
 451         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 452                 if (is_present_gpte(pdpte[i]) &&
 453                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 454                         ret = 0;
 455                         goto out;
 456                 }
 457         }
 458         ret = 1;
 459
 460         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 461         __set_bit(VCPU_EXREG_PDPTR,
 462                   (unsigned long *)&vcpu->arch.regs_avail);
 463         __set_bit(VCPU_EXREG_PDPTR,
 464                   (unsigned long *)&vcpu->arch.regs_dirty);
 465 out:
 466
 467         return ret;
 468 }
 469 EXPORT_SYMBOL_GPL(load_pdptrs);
 470
 471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 472 {
 473         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 474         bool changed = true;
 475         int offset;
 476         gfn_t gfn;
 477         int r;
 478
 479         if (is_long_mode(vcpu) || !is_pae(vcpu))
 480                 return false;
 481
 482         if (!test_bit(VCPU_EXREG_PDPTR,
 483                       (unsigned long *)&vcpu->arch.regs_avail))
 484                 return true;
 485
 486         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 487         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 488         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 489                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 490         if (r < 0)
 491                 goto out;
 492         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 493 out:
 494
 495         return changed;
 496 }
 497
 498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 499 {
 500         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 501         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 502                                     X86_CR0_CD | X86_CR0_NW;
 503
 504         cr0 |= X86_CR0_ET;
 505
 506 #ifdef CONFIG_X86_64
 507         if (cr0 & 0xffffffff00000000UL)
 508                 return 1;
 509 #endif
 510
 511         cr0 &= ~CR0_RESERVED_BITS;
 512
 513         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 514                 return 1;
 515
 516         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 517                 return 1;
 518
 519         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 520 #ifdef CONFIG_X86_64
 521                 if ((vcpu->arch.efer & EFER_LME)) {
 522                         int cs_db, cs_l;
 523
 524                         if (!is_pae(vcpu))
 525                                 return 1;
 526                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 527                         if (cs_l)
 528                                 return 1;
 529                 } else
 530 #endif
 531                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 532                                                  kvm_read_cr3(vcpu)))
 533                         return 1;
 534         }
 535
 536         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 537                 return 1;
 538
 539         kvm_x86_ops->set_cr0(vcpu, cr0);
 540
 541         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 542                 kvm_clear_async_pf_completion_queue(vcpu);
 543                 kvm_async_pf_hash_reset(vcpu);
 544         }
 545
 546         if ((cr0 ^ old_cr0) & update_bits)
 547                 kvm_mmu_reset_context(vcpu);
 548         return 0;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 551
 552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 553 {
 554         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 555 }
 556 EXPORT_SYMBOL_GPL(kvm_lmsw);
 557
 558 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 559 {
 560         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 561                         !vcpu->guest_xcr0_loaded) {
 562                 /* kvm_set_xcr() also depends on this */
 563                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 564                 vcpu->guest_xcr0_loaded = 1;
 565         }
 566 }
 567
 568 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 569 {
 570         if (vcpu->guest_xcr0_loaded) {
 571                 if (vcpu->arch.xcr0 != host_xcr0)
 572                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 573                 vcpu->guest_xcr0_loaded = 0;
 574         }
 575 }
 576
 577 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 578 {
 579         u64 xcr0;
 580
 581         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 582         if (index != XCR_XFEATURE_ENABLED_MASK)
 583                 return 1;
 584         xcr0 = xcr;
 585         if (!(xcr0 & XSTATE_FP))
 586                 return 1;
 587         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 588                 return 1;
 589         if (xcr0 & ~vcpu->arch.guest_supported_xcr0)
 590                 return 1;
 591         kvm_put_guest_xcr0(vcpu);
 592         vcpu->arch.xcr0 = xcr0;
 593         return 0;
 594 }
 595
 596 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 597 {
 598         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 599             __kvm_set_xcr(vcpu, index, xcr)) {
 600                 kvm_inject_gp(vcpu, 0);
 601                 return 1;
 602         }
 603         return 0;
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 606
 607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 608 {
 609         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 610         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 611                                    X86_CR4_PAE | X86_CR4_SMEP;
 612         if (cr4 & CR4_RESERVED_BITS)
 613                 return 1;
 614
 615         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 616                 return 1;
 617
 618         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 619                 return 1;
 620
 621         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 622                 return 1;
 623
 624         if (is_long_mode(vcpu)) {
 625                 if (!(cr4 & X86_CR4_PAE))
 626                         return 1;
 627         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 628                    && ((cr4 ^ old_cr4) & pdptr_bits)
 629                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 630                                    kvm_read_cr3(vcpu)))
 631                 return 1;
 632
 633         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 634                 if (!guest_cpuid_has_pcid(vcpu))
 635                         return 1;
 636
 637                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 638                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 639                         return 1;
 640         }
 641
 642         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 643                 return 1;
 644
 645         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 646             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 647                 kvm_mmu_reset_context(vcpu);
 648
 649         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 650                 kvm_update_cpuid(vcpu);
 651
 652         return 0;
 653 }
 654 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 655
 656 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 657 {
 658         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 659                 kvm_mmu_sync_roots(vcpu);
 660                 kvm_mmu_flush_tlb(vcpu);
 661                 return 0;
 662         }
 663
 664         if (is_long_mode(vcpu)) {
 665                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 666                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 667                                 return 1;
 668                 } else
 669                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 670                                 return 1;
 671         } else {
 672                 if (is_pae(vcpu)) {
 673                         if (cr3 & CR3_PAE_RESERVED_BITS)
 674                                 return 1;
 675                         if (is_paging(vcpu) &&
 676                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 677                                 return 1;
 678                 }
 679                 /*
 680                  * We don't check reserved bits in nonpae mode, because
 681                  * this isn't enforced, and VMware depends on this.
 682                  */
 683         }
 684
 685         vcpu->arch.cr3 = cr3;
 686         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 687         kvm_mmu_new_cr3(vcpu);
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 691
 692 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 693 {
 694         if (cr8 & CR8_RESERVED_BITS)
 695                 return 1;
 696         if (irqchip_in_kernel(vcpu->kvm))
 697                 kvm_lapic_set_tpr(vcpu, cr8);
 698         else
 699                 vcpu->arch.cr8 = cr8;
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 703
 704 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 705 {
 706         if (irqchip_in_kernel(vcpu->kvm))
 707                 return kvm_lapic_get_cr8(vcpu);
 708         else
 709                 return vcpu->arch.cr8;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 712
 713 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 714 {
 715         unsigned long dr7;
 716
 717         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 718                 dr7 = vcpu->arch.guest_debug_dr7;
 719         else
 720                 dr7 = vcpu->arch.dr7;
 721         kvm_x86_ops->set_dr7(vcpu, dr7);
 722         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 723 }
 724
 725 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 726 {
 727         switch (dr) {
 728         case 0 ... 3:
 729                 vcpu->arch.db[dr] = val;
 730                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 731                         vcpu->arch.eff_db[dr] = val;
 732                 break;
 733         case 4:
 734                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 735                         return 1; /* #UD */
 736                 /* fall through */
 737         case 6:
 738                 if (val & 0xffffffff00000000ULL)
 739                         return -1; /* #GP */
 740                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 741                 break;
 742         case 5:
 743                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 744                         return 1; /* #UD */
 745                 /* fall through */
 746         default: /* 7 */
 747                 if (val & 0xffffffff00000000ULL)
 748                         return -1; /* #GP */
 749                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 750                 kvm_update_dr7(vcpu);
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 758 {
 759         int res;
 760
 761         res = __kvm_set_dr(vcpu, dr, val);
 762         if (res > 0)
 763                 kvm_queue_exception(vcpu, UD_VECTOR);
 764         else if (res < 0)
 765                 kvm_inject_gp(vcpu, 0);
 766
 767         return res;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_dr);
 770
 771 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 772 {
 773         switch (dr) {
 774         case 0 ... 3:
 775                 *val = vcpu->arch.db[dr];
 776                 break;
 777         case 4:
 778                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 779                         return 1;
 780                 /* fall through */
 781         case 6:
 782                 *val = vcpu->arch.dr6;
 783                 break;
 784         case 5:
 785                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                         return 1;
 787                 /* fall through */
 788         default: /* 7 */
 789                 *val = vcpu->arch.dr7;
 790                 break;
 791         }
 792
 793         return 0;
 794 }
 795
 796 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 797 {
 798         if (_kvm_get_dr(vcpu, dr, val)) {
 799                 kvm_queue_exception(vcpu, UD_VECTOR);
 800                 return 1;
 801         }
 802         return 0;
 803 }
 804 EXPORT_SYMBOL_GPL(kvm_get_dr);
 805
 806 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 807 {
 808         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 809         u64 data;
 810         int err;
 811
 812         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 813         if (err)
 814                 return err;
 815         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 816         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 817         return err;
 818 }
 819 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 820
 821 /*
 822  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 823  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 824  *
 825  * This list is modified at module load time to reflect the
 826  * capabilities of the host cpu. This capabilities test skips MSRs that are
 827  * kvm-specific. Those are put in the beginning of the list.
 828  */
 829
 830 #define KVM_SAVE_MSRS_BEGIN     10
 831 static u32 msrs_to_save[] = {
 832         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 833         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 834         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 835         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 836         MSR_KVM_PV_EOI_EN,
 837         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 838         MSR_STAR,
 839 #ifdef CONFIG_X86_64
 840         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 841 #endif
 842         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 843         MSR_IA32_FEATURE_CONTROL
 844 };
 845
 846 static unsigned num_msrs_to_save;
 847
 848 static const u32 emulated_msrs[] = {
 849         MSR_IA32_TSC_ADJUST,
 850         MSR_IA32_TSCDEADLINE,
 851         MSR_IA32_MISC_ENABLE,
 852         MSR_IA32_MCG_STATUS,
 853         MSR_IA32_MCG_CTL,
 854 };
 855
 856 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 857 {
 858         if (efer & efer_reserved_bits)
 859                 return false;
 860
 861         if (efer & EFER_FFXSR) {
 862                 struct kvm_cpuid_entry2 *feat;
 863
 864                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 865                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 866                         return false;
 867         }
 868
 869         if (efer & EFER_SVME) {
 870                 struct kvm_cpuid_entry2 *feat;
 871
 872                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 873                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 874                         return false;
 875         }
 876
 877         return true;
 878 }
 879 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 880
 881 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 882 {
 883         u64 old_efer = vcpu->arch.efer;
 884
 885         if (!kvm_valid_efer(vcpu, efer))
 886                 return 1;
 887
 888         if (is_paging(vcpu)
 889             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 890                 return 1;
 891
 892         efer &= ~EFER_LMA;
 893         efer |= vcpu->arch.efer & EFER_LMA;
 894
 895         kvm_x86_ops->set_efer(vcpu, efer);
 896
 897         /* Update reserved bits */
 898         if ((efer ^ old_efer) & EFER_NX)
 899                 kvm_mmu_reset_context(vcpu);
 900
 901         return 0;
 902 }
 903
 904 void kvm_enable_efer_bits(u64 mask)
 905 {
 906        efer_reserved_bits &= ~mask;
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 909
 910
 911 /*
 912  * Writes msr value into into the appropriate "register".
 913  * Returns 0 on success, non-0 otherwise.
 914  * Assumes vcpu_load() was already called.
 915  */
 916 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 917 {
 918         return kvm_x86_ops->set_msr(vcpu, msr);
 919 }
 920
 921 /*
 922  * Adapt set_msr() to msr_io()'s calling convention
 923  */
 924 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 925 {
 926         struct msr_data msr;
 927
 928         msr.data = *data;
 929         msr.index = index;
 930         msr.host_initiated = true;
 931         return kvm_set_msr(vcpu, &msr);
 932 }
 933
 934 #ifdef CONFIG_X86_64
 935 struct pvclock_gtod_data {
 936         seqcount_t      seq;
 937
 938         struct { /* extract of a clocksource struct */
 939                 int vclock_mode;
 940                 cycle_t cycle_last;
 941                 cycle_t mask;
 942                 u32     mult;
 943                 u32     shift;
 944         } clock;
 945
 946         /* open coded 'struct timespec' */
 947         u64             monotonic_time_snsec;
 948         time_t          monotonic_time_sec;
 949 };
 950
 951 static struct pvclock_gtod_data pvclock_gtod_data;
 952
 953 static void update_pvclock_gtod(struct timekeeper *tk)
 954 {
 955         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 956
 957         write_seqcount_begin(&vdata->seq);
 958
 959         /* copy pvclock gtod data */
 960         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 961         vdata->clock.cycle_last         = tk->clock->cycle_last;
 962         vdata->clock.mask               = tk->clock->mask;
 963         vdata->clock.mult               = tk->mult;
 964         vdata->clock.shift              = tk->shift;
 965
 966         vdata->monotonic_time_sec       = tk->xtime_sec
 967                                         + tk->wall_to_monotonic.tv_sec;
 968         vdata->monotonic_time_snsec     = tk->xtime_nsec
 969                                         + (tk->wall_to_monotonic.tv_nsec
 970                                                 << tk->shift);
 971         while (vdata->monotonic_time_snsec >=
 972                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 973                 vdata->monotonic_time_snsec -=
 974                                         ((u64)NSEC_PER_SEC) << tk->shift;
 975                 vdata->monotonic_time_sec++;
 976         }
 977
 978         write_seqcount_end(&vdata->seq);
 979 }
 980 #endif
 981
 982
 983 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 984 {
 985         int version;
 986         int r;
 987         struct pvclock_wall_clock wc;
 988         struct timespec boot;
 989
 990         if (!wall_clock)
 991                 return;
 992
 993         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 994         if (r)
 995                 return;
 996
 997         if (version & 1)
 998                 ++version;  /* first time write, random junk */
 999
1000         ++version;
1001
1002         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1003
1004         /*
1005          * The guest calculates current wall clock time by adding
1006          * system time (updated by kvm_guest_time_update below) to the
1007          * wall clock specified here.  guest system time equals host
1008          * system time for us, thus we must fill in host boot time here.
1009          */
1010         getboottime(&boot);
1011
1012         if (kvm->arch.kvmclock_offset) {
1013                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1014                 boot = timespec_sub(boot, ts);
1015         }
1016         wc.sec = boot.tv_sec;
1017         wc.nsec = boot.tv_nsec;
1018         wc.version = version;
1019
1020         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1021
1022         version++;
1023         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1024 }
1025
1026 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1027 {
1028         uint32_t quotient, remainder;
1029
1030         /* Don't try to replace with do_div(), this one calculates
1031          * "(dividend << 32) / divisor" */
1032         __asm__ ( "divl %4"
1033                   : "=a" (quotient), "=d" (remainder)
1034                   : "0" (0), "1" (dividend), "r" (divisor) );
1035         return quotient;
1036 }
1037
1038 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1039                                s8 *pshift, u32 *pmultiplier)
1040 {
1041         uint64_t scaled64;
1042         int32_t  shift = 0;
1043         uint64_t tps64;
1044         uint32_t tps32;
1045
1046         tps64 = base_khz * 1000LL;
1047         scaled64 = scaled_khz * 1000LL;
1048         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1049                 tps64 >>= 1;
1050                 shift--;
1051         }
1052
1053         tps32 = (uint32_t)tps64;
1054         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1055                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1056                         scaled64 >>= 1;
1057                 else
1058                         tps32 <<= 1;
1059                 shift++;
1060         }
1061
1062         *pshift = shift;
1063         *pmultiplier = div_frac(scaled64, tps32);
1064
1065         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1066                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1067 }
1068
1069 static inline u64 get_kernel_ns(void)
1070 {
1071         struct timespec ts;
1072
1073         WARN_ON(preemptible());
1074         ktime_get_ts(&ts);
1075         monotonic_to_bootbased(&ts);
1076         return timespec_to_ns(&ts);
1077 }
1078
1079 #ifdef CONFIG_X86_64
1080 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1081 #endif
1082
1083 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1084 unsigned long max_tsc_khz;
1085
1086 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1087 {
1088         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1089                                    vcpu->arch.virtual_tsc_shift);
1090 }
1091
1092 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1093 {
1094         u64 v = (u64)khz * (1000000 + ppm);
1095         do_div(v, 1000000);
1096         return v;
1097 }
1098
1099 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1100 {
1101         u32 thresh_lo, thresh_hi;
1102         int use_scaling = 0;
1103
1104         /* tsc_khz can be zero if TSC calibration fails */
1105         if (this_tsc_khz == 0)
1106                 return;
1107
1108         /* Compute a scale to convert nanoseconds in TSC cycles */
1109         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1110                            &vcpu->arch.virtual_tsc_shift,
1111                            &vcpu->arch.virtual_tsc_mult);
1112         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1113
1114         /*
1115          * Compute the variation in TSC rate which is acceptable
1116          * within the range of tolerance and decide if the
1117          * rate being applied is within that bounds of the hardware
1118          * rate.  If so, no scaling or compensation need be done.
1119          */
1120         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1121         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1122         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1123                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1124                 use_scaling = 1;
1125         }
1126         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1127 }
1128
1129 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1130 {
1131         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1132                                       vcpu->arch.virtual_tsc_mult,
1133                                       vcpu->arch.virtual_tsc_shift);
1134         tsc += vcpu->arch.this_tsc_write;
1135         return tsc;
1136 }
1137
1138 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1139 {
1140 #ifdef CONFIG_X86_64
1141         bool vcpus_matched;
1142         bool do_request = false;
1143         struct kvm_arch *ka = &vcpu->kvm->arch;
1144         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1145
1146         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1147                          atomic_read(&vcpu->kvm->online_vcpus));
1148
1149         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1150                 if (!ka->use_master_clock)
1151                         do_request = 1;
1152
1153         if (!vcpus_matched && ka->use_master_clock)
1154                         do_request = 1;
1155
1156         if (do_request)
1157                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1158
1159         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1160                             atomic_read(&vcpu->kvm->online_vcpus),
1161                             ka->use_master_clock, gtod->clock.vclock_mode);
1162 #endif
1163 }
1164
1165 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1166 {
1167         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1168         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1169 }
1170
1171 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1172 {
1173         struct kvm *kvm = vcpu->kvm;
1174         u64 offset, ns, elapsed;
1175         unsigned long flags;
1176         s64 usdiff;
1177         bool matched;
1178         u64 data = msr->data;
1179
1180         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1181         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1182         ns = get_kernel_ns();
1183         elapsed = ns - kvm->arch.last_tsc_nsec;
1184
1185         if (vcpu->arch.virtual_tsc_khz) {
1186                 int faulted = 0;
1187
1188                 /* n.b - signed multiplication and division required */
1189                 usdiff = data - kvm->arch.last_tsc_write;
1190 #ifdef CONFIG_X86_64
1191                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1192 #else
1193                 /* do_div() only does unsigned */
1194                 asm("1: idivl %[divisor]\n"
1195                     "2: xor %%edx, %%edx\n"
1196                     "   movl $0, %[faulted]\n"
1197                     "3:\n"
1198                     ".section .fixup,\"ax\"\n"
1199                     "4: movl $1, %[faulted]\n"
1200                     "   jmp  3b\n"
1201                     ".previous\n"
1202
1203                 _ASM_EXTABLE(1b, 4b)
1204
1205                 : "=A"(usdiff), [faulted] "=r" (faulted)
1206                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1207
1208 #endif
1209                 do_div(elapsed, 1000);
1210                 usdiff -= elapsed;
1211                 if (usdiff < 0)
1212                         usdiff = -usdiff;
1213
1214                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1215                 if (faulted)
1216                         usdiff = USEC_PER_SEC;
1217         } else
1218                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1219
1220         /*
1221          * Special case: TSC write with a small delta (1 second) of virtual
1222          * cycle time against real time is interpreted as an attempt to
1223          * synchronize the CPU.
1224          *
1225          * For a reliable TSC, we can match TSC offsets, and for an unstable
1226          * TSC, we add elapsed time in this computation.  We could let the
1227          * compensation code attempt to catch up if we fall behind, but
1228          * it's better to try to match offsets from the beginning.
1229          */
1230         if (usdiff < USEC_PER_SEC &&
1231             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1232                 if (!check_tsc_unstable()) {
1233                         offset = kvm->arch.cur_tsc_offset;
1234                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1235                 } else {
1236                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1237                         data += delta;
1238                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1239                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1240                 }
1241                 matched = true;
1242         } else {
1243                 /*
1244                  * We split periods of matched TSC writes into generations.
1245                  * For each generation, we track the original measured
1246                  * nanosecond time, offset, and write, so if TSCs are in
1247                  * sync, we can match exact offset, and if not, we can match
1248                  * exact software computation in compute_guest_tsc()
1249                  *
1250                  * These values are tracked in kvm->arch.cur_xxx variables.
1251                  */
1252                 kvm->arch.cur_tsc_generation++;
1253                 kvm->arch.cur_tsc_nsec = ns;
1254                 kvm->arch.cur_tsc_write = data;
1255                 kvm->arch.cur_tsc_offset = offset;
1256                 matched = false;
1257                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1258                          kvm->arch.cur_tsc_generation, data);
1259         }
1260
1261         /*
1262          * We also track th most recent recorded KHZ, write and time to
1263          * allow the matching interval to be extended at each write.
1264          */
1265         kvm->arch.last_tsc_nsec = ns;
1266         kvm->arch.last_tsc_write = data;
1267         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1268
1269         /* Reset of TSC must disable overshoot protection below */
1270         vcpu->arch.hv_clock.tsc_timestamp = 0;
1271         vcpu->arch.last_guest_tsc = data;
1272
1273         /* Keep track of which generation this VCPU has synchronized to */
1274         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1275         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1276         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1277
1278         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1279                 update_ia32_tsc_adjust_msr(vcpu, offset);
1280         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1281         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1282
1283         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1284         if (matched)
1285                 kvm->arch.nr_vcpus_matched_tsc++;
1286         else
1287                 kvm->arch.nr_vcpus_matched_tsc = 0;
1288
1289         kvm_track_tsc_matching(vcpu);
1290         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1291 }
1292
1293 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1294
1295 #ifdef CONFIG_X86_64
1296
1297 static cycle_t read_tsc(void)
1298 {
1299         cycle_t ret;
1300         u64 last;
1301
1302         /*
1303          * Empirically, a fence (of type that depends on the CPU)
1304          * before rdtsc is enough to ensure that rdtsc is ordered
1305          * with respect to loads.  The various CPU manuals are unclear
1306          * as to whether rdtsc can be reordered with later loads,
1307          * but no one has ever seen it happen.
1308          */
1309         rdtsc_barrier();
1310         ret = (cycle_t)vget_cycles();
1311
1312         last = pvclock_gtod_data.clock.cycle_last;
1313
1314         if (likely(ret >= last))
1315                 return ret;
1316
1317         /*
1318          * GCC likes to generate cmov here, but this branch is extremely
1319          * predictable (it's just a funciton of time and the likely is
1320          * very likely) and there's a data dependence, so force GCC
1321          * to generate a branch instead.  I don't barrier() because
1322          * we don't actually need a barrier, and if this function
1323          * ever gets inlined it will generate worse code.
1324          */
1325         asm volatile ("");
1326         return last;
1327 }
1328
1329 static inline u64 vgettsc(cycle_t *cycle_now)
1330 {
1331         long v;
1332         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1333
1334         *cycle_now = read_tsc();
1335
1336         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1337         return v * gtod->clock.mult;
1338 }
1339
1340 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1341 {
1342         unsigned long seq;
1343         u64 ns;
1344         int mode;
1345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1346
1347         ts->tv_nsec = 0;
1348         do {
1349                 seq = read_seqcount_begin(&gtod->seq);
1350                 mode = gtod->clock.vclock_mode;
1351                 ts->tv_sec = gtod->monotonic_time_sec;
1352                 ns = gtod->monotonic_time_snsec;
1353                 ns += vgettsc(cycle_now);
1354                 ns >>= gtod->clock.shift;
1355         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1356         timespec_add_ns(ts, ns);
1357
1358         return mode;
1359 }
1360
1361 /* returns true if host is using tsc clocksource */
1362 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1363 {
1364         struct timespec ts;
1365
1366         /* checked again under seqlock below */
1367         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1368                 return false;
1369
1370         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1371                 return false;
1372
1373         monotonic_to_bootbased(&ts);
1374         *kernel_ns = timespec_to_ns(&ts);
1375
1376         return true;
1377 }
1378 #endif
1379
1380 /*
1381  *
1382  * Assuming a stable TSC across physical CPUS, and a stable TSC
1383  * across virtual CPUs, the following condition is possible.
1384  * Each numbered line represents an event visible to both
1385  * CPUs at the next numbered event.
1386  *
1387  * "timespecX" represents host monotonic time. "tscX" represents
1388  * RDTSC value.
1389  *
1390  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1391  *
1392  * 1.  read timespec0,tsc0
1393  * 2.                                   | timespec1 = timespec0 + N
1394  *                                      | tsc1 = tsc0 + M
1395  * 3. transition to guest               | transition to guest
1396  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1397  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1398  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1399  *
1400  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1401  *
1402  *      - ret0 < ret1
1403  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1404  *              ...
1405  *      - 0 < N - M => M < N
1406  *
1407  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1408  * always the case (the difference between two distinct xtime instances
1409  * might be smaller then the difference between corresponding TSC reads,
1410  * when updating guest vcpus pvclock areas).
1411  *
1412  * To avoid that problem, do not allow visibility of distinct
1413  * system_timestamp/tsc_timestamp values simultaneously: use a master
1414  * copy of host monotonic time values. Update that master copy
1415  * in lockstep.
1416  *
1417  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1418  *
1419  */
1420
1421 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1422 {
1423 #ifdef CONFIG_X86_64
1424         struct kvm_arch *ka = &kvm->arch;
1425         int vclock_mode;
1426         bool host_tsc_clocksource, vcpus_matched;
1427
1428         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1429                         atomic_read(&kvm->online_vcpus));
1430
1431         /*
1432          * If the host uses TSC clock, then passthrough TSC as stable
1433          * to the guest.
1434          */
1435         host_tsc_clocksource = kvm_get_time_and_clockread(
1436                                         &ka->master_kernel_ns,
1437                                         &ka->master_cycle_now);
1438
1439         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1440
1441         if (ka->use_master_clock)
1442                 atomic_set(&kvm_guest_has_master_clock, 1);
1443
1444         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1445         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1446                                         vcpus_matched);
1447 #endif
1448 }
1449
1450 static void kvm_gen_update_masterclock(struct kvm *kvm)
1451 {
1452 #ifdef CONFIG_X86_64
1453         int i;
1454         struct kvm_vcpu *vcpu;
1455         struct kvm_arch *ka = &kvm->arch;
1456
1457         spin_lock(&ka->pvclock_gtod_sync_lock);
1458         kvm_make_mclock_inprogress_request(kvm);
1459         /* no guest entries from this point */
1460         pvclock_update_vm_gtod_copy(kvm);
1461
1462         kvm_for_each_vcpu(i, vcpu, kvm)
1463                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1464
1465         /* guest entries allowed */
1466         kvm_for_each_vcpu(i, vcpu, kvm)
1467                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1468
1469         spin_unlock(&ka->pvclock_gtod_sync_lock);
1470 #endif
1471 }
1472
1473 static int kvm_guest_time_update(struct kvm_vcpu *v)
1474 {
1475         unsigned long flags, this_tsc_khz;
1476         struct kvm_vcpu_arch *vcpu = &v->arch;
1477         struct kvm_arch *ka = &v->kvm->arch;
1478         s64 kernel_ns, max_kernel_ns;
1479         u64 tsc_timestamp, host_tsc;
1480         struct pvclock_vcpu_time_info guest_hv_clock;
1481         u8 pvclock_flags;
1482         bool use_master_clock;
1483
1484         kernel_ns = 0;
1485         host_tsc = 0;
1486
1487         /*
1488          * If the host uses TSC clock, then passthrough TSC as stable
1489          * to the guest.
1490          */
1491         spin_lock(&ka->pvclock_gtod_sync_lock);
1492         use_master_clock = ka->use_master_clock;
1493         if (use_master_clock) {
1494                 host_tsc = ka->master_cycle_now;
1495                 kernel_ns = ka->master_kernel_ns;
1496         }
1497         spin_unlock(&ka->pvclock_gtod_sync_lock);
1498
1499         /* Keep irq disabled to prevent changes to the clock */
1500         local_irq_save(flags);
1501         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1502         if (unlikely(this_tsc_khz == 0)) {
1503                 local_irq_restore(flags);
1504                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1505                 return 1;
1506         }
1507         if (!use_master_clock) {
1508                 host_tsc = native_read_tsc();
1509                 kernel_ns = get_kernel_ns();
1510         }
1511
1512         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1513
1514         /*
1515          * We may have to catch up the TSC to match elapsed wall clock
1516          * time for two reasons, even if kvmclock is used.
1517          *   1) CPU could have been running below the maximum TSC rate
1518          *   2) Broken TSC compensation resets the base at each VCPU
1519          *      entry to avoid unknown leaps of TSC even when running
1520          *      again on the same CPU.  This may cause apparent elapsed
1521          *      time to disappear, and the guest to stand still or run
1522          *      very slowly.
1523          */
1524         if (vcpu->tsc_catchup) {
1525                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1526                 if (tsc > tsc_timestamp) {
1527                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1528                         tsc_timestamp = tsc;
1529                 }
1530         }
1531
1532         local_irq_restore(flags);
1533
1534         if (!vcpu->pv_time_enabled)
1535                 return 0;
1536
1537         /*
1538          * Time as measured by the TSC may go backwards when resetting the base
1539          * tsc_timestamp.  The reason for this is that the TSC resolution is
1540          * higher than the resolution of the other clock scales.  Thus, many
1541          * possible measurments of the TSC correspond to one measurement of any
1542          * other clock, and so a spread of values is possible.  This is not a
1543          * problem for the computation of the nanosecond clock; with TSC rates
1544          * around 1GHZ, there can only be a few cycles which correspond to one
1545          * nanosecond value, and any path through this code will inevitably
1546          * take longer than that.  However, with the kernel_ns value itself,
1547          * the precision may be much lower, down to HZ granularity.  If the
1548          * first sampling of TSC against kernel_ns ends in the low part of the
1549          * range, and the second in the high end of the range, we can get:
1550          *
1551          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1552          *
1553          * As the sampling errors potentially range in the thousands of cycles,
1554          * it is possible such a time value has already been observed by the
1555          * guest.  To protect against this, we must compute the system time as
1556          * observed by the guest and ensure the new system time is greater.
1557          */
1558         max_kernel_ns = 0;
1559         if (vcpu->hv_clock.tsc_timestamp) {
1560                 max_kernel_ns = vcpu->last_guest_tsc -
1561                                 vcpu->hv_clock.tsc_timestamp;
1562                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1563                                     vcpu->hv_clock.tsc_to_system_mul,
1564                                     vcpu->hv_clock.tsc_shift);
1565                 max_kernel_ns += vcpu->last_kernel_ns;
1566         }
1567
1568         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1569                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1570                                    &vcpu->hv_clock.tsc_shift,
1571                                    &vcpu->hv_clock.tsc_to_system_mul);
1572                 vcpu->hw_tsc_khz = this_tsc_khz;
1573         }
1574
1575         /* with a master <monotonic time, tsc value> tuple,
1576          * pvclock clock reads always increase at the (scaled) rate
1577          * of guest TSC - no need to deal with sampling errors.
1578          */
1579         if (!use_master_clock) {
1580                 if (max_kernel_ns > kernel_ns)
1581                         kernel_ns = max_kernel_ns;
1582         }
1583         /* With all the info we got, fill in the values */
1584         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1585         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1586         vcpu->last_kernel_ns = kernel_ns;
1587         vcpu->last_guest_tsc = tsc_timestamp;
1588
1589         /*
1590          * The interface expects us to write an even number signaling that the
1591          * update is finished. Since the guest won't see the intermediate
1592          * state, we just increase by 2 at the end.
1593          */
1594         vcpu->hv_clock.version += 2;
1595
1596         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1597                 &guest_hv_clock, sizeof(guest_hv_clock))))
1598                 return 0;
1599
1600         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1601         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1602
1603         if (vcpu->pvclock_set_guest_stopped_request) {
1604                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1605                 vcpu->pvclock_set_guest_stopped_request = false;
1606         }
1607
1608         /* If the host uses TSC clocksource, then it is stable */
1609         if (use_master_clock)
1610                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1611
1612         vcpu->hv_clock.flags = pvclock_flags;
1613
1614         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1615                                 &vcpu->hv_clock,
1616                                 sizeof(vcpu->hv_clock));
1617         return 0;
1618 }
1619
1620 /*
1621  * kvmclock updates which are isolated to a given vcpu, such as
1622  * vcpu->cpu migration, should not allow system_timestamp from
1623  * the rest of the vcpus to remain static. Otherwise ntp frequency
1624  * correction applies to one vcpu's system_timestamp but not
1625  * the others.
1626  *
1627  * So in those cases, request a kvmclock update for all vcpus.
1628  * The worst case for a remote vcpu to update its kvmclock
1629  * is then bounded by maximum nohz sleep latency.
1630  */
1631
1632 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1633 {
1634         int i;
1635         struct kvm *kvm = v->kvm;
1636         struct kvm_vcpu *vcpu;
1637
1638         kvm_for_each_vcpu(i, vcpu, kvm) {
1639                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1640                 kvm_vcpu_kick(vcpu);
1641         }
1642 }
1643
1644 static bool msr_mtrr_valid(unsigned msr)
1645 {
1646         switch (msr) {
1647         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1648         case MSR_MTRRfix64K_00000:
1649         case MSR_MTRRfix16K_80000:
1650         case MSR_MTRRfix16K_A0000:
1651         case MSR_MTRRfix4K_C0000:
1652         case MSR_MTRRfix4K_C8000:
1653         case MSR_MTRRfix4K_D0000:
1654         case MSR_MTRRfix4K_D8000:
1655         case MSR_MTRRfix4K_E0000:
1656         case MSR_MTRRfix4K_E8000:
1657         case MSR_MTRRfix4K_F0000:
1658         case MSR_MTRRfix4K_F8000:
1659         case MSR_MTRRdefType:
1660         case MSR_IA32_CR_PAT:
1661                 return true;
1662         case 0x2f8:
1663                 return true;
1664         }
1665         return false;
1666 }
1667
1668 static bool valid_pat_type(unsigned t)
1669 {
1670         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1671 }
1672
1673 static bool valid_mtrr_type(unsigned t)
1674 {
1675         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1676 }
1677
1678 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1679 {
1680         int i;
1681
1682         if (!msr_mtrr_valid(msr))
1683                 return false;
1684
1685         if (msr == MSR_IA32_CR_PAT) {
1686                 for (i = 0; i < 8; i++)
1687                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1688                                 return false;
1689                 return true;
1690         } else if (msr == MSR_MTRRdefType) {
1691                 if (data & ~0xcff)
1692                         return false;
1693                 return valid_mtrr_type(data & 0xff);
1694         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1695                 for (i = 0; i < 8 ; i++)
1696                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1697                                 return false;
1698                 return true;
1699         }
1700
1701         /* variable MTRRs */
1702         return valid_mtrr_type(data & 0xff);
1703 }
1704
1705 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1706 {
1707         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1708
1709         if (!mtrr_valid(vcpu, msr, data))
1710                 return 1;
1711
1712         if (msr == MSR_MTRRdefType) {
1713                 vcpu->arch.mtrr_state.def_type = data;
1714                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1715         } else if (msr == MSR_MTRRfix64K_00000)
1716                 p[0] = data;
1717         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1718                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1719         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1720                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1721         else if (msr == MSR_IA32_CR_PAT)
1722                 vcpu->arch.pat = data;
1723         else {  /* Variable MTRRs */
1724                 int idx, is_mtrr_mask;
1725                 u64 *pt;
1726
1727                 idx = (msr - 0x200) / 2;
1728                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1729                 if (!is_mtrr_mask)
1730                         pt =
1731                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1732                 else
1733                         pt =
1734                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1735                 *pt = data;
1736         }
1737
1738         kvm_mmu_reset_context(vcpu);
1739         return 0;
1740 }
1741
1742 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1743 {
1744         u64 mcg_cap = vcpu->arch.mcg_cap;
1745         unsigned bank_num = mcg_cap & 0xff;
1746
1747         switch (msr) {
1748         case MSR_IA32_MCG_STATUS:
1749                 vcpu->arch.mcg_status = data;
1750                 break;
1751         case MSR_IA32_MCG_CTL:
1752                 if (!(mcg_cap & MCG_CTL_P))
1753                         return 1;
1754                 if (data != 0 && data != ~(u64)0)
1755                         return -1;
1756                 vcpu->arch.mcg_ctl = data;
1757                 break;
1758         default:
1759                 if (msr >= MSR_IA32_MC0_CTL &&
1760                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1761                         u32 offset = msr - MSR_IA32_MC0_CTL;
1762                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1763                          * some Linux kernels though clear bit 10 in bank 4 to
1764                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1765                          * this to avoid an uncatched #GP in the guest
1766                          */
1767                         if ((offset & 0x3) == 0 &&
1768                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1769                                 return -1;
1770                         vcpu->arch.mce_banks[offset] = data;
1771                         break;
1772                 }
1773                 return 1;
1774         }
1775         return 0;
1776 }
1777
1778 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1779 {
1780         struct kvm *kvm = vcpu->kvm;
1781         int lm = is_long_mode(vcpu);
1782         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1783                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1784         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1785                 : kvm->arch.xen_hvm_config.blob_size_32;
1786         u32 page_num = data & ~PAGE_MASK;
1787         u64 page_addr = data & PAGE_MASK;
1788         u8 *page;
1789         int r;
1790
1791         r = -E2BIG;
1792         if (page_num >= blob_size)
1793                 goto out;
1794         r = -ENOMEM;
1795         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1796         if (IS_ERR(page)) {
1797                 r = PTR_ERR(page);
1798                 goto out;
1799         }
1800         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1801                 goto out_free;
1802         r = 0;
1803 out_free:
1804         kfree(page);
1805 out:
1806         return r;
1807 }
1808
1809 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1810 {
1811         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1812 }
1813
1814 static bool kvm_hv_msr_partition_wide(u32 msr)
1815 {
1816         bool r = false;
1817         switch (msr) {
1818         case HV_X64_MSR_GUEST_OS_ID:
1819         case HV_X64_MSR_HYPERCALL:
1820                 r = true;
1821                 break;
1822         }
1823
1824         return r;
1825 }
1826
1827 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1828 {
1829         struct kvm *kvm = vcpu->kvm;
1830
1831         switch (msr) {
1832         case HV_X64_MSR_GUEST_OS_ID:
1833                 kvm->arch.hv_guest_os_id = data;
1834                 /* setting guest os id to zero disables hypercall page */
1835                 if (!kvm->arch.hv_guest_os_id)
1836                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1837                 break;
1838         case HV_X64_MSR_HYPERCALL: {
1839                 u64 gfn;
1840                 unsigned long addr;
1841                 u8 instructions[4];
1842
1843                 /* if guest os id is not set hypercall should remain disabled */
1844                 if (!kvm->arch.hv_guest_os_id)
1845                         break;
1846                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1847                         kvm->arch.hv_hypercall = data;
1848                         break;
1849                 }
1850                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1851                 addr = gfn_to_hva(kvm, gfn);
1852                 if (kvm_is_error_hva(addr))
1853                         return 1;
1854                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1855                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1856                 if (__copy_to_user((void __user *)addr, instructions, 4))
1857                         return 1;
1858                 kvm->arch.hv_hypercall = data;
1859                 break;
1860         }
1861         default:
1862                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1863                             "data 0x%llx\n", msr, data);
1864                 return 1;
1865         }
1866         return 0;
1867 }
1868
1869 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1870 {
1871         switch (msr) {
1872         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1873                 unsigned long addr;
1874
1875                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1876                         vcpu->arch.hv_vapic = data;
1877                         break;
1878                 }
1879                 addr = gfn_to_hva(vcpu->kvm, data >>
1880                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1881                 if (kvm_is_error_hva(addr))
1882                         return 1;
1883                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1884                         return 1;
1885                 vcpu->arch.hv_vapic = data;
1886                 break;
1887         }
1888         case HV_X64_MSR_EOI:
1889                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1890         case HV_X64_MSR_ICR:
1891                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1892         case HV_X64_MSR_TPR:
1893                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1894         default:
1895                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1896                             "data 0x%llx\n", msr, data);
1897                 return 1;
1898         }
1899
1900         return 0;
1901 }
1902
1903 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1904 {
1905         gpa_t gpa = data & ~0x3f;
1906
1907         /* Bits 2:5 are reserved, Should be zero */
1908         if (data & 0x3c)
1909                 return 1;
1910
1911         vcpu->arch.apf.msr_val = data;
1912
1913         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1914                 kvm_clear_async_pf_completion_queue(vcpu);
1915                 kvm_async_pf_hash_reset(vcpu);
1916                 return 0;
1917         }
1918
1919         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1920                                         sizeof(u32)))
1921                 return 1;
1922
1923         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1924         kvm_async_pf_wakeup_all(vcpu);
1925         return 0;
1926 }
1927
1928 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1929 {
1930         vcpu->arch.pv_time_enabled = false;
1931 }
1932
1933 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1934 {
1935         u64 delta;
1936
1937         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1938                 return;
1939
1940         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1941         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1942         vcpu->arch.st.accum_steal = delta;
1943 }
1944
1945 static void record_steal_time(struct kvm_vcpu *vcpu)
1946 {
1947         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1948                 return;
1949
1950         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1951                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1952                 return;
1953
1954         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1955         vcpu->arch.st.steal.version += 2;
1956         vcpu->arch.st.accum_steal = 0;
1957
1958         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1959                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1960 }
1961
1962 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1963 {
1964         bool pr = false;
1965         u32 msr = msr_info->index;
1966         u64 data = msr_info->data;
1967
1968         switch (msr) {
1969         case MSR_AMD64_NB_CFG:
1970         case MSR_IA32_UCODE_REV:
1971         case MSR_IA32_UCODE_WRITE:
1972         case MSR_VM_HSAVE_PA:
1973         case MSR_AMD64_PATCH_LOADER:
1974         case MSR_AMD64_BU_CFG2:
1975                 break;
1976
1977         case MSR_EFER:
1978                 return set_efer(vcpu, data);
1979         case MSR_K7_HWCR:
1980                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1981                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1982                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1983                 if (data != 0) {
1984                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1985                                     data);
1986                         return 1;
1987                 }
1988                 break;
1989         case MSR_FAM10H_MMIO_CONF_BASE:
1990                 if (data != 0) {
1991                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1992                                     "0x%llx\n", data);
1993                         return 1;
1994                 }
1995                 break;
1996         case MSR_IA32_DEBUGCTLMSR:
1997                 if (!data) {
1998                         /* We support the non-activated case already */
1999                         break;
2000                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2001                         /* Values other than LBR and BTF are vendor-specific,
2002                            thus reserved and should throw a #GP */
2003                         return 1;
2004                 }
2005                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2006                             __func__, data);
2007                 break;
2008         case 0x200 ... 0x2ff:
2009                 return set_msr_mtrr(vcpu, msr, data);
2010         case MSR_IA32_APICBASE:
2011                 kvm_set_apic_base(vcpu, data);
2012                 break;
2013         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2014                 return kvm_x2apic_msr_write(vcpu, msr, data);
2015         case MSR_IA32_TSCDEADLINE:
2016                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2017                 break;
2018         case MSR_IA32_TSC_ADJUST:
2019                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2020                         if (!msr_info->host_initiated) {
2021                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2022                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2023                         }
2024                         vcpu->arch.ia32_tsc_adjust_msr = data;
2025                 }
2026                 break;
2027         case MSR_IA32_MISC_ENABLE:
2028                 vcpu->arch.ia32_misc_enable_msr = data;
2029                 break;
2030         case MSR_KVM_WALL_CLOCK_NEW:
2031         case MSR_KVM_WALL_CLOCK:
2032                 vcpu->kvm->arch.wall_clock = data;
2033                 kvm_write_wall_clock(vcpu->kvm, data);
2034                 break;
2035         case MSR_KVM_SYSTEM_TIME_NEW:
2036         case MSR_KVM_SYSTEM_TIME: {
2037                 u64 gpa_offset;
2038                 kvmclock_reset(vcpu);
2039
2040                 vcpu->arch.time = data;
2041                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2042
2043                 /* we verify if the enable bit is set... */
2044                 if (!(data & 1))
2045                         break;
2046
2047                 gpa_offset = data & ~(PAGE_MASK | 1);
2048
2049                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2050                      &vcpu->arch.pv_time, data & ~1ULL,
2051                      sizeof(struct pvclock_vcpu_time_info)))
2052                         vcpu->arch.pv_time_enabled = false;
2053                 else
2054                         vcpu->arch.pv_time_enabled = true;
2055
2056                 break;
2057         }
2058         case MSR_KVM_ASYNC_PF_EN:
2059                 if (kvm_pv_enable_async_pf(vcpu, data))
2060                         return 1;
2061                 break;
2062         case MSR_KVM_STEAL_TIME:
2063
2064                 if (unlikely(!sched_info_on()))
2065                         return 1;
2066
2067                 if (data & KVM_STEAL_RESERVED_MASK)
2068                         return 1;
2069
2070                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2071                                                 data & KVM_STEAL_VALID_BITS,
2072                                                 sizeof(struct kvm_steal_time)))
2073                         return 1;
2074
2075                 vcpu->arch.st.msr_val = data;
2076
2077                 if (!(data & KVM_MSR_ENABLED))
2078                         break;
2079
2080                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2081
2082                 preempt_disable();
2083                 accumulate_steal_time(vcpu);
2084                 preempt_enable();
2085
2086                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2087
2088                 break;
2089         case MSR_KVM_PV_EOI_EN:
2090                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2091                         return 1;
2092                 break;
2093
2094         case MSR_IA32_MCG_CTL:
2095         case MSR_IA32_MCG_STATUS:
2096         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2097                 return set_msr_mce(vcpu, msr, data);
2098
2099         /* Performance counters are not protected by a CPUID bit,
2100          * so we should check all of them in the generic path for the sake of
2101          * cross vendor migration.
2102          * Writing a zero into the event select MSRs disables them,
2103          * which we perfectly emulate ;-). Any other value should be at least
2104          * reported, some guests depend on them.
2105          */
2106         case MSR_K7_EVNTSEL0:
2107         case MSR_K7_EVNTSEL1:
2108         case MSR_K7_EVNTSEL2:
2109         case MSR_K7_EVNTSEL3:
2110                 if (data != 0)
2111                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2112                                     "0x%x data 0x%llx\n", msr, data);
2113                 break;
2114         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2115          * so we ignore writes to make it happy.
2116          */
2117         case MSR_K7_PERFCTR0:
2118         case MSR_K7_PERFCTR1:
2119         case MSR_K7_PERFCTR2:
2120         case MSR_K7_PERFCTR3:
2121                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2122                             "0x%x data 0x%llx\n", msr, data);
2123                 break;
2124         case MSR_P6_PERFCTR0:
2125         case MSR_P6_PERFCTR1:
2126                 pr = true;
2127         case MSR_P6_EVNTSEL0:
2128         case MSR_P6_EVNTSEL1:
2129                 if (kvm_pmu_msr(vcpu, msr))
2130                         return kvm_pmu_set_msr(vcpu, msr_info);
2131
2132                 if (pr || data != 0)
2133                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2134                                     "0x%x data 0x%llx\n", msr, data);
2135                 break;
2136         case MSR_K7_CLK_CTL:
2137                 /*
2138                  * Ignore all writes to this no longer documented MSR.
2139                  * Writes are only relevant for old K7 processors,
2140                  * all pre-dating SVM, but a recommended workaround from
2141                  * AMD for these chips. It is possible to specify the
2142                  * affected processor models on the command line, hence
2143                  * the need to ignore the workaround.
2144                  */
2145                 break;
2146         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2147                 if (kvm_hv_msr_partition_wide(msr)) {
2148                         int r;
2149                         mutex_lock(&vcpu->kvm->lock);
2150                         r = set_msr_hyperv_pw(vcpu, msr, data);
2151                         mutex_unlock(&vcpu->kvm->lock);
2152                         return r;
2153                 } else
2154                         return set_msr_hyperv(vcpu, msr, data);
2155                 break;
2156         case MSR_IA32_BBL_CR_CTL3:
2157                 /* Drop writes to this legacy MSR -- see rdmsr
2158                  * counterpart for further detail.
2159                  */
2160                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2161                 break;
2162         case MSR_AMD64_OSVW_ID_LENGTH:
2163                 if (!guest_cpuid_has_osvw(vcpu))
2164                         return 1;
2165                 vcpu->arch.osvw.length = data;
2166                 break;
2167         case MSR_AMD64_OSVW_STATUS:
2168                 if (!guest_cpuid_has_osvw(vcpu))
2169                         return 1;
2170                 vcpu->arch.osvw.status = data;
2171                 break;
2172         default:
2173                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2174                         return xen_hvm_config(vcpu, data);
2175                 if (kvm_pmu_msr(vcpu, msr))
2176                         return kvm_pmu_set_msr(vcpu, msr_info);
2177                 if (!ignore_msrs) {
2178                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2179                                     msr, data);
2180                         return 1;
2181                 } else {
2182                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2183                                     msr, data);
2184                         break;
2185                 }
2186         }
2187         return 0;
2188 }
2189 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2190
2191
2192 /*
2193  * Reads an msr value (of 'msr_index') into 'pdata'.
2194  * Returns 0 on success, non-0 otherwise.
2195  * Assumes vcpu_load() was already called.
2196  */
2197 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2198 {
2199         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2200 }
2201
2202 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2203 {
2204         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2205
2206         if (!msr_mtrr_valid(msr))
2207                 return 1;
2208
2209         if (msr == MSR_MTRRdefType)
2210                 *pdata = vcpu->arch.mtrr_state.def_type +
2211                          (vcpu->arch.mtrr_state.enabled << 10);
2212         else if (msr == MSR_MTRRfix64K_00000)
2213                 *pdata = p[0];
2214         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2215                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2216         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2217                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2218         else if (msr == MSR_IA32_CR_PAT)
2219                 *pdata = vcpu->arch.pat;
2220         else {  /* Variable MTRRs */
2221                 int idx, is_mtrr_mask;
2222                 u64 *pt;
2223
2224                 idx = (msr - 0x200) / 2;
2225                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2226                 if (!is_mtrr_mask)
2227                         pt =
2228                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2229                 else
2230                         pt =
2231                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2232                 *pdata = *pt;
2233         }
2234
2235         return 0;
2236 }
2237
2238 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2239 {
2240         u64 data;
2241         u64 mcg_cap = vcpu->arch.mcg_cap;
2242         unsigned bank_num = mcg_cap & 0xff;
2243
2244         switch (msr) {
2245         case MSR_IA32_P5_MC_ADDR:
2246         case MSR_IA32_P5_MC_TYPE:
2247                 data = 0;
2248                 break;
2249         case MSR_IA32_MCG_CAP:
2250                 data = vcpu->arch.mcg_cap;
2251                 break;
2252         case MSR_IA32_MCG_CTL:
2253                 if (!(mcg_cap & MCG_CTL_P))
2254                         return 1;
2255                 data = vcpu->arch.mcg_ctl;
2256                 break;
2257         case MSR_IA32_MCG_STATUS:
2258                 data = vcpu->arch.mcg_status;
2259                 break;
2260         default:
2261                 if (msr >= MSR_IA32_MC0_CTL &&
2262                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2263                         u32 offset = msr - MSR_IA32_MC0_CTL;
2264                         data = vcpu->arch.mce_banks[offset];
2265                         break;
2266                 }
2267                 return 1;
2268         }
2269         *pdata = data;
2270         return 0;
2271 }
2272
2273 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2274 {
2275         u64 data = 0;
2276         struct kvm *kvm = vcpu->kvm;
2277
2278         switch (msr) {
2279         case HV_X64_MSR_GUEST_OS_ID:
2280                 data = kvm->arch.hv_guest_os_id;
2281                 break;
2282         case HV_X64_MSR_HYPERCALL:
2283                 data = kvm->arch.hv_hypercall;
2284                 break;
2285         default:
2286                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2287                 return 1;
2288         }
2289
2290         *pdata = data;
2291         return 0;
2292 }
2293
2294 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2295 {
2296         u64 data = 0;
2297
2298         switch (msr) {
2299         case HV_X64_MSR_VP_INDEX: {
2300                 int r;
2301                 struct kvm_vcpu *v;
2302                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2303                         if (v == vcpu)
2304                                 data = r;
2305                 break;
2306         }
2307         case HV_X64_MSR_EOI:
2308                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2309         case HV_X64_MSR_ICR:
2310                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2311         case HV_X64_MSR_TPR:
2312                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2313         case HV_X64_MSR_APIC_ASSIST_PAGE:
2314                 data = vcpu->arch.hv_vapic;
2315                 break;
2316         default:
2317                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2318                 return 1;
2319         }
2320         *pdata = data;
2321         return 0;
2322 }
2323
2324 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2325 {
2326         u64 data;
2327
2328         switch (msr) {
2329         case MSR_IA32_PLATFORM_ID:
2330         case MSR_IA32_EBL_CR_POWERON:
2331         case MSR_IA32_DEBUGCTLMSR:
2332         case MSR_IA32_LASTBRANCHFROMIP:
2333         case MSR_IA32_LASTBRANCHTOIP:
2334         case MSR_IA32_LASTINTFROMIP:
2335         case MSR_IA32_LASTINTTOIP:
2336         case MSR_K8_SYSCFG:
2337         case MSR_K7_HWCR:
2338         case MSR_VM_HSAVE_PA:
2339         case MSR_K7_EVNTSEL0:
2340         case MSR_K7_PERFCTR0:
2341         case MSR_K8_INT_PENDING_MSG:
2342         case MSR_AMD64_NB_CFG:
2343         case MSR_FAM10H_MMIO_CONF_BASE:
2344         case MSR_AMD64_BU_CFG2:
2345                 data = 0;
2346                 break;
2347         case MSR_P6_PERFCTR0:
2348         case MSR_P6_PERFCTR1:
2349         case MSR_P6_EVNTSEL0:
2350         case MSR_P6_EVNTSEL1:
2351                 if (kvm_pmu_msr(vcpu, msr))
2352                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2353                 data = 0;
2354                 break;
2355         case MSR_IA32_UCODE_REV:
2356                 data = 0x100000000ULL;
2357                 break;
2358         case MSR_MTRRcap:
2359                 data = 0x500 | KVM_NR_VAR_MTRR;
2360                 break;
2361         case 0x200 ... 0x2ff:
2362                 return get_msr_mtrr(vcpu, msr, pdata);
2363         case 0xcd: /* fsb frequency */
2364                 data = 3;
2365                 break;
2366                 /*
2367                  * MSR_EBC_FREQUENCY_ID
2368                  * Conservative value valid for even the basic CPU models.
2369                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2370                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2371                  * and 266MHz for model 3, or 4. Set Core Clock
2372                  * Frequency to System Bus Frequency Ratio to 1 (bits
2373                  * 31:24) even though these are only valid for CPU
2374                  * models > 2, however guests may end up dividing or
2375                  * multiplying by zero otherwise.
2376                  */
2377         case MSR_EBC_FREQUENCY_ID:
2378                 data = 1 << 24;
2379                 break;
2380         case MSR_IA32_APICBASE:
2381                 data = kvm_get_apic_base(vcpu);
2382                 break;
2383         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2384                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2385                 break;
2386         case MSR_IA32_TSCDEADLINE:
2387                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2388                 break;
2389         case MSR_IA32_TSC_ADJUST:
2390                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2391                 break;
2392         case MSR_IA32_MISC_ENABLE:
2393                 data = vcpu->arch.ia32_misc_enable_msr;
2394                 break;
2395         case MSR_IA32_PERF_STATUS:
2396                 /* TSC increment by tick */
2397                 data = 1000ULL;
2398                 /* CPU multiplier */
2399                 data |= (((uint64_t)4ULL) << 40);
2400                 break;
2401         case MSR_EFER:
2402                 data = vcpu->arch.efer;
2403                 break;
2404         case MSR_KVM_WALL_CLOCK:
2405         case MSR_KVM_WALL_CLOCK_NEW:
2406                 data = vcpu->kvm->arch.wall_clock;
2407                 break;
2408         case MSR_KVM_SYSTEM_TIME:
2409         case MSR_KVM_SYSTEM_TIME_NEW:
2410                 data = vcpu->arch.time;
2411                 break;
2412         case MSR_KVM_ASYNC_PF_EN:
2413                 data = vcpu->arch.apf.msr_val;
2414                 break;
2415         case MSR_KVM_STEAL_TIME:
2416                 data = vcpu->arch.st.msr_val;
2417                 break;
2418         case MSR_KVM_PV_EOI_EN:
2419                 data = vcpu->arch.pv_eoi.msr_val;
2420                 break;
2421         case MSR_IA32_P5_MC_ADDR:
2422         case MSR_IA32_P5_MC_TYPE:
2423         case MSR_IA32_MCG_CAP:
2424         case MSR_IA32_MCG_CTL:
2425         case MSR_IA32_MCG_STATUS:
2426         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2427                 return get_msr_mce(vcpu, msr, pdata);
2428         case MSR_K7_CLK_CTL:
2429                 /*
2430                  * Provide expected ramp-up count for K7. All other
2431                  * are set to zero, indicating minimum divisors for
2432                  * every field.
2433                  *
2434                  * This prevents guest kernels on AMD host with CPU
2435                  * type 6, model 8 and higher from exploding due to
2436                  * the rdmsr failing.
2437                  */
2438                 data = 0x20000000;
2439                 break;
2440         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2441                 if (kvm_hv_msr_partition_wide(msr)) {
2442                         int r;
2443                         mutex_lock(&vcpu->kvm->lock);
2444                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2445                         mutex_unlock(&vcpu->kvm->lock);
2446                         return r;
2447                 } else
2448                         return get_msr_hyperv(vcpu, msr, pdata);
2449                 break;
2450         case MSR_IA32_BBL_CR_CTL3:
2451                 /* This legacy MSR exists but isn't fully documented in current
2452                  * silicon.  It is however accessed by winxp in very narrow
2453                  * scenarios where it sets bit #19, itself documented as
2454                  * a "reserved" bit.  Best effort attempt to source coherent
2455                  * read data here should the balance of the register be
2456                  * interpreted by the guest:
2457                  *
2458                  * L2 cache control register 3: 64GB range, 256KB size,
2459                  * enabled, latency 0x1, configured
2460                  */
2461                 data = 0xbe702111;
2462                 break;
2463         case MSR_AMD64_OSVW_ID_LENGTH:
2464                 if (!guest_cpuid_has_osvw(vcpu))
2465                         return 1;
2466                 data = vcpu->arch.osvw.length;
2467                 break;
2468         case MSR_AMD64_OSVW_STATUS:
2469                 if (!guest_cpuid_has_osvw(vcpu))
2470                         return 1;
2471                 data = vcpu->arch.osvw.status;
2472                 break;
2473         default:
2474                 if (kvm_pmu_msr(vcpu, msr))
2475                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2476                 if (!ignore_msrs) {
2477                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2478                         return 1;
2479                 } else {
2480                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2481                         data = 0;
2482                 }
2483                 break;
2484         }
2485         *pdata = data;
2486         return 0;
2487 }
2488 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2489
2490 /*
2491  * Read or write a bunch of msrs. All parameters are kernel addresses.
2492  *
2493  * @return number of msrs set successfully.
2494  */
2495 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2496                     struct kvm_msr_entry *entries,
2497                     int (*do_msr)(struct kvm_vcpu *vcpu,
2498                                   unsigned index, u64 *data))
2499 {
2500         int i, idx;
2501
2502         idx = srcu_read_lock(&vcpu->kvm->srcu);
2503         for (i = 0; i < msrs->nmsrs; ++i)
2504                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2505                         break;
2506         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2507
2508         return i;
2509 }
2510
2511 /*
2512  * Read or write a bunch of msrs. Parameters are user addresses.
2513  *
2514  * @return number of msrs set successfully.
2515  */
2516 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2517                   int (*do_msr)(struct kvm_vcpu *vcpu,
2518                                 unsigned index, u64 *data),
2519                   int writeback)
2520 {
2521         struct kvm_msrs msrs;
2522         struct kvm_msr_entry *entries;
2523         int r, n;
2524         unsigned size;
2525
2526         r = -EFAULT;
2527         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2528                 goto out;
2529
2530         r = -E2BIG;
2531         if (msrs.nmsrs >= MAX_IO_MSRS)
2532                 goto out;
2533
2534         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2535         entries = memdup_user(user_msrs->entries, size);
2536         if (IS_ERR(entries)) {
2537                 r = PTR_ERR(entries);
2538                 goto out;
2539         }
2540
2541         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2542         if (r < 0)
2543                 goto out_free;
2544
2545         r = -EFAULT;
2546         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2547                 goto out_free;
2548
2549         r = n;
2550
2551 out_free:
2552         kfree(entries);
2553 out:
2554         return r;
2555 }
2556
2557 int kvm_dev_ioctl_check_extension(long ext)
2558 {
2559         int r;
2560
2561         switch (ext) {
2562         case KVM_CAP_IRQCHIP:
2563         case KVM_CAP_HLT:
2564         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2565         case KVM_CAP_SET_TSS_ADDR:
2566         case KVM_CAP_EXT_CPUID:
2567         case KVM_CAP_CLOCKSOURCE:
2568         case KVM_CAP_PIT:
2569         case KVM_CAP_NOP_IO_DELAY:
2570         case KVM_CAP_MP_STATE:
2571         case KVM_CAP_SYNC_MMU:
2572         case KVM_CAP_USER_NMI:
2573         case KVM_CAP_REINJECT_CONTROL:
2574         case KVM_CAP_IRQ_INJECT_STATUS:
2575         case KVM_CAP_IRQFD:
2576         case KVM_CAP_IOEVENTFD:
2577         case KVM_CAP_PIT2:
2578         case KVM_CAP_PIT_STATE2:
2579         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2580         case KVM_CAP_XEN_HVM:
2581         case KVM_CAP_ADJUST_CLOCK:
2582         case KVM_CAP_VCPU_EVENTS:
2583         case KVM_CAP_HYPERV:
2584         case KVM_CAP_HYPERV_VAPIC:
2585         case KVM_CAP_HYPERV_SPIN:
2586         case KVM_CAP_PCI_SEGMENT:
2587         case KVM_CAP_DEBUGREGS:
2588         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2589         case KVM_CAP_XSAVE:
2590         case KVM_CAP_ASYNC_PF:
2591         case KVM_CAP_GET_TSC_KHZ:
2592         case KVM_CAP_KVMCLOCK_CTRL:
2593         case KVM_CAP_READONLY_MEM:
2594 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2595         case KVM_CAP_ASSIGN_DEV_IRQ:
2596         case KVM_CAP_PCI_2_3:
2597 #endif
2598                 r = 1;
2599                 break;
2600         case KVM_CAP_COALESCED_MMIO:
2601                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2602                 break;
2603         case KVM_CAP_VAPIC:
2604                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2605                 break;
2606         case KVM_CAP_NR_VCPUS:
2607                 r = KVM_SOFT_MAX_VCPUS;
2608                 break;
2609         case KVM_CAP_MAX_VCPUS:
2610                 r = KVM_MAX_VCPUS;
2611                 break;
2612         case KVM_CAP_NR_MEMSLOTS:
2613                 r = KVM_USER_MEM_SLOTS;
2614                 break;
2615         case KVM_CAP_PV_MMU:    /* obsolete */
2616                 r = 0;
2617                 break;
2618 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2619         case KVM_CAP_IOMMU:
2620                 r = iommu_present(&pci_bus_type);
2621                 break;
2622 #endif
2623         case KVM_CAP_MCE:
2624                 r = KVM_MAX_MCE_BANKS;
2625                 break;
2626         case KVM_CAP_XCRS:
2627                 r = cpu_has_xsave;
2628                 break;
2629         case KVM_CAP_TSC_CONTROL:
2630                 r = kvm_has_tsc_control;
2631                 break;
2632         case KVM_CAP_TSC_DEADLINE_TIMER:
2633                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2634                 break;
2635         default:
2636                 r = 0;
2637                 break;
2638         }
2639         return r;
2640
2641 }
2642
2643 long kvm_arch_dev_ioctl(struct file *filp,
2644                         unsigned int ioctl, unsigned long arg)
2645 {
2646         void __user *argp = (void __user *)arg;
2647         long r;
2648
2649         switch (ioctl) {
2650         case KVM_GET_MSR_INDEX_LIST: {
2651                 struct kvm_msr_list __user *user_msr_list = argp;
2652                 struct kvm_msr_list msr_list;
2653                 unsigned n;
2654
2655                 r = -EFAULT;
2656                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2657                         goto out;
2658                 n = msr_list.nmsrs;
2659                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2660                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2661                         goto out;
2662                 r = -E2BIG;
2663                 if (n < msr_list.nmsrs)
2664                         goto out;
2665                 r = -EFAULT;
2666                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2667                                  num_msrs_to_save * sizeof(u32)))
2668                         goto out;
2669                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2670                                  &emulated_msrs,
2671                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2672                         goto out;
2673                 r = 0;
2674                 break;
2675         }
2676         case KVM_GET_SUPPORTED_CPUID: {
2677                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2678                 struct kvm_cpuid2 cpuid;
2679
2680                 r = -EFAULT;
2681                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2682                         goto out;
2683                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2684                                                       cpuid_arg->entries);
2685                 if (r)
2686                         goto out;
2687
2688                 r = -EFAULT;
2689                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2690                         goto out;
2691                 r = 0;
2692                 break;
2693         }
2694         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2695                 u64 mce_cap;
2696
2697                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2698                 r = -EFAULT;
2699                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2700                         goto out;
2701                 r = 0;
2702                 break;
2703         }
2704         default:
2705                 r = -EINVAL;
2706         }
2707 out:
2708         return r;
2709 }
2710
2711 static void wbinvd_ipi(void *garbage)
2712 {
2713         wbinvd();
2714 }
2715
2716 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2717 {
2718         return vcpu->kvm->arch.iommu_domain &&
2719                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2720 }
2721
2722 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2723 {
2724         /* Address WBINVD may be executed by guest */
2725         if (need_emulate_wbinvd(vcpu)) {
2726                 if (kvm_x86_ops->has_wbinvd_exit())
2727                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2728                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2729                         smp_call_function_single(vcpu->cpu,
2730                                         wbinvd_ipi, NULL, 1);
2731         }
2732
2733         kvm_x86_ops->vcpu_load(vcpu, cpu);
2734
2735         /* Apply any externally detected TSC adjustments (due to suspend) */
2736         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2737                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2738                 vcpu->arch.tsc_offset_adjustment = 0;
2739                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2740         }
2741
2742         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2743                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2744                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2745                 if (tsc_delta < 0)
2746                         mark_tsc_unstable("KVM discovered backwards TSC");
2747                 if (check_tsc_unstable()) {
2748                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2749                                                 vcpu->arch.last_guest_tsc);
2750                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2751                         vcpu->arch.tsc_catchup = 1;
2752                 }
2753                 /*
2754                  * On a host with synchronized TSC, there is no need to update
2755                  * kvmclock on vcpu->cpu migration
2756                  */
2757                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2758                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2759                 if (vcpu->cpu != cpu)
2760                         kvm_migrate_timers(vcpu);
2761                 vcpu->cpu = cpu;
2762         }
2763
2764         accumulate_steal_time(vcpu);
2765         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2766 }
2767
2768 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2769 {
2770         kvm_x86_ops->vcpu_put(vcpu);
2771         kvm_put_guest_fpu(vcpu);
2772         vcpu->arch.last_host_tsc = native_read_tsc();
2773 }
2774
2775 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2776                                     struct kvm_lapic_state *s)
2777 {
2778         kvm_x86_ops->sync_pir_to_irr(vcpu);
2779         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2780
2781         return 0;
2782 }
2783
2784 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2785                                     struct kvm_lapic_state *s)
2786 {
2787         kvm_apic_post_state_restore(vcpu, s);
2788         update_cr8_intercept(vcpu);
2789
2790         return 0;
2791 }
2792
2793 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2794                                     struct kvm_interrupt *irq)
2795 {
2796         if (irq->irq >= KVM_NR_INTERRUPTS)
2797                 return -EINVAL;
2798         if (irqchip_in_kernel(vcpu->kvm))
2799                 return -ENXIO;
2800
2801         kvm_queue_interrupt(vcpu, irq->irq, false);
2802         kvm_make_request(KVM_REQ_EVENT, vcpu);
2803
2804         return 0;
2805 }
2806
2807 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2808 {
2809         kvm_inject_nmi(vcpu);
2810
2811         return 0;
2812 }
2813
2814 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2815                                            struct kvm_tpr_access_ctl *tac)
2816 {
2817         if (tac->flags)
2818                 return -EINVAL;
2819         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2820         return 0;
2821 }
2822
2823 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2824                                         u64 mcg_cap)
2825 {
2826         int r;
2827         unsigned bank_num = mcg_cap & 0xff, bank;
2828
2829         r = -EINVAL;
2830         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2831                 goto out;
2832         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2833                 goto out;
2834         r = 0;
2835         vcpu->arch.mcg_cap = mcg_cap;
2836         /* Init IA32_MCG_CTL to all 1s */
2837         if (mcg_cap & MCG_CTL_P)
2838                 vcpu->arch.mcg_ctl = ~(u64)0;
2839         /* Init IA32_MCi_CTL to all 1s */
2840         for (bank = 0; bank < bank_num; bank++)
2841                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2842 out:
2843         return r;
2844 }
2845
2846 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2847                                       struct kvm_x86_mce *mce)
2848 {
2849         u64 mcg_cap = vcpu->arch.mcg_cap;
2850         unsigned bank_num = mcg_cap & 0xff;
2851         u64 *banks = vcpu->arch.mce_banks;
2852
2853         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2854                 return -EINVAL;
2855         /*
2856          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2857          * reporting is disabled
2858          */
2859         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2860             vcpu->arch.mcg_ctl != ~(u64)0)
2861                 return 0;
2862         banks += 4 * mce->bank;
2863         /*
2864          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2865          * reporting is disabled for the bank
2866          */
2867         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2868                 return 0;
2869         if (mce->status & MCI_STATUS_UC) {
2870                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2871                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2872                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2873                         return 0;
2874                 }
2875                 if (banks[1] & MCI_STATUS_VAL)
2876                         mce->status |= MCI_STATUS_OVER;
2877                 banks[2] = mce->addr;
2878                 banks[3] = mce->misc;
2879                 vcpu->arch.mcg_status = mce->mcg_status;
2880                 banks[1] = mce->status;
2881                 kvm_queue_exception(vcpu, MC_VECTOR);
2882         } else if (!(banks[1] & MCI_STATUS_VAL)
2883                    || !(banks[1] & MCI_STATUS_UC)) {
2884                 if (banks[1] & MCI_STATUS_VAL)
2885                         mce->status |= MCI_STATUS_OVER;
2886                 banks[2] = mce->addr;
2887                 banks[3] = mce->misc;
2888                 banks[1] = mce->status;
2889         } else
2890                 banks[1] |= MCI_STATUS_OVER;
2891         return 0;
2892 }
2893
2894 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2895                                                struct kvm_vcpu_events *events)
2896 {
2897         process_nmi(vcpu);
2898         events->exception.injected =
2899                 vcpu->arch.exception.pending &&
2900                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2901         events->exception.nr = vcpu->arch.exception.nr;
2902         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2903         events->exception.pad = 0;
2904         events->exception.error_code = vcpu->arch.exception.error_code;
2905
2906         events->interrupt.injected =
2907                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2908         events->interrupt.nr = vcpu->arch.interrupt.nr;
2909         events->interrupt.soft = 0;
2910         events->interrupt.shadow =
2911                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2912                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2913
2914         events->nmi.injected = vcpu->arch.nmi_injected;
2915         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2916         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2917         events->nmi.pad = 0;
2918
2919         events->sipi_vector = 0; /* never valid when reporting to user space */
2920
2921         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2922                          | KVM_VCPUEVENT_VALID_SHADOW);
2923         memset(&events->reserved, 0, sizeof(events->reserved));
2924 }
2925
2926 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2927                                               struct kvm_vcpu_events *events)
2928 {
2929         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2930                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2931                               | KVM_VCPUEVENT_VALID_SHADOW))
2932                 return -EINVAL;
2933
2934         process_nmi(vcpu);
2935         vcpu->arch.exception.pending = events->exception.injected;
2936         vcpu->arch.exception.nr = events->exception.nr;
2937         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2938         vcpu->arch.exception.error_code = events->exception.error_code;
2939
2940         vcpu->arch.interrupt.pending = events->interrupt.injected;
2941         vcpu->arch.interrupt.nr = events->interrupt.nr;
2942         vcpu->arch.interrupt.soft = events->interrupt.soft;
2943         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2944                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2945                                                   events->interrupt.shadow);
2946
2947         vcpu->arch.nmi_injected = events->nmi.injected;
2948         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2949                 vcpu->arch.nmi_pending = events->nmi.pending;
2950         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2951
2952         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2953             kvm_vcpu_has_lapic(vcpu))
2954                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2955
2956         kvm_make_request(KVM_REQ_EVENT, vcpu);
2957
2958         return 0;
2959 }
2960
2961 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2962                                              struct kvm_debugregs *dbgregs)
2963 {
2964         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2965         dbgregs->dr6 = vcpu->arch.dr6;
2966         dbgregs->dr7 = vcpu->arch.dr7;
2967         dbgregs->flags = 0;
2968         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2969 }
2970
2971 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2972                                             struct kvm_debugregs *dbgregs)
2973 {
2974         if (dbgregs->flags)
2975                 return -EINVAL;
2976
2977         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2978         vcpu->arch.dr6 = dbgregs->dr6;
2979         vcpu->arch.dr7 = dbgregs->dr7;
2980
2981         return 0;
2982 }
2983
2984 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2985                                          struct kvm_xsave *guest_xsave)
2986 {
2987         if (cpu_has_xsave) {
2988                 memcpy(guest_xsave->region,
2989                         &vcpu->arch.guest_fpu.state->xsave,
2990                         vcpu->arch.guest_xstate_size);
2991                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
2992                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
2993         } else {
2994                 memcpy(guest_xsave->region,
2995                         &vcpu->arch.guest_fpu.state->fxsave,
2996                         sizeof(struct i387_fxsave_struct));
2997                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2998                         XSTATE_FPSSE;
2999         }
3000 }
3001
3002 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3003                                         struct kvm_xsave *guest_xsave)
3004 {
3005         u64 xstate_bv =
3006                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3007
3008         if (cpu_has_xsave) {
3009                 /*
3010                  * Here we allow setting states that are not present in
3011                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3012                  * with old userspace.
3013                  */
3014                 if (xstate_bv & ~KVM_SUPPORTED_XCR0)
3015                         return -EINVAL;
3016                 if (xstate_bv & ~host_xcr0)
3017                         return -EINVAL;
3018                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3019                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3020         } else {
3021                 if (xstate_bv & ~XSTATE_FPSSE)
3022                         return -EINVAL;
3023                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3024                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3025         }
3026         return 0;
3027 }
3028
3029 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3030                                         struct kvm_xcrs *guest_xcrs)
3031 {
3032         if (!cpu_has_xsave) {
3033                 guest_xcrs->nr_xcrs = 0;
3034                 return;
3035         }
3036
3037         guest_xcrs->nr_xcrs = 1;
3038         guest_xcrs->flags = 0;
3039         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3040         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3041 }
3042
3043 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3044                                        struct kvm_xcrs *guest_xcrs)
3045 {
3046         int i, r = 0;
3047
3048         if (!cpu_has_xsave)
3049                 return -EINVAL;
3050
3051         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3052                 return -EINVAL;
3053
3054         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3055                 /* Only support XCR0 currently */
3056                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3057                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3058                                 guest_xcrs->xcrs[0].value);
3059                         break;
3060                 }
3061         if (r)
3062                 r = -EINVAL;
3063         return r;
3064 }
3065
3066 /*
3067  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3068  * stopped by the hypervisor.  This function will be called from the host only.
3069  * EINVAL is returned when the host attempts to set the flag for a guest that
3070  * does not support pv clocks.
3071  */
3072 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3073 {
3074         if (!vcpu->arch.pv_time_enabled)
3075                 return -EINVAL;
3076         vcpu->arch.pvclock_set_guest_stopped_request = true;
3077         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3078         return 0;
3079 }
3080
3081 long kvm_arch_vcpu_ioctl(struct file *filp,
3082                          unsigned int ioctl, unsigned long arg)
3083 {
3084         struct kvm_vcpu *vcpu = filp->private_data;
3085         void __user *argp = (void __user *)arg;
3086         int r;
3087         union {
3088                 struct kvm_lapic_state *lapic;
3089                 struct kvm_xsave *xsave;
3090                 struct kvm_xcrs *xcrs;
3091                 void *buffer;
3092         } u;
3093
3094         u.buffer = NULL;
3095         switch (ioctl) {
3096         case KVM_GET_LAPIC: {
3097                 r = -EINVAL;
3098                 if (!vcpu->arch.apic)
3099                         goto out;
3100                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3101
3102                 r = -ENOMEM;
3103                 if (!u.lapic)
3104                         goto out;
3105                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3106                 if (r)
3107                         goto out;
3108                 r = -EFAULT;
3109                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3110                         goto out;
3111                 r = 0;
3112                 break;
3113         }
3114         case KVM_SET_LAPIC: {
3115                 r = -EINVAL;
3116                 if (!vcpu->arch.apic)
3117                         goto out;
3118                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3119                 if (IS_ERR(u.lapic))
3120                         return PTR_ERR(u.lapic);
3121
3122                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3123                 break;
3124         }
3125         case KVM_INTERRUPT: {
3126                 struct kvm_interrupt irq;
3127
3128                 r = -EFAULT;
3129                 if (copy_from_user(&irq, argp, sizeof irq))
3130                         goto out;
3131                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3132                 break;
3133         }
3134         case KVM_NMI: {
3135                 r = kvm_vcpu_ioctl_nmi(vcpu);
3136                 break;
3137         }
3138         case KVM_SET_CPUID: {
3139                 struct kvm_cpuid __user *cpuid_arg = argp;
3140                 struct kvm_cpuid cpuid;
3141
3142                 r = -EFAULT;
3143                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3144                         goto out;
3145                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3146                 break;
3147         }
3148         case KVM_SET_CPUID2: {
3149                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3150                 struct kvm_cpuid2 cpuid;
3151
3152                 r = -EFAULT;
3153                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3154                         goto out;
3155                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3156                                               cpuid_arg->entries);
3157                 break;
3158         }
3159         case KVM_GET_CPUID2: {
3160                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3161                 struct kvm_cpuid2 cpuid;
3162
3163                 r = -EFAULT;
3164                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3165                         goto out;
3166                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3167                                               cpuid_arg->entries);
3168                 if (r)
3169                         goto out;
3170                 r = -EFAULT;
3171                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3172                         goto out;
3173                 r = 0;
3174                 break;
3175         }
3176         case KVM_GET_MSRS:
3177                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3178                 break;
3179         case KVM_SET_MSRS:
3180                 r = msr_io(vcpu, argp, do_set_msr, 0);
3181                 break;
3182         case KVM_TPR_ACCESS_REPORTING: {
3183                 struct kvm_tpr_access_ctl tac;
3184
3185                 r = -EFAULT;
3186                 if (copy_from_user(&tac, argp, sizeof tac))
3187                         goto out;
3188                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3189                 if (r)
3190                         goto out;
3191                 r = -EFAULT;
3192                 if (copy_to_user(argp, &tac, sizeof tac))
3193                         goto out;
3194                 r = 0;
3195                 break;
3196         };
3197         case KVM_SET_VAPIC_ADDR: {
3198                 struct kvm_vapic_addr va;
3199
3200                 r = -EINVAL;
3201                 if (!irqchip_in_kernel(vcpu->kvm))
3202                         goto out;
3203                 r = -EFAULT;
3204                 if (copy_from_user(&va, argp, sizeof va))
3205                         goto out;
3206                 r = 0;
3207                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3208                 break;
3209         }
3210         case KVM_X86_SETUP_MCE: {
3211                 u64 mcg_cap;
3212
3213                 r = -EFAULT;
3214                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3215                         goto out;
3216                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3217                 break;
3218         }
3219         case KVM_X86_SET_MCE: {
3220                 struct kvm_x86_mce mce;
3221
3222                 r = -EFAULT;
3223                 if (copy_from_user(&mce, argp, sizeof mce))
3224                         goto out;
3225                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3226                 break;
3227         }
3228         case KVM_GET_VCPU_EVENTS: {
3229                 struct kvm_vcpu_events events;
3230
3231                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3232
3233                 r = -EFAULT;
3234                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3235                         break;
3236                 r = 0;
3237                 break;
3238         }
3239         case KVM_SET_VCPU_EVENTS: {
3240                 struct kvm_vcpu_events events;
3241
3242                 r = -EFAULT;
3243                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3244                         break;
3245
3246                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3247                 break;
3248         }
3249         case KVM_GET_DEBUGREGS: {
3250                 struct kvm_debugregs dbgregs;
3251
3252                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3253
3254                 r = -EFAULT;
3255                 if (copy_to_user(argp, &dbgregs,
3256                                  sizeof(struct kvm_debugregs)))
3257                         break;
3258                 r = 0;
3259                 break;
3260         }
3261         case KVM_SET_DEBUGREGS: {
3262                 struct kvm_debugregs dbgregs;
3263
3264                 r = -EFAULT;
3265                 if (copy_from_user(&dbgregs, argp,
3266                                    sizeof(struct kvm_debugregs)))
3267                         break;
3268
3269                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3270                 break;
3271         }
3272         case KVM_GET_XSAVE: {
3273                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3274                 r = -ENOMEM;
3275                 if (!u.xsave)
3276                         break;
3277
3278                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3279
3280                 r = -EFAULT;
3281                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3282                         break;
3283                 r = 0;
3284                 break;
3285         }
3286         case KVM_SET_XSAVE: {
3287                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3288                 if (IS_ERR(u.xsave))
3289                         return PTR_ERR(u.xsave);
3290
3291                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3292                 break;
3293         }
3294         case KVM_GET_XCRS: {
3295                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3296                 r = -ENOMEM;
3297                 if (!u.xcrs)
3298                         break;
3299
3300                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3301
3302                 r = -EFAULT;
3303                 if (copy_to_user(argp, u.xcrs,
3304                                  sizeof(struct kvm_xcrs)))
3305                         break;
3306                 r = 0;
3307                 break;
3308         }
3309         case KVM_SET_XCRS: {
3310                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3311                 if (IS_ERR(u.xcrs))
3312                         return PTR_ERR(u.xcrs);
3313
3314                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3315                 break;
3316         }
3317         case KVM_SET_TSC_KHZ: {
3318                 u32 user_tsc_khz;
3319
3320                 r = -EINVAL;
3321                 user_tsc_khz = (u32)arg;
3322
3323                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3324                         goto out;
3325
3326                 if (user_tsc_khz == 0)
3327                         user_tsc_khz = tsc_khz;
3328
3329                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3330
3331                 r = 0;
3332                 goto out;
3333         }
3334         case KVM_GET_TSC_KHZ: {
3335                 r = vcpu->arch.virtual_tsc_khz;
3336                 goto out;
3337         }
3338         case KVM_KVMCLOCK_CTRL: {
3339                 r = kvm_set_guest_paused(vcpu);
3340                 goto out;
3341         }
3342         default:
3343                 r = -EINVAL;
3344         }
3345 out:
3346         kfree(u.buffer);
3347         return r;
3348 }
3349
3350 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3351 {
3352         return VM_FAULT_SIGBUS;
3353 }
3354
3355 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3356 {
3357         int ret;
3358
3359         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3360                 return -EINVAL;
3361         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3362         return ret;
3363 }
3364
3365 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3366                                               u64 ident_addr)
3367 {
3368         kvm->arch.ept_identity_map_addr = ident_addr;
3369         return 0;
3370 }
3371
3372 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3373                                           u32 kvm_nr_mmu_pages)
3374 {
3375         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3376                 return -EINVAL;
3377
3378         mutex_lock(&kvm->slots_lock);
3379
3380         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3381         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3382
3383         mutex_unlock(&kvm->slots_lock);
3384         return 0;
3385 }
3386
3387 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3388 {
3389         return kvm->arch.n_max_mmu_pages;
3390 }
3391
3392 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3393 {
3394         int r;
3395
3396         r = 0;
3397         switch (chip->chip_id) {
3398         case KVM_IRQCHIP_PIC_MASTER:
3399                 memcpy(&chip->chip.pic,
3400                         &pic_irqchip(kvm)->pics[0],
3401                         sizeof(struct kvm_pic_state));
3402                 break;
3403         case KVM_IRQCHIP_PIC_SLAVE:
3404                 memcpy(&chip->chip.pic,
3405                         &pic_irqchip(kvm)->pics[1],
3406                         sizeof(struct kvm_pic_state));
3407                 break;
3408         case KVM_IRQCHIP_IOAPIC:
3409                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3410                 break;
3411         default:
3412                 r = -EINVAL;
3413                 break;
3414         }
3415         return r;
3416 }
3417
3418 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3419 {
3420         int r;
3421
3422         r = 0;
3423         switch (chip->chip_id) {
3424         case KVM_IRQCHIP_PIC_MASTER:
3425                 spin_lock(&pic_irqchip(kvm)->lock);
3426                 memcpy(&pic_irqchip(kvm)->pics[0],
3427                         &chip->chip.pic,
3428                         sizeof(struct kvm_pic_state));
3429                 spin_unlock(&pic_irqchip(kvm)->lock);
3430                 break;
3431         case KVM_IRQCHIP_PIC_SLAVE:
3432                 spin_lock(&pic_irqchip(kvm)->lock);
3433                 memcpy(&pic_irqchip(kvm)->pics[1],
3434                         &chip->chip.pic,
3435                         sizeof(struct kvm_pic_state));
3436                 spin_unlock(&pic_irqchip(kvm)->lock);
3437                 break;
3438         case KVM_IRQCHIP_IOAPIC:
3439                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3440                 break;
3441         default:
3442                 r = -EINVAL;
3443                 break;
3444         }
3445         kvm_pic_update_irq(pic_irqchip(kvm));
3446         return r;
3447 }
3448
3449 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3450 {
3451         int r = 0;
3452
3453         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3454         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         return r;
3457 }
3458
3459 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3460 {
3461         int r = 0;
3462
3463         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3464         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3465         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3466         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3467         return r;
3468 }
3469
3470 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3471 {
3472         int r = 0;
3473
3474         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3475         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3476                 sizeof(ps->channels));
3477         ps->flags = kvm->arch.vpit->pit_state.flags;
3478         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3479         memset(&ps->reserved, 0, sizeof(ps->reserved));
3480         return r;
3481 }
3482
3483 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3484 {
3485         int r = 0, start = 0;
3486         u32 prev_legacy, cur_legacy;
3487         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3488         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3489         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3490         if (!prev_legacy && cur_legacy)
3491                 start = 1;
3492         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3493                sizeof(kvm->arch.vpit->pit_state.channels));
3494         kvm->arch.vpit->pit_state.flags = ps->flags;
3495         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3496         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3497         return r;
3498 }
3499
3500 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3501                                  struct kvm_reinject_control *control)
3502 {
3503         if (!kvm->arch.vpit)
3504                 return -ENXIO;
3505         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3506         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3507         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3508         return 0;
3509 }
3510
3511 /**
3512  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3513  * @kvm: kvm instance
3514  * @log: slot id and address to which we copy the log
3515  *
3516  * We need to keep it in mind that VCPU threads can write to the bitmap
3517  * concurrently.  So, to avoid losing data, we keep the following order for
3518  * each bit:
3519  *
3520  *   1. Take a snapshot of the bit and clear it if needed.
3521  *   2. Write protect the corresponding page.
3522  *   3. Flush TLB's if needed.
3523  *   4. Copy the snapshot to the userspace.
3524  *
3525  * Between 2 and 3, the guest may write to the page using the remaining TLB
3526  * entry.  This is not a problem because the page will be reported dirty at
3527  * step 4 using the snapshot taken before and step 3 ensures that successive
3528  * writes will be logged for the next call.
3529  */
3530 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3531 {
3532         int r;
3533         struct kvm_memory_slot *memslot;
3534         unsigned long n, i;
3535         unsigned long *dirty_bitmap;
3536         unsigned long *dirty_bitmap_buffer;
3537         bool is_dirty = false;
3538
3539         mutex_lock(&kvm->slots_lock);
3540
3541         r = -EINVAL;
3542         if (log->slot >= KVM_USER_MEM_SLOTS)
3543                 goto out;
3544
3545         memslot = id_to_memslot(kvm->memslots, log->slot);
3546
3547         dirty_bitmap = memslot->dirty_bitmap;
3548         r = -ENOENT;
3549         if (!dirty_bitmap)
3550                 goto out;
3551
3552         n = kvm_dirty_bitmap_bytes(memslot);
3553
3554         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3555         memset(dirty_bitmap_buffer, 0, n);
3556
3557         spin_lock(&kvm->mmu_lock);
3558
3559         for (i = 0; i < n / sizeof(long); i++) {
3560                 unsigned long mask;
3561                 gfn_t offset;
3562
3563                 if (!dirty_bitmap[i])
3564                         continue;
3565
3566                 is_dirty = true;
3567
3568                 mask = xchg(&dirty_bitmap[i], 0);
3569                 dirty_bitmap_buffer[i] = mask;
3570
3571                 offset = i * BITS_PER_LONG;
3572                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3573         }
3574         if (is_dirty)
3575                 kvm_flush_remote_tlbs(kvm);
3576
3577         spin_unlock(&kvm->mmu_lock);
3578
3579         r = -EFAULT;
3580         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3581                 goto out;
3582
3583         r = 0;
3584 out:
3585         mutex_unlock(&kvm->slots_lock);
3586         return r;
3587 }
3588
3589 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3590                         bool line_status)
3591 {
3592         if (!irqchip_in_kernel(kvm))
3593                 return -ENXIO;
3594
3595         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3596                                         irq_event->irq, irq_event->level,
3597                                         line_status);
3598         return 0;
3599 }
3600
3601 long kvm_arch_vm_ioctl(struct file *filp,
3602                        unsigned int ioctl, unsigned long arg)
3603 {
3604         struct kvm *kvm = filp->private_data;
3605         void __user *argp = (void __user *)arg;
3606         int r = -ENOTTY;
3607         /*
3608          * This union makes it completely explicit to gcc-3.x
3609          * that these two variables' stack usage should be
3610          * combined, not added together.
3611          */
3612         union {
3613                 struct kvm_pit_state ps;
3614                 struct kvm_pit_state2 ps2;
3615                 struct kvm_pit_config pit_config;
3616         } u;
3617
3618         switch (ioctl) {
3619         case KVM_SET_TSS_ADDR:
3620                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3621                 break;
3622         case KVM_SET_IDENTITY_MAP_ADDR: {
3623                 u64 ident_addr;
3624
3625                 r = -EFAULT;
3626                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3627                         goto out;
3628                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3629                 break;
3630         }
3631         case KVM_SET_NR_MMU_PAGES:
3632                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3633                 break;
3634         case KVM_GET_NR_MMU_PAGES:
3635                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3636                 break;
3637         case KVM_CREATE_IRQCHIP: {
3638                 struct kvm_pic *vpic;
3639
3640                 mutex_lock(&kvm->lock);
3641                 r = -EEXIST;
3642                 if (kvm->arch.vpic)
3643                         goto create_irqchip_unlock;
3644                 r = -EINVAL;
3645                 if (atomic_read(&kvm->online_vcpus))
3646                         goto create_irqchip_unlock;
3647                 r = -ENOMEM;
3648                 vpic = kvm_create_pic(kvm);
3649                 if (vpic) {
3650                         r = kvm_ioapic_init(kvm);
3651                         if (r) {
3652                                 mutex_lock(&kvm->slots_lock);
3653                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3654                                                           &vpic->dev_master);
3655                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3656                                                           &vpic->dev_slave);
3657                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3658                                                           &vpic->dev_eclr);
3659                                 mutex_unlock(&kvm->slots_lock);
3660                                 kfree(vpic);
3661                                 goto create_irqchip_unlock;
3662                         }
3663                 } else
3664                         goto create_irqchip_unlock;
3665                 smp_wmb();
3666                 kvm->arch.vpic = vpic;
3667                 smp_wmb();
3668                 r = kvm_setup_default_irq_routing(kvm);
3669                 if (r) {
3670                         mutex_lock(&kvm->slots_lock);
3671                         mutex_lock(&kvm->irq_lock);
3672                         kvm_ioapic_destroy(kvm);
3673                         kvm_destroy_pic(kvm);
3674                         mutex_unlock(&kvm->irq_lock);
3675                         mutex_unlock(&kvm->slots_lock);
3676                 }
3677         create_irqchip_unlock:
3678                 mutex_unlock(&kvm->lock);
3679                 break;
3680         }
3681         case KVM_CREATE_PIT:
3682                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3683                 goto create_pit;
3684         case KVM_CREATE_PIT2:
3685                 r = -EFAULT;
3686                 if (copy_from_user(&u.pit_config, argp,
3687                                    sizeof(struct kvm_pit_config)))
3688                         goto out;
3689         create_pit:
3690                 mutex_lock(&kvm->slots_lock);
3691                 r = -EEXIST;
3692                 if (kvm->arch.vpit)
3693                         goto create_pit_unlock;
3694                 r = -ENOMEM;
3695                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3696                 if (kvm->arch.vpit)
3697                         r = 0;
3698         create_pit_unlock:
3699                 mutex_unlock(&kvm->slots_lock);
3700                 break;
3701         case KVM_GET_IRQCHIP: {
3702                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3703                 struct kvm_irqchip *chip;
3704
3705                 chip = memdup_user(argp, sizeof(*chip));
3706                 if (IS_ERR(chip)) {
3707                         r = PTR_ERR(chip);
3708                         goto out;
3709                 }
3710
3711                 r = -ENXIO;
3712                 if (!irqchip_in_kernel(kvm))
3713                         goto get_irqchip_out;
3714                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3715                 if (r)
3716                         goto get_irqchip_out;
3717                 r = -EFAULT;
3718                 if (copy_to_user(argp, chip, sizeof *chip))
3719                         goto get_irqchip_out;
3720                 r = 0;
3721         get_irqchip_out:
3722                 kfree(chip);
3723                 break;
3724         }
3725         case KVM_SET_IRQCHIP: {
3726                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3727                 struct kvm_irqchip *chip;
3728
3729                 chip = memdup_user(argp, sizeof(*chip));
3730                 if (IS_ERR(chip)) {
3731                         r = PTR_ERR(chip);
3732                         goto out;
3733                 }
3734
3735                 r = -ENXIO;
3736                 if (!irqchip_in_kernel(kvm))
3737                         goto set_irqchip_out;
3738                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3739                 if (r)
3740                         goto set_irqchip_out;
3741                 r = 0;
3742         set_irqchip_out:
3743                 kfree(chip);
3744                 break;
3745         }
3746         case KVM_GET_PIT: {
3747                 r = -EFAULT;
3748                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3749                         goto out;
3750                 r = -ENXIO;
3751                 if (!kvm->arch.vpit)
3752                         goto out;
3753                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3754                 if (r)
3755                         goto out;
3756                 r = -EFAULT;
3757                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3758                         goto out;
3759                 r = 0;
3760                 break;
3761         }
3762         case KVM_SET_PIT: {
3763                 r = -EFAULT;
3764                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3765                         goto out;
3766                 r = -ENXIO;
3767                 if (!kvm->arch.vpit)
3768                         goto out;
3769                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3770                 break;
3771         }
3772         case KVM_GET_PIT2: {
3773                 r = -ENXIO;
3774                 if (!kvm->arch.vpit)
3775                         goto out;
3776                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3777                 if (r)
3778                         goto out;
3779                 r = -EFAULT;
3780                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3781                         goto out;
3782                 r = 0;
3783                 break;
3784         }
3785         case KVM_SET_PIT2: {
3786                 r = -EFAULT;
3787                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3788                         goto out;
3789                 r = -ENXIO;
3790                 if (!kvm->arch.vpit)
3791                         goto out;
3792                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3793                 break;
3794         }
3795         case KVM_REINJECT_CONTROL: {
3796                 struct kvm_reinject_control control;
3797                 r =  -EFAULT;
3798                 if (copy_from_user(&control, argp, sizeof(control)))
3799                         goto out;
3800                 r = kvm_vm_ioctl_reinject(kvm, &control);
3801                 break;
3802         }
3803         case KVM_XEN_HVM_CONFIG: {
3804                 r = -EFAULT;
3805                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3806                                    sizeof(struct kvm_xen_hvm_config)))
3807                         goto out;
3808                 r = -EINVAL;
3809                 if (kvm->arch.xen_hvm_config.flags)
3810                         goto out;
3811                 r = 0;
3812                 break;
3813         }
3814         case KVM_SET_CLOCK: {
3815                 struct kvm_clock_data user_ns;
3816                 u64 now_ns;
3817                 s64 delta;
3818
3819                 r = -EFAULT;
3820                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3821                         goto out;
3822
3823                 r = -EINVAL;
3824                 if (user_ns.flags)
3825                         goto out;
3826
3827                 r = 0;
3828                 local_irq_disable();
3829                 now_ns = get_kernel_ns();
3830                 delta = user_ns.clock - now_ns;
3831                 local_irq_enable();
3832                 kvm->arch.kvmclock_offset = delta;
3833                 kvm_gen_update_masterclock(kvm);
3834                 break;
3835         }
3836         case KVM_GET_CLOCK: {
3837                 struct kvm_clock_data user_ns;
3838                 u64 now_ns;
3839
3840                 local_irq_disable();
3841                 now_ns = get_kernel_ns();
3842                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3843                 local_irq_enable();
3844                 user_ns.flags = 0;
3845                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3846
3847                 r = -EFAULT;
3848                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3849                         goto out;
3850                 r = 0;
3851                 break;
3852         }
3853
3854         default:
3855                 ;
3856         }
3857 out:
3858         return r;
3859 }
3860
3861 static void kvm_init_msr_list(void)
3862 {
3863         u32 dummy[2];
3864         unsigned i, j;
3865
3866         /* skip the first msrs in the list. KVM-specific */
3867         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3868                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3869                         continue;
3870                 if (j < i)
3871                         msrs_to_save[j] = msrs_to_save[i];
3872                 j++;
3873         }
3874         num_msrs_to_save = j;
3875 }
3876
3877 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3878                            const void *v)
3879 {
3880         int handled = 0;
3881         int n;
3882
3883         do {
3884                 n = min(len, 8);
3885                 if (!(vcpu->arch.apic &&
3886                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3887                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3888                         break;
3889                 handled += n;
3890                 addr += n;
3891                 len -= n;
3892                 v += n;
3893         } while (len);
3894
3895         return handled;
3896 }
3897
3898 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3899 {
3900         int handled = 0;
3901         int n;
3902
3903         do {
3904                 n = min(len, 8);
3905                 if (!(vcpu->arch.apic &&
3906                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3907                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3908                         break;
3909                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3910                 handled += n;
3911                 addr += n;
3912                 len -= n;
3913                 v += n;
3914         } while (len);
3915
3916         return handled;
3917 }
3918
3919 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3920                         struct kvm_segment *var, int seg)
3921 {
3922         kvm_x86_ops->set_segment(vcpu, var, seg);
3923 }
3924
3925 void kvm_get_segment(struct kvm_vcpu *vcpu,
3926                      struct kvm_segment *var, int seg)
3927 {
3928         kvm_x86_ops->get_segment(vcpu, var, seg);
3929 }
3930
3931 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3932 {
3933         gpa_t t_gpa;
3934         struct x86_exception exception;
3935
3936         BUG_ON(!mmu_is_nested(vcpu));
3937
3938         /* NPT walks are always user-walks */
3939         access |= PFERR_USER_MASK;
3940         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3941
3942         return t_gpa;
3943 }
3944
3945 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3946                               struct x86_exception *exception)
3947 {
3948         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3949         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3950 }
3951
3952  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3953                                 struct x86_exception *exception)
3954 {
3955         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3956         access |= PFERR_FETCH_MASK;
3957         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3958 }
3959
3960 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3961                                struct x86_exception *exception)
3962 {
3963         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3964         access |= PFERR_WRITE_MASK;
3965         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3966 }
3967
3968 /* uses this to access any guest's mapped memory without checking CPL */
3969 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3970                                 struct x86_exception *exception)
3971 {
3972         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3973 }
3974
3975 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3976                                       struct kvm_vcpu *vcpu, u32 access,
3977                                       struct x86_exception *exception)
3978 {
3979         void *data = val;
3980         int r = X86EMUL_CONTINUE;
3981
3982         while (bytes) {
3983                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3984                                                             exception);
3985                 unsigned offset = addr & (PAGE_SIZE-1);
3986                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3987                 int ret;
3988
3989                 if (gpa == UNMAPPED_GVA)
3990                         return X86EMUL_PROPAGATE_FAULT;
3991                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3992                 if (ret < 0) {
3993                         r = X86EMUL_IO_NEEDED;
3994                         goto out;
3995                 }
3996
3997                 bytes -= toread;
3998                 data += toread;
3999                 addr += toread;
4000         }
4001 out:
4002         return r;
4003 }
4004
4005 /* used for instruction fetching */
4006 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4007                                 gva_t addr, void *val, unsigned int bytes,
4008                                 struct x86_exception *exception)
4009 {
4010         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4011         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4012
4013         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4014                                           access | PFERR_FETCH_MASK,
4015                                           exception);
4016 }
4017
4018 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4019                                gva_t addr, void *val, unsigned int bytes,
4020                                struct x86_exception *exception)
4021 {
4022         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4023         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4024
4025         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4026                                           exception);
4027 }
4028 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4029
4030 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4031                                       gva_t addr, void *val, unsigned int bytes,
4032                                       struct x86_exception *exception)
4033 {
4034         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4035         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4036 }
4037
4038 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4039                                        gva_t addr, void *val,
4040                                        unsigned int bytes,
4041                                        struct x86_exception *exception)
4042 {
4043         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4044         void *data = val;
4045         int r = X86EMUL_CONTINUE;
4046
4047         while (bytes) {
4048                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4049                                                              PFERR_WRITE_MASK,
4050                                                              exception);
4051                 unsigned offset = addr & (PAGE_SIZE-1);
4052                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4053                 int ret;
4054
4055                 if (gpa == UNMAPPED_GVA)
4056                         return X86EMUL_PROPAGATE_FAULT;
4057                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4058                 if (ret < 0) {
4059                         r = X86EMUL_IO_NEEDED;
4060                         goto out;
4061                 }
4062
4063                 bytes -= towrite;
4064                 data += towrite;
4065                 addr += towrite;
4066         }
4067 out:
4068         return r;
4069 }
4070 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4071
4072 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4073                                 gpa_t *gpa, struct x86_exception *exception,
4074                                 bool write)
4075 {
4076         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4077                 | (write ? PFERR_WRITE_MASK : 0);
4078
4079         if (vcpu_match_mmio_gva(vcpu, gva)
4080             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4081                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4082                                         (gva & (PAGE_SIZE - 1));
4083                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4084                 return 1;
4085         }
4086
4087         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4088
4089         if (*gpa == UNMAPPED_GVA)
4090                 return -1;
4091
4092         /* For APIC access vmexit */
4093         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4094                 return 1;
4095
4096         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4097                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4098                 return 1;
4099         }
4100
4101         return 0;
4102 }
4103
4104 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4105                         const void *val, int bytes)
4106 {
4107         int ret;
4108
4109         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4110         if (ret < 0)
4111                 return 0;
4112         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4113         return 1;
4114 }
4115
4116 struct read_write_emulator_ops {
4117         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4118                                   int bytes);
4119         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4120                                   void *val, int bytes);
4121         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4122                                int bytes, void *val);
4123         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4124                                     void *val, int bytes);
4125         bool write;
4126 };
4127
4128 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4129 {
4130         if (vcpu->mmio_read_completed) {
4131                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4132                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4133                 vcpu->mmio_read_completed = 0;
4134                 return 1;
4135         }
4136
4137         return 0;
4138 }
4139
4140 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4141                         void *val, int bytes)
4142 {
4143         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4144 }
4145
4146 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4147                          void *val, int bytes)
4148 {
4149         return emulator_write_phys(vcpu, gpa, val, bytes);
4150 }
4151
4152 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4153 {
4154         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4155         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4156 }
4157
4158 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4159                           void *val, int bytes)
4160 {
4161         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4162         return X86EMUL_IO_NEEDED;
4163 }
4164
4165 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4166                            void *val, int bytes)
4167 {
4168         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4169
4170         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4171         return X86EMUL_CONTINUE;
4172 }
4173
4174 static const struct read_write_emulator_ops read_emultor = {
4175         .read_write_prepare = read_prepare,
4176         .read_write_emulate = read_emulate,
4177         .read_write_mmio = vcpu_mmio_read,
4178         .read_write_exit_mmio = read_exit_mmio,
4179 };
4180
4181 static const struct read_write_emulator_ops write_emultor = {
4182         .read_write_emulate = write_emulate,
4183         .read_write_mmio = write_mmio,
4184         .read_write_exit_mmio = write_exit_mmio,
4185         .write = true,
4186 };
4187
4188 static int emulator_read_write_onepage(unsigned long addr, void *val,
4189                                        unsigned int bytes,
4190                                        struct x86_exception *exception,
4191                                        struct kvm_vcpu *vcpu,
4192                                        const struct read_write_emulator_ops *ops)
4193 {
4194         gpa_t gpa;
4195         int handled, ret;
4196         bool write = ops->write;
4197         struct kvm_mmio_fragment *frag;
4198
4199         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4200
4201         if (ret < 0)
4202                 return X86EMUL_PROPAGATE_FAULT;
4203
4204         /* For APIC access vmexit */
4205         if (ret)
4206                 goto mmio;
4207
4208         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4209                 return X86EMUL_CONTINUE;
4210
4211 mmio:
4212         /*
4213          * Is this MMIO handled locally?
4214          */
4215         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4216         if (handled == bytes)
4217                 return X86EMUL_CONTINUE;
4218
4219         gpa += handled;
4220         bytes -= handled;
4221         val += handled;
4222
4223         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4224         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4225         frag->gpa = gpa;
4226         frag->data = val;
4227         frag->len = bytes;
4228         return X86EMUL_CONTINUE;
4229 }
4230
4231 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4232                         void *val, unsigned int bytes,
4233                         struct x86_exception *exception,
4234                         const struct read_write_emulator_ops *ops)
4235 {
4236         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4237         gpa_t gpa;
4238         int rc;
4239
4240         if (ops->read_write_prepare &&
4241                   ops->read_write_prepare(vcpu, val, bytes))
4242                 return X86EMUL_CONTINUE;
4243
4244         vcpu->mmio_nr_fragments = 0;
4245
4246         /* Crossing a page boundary? */
4247         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4248                 int now;
4249
4250                 now = -addr & ~PAGE_MASK;
4251                 rc = emulator_read_write_onepage(addr, val, now, exception,
4252                                                  vcpu, ops);
4253
4254                 if (rc != X86EMUL_CONTINUE)
4255                         return rc;
4256                 addr += now;
4257                 val += now;
4258                 bytes -= now;
4259         }
4260
4261         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4262                                          vcpu, ops);
4263         if (rc != X86EMUL_CONTINUE)
4264                 return rc;
4265
4266         if (!vcpu->mmio_nr_fragments)
4267                 return rc;
4268
4269         gpa = vcpu->mmio_fragments[0].gpa;
4270
4271         vcpu->mmio_needed = 1;
4272         vcpu->mmio_cur_fragment = 0;
4273
4274         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4275         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4276         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4277         vcpu->run->mmio.phys_addr = gpa;
4278
4279         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4280 }
4281
4282 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4283                                   unsigned long addr,
4284                                   void *val,
4285                                   unsigned int bytes,
4286                                   struct x86_exception *exception)
4287 {
4288         return emulator_read_write(ctxt, addr, val, bytes,
4289                                    exception, &read_emultor);
4290 }
4291
4292 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4293                             unsigned long addr,
4294                             const void *val,
4295                             unsigned int bytes,
4296                             struct x86_exception *exception)
4297 {
4298         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4299                                    exception, &write_emultor);
4300 }
4301
4302 #define CMPXCHG_TYPE(t, ptr, old, new) \
4303         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4304
4305 #ifdef CONFIG_X86_64
4306 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4307 #else
4308 #  define CMPXCHG64(ptr, old, new) \
4309         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4310 #endif
4311
4312 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4313                                      unsigned long addr,
4314                                      const void *old,
4315                                      const void *new,
4316                                      unsigned int bytes,
4317                                      struct x86_exception *exception)
4318 {
4319         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4320         gpa_t gpa;
4321         struct page *page;
4322         char *kaddr;
4323         bool exchanged;
4324
4325         /* guests cmpxchg8b have to be emulated atomically */
4326         if (bytes > 8 || (bytes & (bytes - 1)))
4327                 goto emul_write;
4328
4329         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4330
4331         if (gpa == UNMAPPED_GVA ||
4332             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4333                 goto emul_write;
4334
4335         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4336                 goto emul_write;
4337
4338         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4339         if (is_error_page(page))
4340                 goto emul_write;
4341
4342         kaddr = kmap_atomic(page);
4343         kaddr += offset_in_page(gpa);
4344         switch (bytes) {
4345         case 1:
4346                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4347                 break;
4348         case 2:
4349                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4350                 break;
4351         case 4:
4352                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4353                 break;
4354         case 8:
4355                 exchanged = CMPXCHG64(kaddr, old, new);
4356                 break;
4357         default:
4358                 BUG();
4359         }
4360         kunmap_atomic(kaddr);
4361         kvm_release_page_dirty(page);
4362
4363         if (!exchanged)
4364                 return X86EMUL_CMPXCHG_FAILED;
4365
4366         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4367
4368         return X86EMUL_CONTINUE;
4369
4370 emul_write:
4371         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4372
4373         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4374 }
4375
4376 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4377 {
4378         /* TODO: String I/O for in kernel device */
4379         int r;
4380
4381         if (vcpu->arch.pio.in)
4382                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4383                                     vcpu->arch.pio.size, pd);
4384         else
4385                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4386                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4387                                      pd);
4388         return r;
4389 }
4390
4391 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4392                                unsigned short port, void *val,
4393                                unsigned int count, bool in)
4394 {
4395         trace_kvm_pio(!in, port, size, count);
4396
4397         vcpu->arch.pio.port = port;
4398         vcpu->arch.pio.in = in;
4399         vcpu->arch.pio.count  = count;
4400         vcpu->arch.pio.size = size;
4401
4402         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4403                 vcpu->arch.pio.count = 0;
4404                 return 1;
4405         }
4406
4407         vcpu->run->exit_reason = KVM_EXIT_IO;
4408         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4409         vcpu->run->io.size = size;
4410         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4411         vcpu->run->io.count = count;
4412         vcpu->run->io.port = port;
4413
4414         return 0;
4415 }
4416
4417 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4418                                     int size, unsigned short port, void *val,
4419                                     unsigned int count)
4420 {
4421         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4422         int ret;
4423
4424         if (vcpu->arch.pio.count)
4425                 goto data_avail;
4426
4427         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4428         if (ret) {
4429 data_avail:
4430                 memcpy(val, vcpu->arch.pio_data, size * count);
4431                 vcpu->arch.pio.count = 0;
4432                 return 1;
4433         }
4434
4435         return 0;
4436 }
4437
4438 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4439                                      int size, unsigned short port,
4440                                      const void *val, unsigned int count)
4441 {
4442         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4443
4444         memcpy(vcpu->arch.pio_data, val, size * count);
4445         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4446 }
4447
4448 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4449 {
4450         return kvm_x86_ops->get_segment_base(vcpu, seg);
4451 }
4452
4453 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4454 {
4455         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4456 }
4457
4458 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4459 {
4460         if (!need_emulate_wbinvd(vcpu))
4461                 return X86EMUL_CONTINUE;
4462
4463         if (kvm_x86_ops->has_wbinvd_exit()) {
4464                 int cpu = get_cpu();
4465
4466                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4467                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4468                                 wbinvd_ipi, NULL, 1);
4469                 put_cpu();
4470                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4471         } else
4472                 wbinvd();
4473         return X86EMUL_CONTINUE;
4474 }
4475 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4476
4477 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4478 {
4479         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4480 }
4481
4482 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4483 {
4484         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4485 }
4486
4487 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4488 {
4489
4490         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4491 }
4492
4493 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4494 {
4495         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4496 }
4497
4498 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4499 {
4500         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4501         unsigned long value;
4502
4503         switch (cr) {
4504         case 0:
4505                 value = kvm_read_cr0(vcpu);
4506                 break;
4507         case 2:
4508                 value = vcpu->arch.cr2;
4509                 break;
4510         case 3:
4511                 value = kvm_read_cr3(vcpu);
4512                 break;
4513         case 4:
4514                 value = kvm_read_cr4(vcpu);
4515                 break;
4516         case 8:
4517                 value = kvm_get_cr8(vcpu);
4518                 break;
4519         default:
4520                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4521                 return 0;
4522         }
4523
4524         return value;
4525 }
4526
4527 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4528 {
4529         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4530         int res = 0;
4531
4532         switch (cr) {
4533         case 0:
4534                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4535                 break;
4536         case 2:
4537                 vcpu->arch.cr2 = val;
4538                 break;
4539         case 3:
4540                 res = kvm_set_cr3(vcpu, val);
4541                 break;
4542         case 4:
4543                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4544                 break;
4545         case 8:
4546                 res = kvm_set_cr8(vcpu, val);
4547                 break;
4548         default:
4549                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4550                 res = -1;
4551         }
4552
4553         return res;
4554 }
4555
4556 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4557 {
4558         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4559 }
4560
4561 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4562 {
4563         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4564 }
4565
4566 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4567 {
4568         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4569 }
4570
4571 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4572 {
4573         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4574 }
4575
4576 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4577 {
4578         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4579 }
4580
4581 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4582 {
4583         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4584 }
4585
4586 static unsigned long emulator_get_cached_segment_base(
4587         struct x86_emulate_ctxt *ctxt, int seg)
4588 {
4589         return get_segment_base(emul_to_vcpu(ctxt), seg);
4590 }
4591
4592 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4593                                  struct desc_struct *desc, u32 *base3,
4594                                  int seg)
4595 {
4596         struct kvm_segment var;
4597
4598         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4599         *selector = var.selector;
4600
4601         if (var.unusable) {
4602                 memset(desc, 0, sizeof(*desc));
4603                 return false;
4604         }
4605
4606         if (var.g)
4607                 var.limit >>= 12;
4608         set_desc_limit(desc, var.limit);
4609         set_desc_base(desc, (unsigned long)var.base);
4610 #ifdef CONFIG_X86_64
4611         if (base3)
4612                 *base3 = var.base >> 32;
4613 #endif
4614         desc->type = var.type;
4615         desc->s = var.s;
4616         desc->dpl = var.dpl;
4617         desc->p = var.present;
4618         desc->avl = var.avl;
4619         desc->l = var.l;
4620         desc->d = var.db;
4621         desc->g = var.g;
4622
4623         return true;
4624 }
4625
4626 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4627                                  struct desc_struct *desc, u32 base3,
4628                                  int seg)
4629 {
4630         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4631         struct kvm_segment var;
4632
4633         var.selector = selector;
4634         var.base = get_desc_base(desc);
4635 #ifdef CONFIG_X86_64
4636         var.base |= ((u64)base3) << 32;
4637 #endif
4638         var.limit = get_desc_limit(desc);
4639         if (desc->g)
4640                 var.limit = (var.limit << 12) | 0xfff;
4641         var.type = desc->type;
4642         var.present = desc->p;
4643         var.dpl = desc->dpl;
4644         var.db = desc->d;
4645         var.s = desc->s;
4646         var.l = desc->l;
4647         var.g = desc->g;
4648         var.avl = desc->avl;
4649         var.present = desc->p;
4650         var.unusable = !var.present;
4651         var.padding = 0;
4652
4653         kvm_set_segment(vcpu, &var, seg);
4654         return;
4655 }
4656
4657 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4658                             u32 msr_index, u64 *pdata)
4659 {
4660         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4661 }
4662
4663 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4664                             u32 msr_index, u64 data)
4665 {
4666         struct msr_data msr;
4667
4668         msr.data = data;
4669         msr.index = msr_index;
4670         msr.host_initiated = false;
4671         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4672 }
4673
4674 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4675                              u32 pmc, u64 *pdata)
4676 {
4677         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4678 }
4679
4680 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4681 {
4682         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4683 }
4684
4685 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4686 {
4687         preempt_disable();
4688         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4689         /*
4690          * CR0.TS may reference the host fpu state, not the guest fpu state,
4691          * so it may be clear at this point.
4692          */
4693         clts();
4694 }
4695
4696 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4697 {
4698         preempt_enable();
4699 }
4700
4701 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4702                               struct x86_instruction_info *info,
4703                               enum x86_intercept_stage stage)
4704 {
4705         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4706 }
4707
4708 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4709                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4710 {
4711         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4712 }
4713
4714 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4715 {
4716         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4717 }
4718
4719 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4720 {
4721         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4722 }
4723
4724 static const struct x86_emulate_ops emulate_ops = {
4725         .read_gpr            = emulator_read_gpr,
4726         .write_gpr           = emulator_write_gpr,
4727         .read_std            = kvm_read_guest_virt_system,
4728         .write_std           = kvm_write_guest_virt_system,
4729         .fetch               = kvm_fetch_guest_virt,
4730         .read_emulated       = emulator_read_emulated,
4731         .write_emulated      = emulator_write_emulated,
4732         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4733         .invlpg              = emulator_invlpg,
4734         .pio_in_emulated     = emulator_pio_in_emulated,
4735         .pio_out_emulated    = emulator_pio_out_emulated,
4736         .get_segment         = emulator_get_segment,
4737         .set_segment         = emulator_set_segment,
4738         .get_cached_segment_base = emulator_get_cached_segment_base,
4739         .get_gdt             = emulator_get_gdt,
4740         .get_idt             = emulator_get_idt,
4741         .set_gdt             = emulator_set_gdt,
4742         .set_idt             = emulator_set_idt,
4743         .get_cr              = emulator_get_cr,
4744         .set_cr              = emulator_set_cr,
4745         .set_rflags          = emulator_set_rflags,
4746         .cpl                 = emulator_get_cpl,
4747         .get_dr              = emulator_get_dr,
4748         .set_dr              = emulator_set_dr,
4749         .set_msr             = emulator_set_msr,
4750         .get_msr             = emulator_get_msr,
4751         .read_pmc            = emulator_read_pmc,
4752         .halt                = emulator_halt,
4753         .wbinvd              = emulator_wbinvd,
4754         .fix_hypercall       = emulator_fix_hypercall,
4755         .get_fpu             = emulator_get_fpu,
4756         .put_fpu             = emulator_put_fpu,
4757         .intercept           = emulator_intercept,
4758         .get_cpuid           = emulator_get_cpuid,
4759 };
4760
4761 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4762 {
4763         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4764         /*
4765          * an sti; sti; sequence only disable interrupts for the first
4766          * instruction. So, if the last instruction, be it emulated or
4767          * not, left the system with the INT_STI flag enabled, it
4768          * means that the last instruction is an sti. We should not
4769          * leave the flag on in this case. The same goes for mov ss
4770          */
4771         if (!(int_shadow & mask))
4772                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4773 }
4774
4775 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4776 {
4777         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4778         if (ctxt->exception.vector == PF_VECTOR)
4779                 kvm_propagate_fault(vcpu, &ctxt->exception);
4780         else if (ctxt->exception.error_code_valid)
4781                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4782                                       ctxt->exception.error_code);
4783         else
4784                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4785 }
4786
4787 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4788 {
4789         memset(&ctxt->twobyte, 0,
4790                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4791
4792         ctxt->fetch.start = 0;
4793         ctxt->fetch.end = 0;
4794         ctxt->io_read.pos = 0;
4795         ctxt->io_read.end = 0;
4796         ctxt->mem_read.pos = 0;
4797         ctxt->mem_read.end = 0;
4798 }
4799
4800 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4801 {
4802         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4803         int cs_db, cs_l;
4804
4805         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4806
4807         ctxt->eflags = kvm_get_rflags(vcpu);
4808         ctxt->eip = kvm_rip_read(vcpu);
4809         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4810                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4811                      cs_l                               ? X86EMUL_MODE_PROT64 :
4812                      cs_db                              ? X86EMUL_MODE_PROT32 :
4813                                                           X86EMUL_MODE_PROT16;
4814         ctxt->guest_mode = is_guest_mode(vcpu);
4815
4816         init_decode_cache(ctxt);
4817         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4818 }
4819
4820 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4821 {
4822         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4823         int ret;
4824
4825         init_emulate_ctxt(vcpu);
4826
4827         ctxt->op_bytes = 2;
4828         ctxt->ad_bytes = 2;
4829         ctxt->_eip = ctxt->eip + inc_eip;
4830         ret = emulate_int_real(ctxt, irq);
4831
4832         if (ret != X86EMUL_CONTINUE)
4833                 return EMULATE_FAIL;
4834
4835         ctxt->eip = ctxt->_eip;
4836         kvm_rip_write(vcpu, ctxt->eip);
4837         kvm_set_rflags(vcpu, ctxt->eflags);
4838
4839         if (irq == NMI_VECTOR)
4840                 vcpu->arch.nmi_pending = 0;
4841         else
4842                 vcpu->arch.interrupt.pending = false;
4843
4844         return EMULATE_DONE;
4845 }
4846 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4847
4848 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4849 {
4850         int r = EMULATE_DONE;
4851
4852         ++vcpu->stat.insn_emulation_fail;
4853         trace_kvm_emulate_insn_failed(vcpu);
4854         if (!is_guest_mode(vcpu)) {
4855                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4856                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4857                 vcpu->run->internal.ndata = 0;
4858                 r = EMULATE_FAIL;
4859         }
4860         kvm_queue_exception(vcpu, UD_VECTOR);
4861
4862         return r;
4863 }
4864
4865 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4866                                   bool write_fault_to_shadow_pgtable,
4867                                   int emulation_type)
4868 {
4869         gpa_t gpa = cr2;
4870         pfn_t pfn;
4871
4872         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4873                 return false;
4874
4875         if (!vcpu->arch.mmu.direct_map) {
4876                 /*
4877                  * Write permission should be allowed since only
4878                  * write access need to be emulated.
4879                  */
4880                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4881
4882                 /*
4883                  * If the mapping is invalid in guest, let cpu retry
4884                  * it to generate fault.
4885                  */
4886                 if (gpa == UNMAPPED_GVA)
4887                         return true;
4888         }
4889
4890         /*
4891          * Do not retry the unhandleable instruction if it faults on the
4892          * readonly host memory, otherwise it will goto a infinite loop:
4893          * retry instruction -> write #PF -> emulation fail -> retry
4894          * instruction -> ...
4895          */
4896         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4897
4898         /*
4899          * If the instruction failed on the error pfn, it can not be fixed,
4900          * report the error to userspace.
4901          */
4902         if (is_error_noslot_pfn(pfn))
4903                 return false;
4904
4905         kvm_release_pfn_clean(pfn);
4906
4907         /* The instructions are well-emulated on direct mmu. */
4908         if (vcpu->arch.mmu.direct_map) {
4909                 unsigned int indirect_shadow_pages;
4910
4911                 spin_lock(&vcpu->kvm->mmu_lock);
4912                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4913                 spin_unlock(&vcpu->kvm->mmu_lock);
4914
4915                 if (indirect_shadow_pages)
4916                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4917
4918                 return true;
4919         }
4920
4921         /*
4922          * if emulation was due to access to shadowed page table
4923          * and it failed try to unshadow page and re-enter the
4924          * guest to let CPU execute the instruction.
4925          */
4926         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4927
4928         /*
4929          * If the access faults on its page table, it can not
4930          * be fixed by unprotecting shadow page and it should
4931          * be reported to userspace.
4932          */
4933         return !write_fault_to_shadow_pgtable;
4934 }
4935
4936 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4937                               unsigned long cr2,  int emulation_type)
4938 {
4939         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4940         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4941
4942         last_retry_eip = vcpu->arch.last_retry_eip;
4943         last_retry_addr = vcpu->arch.last_retry_addr;
4944
4945         /*
4946          * If the emulation is caused by #PF and it is non-page_table
4947          * writing instruction, it means the VM-EXIT is caused by shadow
4948          * page protected, we can zap the shadow page and retry this
4949          * instruction directly.
4950          *
4951          * Note: if the guest uses a non-page-table modifying instruction
4952          * on the PDE that points to the instruction, then we will unmap
4953          * the instruction and go to an infinite loop. So, we cache the
4954          * last retried eip and the last fault address, if we meet the eip
4955          * and the address again, we can break out of the potential infinite
4956          * loop.
4957          */
4958         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4959
4960         if (!(emulation_type & EMULTYPE_RETRY))
4961                 return false;
4962
4963         if (x86_page_table_writing_insn(ctxt))
4964                 return false;
4965
4966         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4967                 return false;
4968
4969         vcpu->arch.last_retry_eip = ctxt->eip;
4970         vcpu->arch.last_retry_addr = cr2;
4971
4972         if (!vcpu->arch.mmu.direct_map)
4973                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4974
4975         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4976
4977         return true;
4978 }
4979
4980 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4981 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4982
4983 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
4984                                 unsigned long *db)
4985 {
4986         u32 dr6 = 0;
4987         int i;
4988         u32 enable, rwlen;
4989
4990         enable = dr7;
4991         rwlen = dr7 >> 16;
4992         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
4993                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
4994                         dr6 |= (1 << i);
4995         return dr6;
4996 }
4997
4998 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
4999 {
5000         struct kvm_run *kvm_run = vcpu->run;
5001
5002         /*
5003          * Use the "raw" value to see if TF was passed to the processor.
5004          * Note that the new value of the flags has not been saved yet.
5005          *
5006          * This is correct even for TF set by the guest, because "the
5007          * processor will not generate this exception after the instruction
5008          * that sets the TF flag".
5009          */
5010         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5011
5012         if (unlikely(rflags & X86_EFLAGS_TF)) {
5013                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5014                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
5015                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5016                         kvm_run->debug.arch.exception = DB_VECTOR;
5017                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5018                         *r = EMULATE_USER_EXIT;
5019                 } else {
5020                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5021                         /*
5022                          * "Certain debug exceptions may clear bit 0-3.  The
5023                          * remaining contents of the DR6 register are never
5024                          * cleared by the processor".
5025                          */
5026                         vcpu->arch.dr6 &= ~15;
5027                         vcpu->arch.dr6 |= DR6_BS;
5028                         kvm_queue_exception(vcpu, DB_VECTOR);
5029                 }
5030         }
5031 }
5032
5033 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5034 {
5035         struct kvm_run *kvm_run = vcpu->run;
5036         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5037         u32 dr6 = 0;
5038
5039         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5040             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5041                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5042                                            vcpu->arch.guest_debug_dr7,
5043                                            vcpu->arch.eff_db);
5044
5045                 if (dr6 != 0) {
5046                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5047                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5048                                 get_segment_base(vcpu, VCPU_SREG_CS);
5049
5050                         kvm_run->debug.arch.exception = DB_VECTOR;
5051                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5052                         *r = EMULATE_USER_EXIT;
5053                         return true;
5054                 }
5055         }
5056
5057         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5058                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5059                                            vcpu->arch.dr7,
5060                                            vcpu->arch.db);
5061
5062                 if (dr6 != 0) {
5063                         vcpu->arch.dr6 &= ~15;
5064                         vcpu->arch.dr6 |= dr6;
5065                         kvm_queue_exception(vcpu, DB_VECTOR);
5066                         *r = EMULATE_DONE;
5067                         return true;
5068                 }
5069         }
5070
5071         return false;
5072 }
5073
5074 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5075                             unsigned long cr2,
5076                             int emulation_type,
5077                             void *insn,
5078                             int insn_len)
5079 {
5080         int r;
5081         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5082         bool writeback = true;
5083         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5084
5085         /*
5086          * Clear write_fault_to_shadow_pgtable here to ensure it is
5087          * never reused.
5088          */
5089         vcpu->arch.write_fault_to_shadow_pgtable = false;
5090         kvm_clear_exception_queue(vcpu);
5091
5092         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5093                 init_emulate_ctxt(vcpu);
5094
5095                 /*
5096                  * We will reenter on the same instruction since
5097                  * we do not set complete_userspace_io.  This does not
5098                  * handle watchpoints yet, those would be handled in
5099                  * the emulate_ops.
5100                  */
5101                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5102                         return r;
5103
5104                 ctxt->interruptibility = 0;
5105                 ctxt->have_exception = false;
5106                 ctxt->perm_ok = false;
5107
5108                 ctxt->only_vendor_specific_insn
5109                         = emulation_type & EMULTYPE_TRAP_UD;
5110
5111                 r = x86_decode_insn(ctxt, insn, insn_len);
5112
5113                 trace_kvm_emulate_insn_start(vcpu);
5114                 ++vcpu->stat.insn_emulation;
5115                 if (r != EMULATION_OK)  {
5116                         if (emulation_type & EMULTYPE_TRAP_UD)
5117                                 return EMULATE_FAIL;
5118                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5119                                                 emulation_type))
5120                                 return EMULATE_DONE;
5121                         if (emulation_type & EMULTYPE_SKIP)
5122                                 return EMULATE_FAIL;
5123                         return handle_emulation_failure(vcpu);
5124                 }
5125         }
5126
5127         if (emulation_type & EMULTYPE_SKIP) {
5128                 kvm_rip_write(vcpu, ctxt->_eip);
5129                 return EMULATE_DONE;
5130         }
5131
5132         if (retry_instruction(ctxt, cr2, emulation_type))
5133                 return EMULATE_DONE;
5134
5135         /* this is needed for vmware backdoor interface to work since it
5136            changes registers values  during IO operation */
5137         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5138                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5139                 emulator_invalidate_register_cache(ctxt);
5140         }
5141
5142 restart:
5143         r = x86_emulate_insn(ctxt);
5144
5145         if (r == EMULATION_INTERCEPTED)
5146                 return EMULATE_DONE;
5147
5148         if (r == EMULATION_FAILED) {
5149                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5150                                         emulation_type))
5151                         return EMULATE_DONE;
5152
5153                 return handle_emulation_failure(vcpu);
5154         }
5155
5156         if (ctxt->have_exception) {
5157                 inject_emulated_exception(vcpu);
5158                 r = EMULATE_DONE;
5159         } else if (vcpu->arch.pio.count) {
5160                 if (!vcpu->arch.pio.in) {
5161                         /* FIXME: return into emulator if single-stepping.  */
5162                         vcpu->arch.pio.count = 0;
5163                 } else {
5164                         writeback = false;
5165                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5166                 }
5167                 r = EMULATE_USER_EXIT;
5168         } else if (vcpu->mmio_needed) {
5169                 if (!vcpu->mmio_is_write)
5170                         writeback = false;
5171                 r = EMULATE_USER_EXIT;
5172                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5173         } else if (r == EMULATION_RESTART)
5174                 goto restart;
5175         else
5176                 r = EMULATE_DONE;
5177
5178         if (writeback) {
5179                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5180                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5181                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5182                 kvm_rip_write(vcpu, ctxt->eip);
5183                 if (r == EMULATE_DONE)
5184                         kvm_vcpu_check_singlestep(vcpu, &r);
5185                 kvm_set_rflags(vcpu, ctxt->eflags);
5186         } else
5187                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5188
5189         return r;
5190 }
5191 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5192
5193 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5194 {
5195         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5196         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5197                                             size, port, &val, 1);
5198         /* do not return to emulator after return from userspace */
5199         vcpu->arch.pio.count = 0;
5200         return ret;
5201 }
5202 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5203
5204 static void tsc_bad(void *info)
5205 {
5206         __this_cpu_write(cpu_tsc_khz, 0);
5207 }
5208
5209 static void tsc_khz_changed(void *data)
5210 {
5211         struct cpufreq_freqs *freq = data;
5212         unsigned long khz = 0;
5213
5214         if (data)
5215                 khz = freq->new;
5216         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5217                 khz = cpufreq_quick_get(raw_smp_processor_id());
5218         if (!khz)
5219                 khz = tsc_khz;
5220         __this_cpu_write(cpu_tsc_khz, khz);
5221 }
5222
5223 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5224                                      void *data)
5225 {
5226         struct cpufreq_freqs *freq = data;
5227         struct kvm *kvm;
5228         struct kvm_vcpu *vcpu;
5229         int i, send_ipi = 0;
5230
5231         /*
5232          * We allow guests to temporarily run on slowing clocks,
5233          * provided we notify them after, or to run on accelerating
5234          * clocks, provided we notify them before.  Thus time never
5235          * goes backwards.
5236          *
5237          * However, we have a problem.  We can't atomically update
5238          * the frequency of a given CPU from this function; it is
5239          * merely a notifier, which can be called from any CPU.
5240          * Changing the TSC frequency at arbitrary points in time
5241          * requires a recomputation of local variables related to
5242          * the TSC for each VCPU.  We must flag these local variables
5243          * to be updated and be sure the update takes place with the
5244          * new frequency before any guests proceed.
5245          *
5246          * Unfortunately, the combination of hotplug CPU and frequency
5247          * change creates an intractable locking scenario; the order
5248          * of when these callouts happen is undefined with respect to
5249          * CPU hotplug, and they can race with each other.  As such,
5250          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5251          * undefined; you can actually have a CPU frequency change take
5252          * place in between the computation of X and the setting of the
5253          * variable.  To protect against this problem, all updates of
5254          * the per_cpu tsc_khz variable are done in an interrupt
5255          * protected IPI, and all callers wishing to update the value
5256          * must wait for a synchronous IPI to complete (which is trivial
5257          * if the caller is on the CPU already).  This establishes the
5258          * necessary total order on variable updates.
5259          *
5260          * Note that because a guest time update may take place
5261          * anytime after the setting of the VCPU's request bit, the
5262          * correct TSC value must be set before the request.  However,
5263          * to ensure the update actually makes it to any guest which
5264          * starts running in hardware virtualization between the set
5265          * and the acquisition of the spinlock, we must also ping the
5266          * CPU after setting the request bit.
5267          *
5268          */
5269
5270         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5271                 return 0;
5272         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5273                 return 0;
5274
5275         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5276
5277         spin_lock(&kvm_lock);
5278         list_for_each_entry(kvm, &vm_list, vm_list) {
5279                 kvm_for_each_vcpu(i, vcpu, kvm) {
5280                         if (vcpu->cpu != freq->cpu)
5281                                 continue;
5282                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5283                         if (vcpu->cpu != smp_processor_id())
5284                                 send_ipi = 1;
5285                 }
5286         }
5287         spin_unlock(&kvm_lock);
5288
5289         if (freq->old < freq->new && send_ipi) {
5290                 /*
5291                  * We upscale the frequency.  Must make the guest
5292                  * doesn't see old kvmclock values while running with
5293                  * the new frequency, otherwise we risk the guest sees
5294                  * time go backwards.
5295                  *
5296                  * In case we update the frequency for another cpu
5297                  * (which might be in guest context) send an interrupt
5298                  * to kick the cpu out of guest context.  Next time
5299                  * guest context is entered kvmclock will be updated,
5300                  * so the guest will not see stale values.
5301                  */
5302                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5303         }
5304         return 0;
5305 }
5306
5307 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5308         .notifier_call  = kvmclock_cpufreq_notifier
5309 };
5310
5311 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5312                                         unsigned long action, void *hcpu)
5313 {
5314         unsigned int cpu = (unsigned long)hcpu;
5315
5316         switch (action) {
5317                 case CPU_ONLINE:
5318                 case CPU_DOWN_FAILED:
5319                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5320                         break;
5321                 case CPU_DOWN_PREPARE:
5322                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5323                         break;
5324         }
5325         return NOTIFY_OK;
5326 }
5327
5328 static struct notifier_block kvmclock_cpu_notifier_block = {
5329         .notifier_call  = kvmclock_cpu_notifier,
5330         .priority = -INT_MAX
5331 };
5332
5333 static void kvm_timer_init(void)
5334 {
5335         int cpu;
5336
5337         max_tsc_khz = tsc_khz;
5338         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5339         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5340 #ifdef CONFIG_CPU_FREQ
5341                 struct cpufreq_policy policy;
5342                 memset(&policy, 0, sizeof(policy));
5343                 cpu = get_cpu();
5344                 cpufreq_get_policy(&policy, cpu);
5345                 if (policy.cpuinfo.max_freq)
5346                         max_tsc_khz = policy.cpuinfo.max_freq;
5347                 put_cpu();
5348 #endif
5349                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5350                                           CPUFREQ_TRANSITION_NOTIFIER);
5351         }
5352         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5353         for_each_online_cpu(cpu)
5354                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5355 }
5356
5357 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5358
5359 int kvm_is_in_guest(void)
5360 {
5361         return __this_cpu_read(current_vcpu) != NULL;
5362 }
5363
5364 static int kvm_is_user_mode(void)
5365 {
5366         int user_mode = 3;
5367
5368         if (__this_cpu_read(current_vcpu))
5369                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5370
5371         return user_mode != 0;
5372 }
5373
5374 static unsigned long kvm_get_guest_ip(void)
5375 {
5376         unsigned long ip = 0;
5377
5378         if (__this_cpu_read(current_vcpu))
5379                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5380
5381         return ip;
5382 }
5383
5384 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5385         .is_in_guest            = kvm_is_in_guest,
5386         .is_user_mode           = kvm_is_user_mode,
5387         .get_guest_ip           = kvm_get_guest_ip,
5388 };
5389
5390 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5391 {
5392         __this_cpu_write(current_vcpu, vcpu);
5393 }
5394 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5395
5396 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5397 {
5398         __this_cpu_write(current_vcpu, NULL);
5399 }
5400 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5401
5402 static void kvm_set_mmio_spte_mask(void)
5403 {
5404         u64 mask;
5405         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5406
5407         /*
5408          * Set the reserved bits and the present bit of an paging-structure
5409          * entry to generate page fault with PFER.RSV = 1.
5410          */
5411          /* Mask the reserved physical address bits. */
5412         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5413
5414         /* Bit 62 is always reserved for 32bit host. */
5415         mask |= 0x3ull << 62;
5416
5417         /* Set the present bit. */
5418         mask |= 1ull;
5419
5420 #ifdef CONFIG_X86_64
5421         /*
5422          * If reserved bit is not supported, clear the present bit to disable
5423          * mmio page fault.
5424          */
5425         if (maxphyaddr == 52)
5426                 mask &= ~1ull;
5427 #endif
5428
5429         kvm_mmu_set_mmio_spte_mask(mask);
5430 }
5431
5432 #ifdef CONFIG_X86_64
5433 static void pvclock_gtod_update_fn(struct work_struct *work)
5434 {
5435         struct kvm *kvm;
5436
5437         struct kvm_vcpu *vcpu;
5438         int i;
5439
5440         spin_lock(&kvm_lock);
5441         list_for_each_entry(kvm, &vm_list, vm_list)
5442                 kvm_for_each_vcpu(i, vcpu, kvm)
5443                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5444         atomic_set(&kvm_guest_has_master_clock, 0);
5445         spin_unlock(&kvm_lock);
5446 }
5447
5448 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5449
5450 /*
5451  * Notification about pvclock gtod data update.
5452  */
5453 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5454                                void *priv)
5455 {
5456         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5457         struct timekeeper *tk = priv;
5458
5459         update_pvclock_gtod(tk);
5460
5461         /* disable master clock if host does not trust, or does not
5462          * use, TSC clocksource
5463          */
5464         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5465             atomic_read(&kvm_guest_has_master_clock) != 0)
5466                 queue_work(system_long_wq, &pvclock_gtod_work);
5467
5468         return 0;
5469 }
5470
5471 static struct notifier_block pvclock_gtod_notifier = {
5472         .notifier_call = pvclock_gtod_notify,
5473 };
5474 #endif
5475
5476 int kvm_arch_init(void *opaque)
5477 {
5478         int r;
5479         struct kvm_x86_ops *ops = opaque;
5480
5481         if (kvm_x86_ops) {
5482                 printk(KERN_ERR "kvm: already loaded the other module\n");
5483                 r = -EEXIST;
5484                 goto out;
5485         }
5486
5487         if (!ops->cpu_has_kvm_support()) {
5488                 printk(KERN_ERR "kvm: no hardware support\n");
5489                 r = -EOPNOTSUPP;
5490                 goto out;
5491         }
5492         if (ops->disabled_by_bios()) {
5493                 printk(KERN_ERR "kvm: disabled by bios\n");
5494                 r = -EOPNOTSUPP;
5495                 goto out;
5496         }
5497
5498         r = -ENOMEM;
5499         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5500         if (!shared_msrs) {
5501                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5502                 goto out;
5503         }
5504
5505         r = kvm_mmu_module_init();
5506         if (r)
5507                 goto out_free_percpu;
5508
5509         kvm_set_mmio_spte_mask();
5510         kvm_init_msr_list();
5511
5512         kvm_x86_ops = ops;
5513         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5514                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5515
5516         kvm_timer_init();
5517
5518         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5519
5520         if (cpu_has_xsave)
5521                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5522
5523         kvm_lapic_init();
5524 #ifdef CONFIG_X86_64
5525         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5526 #endif
5527
5528         return 0;
5529
5530 out_free_percpu:
5531         free_percpu(shared_msrs);
5532 out:
5533         return r;
5534 }
5535
5536 void kvm_arch_exit(void)
5537 {
5538         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5539
5540         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5541                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5542                                             CPUFREQ_TRANSITION_NOTIFIER);
5543         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5544 #ifdef CONFIG_X86_64
5545         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5546 #endif
5547         kvm_x86_ops = NULL;
5548         kvm_mmu_module_exit();
5549         free_percpu(shared_msrs);
5550 }
5551
5552 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5553 {
5554         ++vcpu->stat.halt_exits;
5555         if (irqchip_in_kernel(vcpu->kvm)) {
5556                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5557                 return 1;
5558         } else {
5559                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5560                 return 0;
5561         }
5562 }
5563 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5564
5565 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5566 {
5567         u64 param, ingpa, outgpa, ret;
5568         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5569         bool fast, longmode;
5570         int cs_db, cs_l;
5571
5572         /*
5573          * hypercall generates UD from non zero cpl and real mode
5574          * per HYPER-V spec
5575          */
5576         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5577                 kvm_queue_exception(vcpu, UD_VECTOR);
5578                 return 0;
5579         }
5580
5581         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5582         longmode = is_long_mode(vcpu) && cs_l == 1;
5583
5584         if (!longmode) {
5585                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5586                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5587                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5588                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5589                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5590                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5591         }
5592 #ifdef CONFIG_X86_64
5593         else {
5594                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5595                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5596                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5597         }
5598 #endif
5599
5600         code = param & 0xffff;
5601         fast = (param >> 16) & 0x1;
5602         rep_cnt = (param >> 32) & 0xfff;
5603         rep_idx = (param >> 48) & 0xfff;
5604
5605         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5606
5607         switch (code) {
5608         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5609                 kvm_vcpu_on_spin(vcpu);
5610                 break;
5611         default:
5612                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5613                 break;
5614         }
5615
5616         ret = res | (((u64)rep_done & 0xfff) << 32);
5617         if (longmode) {
5618                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5619         } else {
5620                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5621                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5622         }
5623
5624         return 1;
5625 }
5626
5627 /*
5628  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5629  *
5630  * @apicid - apicid of vcpu to be kicked.
5631  */
5632 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5633 {
5634         struct kvm_lapic_irq lapic_irq;
5635
5636         lapic_irq.shorthand = 0;
5637         lapic_irq.dest_mode = 0;
5638         lapic_irq.dest_id = apicid;
5639
5640         lapic_irq.delivery_mode = APIC_DM_REMRD;
5641         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5642 }
5643
5644 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5645 {
5646         unsigned long nr, a0, a1, a2, a3, ret;
5647         int r = 1;
5648
5649         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5650                 return kvm_hv_hypercall(vcpu);
5651
5652         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5653         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5654         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5655         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5656         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5657
5658         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5659
5660         if (!is_long_mode(vcpu)) {
5661                 nr &= 0xFFFFFFFF;
5662                 a0 &= 0xFFFFFFFF;
5663                 a1 &= 0xFFFFFFFF;
5664                 a2 &= 0xFFFFFFFF;
5665                 a3 &= 0xFFFFFFFF;
5666         }
5667
5668         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5669                 ret = -KVM_EPERM;
5670                 goto out;
5671         }
5672
5673         switch (nr) {
5674         case KVM_HC_VAPIC_POLL_IRQ:
5675                 ret = 0;
5676                 break;
5677         case KVM_HC_KICK_CPU:
5678                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5679                 ret = 0;
5680                 break;
5681         default:
5682                 ret = -KVM_ENOSYS;
5683                 break;
5684         }
5685 out:
5686         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5687         ++vcpu->stat.hypercalls;
5688         return r;
5689 }
5690 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5691
5692 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5693 {
5694         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5695         char instruction[3];
5696         unsigned long rip = kvm_rip_read(vcpu);
5697
5698         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5699
5700         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5701 }
5702
5703 /*
5704  * Check if userspace requested an interrupt window, and that the
5705  * interrupt window is open.
5706  *
5707  * No need to exit to userspace if we already have an interrupt queued.
5708  */
5709 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5710 {
5711         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5712                 vcpu->run->request_interrupt_window &&
5713                 kvm_arch_interrupt_allowed(vcpu));
5714 }
5715
5716 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5717 {
5718         struct kvm_run *kvm_run = vcpu->run;
5719
5720         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5721         kvm_run->cr8 = kvm_get_cr8(vcpu);
5722         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5723         if (irqchip_in_kernel(vcpu->kvm))
5724                 kvm_run->ready_for_interrupt_injection = 1;
5725         else
5726                 kvm_run->ready_for_interrupt_injection =
5727                         kvm_arch_interrupt_allowed(vcpu) &&
5728                         !kvm_cpu_has_interrupt(vcpu) &&
5729                         !kvm_event_needs_reinjection(vcpu);
5730 }
5731
5732 static int vapic_enter(struct kvm_vcpu *vcpu)
5733 {
5734         struct kvm_lapic *apic = vcpu->arch.apic;
5735         struct page *page;
5736
5737         if (!apic || !apic->vapic_addr)
5738                 return 0;
5739
5740         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5741         if (is_error_page(page))
5742                 return -EFAULT;
5743
5744         vcpu->arch.apic->vapic_page = page;
5745         return 0;
5746 }
5747
5748 static void vapic_exit(struct kvm_vcpu *vcpu)
5749 {
5750         struct kvm_lapic *apic = vcpu->arch.apic;
5751         int idx;
5752
5753         if (!apic || !apic->vapic_addr)
5754                 return;
5755
5756         idx = srcu_read_lock(&vcpu->kvm->srcu);
5757         kvm_release_page_dirty(apic->vapic_page);
5758         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5759         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5760 }
5761
5762 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5763 {
5764         int max_irr, tpr;
5765
5766         if (!kvm_x86_ops->update_cr8_intercept)
5767                 return;
5768
5769         if (!vcpu->arch.apic)
5770                 return;
5771
5772         if (!vcpu->arch.apic->vapic_addr)
5773                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5774         else
5775                 max_irr = -1;
5776
5777         if (max_irr != -1)
5778                 max_irr >>= 4;
5779
5780         tpr = kvm_lapic_get_cr8(vcpu);
5781
5782         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5783 }
5784
5785 static void inject_pending_event(struct kvm_vcpu *vcpu)
5786 {
5787         /* try to reinject previous events if any */
5788         if (vcpu->arch.exception.pending) {
5789                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5790                                         vcpu->arch.exception.has_error_code,
5791                                         vcpu->arch.exception.error_code);
5792                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5793                                           vcpu->arch.exception.has_error_code,
5794                                           vcpu->arch.exception.error_code,
5795                                           vcpu->arch.exception.reinject);
5796                 return;
5797         }
5798
5799         if (vcpu->arch.nmi_injected) {
5800                 kvm_x86_ops->set_nmi(vcpu);
5801                 return;
5802         }
5803
5804         if (vcpu->arch.interrupt.pending) {
5805                 kvm_x86_ops->set_irq(vcpu);
5806                 return;
5807         }
5808
5809         /* try to inject new event if pending */
5810         if (vcpu->arch.nmi_pending) {
5811                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5812                         --vcpu->arch.nmi_pending;
5813                         vcpu->arch.nmi_injected = true;
5814                         kvm_x86_ops->set_nmi(vcpu);
5815                 }
5816         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5817                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5818                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5819                                             false);
5820                         kvm_x86_ops->set_irq(vcpu);
5821                 }
5822         }
5823 }
5824
5825 static void process_nmi(struct kvm_vcpu *vcpu)
5826 {
5827         unsigned limit = 2;
5828
5829         /*
5830          * x86 is limited to one NMI running, and one NMI pending after it.
5831          * If an NMI is already in progress, limit further NMIs to just one.
5832          * Otherwise, allow two (and we'll inject the first one immediately).
5833          */
5834         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5835                 limit = 1;
5836
5837         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5838         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5839         kvm_make_request(KVM_REQ_EVENT, vcpu);
5840 }
5841
5842 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5843 {
5844         u64 eoi_exit_bitmap[4];
5845         u32 tmr[8];
5846
5847         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5848                 return;
5849
5850         memset(eoi_exit_bitmap, 0, 32);
5851         memset(tmr, 0, 32);
5852
5853         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5854         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5855         kvm_apic_update_tmr(vcpu, tmr);
5856 }
5857
5858 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5859 {
5860         int r;
5861         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5862                 vcpu->run->request_interrupt_window;
5863         bool req_immediate_exit = false;
5864
5865         if (vcpu->requests) {
5866                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5867                         kvm_mmu_unload(vcpu);
5868                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5869                         __kvm_migrate_timers(vcpu);
5870                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5871                         kvm_gen_update_masterclock(vcpu->kvm);
5872                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5873                         kvm_gen_kvmclock_update(vcpu);
5874                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5875                         r = kvm_guest_time_update(vcpu);
5876                         if (unlikely(r))
5877                                 goto out;
5878                 }
5879                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5880                         kvm_mmu_sync_roots(vcpu);
5881                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5882                         kvm_x86_ops->tlb_flush(vcpu);
5883                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5884                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5885                         r = 0;
5886                         goto out;
5887                 }
5888                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5889                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5890                         r = 0;
5891                         goto out;
5892                 }
5893                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5894                         vcpu->fpu_active = 0;
5895                         kvm_x86_ops->fpu_deactivate(vcpu);
5896                 }
5897                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5898                         /* Page is swapped out. Do synthetic halt */
5899                         vcpu->arch.apf.halted = true;
5900                         r = 1;
5901                         goto out;
5902                 }
5903                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5904                         record_steal_time(vcpu);
5905                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5906                         process_nmi(vcpu);
5907                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5908                         kvm_handle_pmu_event(vcpu);
5909                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5910                         kvm_deliver_pmi(vcpu);
5911                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5912                         vcpu_scan_ioapic(vcpu);
5913         }
5914
5915         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5916                 kvm_apic_accept_events(vcpu);
5917                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5918                         r = 1;
5919                         goto out;
5920                 }
5921
5922                 inject_pending_event(vcpu);
5923
5924                 /* enable NMI/IRQ window open exits if needed */
5925                 if (vcpu->arch.nmi_pending)
5926                         req_immediate_exit =
5927                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5928                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5929                         req_immediate_exit =
5930                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5931
5932                 if (kvm_lapic_enabled(vcpu)) {
5933                         /*
5934                          * Update architecture specific hints for APIC
5935                          * virtual interrupt delivery.
5936                          */
5937                         if (kvm_x86_ops->hwapic_irr_update)
5938                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5939                                         kvm_lapic_find_highest_irr(vcpu));
5940                         update_cr8_intercept(vcpu);
5941                         kvm_lapic_sync_to_vapic(vcpu);
5942                 }
5943         }
5944
5945         r = kvm_mmu_reload(vcpu);
5946         if (unlikely(r)) {
5947                 goto cancel_injection;
5948         }
5949
5950         preempt_disable();
5951
5952         kvm_x86_ops->prepare_guest_switch(vcpu);
5953         if (vcpu->fpu_active)
5954                 kvm_load_guest_fpu(vcpu);
5955         kvm_load_guest_xcr0(vcpu);
5956
5957         vcpu->mode = IN_GUEST_MODE;
5958
5959         /* We should set ->mode before check ->requests,
5960          * see the comment in make_all_cpus_request.
5961          */
5962         smp_mb();
5963
5964         local_irq_disable();
5965
5966         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5967             || need_resched() || signal_pending(current)) {
5968                 vcpu->mode = OUTSIDE_GUEST_MODE;
5969                 smp_wmb();
5970                 local_irq_enable();
5971                 preempt_enable();
5972                 r = 1;
5973                 goto cancel_injection;
5974         }
5975
5976         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5977
5978         if (req_immediate_exit)
5979                 smp_send_reschedule(vcpu->cpu);
5980
5981         kvm_guest_enter();
5982
5983         if (unlikely(vcpu->arch.switch_db_regs)) {
5984                 set_debugreg(0, 7);
5985                 set_debugreg(vcpu->arch.eff_db[0], 0);
5986                 set_debugreg(vcpu->arch.eff_db[1], 1);
5987                 set_debugreg(vcpu->arch.eff_db[2], 2);
5988                 set_debugreg(vcpu->arch.eff_db[3], 3);
5989         }
5990
5991         trace_kvm_entry(vcpu->vcpu_id);
5992         kvm_x86_ops->run(vcpu);
5993
5994         /*
5995          * If the guest has used debug registers, at least dr7
5996          * will be disabled while returning to the host.
5997          * If we don't have active breakpoints in the host, we don't
5998          * care about the messed up debug address registers. But if
5999          * we have some of them active, restore the old state.
6000          */
6001         if (hw_breakpoint_active())
6002                 hw_breakpoint_restore();
6003
6004         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6005                                                            native_read_tsc());
6006
6007         vcpu->mode = OUTSIDE_GUEST_MODE;
6008         smp_wmb();
6009
6010         /* Interrupt is enabled by handle_external_intr() */
6011         kvm_x86_ops->handle_external_intr(vcpu);
6012
6013         ++vcpu->stat.exits;
6014
6015         /*
6016          * We must have an instruction between local_irq_enable() and
6017          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6018          * the interrupt shadow.  The stat.exits increment will do nicely.
6019          * But we need to prevent reordering, hence this barrier():
6020          */
6021         barrier();
6022
6023         kvm_guest_exit();
6024
6025         preempt_enable();
6026
6027         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6028
6029         /*
6030          * Profile KVM exit RIPs:
6031          */
6032         if (unlikely(prof_on == KVM_PROFILING)) {
6033                 unsigned long rip = kvm_rip_read(vcpu);
6034                 profile_hit(KVM_PROFILING, (void *)rip);
6035         }
6036
6037         if (unlikely(vcpu->arch.tsc_always_catchup))
6038                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6039
6040         if (vcpu->arch.apic_attention)
6041                 kvm_lapic_sync_from_vapic(vcpu);
6042
6043         r = kvm_x86_ops->handle_exit(vcpu);
6044         return r;
6045
6046 cancel_injection:
6047         kvm_x86_ops->cancel_injection(vcpu);
6048         if (unlikely(vcpu->arch.apic_attention))
6049                 kvm_lapic_sync_from_vapic(vcpu);
6050 out:
6051         return r;
6052 }
6053
6054
6055 static int __vcpu_run(struct kvm_vcpu *vcpu)
6056 {
6057         int r;
6058         struct kvm *kvm = vcpu->kvm;
6059
6060         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6061         r = vapic_enter(vcpu);
6062         if (r) {
6063                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6064                 return r;
6065         }
6066
6067         r = 1;
6068         while (r > 0) {
6069                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6070                     !vcpu->arch.apf.halted)
6071                         r = vcpu_enter_guest(vcpu);
6072                 else {
6073                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6074                         kvm_vcpu_block(vcpu);
6075                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6076                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6077                                 kvm_apic_accept_events(vcpu);
6078                                 switch(vcpu->arch.mp_state) {
6079                                 case KVM_MP_STATE_HALTED:
6080                                         vcpu->arch.pv.pv_unhalted = false;
6081                                         vcpu->arch.mp_state =
6082                                                 KVM_MP_STATE_RUNNABLE;
6083                                 case KVM_MP_STATE_RUNNABLE:
6084                                         vcpu->arch.apf.halted = false;
6085                                         break;
6086                                 case KVM_MP_STATE_INIT_RECEIVED:
6087                                         break;
6088                                 default:
6089                                         r = -EINTR;
6090                                         break;
6091                                 }
6092                         }
6093                 }
6094
6095                 if (r <= 0)
6096                         break;
6097
6098                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6099                 if (kvm_cpu_has_pending_timer(vcpu))
6100                         kvm_inject_pending_timer_irqs(vcpu);
6101
6102                 if (dm_request_for_irq_injection(vcpu)) {
6103                         r = -EINTR;
6104                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6105                         ++vcpu->stat.request_irq_exits;
6106                 }
6107
6108                 kvm_check_async_pf_completion(vcpu);
6109
6110                 if (signal_pending(current)) {
6111                         r = -EINTR;
6112                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6113                         ++vcpu->stat.signal_exits;
6114                 }
6115                 if (need_resched()) {
6116                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6117                         kvm_resched(vcpu);
6118                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6119                 }
6120         }
6121
6122         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6123
6124         vapic_exit(vcpu);
6125
6126         return r;
6127 }
6128
6129 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6130 {
6131         int r;
6132         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6133         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6134         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6135         if (r != EMULATE_DONE)
6136                 return 0;
6137         return 1;
6138 }
6139
6140 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6141 {
6142         BUG_ON(!vcpu->arch.pio.count);
6143
6144         return complete_emulated_io(vcpu);
6145 }
6146
6147 /*
6148  * Implements the following, as a state machine:
6149  *
6150  * read:
6151  *   for each fragment
6152  *     for each mmio piece in the fragment
6153  *       write gpa, len
6154  *       exit
6155  *       copy data
6156  *   execute insn
6157  *
6158  * write:
6159  *   for each fragment
6160  *     for each mmio piece in the fragment
6161  *       write gpa, len
6162  *       copy data
6163  *       exit
6164  */
6165 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6166 {
6167         struct kvm_run *run = vcpu->run;
6168         struct kvm_mmio_fragment *frag;
6169         unsigned len;
6170
6171         BUG_ON(!vcpu->mmio_needed);
6172
6173         /* Complete previous fragment */
6174         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6175         len = min(8u, frag->len);
6176         if (!vcpu->mmio_is_write)
6177                 memcpy(frag->data, run->mmio.data, len);
6178
6179         if (frag->len <= 8) {
6180                 /* Switch to the next fragment. */
6181                 frag++;
6182                 vcpu->mmio_cur_fragment++;
6183         } else {
6184                 /* Go forward to the next mmio piece. */
6185                 frag->data += len;
6186                 frag->gpa += len;
6187                 frag->len -= len;
6188         }
6189
6190         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6191                 vcpu->mmio_needed = 0;
6192
6193                 /* FIXME: return into emulator if single-stepping.  */
6194                 if (vcpu->mmio_is_write)
6195                         return 1;
6196                 vcpu->mmio_read_completed = 1;
6197                 return complete_emulated_io(vcpu);
6198         }
6199
6200         run->exit_reason = KVM_EXIT_MMIO;
6201         run->mmio.phys_addr = frag->gpa;
6202         if (vcpu->mmio_is_write)
6203                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6204         run->mmio.len = min(8u, frag->len);
6205         run->mmio.is_write = vcpu->mmio_is_write;
6206         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6207         return 0;
6208 }
6209
6210
6211 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6212 {
6213         int r;
6214         sigset_t sigsaved;
6215
6216         if (!tsk_used_math(current) && init_fpu(current))
6217                 return -ENOMEM;
6218
6219         if (vcpu->sigset_active)
6220                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6221
6222         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6223                 kvm_vcpu_block(vcpu);
6224                 kvm_apic_accept_events(vcpu);
6225                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6226                 r = -EAGAIN;
6227                 goto out;
6228         }
6229
6230         /* re-sync apic's tpr */
6231         if (!irqchip_in_kernel(vcpu->kvm)) {
6232                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6233                         r = -EINVAL;
6234                         goto out;
6235                 }
6236         }
6237
6238         if (unlikely(vcpu->arch.complete_userspace_io)) {
6239                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6240                 vcpu->arch.complete_userspace_io = NULL;
6241                 r = cui(vcpu);
6242                 if (r <= 0)
6243                         goto out;
6244         } else
6245                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6246
6247         r = __vcpu_run(vcpu);
6248
6249 out:
6250         post_kvm_run_save(vcpu);
6251         if (vcpu->sigset_active)
6252                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6253
6254         return r;
6255 }
6256
6257 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6258 {
6259         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6260                 /*
6261                  * We are here if userspace calls get_regs() in the middle of
6262                  * instruction emulation. Registers state needs to be copied
6263                  * back from emulation context to vcpu. Userspace shouldn't do
6264                  * that usually, but some bad designed PV devices (vmware
6265                  * backdoor interface) need this to work
6266                  */
6267                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6268                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6269         }
6270         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6271         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6272         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6273         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6274         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6275         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6276         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6277         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6278 #ifdef CONFIG_X86_64
6279         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6280         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6281         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6282         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6283         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6284         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6285         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6286         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6287 #endif
6288
6289         regs->rip = kvm_rip_read(vcpu);
6290         regs->rflags = kvm_get_rflags(vcpu);
6291
6292         return 0;
6293 }
6294
6295 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6296 {
6297         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6298         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6299
6300         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6301         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6302         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6303         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6304         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6305         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6306         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6307         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6308 #ifdef CONFIG_X86_64
6309         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6310         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6311         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6312         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6313         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6314         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6315         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6316         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6317 #endif
6318
6319         kvm_rip_write(vcpu, regs->rip);
6320         kvm_set_rflags(vcpu, regs->rflags);
6321
6322         vcpu->arch.exception.pending = false;
6323
6324         kvm_make_request(KVM_REQ_EVENT, vcpu);
6325
6326         return 0;
6327 }
6328
6329 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6330 {
6331         struct kvm_segment cs;
6332
6333         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6334         *db = cs.db;
6335         *l = cs.l;
6336 }
6337 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6338
6339 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6340                                   struct kvm_sregs *sregs)
6341 {
6342         struct desc_ptr dt;
6343
6344         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6345         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6346         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6347         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6348         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6349         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6350
6351         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6352         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6353
6354         kvm_x86_ops->get_idt(vcpu, &dt);
6355         sregs->idt.limit = dt.size;
6356         sregs->idt.base = dt.address;
6357         kvm_x86_ops->get_gdt(vcpu, &dt);
6358         sregs->gdt.limit = dt.size;
6359         sregs->gdt.base = dt.address;
6360
6361         sregs->cr0 = kvm_read_cr0(vcpu);
6362         sregs->cr2 = vcpu->arch.cr2;
6363         sregs->cr3 = kvm_read_cr3(vcpu);
6364         sregs->cr4 = kvm_read_cr4(vcpu);
6365         sregs->cr8 = kvm_get_cr8(vcpu);
6366         sregs->efer = vcpu->arch.efer;
6367         sregs->apic_base = kvm_get_apic_base(vcpu);
6368
6369         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6370
6371         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6372                 set_bit(vcpu->arch.interrupt.nr,
6373                         (unsigned long *)sregs->interrupt_bitmap);
6374
6375         return 0;
6376 }
6377
6378 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6379                                     struct kvm_mp_state *mp_state)
6380 {
6381         kvm_apic_accept_events(vcpu);
6382         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6383                                         vcpu->arch.pv.pv_unhalted)
6384                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6385         else
6386                 mp_state->mp_state = vcpu->arch.mp_state;
6387
6388         return 0;
6389 }
6390
6391 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6392                                     struct kvm_mp_state *mp_state)
6393 {
6394         if (!kvm_vcpu_has_lapic(vcpu) &&
6395             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6396                 return -EINVAL;
6397
6398         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6399                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6400                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6401         } else
6402                 vcpu->arch.mp_state = mp_state->mp_state;
6403         kvm_make_request(KVM_REQ_EVENT, vcpu);
6404         return 0;
6405 }
6406
6407 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6408                     int reason, bool has_error_code, u32 error_code)
6409 {
6410         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6411         int ret;
6412
6413         init_emulate_ctxt(vcpu);
6414
6415         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6416                                    has_error_code, error_code);
6417
6418         if (ret)
6419                 return EMULATE_FAIL;
6420
6421         kvm_rip_write(vcpu, ctxt->eip);
6422         kvm_set_rflags(vcpu, ctxt->eflags);
6423         kvm_make_request(KVM_REQ_EVENT, vcpu);
6424         return EMULATE_DONE;
6425 }
6426 EXPORT_SYMBOL_GPL(kvm_task_switch);
6427
6428 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6429                                   struct kvm_sregs *sregs)
6430 {
6431         int mmu_reset_needed = 0;
6432         int pending_vec, max_bits, idx;
6433         struct desc_ptr dt;
6434
6435         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6436                 return -EINVAL;
6437
6438         dt.size = sregs->idt.limit;
6439         dt.address = sregs->idt.base;
6440         kvm_x86_ops->set_idt(vcpu, &dt);
6441         dt.size = sregs->gdt.limit;
6442         dt.address = sregs->gdt.base;
6443         kvm_x86_ops->set_gdt(vcpu, &dt);
6444
6445         vcpu->arch.cr2 = sregs->cr2;
6446         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6447         vcpu->arch.cr3 = sregs->cr3;
6448         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6449
6450         kvm_set_cr8(vcpu, sregs->cr8);
6451
6452         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6453         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6454         kvm_set_apic_base(vcpu, sregs->apic_base);
6455
6456         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6457         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6458         vcpu->arch.cr0 = sregs->cr0;
6459
6460         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6461         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6462         if (sregs->cr4 & X86_CR4_OSXSAVE)
6463                 kvm_update_cpuid(vcpu);
6464
6465         idx = srcu_read_lock(&vcpu->kvm->srcu);
6466         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6467                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6468                 mmu_reset_needed = 1;
6469         }
6470         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6471
6472         if (mmu_reset_needed)
6473                 kvm_mmu_reset_context(vcpu);
6474
6475         max_bits = KVM_NR_INTERRUPTS;
6476         pending_vec = find_first_bit(
6477                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6478         if (pending_vec < max_bits) {
6479                 kvm_queue_interrupt(vcpu, pending_vec, false);
6480                 pr_debug("Set back pending irq %d\n", pending_vec);
6481         }
6482
6483         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6484         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6485         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6486         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6487         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6488         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6489
6490         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6491         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6492
6493         update_cr8_intercept(vcpu);
6494
6495         /* Older userspace won't unhalt the vcpu on reset. */
6496         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6497             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6498             !is_protmode(vcpu))
6499                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6500
6501         kvm_make_request(KVM_REQ_EVENT, vcpu);
6502
6503         return 0;
6504 }
6505
6506 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6507                                         struct kvm_guest_debug *dbg)
6508 {
6509         unsigned long rflags;
6510         int i, r;
6511
6512         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6513                 r = -EBUSY;
6514                 if (vcpu->arch.exception.pending)
6515                         goto out;
6516                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6517                         kvm_queue_exception(vcpu, DB_VECTOR);
6518                 else
6519                         kvm_queue_exception(vcpu, BP_VECTOR);
6520         }
6521
6522         /*
6523          * Read rflags as long as potentially injected trace flags are still
6524          * filtered out.
6525          */
6526         rflags = kvm_get_rflags(vcpu);
6527
6528         vcpu->guest_debug = dbg->control;
6529         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6530                 vcpu->guest_debug = 0;
6531
6532         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6533                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6534                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6535                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6536         } else {
6537                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6538                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6539         }
6540         kvm_update_dr7(vcpu);
6541
6542         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6543                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6544                         get_segment_base(vcpu, VCPU_SREG_CS);
6545
6546         /*
6547          * Trigger an rflags update that will inject or remove the trace
6548          * flags.
6549          */
6550         kvm_set_rflags(vcpu, rflags);
6551
6552         kvm_x86_ops->update_db_bp_intercept(vcpu);
6553
6554         r = 0;
6555
6556 out:
6557
6558         return r;
6559 }
6560
6561 /*
6562  * Translate a guest virtual address to a guest physical address.
6563  */
6564 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6565                                     struct kvm_translation *tr)
6566 {
6567         unsigned long vaddr = tr->linear_address;
6568         gpa_t gpa;
6569         int idx;
6570
6571         idx = srcu_read_lock(&vcpu->kvm->srcu);
6572         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6573         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6574         tr->physical_address = gpa;
6575         tr->valid = gpa != UNMAPPED_GVA;
6576         tr->writeable = 1;
6577         tr->usermode = 0;
6578
6579         return 0;
6580 }
6581
6582 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6583 {
6584         struct i387_fxsave_struct *fxsave =
6585                         &vcpu->arch.guest_fpu.state->fxsave;
6586
6587         memcpy(fpu->fpr, fxsave->st_space, 128);
6588         fpu->fcw = fxsave->cwd;
6589         fpu->fsw = fxsave->swd;
6590         fpu->ftwx = fxsave->twd;
6591         fpu->last_opcode = fxsave->fop;
6592         fpu->last_ip = fxsave->rip;
6593         fpu->last_dp = fxsave->rdp;
6594         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6595
6596         return 0;
6597 }
6598
6599 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6600 {
6601         struct i387_fxsave_struct *fxsave =
6602                         &vcpu->arch.guest_fpu.state->fxsave;
6603
6604         memcpy(fxsave->st_space, fpu->fpr, 128);
6605         fxsave->cwd = fpu->fcw;
6606         fxsave->swd = fpu->fsw;
6607         fxsave->twd = fpu->ftwx;
6608         fxsave->fop = fpu->last_opcode;
6609         fxsave->rip = fpu->last_ip;
6610         fxsave->rdp = fpu->last_dp;
6611         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6612
6613         return 0;
6614 }
6615
6616 int fx_init(struct kvm_vcpu *vcpu)
6617 {
6618         int err;
6619
6620         err = fpu_alloc(&vcpu->arch.guest_fpu);
6621         if (err)
6622                 return err;
6623
6624         fpu_finit(&vcpu->arch.guest_fpu);
6625
6626         /*
6627          * Ensure guest xcr0 is valid for loading
6628          */
6629         vcpu->arch.xcr0 = XSTATE_FP;
6630
6631         vcpu->arch.cr0 |= X86_CR0_ET;
6632
6633         return 0;
6634 }
6635 EXPORT_SYMBOL_GPL(fx_init);
6636
6637 static void fx_free(struct kvm_vcpu *vcpu)
6638 {
6639         fpu_free(&vcpu->arch.guest_fpu);
6640 }
6641
6642 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6643 {
6644         if (vcpu->guest_fpu_loaded)
6645                 return;
6646
6647         /*
6648          * Restore all possible states in the guest,
6649          * and assume host would use all available bits.
6650          * Guest xcr0 would be loaded later.
6651          */
6652         kvm_put_guest_xcr0(vcpu);
6653         vcpu->guest_fpu_loaded = 1;
6654         __kernel_fpu_begin();
6655         fpu_restore_checking(&vcpu->arch.guest_fpu);
6656         trace_kvm_fpu(1);
6657 }
6658
6659 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6660 {
6661         kvm_put_guest_xcr0(vcpu);
6662
6663         if (!vcpu->guest_fpu_loaded)
6664                 return;
6665
6666         vcpu->guest_fpu_loaded = 0;
6667         fpu_save_init(&vcpu->arch.guest_fpu);
6668         __kernel_fpu_end();
6669         ++vcpu->stat.fpu_reload;
6670         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6671         trace_kvm_fpu(0);
6672 }
6673
6674 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6675 {
6676         kvmclock_reset(vcpu);
6677
6678         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6679         fx_free(vcpu);
6680         kvm_x86_ops->vcpu_free(vcpu);
6681 }
6682
6683 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6684                                                 unsigned int id)
6685 {
6686         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6687                 printk_once(KERN_WARNING
6688                 "kvm: SMP vm created on host with unstable TSC; "
6689                 "guest TSC will not be reliable\n");
6690         return kvm_x86_ops->vcpu_create(kvm, id);
6691 }
6692
6693 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6694 {
6695         int r;
6696
6697         vcpu->arch.mtrr_state.have_fixed = 1;
6698         r = vcpu_load(vcpu);
6699         if (r)
6700                 return r;
6701         kvm_vcpu_reset(vcpu);
6702         kvm_mmu_setup(vcpu);
6703         vcpu_put(vcpu);
6704
6705         return r;
6706 }
6707
6708 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6709 {
6710         int r;
6711         struct msr_data msr;
6712
6713         r = vcpu_load(vcpu);
6714         if (r)
6715                 return r;
6716         msr.data = 0x0;
6717         msr.index = MSR_IA32_TSC;
6718         msr.host_initiated = true;
6719         kvm_write_tsc(vcpu, &msr);
6720         vcpu_put(vcpu);
6721
6722         return r;
6723 }
6724
6725 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6726 {
6727         int r;
6728         vcpu->arch.apf.msr_val = 0;
6729
6730         r = vcpu_load(vcpu);
6731         BUG_ON(r);
6732         kvm_mmu_unload(vcpu);
6733         vcpu_put(vcpu);
6734
6735         fx_free(vcpu);
6736         kvm_x86_ops->vcpu_free(vcpu);
6737 }
6738
6739 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6740 {
6741         atomic_set(&vcpu->arch.nmi_queued, 0);
6742         vcpu->arch.nmi_pending = 0;
6743         vcpu->arch.nmi_injected = false;
6744
6745         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6746         vcpu->arch.dr6 = DR6_FIXED_1;
6747         vcpu->arch.dr7 = DR7_FIXED_1;
6748         kvm_update_dr7(vcpu);
6749
6750         kvm_make_request(KVM_REQ_EVENT, vcpu);
6751         vcpu->arch.apf.msr_val = 0;
6752         vcpu->arch.st.msr_val = 0;
6753
6754         kvmclock_reset(vcpu);
6755
6756         kvm_clear_async_pf_completion_queue(vcpu);
6757         kvm_async_pf_hash_reset(vcpu);
6758         vcpu->arch.apf.halted = false;
6759
6760         kvm_pmu_reset(vcpu);
6761
6762         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6763         vcpu->arch.regs_avail = ~0;
6764         vcpu->arch.regs_dirty = ~0;
6765
6766         kvm_x86_ops->vcpu_reset(vcpu);
6767 }
6768
6769 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6770 {
6771         struct kvm_segment cs;
6772
6773         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6774         cs.selector = vector << 8;
6775         cs.base = vector << 12;
6776         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6777         kvm_rip_write(vcpu, 0);
6778 }
6779
6780 int kvm_arch_hardware_enable(void *garbage)
6781 {
6782         struct kvm *kvm;
6783         struct kvm_vcpu *vcpu;
6784         int i;
6785         int ret;
6786         u64 local_tsc;
6787         u64 max_tsc = 0;
6788         bool stable, backwards_tsc = false;
6789
6790         kvm_shared_msr_cpu_online();
6791         ret = kvm_x86_ops->hardware_enable(garbage);
6792         if (ret != 0)
6793                 return ret;
6794
6795         local_tsc = native_read_tsc();
6796         stable = !check_tsc_unstable();
6797         list_for_each_entry(kvm, &vm_list, vm_list) {
6798                 kvm_for_each_vcpu(i, vcpu, kvm) {
6799                         if (!stable && vcpu->cpu == smp_processor_id())
6800                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6801                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6802                                 backwards_tsc = true;
6803                                 if (vcpu->arch.last_host_tsc > max_tsc)
6804                                         max_tsc = vcpu->arch.last_host_tsc;
6805                         }
6806                 }
6807         }
6808
6809         /*
6810          * Sometimes, even reliable TSCs go backwards.  This happens on
6811          * platforms that reset TSC during suspend or hibernate actions, but
6812          * maintain synchronization.  We must compensate.  Fortunately, we can
6813          * detect that condition here, which happens early in CPU bringup,
6814          * before any KVM threads can be running.  Unfortunately, we can't
6815          * bring the TSCs fully up to date with real time, as we aren't yet far
6816          * enough into CPU bringup that we know how much real time has actually
6817          * elapsed; our helper function, get_kernel_ns() will be using boot
6818          * variables that haven't been updated yet.
6819          *
6820          * So we simply find the maximum observed TSC above, then record the
6821          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6822          * the adjustment will be applied.  Note that we accumulate
6823          * adjustments, in case multiple suspend cycles happen before some VCPU
6824          * gets a chance to run again.  In the event that no KVM threads get a
6825          * chance to run, we will miss the entire elapsed period, as we'll have
6826          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6827          * loose cycle time.  This isn't too big a deal, since the loss will be
6828          * uniform across all VCPUs (not to mention the scenario is extremely
6829          * unlikely). It is possible that a second hibernate recovery happens
6830          * much faster than a first, causing the observed TSC here to be
6831          * smaller; this would require additional padding adjustment, which is
6832          * why we set last_host_tsc to the local tsc observed here.
6833          *
6834          * N.B. - this code below runs only on platforms with reliable TSC,
6835          * as that is the only way backwards_tsc is set above.  Also note
6836          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6837          * have the same delta_cyc adjustment applied if backwards_tsc
6838          * is detected.  Note further, this adjustment is only done once,
6839          * as we reset last_host_tsc on all VCPUs to stop this from being
6840          * called multiple times (one for each physical CPU bringup).
6841          *
6842          * Platforms with unreliable TSCs don't have to deal with this, they
6843          * will be compensated by the logic in vcpu_load, which sets the TSC to
6844          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6845          * guarantee that they stay in perfect synchronization.
6846          */
6847         if (backwards_tsc) {
6848                 u64 delta_cyc = max_tsc - local_tsc;
6849                 list_for_each_entry(kvm, &vm_list, vm_list) {
6850                         kvm_for_each_vcpu(i, vcpu, kvm) {
6851                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6852                                 vcpu->arch.last_host_tsc = local_tsc;
6853                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6854                                         &vcpu->requests);
6855                         }
6856
6857                         /*
6858                          * We have to disable TSC offset matching.. if you were
6859                          * booting a VM while issuing an S4 host suspend....
6860                          * you may have some problem.  Solving this issue is
6861                          * left as an exercise to the reader.
6862                          */
6863                         kvm->arch.last_tsc_nsec = 0;
6864                         kvm->arch.last_tsc_write = 0;
6865                 }
6866
6867         }
6868         return 0;
6869 }
6870
6871 void kvm_arch_hardware_disable(void *garbage)
6872 {
6873         kvm_x86_ops->hardware_disable(garbage);
6874         drop_user_return_notifiers(garbage);
6875 }
6876
6877 int kvm_arch_hardware_setup(void)
6878 {
6879         return kvm_x86_ops->hardware_setup();
6880 }
6881
6882 void kvm_arch_hardware_unsetup(void)
6883 {
6884         kvm_x86_ops->hardware_unsetup();
6885 }
6886
6887 void kvm_arch_check_processor_compat(void *rtn)
6888 {
6889         kvm_x86_ops->check_processor_compatibility(rtn);
6890 }
6891
6892 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6893 {
6894         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6895 }
6896
6897 struct static_key kvm_no_apic_vcpu __read_mostly;
6898
6899 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6900 {
6901         struct page *page;
6902         struct kvm *kvm;
6903         int r;
6904
6905         BUG_ON(vcpu->kvm == NULL);
6906         kvm = vcpu->kvm;
6907
6908         vcpu->arch.pv.pv_unhalted = false;
6909         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6910         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6911                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6912         else
6913                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6914
6915         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6916         if (!page) {
6917                 r = -ENOMEM;
6918                 goto fail;
6919         }
6920         vcpu->arch.pio_data = page_address(page);
6921
6922         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6923
6924         r = kvm_mmu_create(vcpu);
6925         if (r < 0)
6926                 goto fail_free_pio_data;
6927
6928         if (irqchip_in_kernel(kvm)) {
6929                 r = kvm_create_lapic(vcpu);
6930                 if (r < 0)
6931                         goto fail_mmu_destroy;
6932         } else
6933                 static_key_slow_inc(&kvm_no_apic_vcpu);
6934
6935         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6936                                        GFP_KERNEL);
6937         if (!vcpu->arch.mce_banks) {
6938                 r = -ENOMEM;
6939                 goto fail_free_lapic;
6940         }
6941         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6942
6943         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6944                 r = -ENOMEM;
6945                 goto fail_free_mce_banks;
6946         }
6947
6948         r = fx_init(vcpu);
6949         if (r)
6950                 goto fail_free_wbinvd_dirty_mask;
6951
6952         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6953         vcpu->arch.pv_time_enabled = false;
6954
6955         vcpu->arch.guest_supported_xcr0 = 0;
6956         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
6957
6958         kvm_async_pf_hash_reset(vcpu);
6959         kvm_pmu_init(vcpu);
6960
6961         return 0;
6962 fail_free_wbinvd_dirty_mask:
6963         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6964 fail_free_mce_banks:
6965         kfree(vcpu->arch.mce_banks);
6966 fail_free_lapic:
6967         kvm_free_lapic(vcpu);
6968 fail_mmu_destroy:
6969         kvm_mmu_destroy(vcpu);
6970 fail_free_pio_data:
6971         free_page((unsigned long)vcpu->arch.pio_data);
6972 fail:
6973         return r;
6974 }
6975
6976 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6977 {
6978         int idx;
6979
6980         kvm_pmu_destroy(vcpu);
6981         kfree(vcpu->arch.mce_banks);
6982         kvm_free_lapic(vcpu);
6983         idx = srcu_read_lock(&vcpu->kvm->srcu);
6984         kvm_mmu_destroy(vcpu);
6985         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6986         free_page((unsigned long)vcpu->arch.pio_data);
6987         if (!irqchip_in_kernel(vcpu->kvm))
6988                 static_key_slow_dec(&kvm_no_apic_vcpu);
6989 }
6990
6991 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6992 {
6993         if (type)
6994                 return -EINVAL;
6995
6996         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6997         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6998         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6999
7000         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7001         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7002         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7003         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7004                 &kvm->arch.irq_sources_bitmap);
7005
7006         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7007         mutex_init(&kvm->arch.apic_map_lock);
7008         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7009
7010         pvclock_update_vm_gtod_copy(kvm);
7011
7012         return 0;
7013 }
7014
7015 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7016 {
7017         int r;
7018         r = vcpu_load(vcpu);
7019         BUG_ON(r);
7020         kvm_mmu_unload(vcpu);
7021         vcpu_put(vcpu);
7022 }
7023
7024 static void kvm_free_vcpus(struct kvm *kvm)
7025 {
7026         unsigned int i;
7027         struct kvm_vcpu *vcpu;
7028
7029         /*
7030          * Unpin any mmu pages first.
7031          */
7032         kvm_for_each_vcpu(i, vcpu, kvm) {
7033                 kvm_clear_async_pf_completion_queue(vcpu);
7034                 kvm_unload_vcpu_mmu(vcpu);
7035         }
7036         kvm_for_each_vcpu(i, vcpu, kvm)
7037                 kvm_arch_vcpu_free(vcpu);
7038
7039         mutex_lock(&kvm->lock);
7040         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7041                 kvm->vcpus[i] = NULL;
7042
7043         atomic_set(&kvm->online_vcpus, 0);
7044         mutex_unlock(&kvm->lock);
7045 }
7046
7047 void kvm_arch_sync_events(struct kvm *kvm)
7048 {
7049         kvm_free_all_assigned_devices(kvm);
7050         kvm_free_pit(kvm);
7051 }
7052
7053 void kvm_arch_destroy_vm(struct kvm *kvm)
7054 {
7055         if (current->mm == kvm->mm) {
7056                 /*
7057                  * Free memory regions allocated on behalf of userspace,
7058                  * unless the the memory map has changed due to process exit
7059                  * or fd copying.
7060                  */
7061                 struct kvm_userspace_memory_region mem;
7062                 memset(&mem, 0, sizeof(mem));
7063                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7064                 kvm_set_memory_region(kvm, &mem);
7065
7066                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7067                 kvm_set_memory_region(kvm, &mem);
7068
7069                 mem.slot = TSS_PRIVATE_MEMSLOT;
7070                 kvm_set_memory_region(kvm, &mem);
7071         }
7072         kvm_iommu_unmap_guest(kvm);
7073         kfree(kvm->arch.vpic);
7074         kfree(kvm->arch.vioapic);
7075         kvm_free_vcpus(kvm);
7076         if (kvm->arch.apic_access_page)
7077                 put_page(kvm->arch.apic_access_page);
7078         if (kvm->arch.ept_identity_pagetable)
7079                 put_page(kvm->arch.ept_identity_pagetable);
7080         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7081 }
7082
7083 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
7084                            struct kvm_memory_slot *dont)
7085 {
7086         int i;
7087
7088         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7089                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7090                         kvm_kvfree(free->arch.rmap[i]);
7091                         free->arch.rmap[i] = NULL;
7092                 }
7093                 if (i == 0)
7094                         continue;
7095
7096                 if (!dont || free->arch.lpage_info[i - 1] !=
7097                              dont->arch.lpage_info[i - 1]) {
7098                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7099                         free->arch.lpage_info[i - 1] = NULL;
7100                 }
7101         }
7102 }
7103
7104 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
7105 {
7106         int i;
7107
7108         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7109                 unsigned long ugfn;
7110                 int lpages;
7111                 int level = i + 1;
7112
7113                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7114                                       slot->base_gfn, level) + 1;
7115
7116                 slot->arch.rmap[i] =
7117                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7118                 if (!slot->arch.rmap[i])
7119                         goto out_free;
7120                 if (i == 0)
7121                         continue;
7122
7123                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7124                                         sizeof(*slot->arch.lpage_info[i - 1]));
7125                 if (!slot->arch.lpage_info[i - 1])
7126                         goto out_free;
7127
7128                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7129                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7130                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7131                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7132                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7133                 /*
7134                  * If the gfn and userspace address are not aligned wrt each
7135                  * other, or if explicitly asked to, disable large page
7136                  * support for this slot
7137                  */
7138                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7139                     !kvm_largepages_enabled()) {
7140                         unsigned long j;
7141
7142                         for (j = 0; j < lpages; ++j)
7143                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7144                 }
7145         }
7146
7147         return 0;
7148
7149 out_free:
7150         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7151                 kvm_kvfree(slot->arch.rmap[i]);
7152                 slot->arch.rmap[i] = NULL;
7153                 if (i == 0)
7154                         continue;
7155
7156                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7157                 slot->arch.lpage_info[i - 1] = NULL;
7158         }
7159         return -ENOMEM;
7160 }
7161
7162 void kvm_arch_memslots_updated(struct kvm *kvm)
7163 {
7164         /*
7165          * memslots->generation has been incremented.
7166          * mmio generation may have reached its maximum value.
7167          */
7168         kvm_mmu_invalidate_mmio_sptes(kvm);
7169 }
7170
7171 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7172                                 struct kvm_memory_slot *memslot,
7173                                 struct kvm_userspace_memory_region *mem,
7174                                 enum kvm_mr_change change)
7175 {
7176         /*
7177          * Only private memory slots need to be mapped here since
7178          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7179          */
7180         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7181                 unsigned long userspace_addr;
7182
7183                 /*
7184                  * MAP_SHARED to prevent internal slot pages from being moved
7185                  * by fork()/COW.
7186                  */
7187                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7188                                          PROT_READ | PROT_WRITE,
7189                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7190
7191                 if (IS_ERR((void *)userspace_addr))
7192                         return PTR_ERR((void *)userspace_addr);
7193
7194                 memslot->userspace_addr = userspace_addr;
7195         }
7196
7197         return 0;
7198 }
7199
7200 void kvm_arch_commit_memory_region(struct kvm *kvm,
7201                                 struct kvm_userspace_memory_region *mem,
7202                                 const struct kvm_memory_slot *old,
7203                                 enum kvm_mr_change change)
7204 {
7205
7206         int nr_mmu_pages = 0;
7207
7208         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7209                 int ret;
7210
7211                 ret = vm_munmap(old->userspace_addr,
7212                                 old->npages * PAGE_SIZE);
7213                 if (ret < 0)
7214                         printk(KERN_WARNING
7215                                "kvm_vm_ioctl_set_memory_region: "
7216                                "failed to munmap memory\n");
7217         }
7218
7219         if (!kvm->arch.n_requested_mmu_pages)
7220                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7221
7222         if (nr_mmu_pages)
7223                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7224         /*
7225          * Write protect all pages for dirty logging.
7226          * Existing largepage mappings are destroyed here and new ones will
7227          * not be created until the end of the logging.
7228          */
7229         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7230                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7231 }
7232
7233 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7234 {
7235         kvm_mmu_invalidate_zap_all_pages(kvm);
7236 }
7237
7238 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7239                                    struct kvm_memory_slot *slot)
7240 {
7241         kvm_mmu_invalidate_zap_all_pages(kvm);
7242 }
7243
7244 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7245 {
7246         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7247                 !vcpu->arch.apf.halted)
7248                 || !list_empty_careful(&vcpu->async_pf.done)
7249                 || kvm_apic_has_events(vcpu)
7250                 || vcpu->arch.pv.pv_unhalted
7251                 || atomic_read(&vcpu->arch.nmi_queued) ||
7252                 (kvm_arch_interrupt_allowed(vcpu) &&
7253                  kvm_cpu_has_interrupt(vcpu));
7254 }
7255
7256 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7257 {
7258         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7259 }
7260
7261 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7262 {
7263         return kvm_x86_ops->interrupt_allowed(vcpu);
7264 }
7265
7266 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7267 {
7268         unsigned long current_rip = kvm_rip_read(vcpu) +
7269                 get_segment_base(vcpu, VCPU_SREG_CS);
7270
7271         return current_rip == linear_rip;
7272 }
7273 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7274
7275 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7276 {
7277         unsigned long rflags;
7278
7279         rflags = kvm_x86_ops->get_rflags(vcpu);
7280         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7281                 rflags &= ~X86_EFLAGS_TF;
7282         return rflags;
7283 }
7284 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7285
7286 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7287 {
7288         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7289             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7290                 rflags |= X86_EFLAGS_TF;
7291         kvm_x86_ops->set_rflags(vcpu, rflags);
7292         kvm_make_request(KVM_REQ_EVENT, vcpu);
7293 }
7294 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7295
7296 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7297 {
7298         int r;
7299
7300         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7301               work->wakeup_all)
7302                 return;
7303
7304         r = kvm_mmu_reload(vcpu);
7305         if (unlikely(r))
7306                 return;
7307
7308         if (!vcpu->arch.mmu.direct_map &&
7309               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7310                 return;
7311
7312         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7313 }
7314
7315 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7316 {
7317         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7318 }
7319
7320 static inline u32 kvm_async_pf_next_probe(u32 key)
7321 {
7322         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7323 }
7324
7325 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7326 {
7327         u32 key = kvm_async_pf_hash_fn(gfn);
7328
7329         while (vcpu->arch.apf.gfns[key] != ~0)
7330                 key = kvm_async_pf_next_probe(key);
7331
7332         vcpu->arch.apf.gfns[key] = gfn;
7333 }
7334
7335 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7336 {
7337         int i;
7338         u32 key = kvm_async_pf_hash_fn(gfn);
7339
7340         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7341                      (vcpu->arch.apf.gfns[key] != gfn &&
7342                       vcpu->arch.apf.gfns[key] != ~0); i++)
7343                 key = kvm_async_pf_next_probe(key);
7344
7345         return key;
7346 }
7347
7348 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7349 {
7350         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7351 }
7352
7353 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7354 {
7355         u32 i, j, k;
7356
7357         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7358         while (true) {
7359                 vcpu->arch.apf.gfns[i] = ~0;
7360                 do {
7361                         j = kvm_async_pf_next_probe(j);
7362                         if (vcpu->arch.apf.gfns[j] == ~0)
7363                                 return;
7364                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7365                         /*
7366                          * k lies cyclically in ]i,j]
7367                          * |    i.k.j |
7368                          * |....j i.k.| or  |.k..j i...|
7369                          */
7370                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7371                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7372                 i = j;
7373         }
7374 }
7375
7376 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7377 {
7378
7379         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7380                                       sizeof(val));
7381 }
7382
7383 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7384                                      struct kvm_async_pf *work)
7385 {
7386         struct x86_exception fault;
7387
7388         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7389         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7390
7391         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7392             (vcpu->arch.apf.send_user_only &&
7393              kvm_x86_ops->get_cpl(vcpu) == 0))
7394                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7395         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7396                 fault.vector = PF_VECTOR;
7397                 fault.error_code_valid = true;
7398                 fault.error_code = 0;
7399                 fault.nested_page_fault = false;
7400                 fault.address = work->arch.token;
7401                 kvm_inject_page_fault(vcpu, &fault);
7402         }
7403 }
7404
7405 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7406                                  struct kvm_async_pf *work)
7407 {
7408         struct x86_exception fault;
7409
7410         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7411         if (work->wakeup_all)
7412                 work->arch.token = ~0; /* broadcast wakeup */
7413         else
7414                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7415
7416         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7417             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7418                 fault.vector = PF_VECTOR;
7419                 fault.error_code_valid = true;
7420                 fault.error_code = 0;
7421                 fault.nested_page_fault = false;
7422                 fault.address = work->arch.token;
7423                 kvm_inject_page_fault(vcpu, &fault);
7424         }
7425         vcpu->arch.apf.halted = false;
7426         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7427 }
7428
7429 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7430 {
7431         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7432                 return true;
7433         else
7434                 return !kvm_event_needs_reinjection(vcpu) &&
7435                         kvm_x86_ops->interrupt_allowed(vcpu);
7436 }
7437
7438 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7439 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);