drivers/edac/edac_mc.c

   1 /*
   2  * edac_mc kernel module
   3  * (C) 2005, 2006 Linux Networx (http://lnxi.com)
   4  * This file may be distributed under the terms of the
   5  * GNU General Public License.
   6  *
   7  * Written by Thayne Harbaugh
   8  * Based on work by Dan Hollis <goemon at anime dot net> and others.
   9  *      http://www.anime.net/~goemon/linux-ecc/
  10  *
  11  * Modified by Dave Peterson and Doug Thompson
  12  *
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/proc_fs.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/smp.h>
  20 #include <linux/init.h>
  21 #include <linux/sysctl.h>
  22 #include <linux/highmem.h>
  23 #include <linux/timer.h>
  24 #include <linux/slab.h>
  25 #include <linux/jiffies.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/list.h>
  28 #include <linux/ctype.h>
  29 #include <linux/edac.h>
  30 #include <linux/bitops.h>
  31 #include <linux/uaccess.h>
  32 #include <asm/page.h>
  33 #include "edac_mc.h"
  34 #include "edac_module.h"
  35 #include <ras/ras_event.h>
  36
  37 #ifdef CONFIG_EDAC_ATOMIC_SCRUB
  38 #include <asm/edac.h>
  39 #else
  40 #define edac_atomic_scrub(va, size) do { } while (0)
  41 #endif
  42
  43 /* lock to memory controller's control array */
  44 static DEFINE_MUTEX(mem_ctls_mutex);
  45 static LIST_HEAD(mc_devices);
  46
  47 /*
  48  * Used to lock EDAC MC to just one module, avoiding two drivers e. g.
  49  *      apei/ghes and i7core_edac to be used at the same time.
  50  */
  51 static void const *edac_mc_owner;
  52
  53 static struct bus_type mc_bus[EDAC_MAX_MCS];
  54
  55 unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
  56                                  unsigned len)
  57 {
  58         struct mem_ctl_info *mci = dimm->mci;
  59         int i, n, count = 0;
  60         char *p = buf;
  61
  62         for (i = 0; i < mci->n_layers; i++) {
  63                 n = snprintf(p, len, "%s %d ",
  64                               edac_layer_name[mci->layers[i].type],
  65                               dimm->location[i]);
  66                 p += n;
  67                 len -= n;
  68                 count += n;
  69                 if (!len)
  70                         break;
  71         }
  72
  73         return count;
  74 }
  75
  76 #ifdef CONFIG_EDAC_DEBUG
  77
  78 static void edac_mc_dump_channel(struct rank_info *chan)
  79 {
  80         edac_dbg(4, "  channel->chan_idx = %d\n", chan->chan_idx);
  81         edac_dbg(4, "    channel = %p\n", chan);
  82         edac_dbg(4, "    channel->csrow = %p\n", chan->csrow);
  83         edac_dbg(4, "    channel->dimm = %p\n", chan->dimm);
  84 }
  85
  86 static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
  87 {
  88         char location[80];
  89
  90         edac_dimm_info_location(dimm, location, sizeof(location));
  91
  92         edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
  93                  dimm->mci->csbased ? "rank" : "dimm",
  94                  number, location, dimm->csrow, dimm->cschannel);
  95         edac_dbg(4, "  dimm = %p\n", dimm);
  96         edac_dbg(4, "  dimm->label = '%s'\n", dimm->label);
  97         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
  98         edac_dbg(4, "  dimm->grain = %d\n", dimm->grain);
  99         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 100 }
 101
 102 static void edac_mc_dump_csrow(struct csrow_info *csrow)
 103 {
 104         edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
 105         edac_dbg(4, "  csrow = %p\n", csrow);
 106         edac_dbg(4, "  csrow->first_page = 0x%lx\n", csrow->first_page);
 107         edac_dbg(4, "  csrow->last_page = 0x%lx\n", csrow->last_page);
 108         edac_dbg(4, "  csrow->page_mask = 0x%lx\n", csrow->page_mask);
 109         edac_dbg(4, "  csrow->nr_channels = %d\n", csrow->nr_channels);
 110         edac_dbg(4, "  csrow->channels = %p\n", csrow->channels);
 111         edac_dbg(4, "  csrow->mci = %p\n", csrow->mci);
 112 }
 113
 114 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
 115 {
 116         edac_dbg(3, "\tmci = %p\n", mci);
 117         edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
 118         edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
 119         edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
 120         edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
 121         edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
 122                  mci->nr_csrows, mci->csrows);
 123         edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
 124                  mci->tot_dimms, mci->dimms);
 125         edac_dbg(3, "\tdev = %p\n", mci->pdev);
 126         edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
 127                  mci->mod_name, mci->ctl_name);
 128         edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
 129 }
 130
 131 #endif                          /* CONFIG_EDAC_DEBUG */
 132
 133 const char * const edac_mem_types[] = {
 134         [MEM_EMPTY]     = "Empty csrow",
 135         [MEM_RESERVED]  = "Reserved csrow type",
 136         [MEM_UNKNOWN]   = "Unknown csrow type",
 137         [MEM_FPM]       = "Fast page mode RAM",
 138         [MEM_EDO]       = "Extended data out RAM",
 139         [MEM_BEDO]      = "Burst Extended data out RAM",
 140         [MEM_SDR]       = "Single data rate SDRAM",
 141         [MEM_RDR]       = "Registered single data rate SDRAM",
 142         [MEM_DDR]       = "Double data rate SDRAM",
 143         [MEM_RDDR]      = "Registered Double data rate SDRAM",
 144         [MEM_RMBS]      = "Rambus DRAM",
 145         [MEM_DDR2]      = "Unbuffered DDR2 RAM",
 146         [MEM_FB_DDR2]   = "Fully buffered DDR2",
 147         [MEM_RDDR2]     = "Registered DDR2 RAM",
 148         [MEM_XDR]       = "Rambus XDR",
 149         [MEM_DDR3]      = "Unbuffered DDR3 RAM",
 150         [MEM_RDDR3]     = "Registered DDR3 RAM",
 151         [MEM_LRDDR3]    = "Load-Reduced DDR3 RAM",
 152         [MEM_DDR4]      = "Unbuffered DDR4 RAM",
 153         [MEM_RDDR4]     = "Registered DDR4 RAM",
 154 };
 155 EXPORT_SYMBOL_GPL(edac_mem_types);
 156
 157 /**
 158  * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
 159  * @p:          pointer to a pointer with the memory offset to be used. At
 160  *              return, this will be incremented to point to the next offset
 161  * @size:       Size of the data structure to be reserved
 162  * @n_elems:    Number of elements that should be reserved
 163  *
 164  * If 'size' is a constant, the compiler will optimize this whole function
 165  * down to either a no-op or the addition of a constant to the value of '*p'.
 166  *
 167  * The 'p' pointer is absolutely needed to keep the proper advancing
 168  * further in memory to the proper offsets when allocating the struct along
 169  * with its embedded structs, as edac_device_alloc_ctl_info() does it
 170  * above, for example.
 171  *
 172  * At return, the pointer 'p' will be incremented to be used on a next call
 173  * to this function.
 174  */
 175 void *edac_align_ptr(void **p, unsigned size, int n_elems)
 176 {
 177         unsigned align, r;
 178         void *ptr = *p;
 179
 180         *p += size * n_elems;
 181
 182         /*
 183          * 'p' can possibly be an unaligned item X such that sizeof(X) is
 184          * 'size'.  Adjust 'p' so that its alignment is at least as
 185          * stringent as what the compiler would provide for X and return
 186          * the aligned result.
 187          * Here we assume that the alignment of a "long long" is the most
 188          * stringent alignment that the compiler will ever provide by default.
 189          * As far as I know, this is a reasonable assumption.
 190          */
 191         if (size > sizeof(long))
 192                 align = sizeof(long long);
 193         else if (size > sizeof(int))
 194                 align = sizeof(long);
 195         else if (size > sizeof(short))
 196                 align = sizeof(int);
 197         else if (size > sizeof(char))
 198                 align = sizeof(short);
 199         else
 200                 return (char *)ptr;
 201
 202         r = (unsigned long)p % align;
 203
 204         if (r == 0)
 205                 return (char *)ptr;
 206
 207         *p += align - r;
 208
 209         return (void *)(((unsigned long)ptr) + align - r);
 210 }
 211
 212 static void _edac_mc_free(struct mem_ctl_info *mci)
 213 {
 214         int i, chn, row;
 215         struct csrow_info *csr;
 216         const unsigned int tot_dimms = mci->tot_dimms;
 217         const unsigned int tot_channels = mci->num_cschannel;
 218         const unsigned int tot_csrows = mci->nr_csrows;
 219
 220         if (mci->dimms) {
 221                 for (i = 0; i < tot_dimms; i++)
 222                         kfree(mci->dimms[i]);
 223                 kfree(mci->dimms);
 224         }
 225         if (mci->csrows) {
 226                 for (row = 0; row < tot_csrows; row++) {
 227                         csr = mci->csrows[row];
 228                         if (csr) {
 229                                 if (csr->channels) {
 230                                         for (chn = 0; chn < tot_channels; chn++)
 231                                                 kfree(csr->channels[chn]);
 232                                         kfree(csr->channels);
 233                                 }
 234                                 kfree(csr);
 235                         }
 236                 }
 237                 kfree(mci->csrows);
 238         }
 239         kfree(mci);
 240 }
 241
 242 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
 243                                    unsigned n_layers,
 244                                    struct edac_mc_layer *layers,
 245                                    unsigned sz_pvt)
 246 {
 247         struct mem_ctl_info *mci;
 248         struct edac_mc_layer *layer;
 249         struct csrow_info *csr;
 250         struct rank_info *chan;
 251         struct dimm_info *dimm;
 252         u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
 253         unsigned pos[EDAC_MAX_LAYERS];
 254         unsigned size, tot_dimms = 1, count = 1;
 255         unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
 256         void *pvt, *p, *ptr = NULL;
 257         int i, j, row, chn, n, len, off;
 258         bool per_rank = false;
 259
 260         BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
 261         /*
 262          * Calculate the total amount of dimms and csrows/cschannels while
 263          * in the old API emulation mode
 264          */
 265         for (i = 0; i < n_layers; i++) {
 266                 tot_dimms *= layers[i].size;
 267                 if (layers[i].is_virt_csrow)
 268                         tot_csrows *= layers[i].size;
 269                 else
 270                         tot_channels *= layers[i].size;
 271
 272                 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
 273                         per_rank = true;
 274         }
 275
 276         /* Figure out the offsets of the various items from the start of an mc
 277          * structure.  We want the alignment of each item to be at least as
 278          * stringent as what the compiler would provide if we could simply
 279          * hardcode everything into a single struct.
 280          */
 281         mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
 282         layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
 283         for (i = 0; i < n_layers; i++) {
 284                 count *= layers[i].size;
 285                 edac_dbg(4, "errcount layer %d size %d\n", i, count);
 286                 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
 287                 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
 288                 tot_errcount += 2 * count;
 289         }
 290
 291         edac_dbg(4, "allocating %d error counters\n", tot_errcount);
 292         pvt = edac_align_ptr(&ptr, sz_pvt, 1);
 293         size = ((unsigned long)pvt) + sz_pvt;
 294
 295         edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
 296                  size,
 297                  tot_dimms,
 298                  per_rank ? "ranks" : "dimms",
 299                  tot_csrows * tot_channels);
 300
 301         mci = kzalloc(size, GFP_KERNEL);
 302         if (mci == NULL)
 303                 return NULL;
 304
 305         /* Adjust pointers so they point within the memory we just allocated
 306          * rather than an imaginary chunk of memory located at address 0.
 307          */
 308         layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
 309         for (i = 0; i < n_layers; i++) {
 310                 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
 311                 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
 312         }
 313         pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
 314
 315         /* setup index and various internal pointers */
 316         mci->mc_idx = mc_num;
 317         mci->tot_dimms = tot_dimms;
 318         mci->pvt_info = pvt;
 319         mci->n_layers = n_layers;
 320         mci->layers = layer;
 321         memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
 322         mci->nr_csrows = tot_csrows;
 323         mci->num_cschannel = tot_channels;
 324         mci->csbased = per_rank;
 325
 326         /*
 327          * Alocate and fill the csrow/channels structs
 328          */
 329         mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
 330         if (!mci->csrows)
 331                 goto error;
 332         for (row = 0; row < tot_csrows; row++) {
 333                 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
 334                 if (!csr)
 335                         goto error;
 336                 mci->csrows[row] = csr;
 337                 csr->csrow_idx = row;
 338                 csr->mci = mci;
 339                 csr->nr_channels = tot_channels;
 340                 csr->channels = kcalloc(tot_channels, sizeof(*csr->channels),
 341                                         GFP_KERNEL);
 342                 if (!csr->channels)
 343                         goto error;
 344
 345                 for (chn = 0; chn < tot_channels; chn++) {
 346                         chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
 347                         if (!chan)
 348                                 goto error;
 349                         csr->channels[chn] = chan;
 350                         chan->chan_idx = chn;
 351                         chan->csrow = csr;
 352                 }
 353         }
 354
 355         /*
 356          * Allocate and fill the dimm structs
 357          */
 358         mci->dimms  = kcalloc(tot_dimms, sizeof(*mci->dimms), GFP_KERNEL);
 359         if (!mci->dimms)
 360                 goto error;
 361
 362         memset(&pos, 0, sizeof(pos));
 363         row = 0;
 364         chn = 0;
 365         for (i = 0; i < tot_dimms; i++) {
 366                 chan = mci->csrows[row]->channels[chn];
 367                 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
 368                 if (off < 0 || off >= tot_dimms) {
 369                         edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
 370                         goto error;
 371                 }
 372
 373                 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
 374                 if (!dimm)
 375                         goto error;
 376                 mci->dimms[off] = dimm;
 377                 dimm->mci = mci;
 378
 379                 /*
 380                  * Copy DIMM location and initialize it.
 381                  */
 382                 len = sizeof(dimm->label);
 383                 p = dimm->label;
 384                 n = snprintf(p, len, "mc#%u", mc_num);
 385                 p += n;
 386                 len -= n;
 387                 for (j = 0; j < n_layers; j++) {
 388                         n = snprintf(p, len, "%s#%u",
 389                                      edac_layer_name[layers[j].type],
 390                                      pos[j]);
 391                         p += n;
 392                         len -= n;
 393                         dimm->location[j] = pos[j];
 394
 395                         if (len <= 0)
 396                                 break;
 397                 }
 398
 399                 /* Link it to the csrows old API data */
 400                 chan->dimm = dimm;
 401                 dimm->csrow = row;
 402                 dimm->cschannel = chn;
 403
 404                 /* Increment csrow location */
 405                 if (layers[0].is_virt_csrow) {
 406                         chn++;
 407                         if (chn == tot_channels) {
 408                                 chn = 0;
 409                                 row++;
 410                         }
 411                 } else {
 412                         row++;
 413                         if (row == tot_csrows) {
 414                                 row = 0;
 415                                 chn++;
 416                         }
 417                 }
 418
 419                 /* Increment dimm location */
 420                 for (j = n_layers - 1; j >= 0; j--) {
 421                         pos[j]++;
 422                         if (pos[j] < layers[j].size)
 423                                 break;
 424                         pos[j] = 0;
 425                 }
 426         }
 427
 428         mci->op_state = OP_ALLOC;
 429
 430         return mci;
 431
 432 error:
 433         _edac_mc_free(mci);
 434
 435         return NULL;
 436 }
 437 EXPORT_SYMBOL_GPL(edac_mc_alloc);
 438
 439 void edac_mc_free(struct mem_ctl_info *mci)
 440 {
 441         edac_dbg(1, "\n");
 442
 443         /* If we're not yet registered with sysfs free only what was allocated
 444          * in edac_mc_alloc().
 445          */
 446         if (!device_is_registered(&mci->dev)) {
 447                 _edac_mc_free(mci);
 448                 return;
 449         }
 450
 451         /* the mci instance is freed here, when the sysfs object is dropped */
 452         edac_unregister_sysfs(mci);
 453 }
 454 EXPORT_SYMBOL_GPL(edac_mc_free);
 455
 456 bool edac_has_mcs(void)
 457 {
 458         bool ret;
 459
 460         mutex_lock(&mem_ctls_mutex);
 461
 462         ret = list_empty(&mc_devices);
 463
 464         mutex_unlock(&mem_ctls_mutex);
 465
 466         return !ret;
 467 }
 468 EXPORT_SYMBOL_GPL(edac_has_mcs);
 469
 470 /* Caller must hold mem_ctls_mutex */
 471 static struct mem_ctl_info *__find_mci_by_dev(struct device *dev)
 472 {
 473         struct mem_ctl_info *mci;
 474         struct list_head *item;
 475
 476         edac_dbg(3, "\n");
 477
 478         list_for_each(item, &mc_devices) {
 479                 mci = list_entry(item, struct mem_ctl_info, link);
 480
 481                 if (mci->pdev == dev)
 482                         return mci;
 483         }
 484
 485         return NULL;
 486 }
 487
 488 /**
 489  * find_mci_by_dev
 490  *
 491  *      scan list of controllers looking for the one that manages
 492  *      the 'dev' device
 493  * @dev: pointer to a struct device related with the MCI
 494  */
 495 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
 496 {
 497         struct mem_ctl_info *ret;
 498
 499         mutex_lock(&mem_ctls_mutex);
 500         ret = __find_mci_by_dev(dev);
 501         mutex_unlock(&mem_ctls_mutex);
 502
 503         return ret;
 504 }
 505 EXPORT_SYMBOL_GPL(find_mci_by_dev);
 506
 507 /*
 508  * handler for EDAC to check if NMI type handler has asserted interrupt
 509  */
 510 static int edac_mc_assert_error_check_and_clear(void)
 511 {
 512         int old_state;
 513
 514         if (edac_op_state == EDAC_OPSTATE_POLL)
 515                 return 1;
 516
 517         old_state = edac_err_assert;
 518         edac_err_assert = 0;
 519
 520         return old_state;
 521 }
 522
 523 /*
 524  * edac_mc_workq_function
 525  *      performs the operation scheduled by a workq request
 526  */
 527 static void edac_mc_workq_function(struct work_struct *work_req)
 528 {
 529         struct delayed_work *d_work = to_delayed_work(work_req);
 530         struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
 531
 532         mutex_lock(&mem_ctls_mutex);
 533
 534         if (mci->op_state != OP_RUNNING_POLL) {
 535                 mutex_unlock(&mem_ctls_mutex);
 536                 return;
 537         }
 538
 539         if (edac_mc_assert_error_check_and_clear())
 540                 mci->edac_check(mci);
 541
 542         mutex_unlock(&mem_ctls_mutex);
 543
 544         /* Queue ourselves again. */
 545         edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 546 }
 547
 548 /*
 549  * edac_mc_reset_delay_period(unsigned long value)
 550  *
 551  *      user space has updated our poll period value, need to
 552  *      reset our workq delays
 553  */
 554 void edac_mc_reset_delay_period(unsigned long value)
 555 {
 556         struct mem_ctl_info *mci;
 557         struct list_head *item;
 558
 559         mutex_lock(&mem_ctls_mutex);
 560
 561         list_for_each(item, &mc_devices) {
 562                 mci = list_entry(item, struct mem_ctl_info, link);
 563
 564                 if (mci->op_state == OP_RUNNING_POLL)
 565                         edac_mod_work(&mci->work, value);
 566         }
 567         mutex_unlock(&mem_ctls_mutex);
 568 }
 569
 570
 571
 572 /* Return 0 on success, 1 on failure.
 573  * Before calling this function, caller must
 574  * assign a unique value to mci->mc_idx.
 575  *
 576  *      locking model:
 577  *
 578  *              called with the mem_ctls_mutex lock held
 579  */
 580 static int add_mc_to_global_list(struct mem_ctl_info *mci)
 581 {
 582         struct list_head *item, *insert_before;
 583         struct mem_ctl_info *p;
 584
 585         insert_before = &mc_devices;
 586
 587         p = __find_mci_by_dev(mci->pdev);
 588         if (unlikely(p != NULL))
 589                 goto fail0;
 590
 591         list_for_each(item, &mc_devices) {
 592                 p = list_entry(item, struct mem_ctl_info, link);
 593
 594                 if (p->mc_idx >= mci->mc_idx) {
 595                         if (unlikely(p->mc_idx == mci->mc_idx))
 596                                 goto fail1;
 597
 598                         insert_before = item;
 599                         break;
 600                 }
 601         }
 602
 603         list_add_tail_rcu(&mci->link, insert_before);
 604         atomic_inc(&edac_handlers);
 605         return 0;
 606
 607 fail0:
 608         edac_printk(KERN_WARNING, EDAC_MC,
 609                 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
 610                 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
 611         return 1;
 612
 613 fail1:
 614         edac_printk(KERN_WARNING, EDAC_MC,
 615                 "bug in low-level driver: attempt to assign\n"
 616                 "    duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
 617         return 1;
 618 }
 619
 620 static int del_mc_from_global_list(struct mem_ctl_info *mci)
 621 {
 622         int handlers = atomic_dec_return(&edac_handlers);
 623         list_del_rcu(&mci->link);
 624
 625         /* these are for safe removal of devices from global list while
 626          * NMI handlers may be traversing list
 627          */
 628         synchronize_rcu();
 629         INIT_LIST_HEAD(&mci->link);
 630
 631         return handlers;
 632 }
 633
 634 struct mem_ctl_info *edac_mc_find(int idx)
 635 {
 636         struct mem_ctl_info *mci = NULL;
 637         struct list_head *item;
 638
 639         mutex_lock(&mem_ctls_mutex);
 640
 641         list_for_each(item, &mc_devices) {
 642                 mci = list_entry(item, struct mem_ctl_info, link);
 643
 644                 if (mci->mc_idx >= idx) {
 645                         if (mci->mc_idx == idx) {
 646                                 goto unlock;
 647                         }
 648                         break;
 649                 }
 650         }
 651
 652 unlock:
 653         mutex_unlock(&mem_ctls_mutex);
 654         return mci;
 655 }
 656 EXPORT_SYMBOL(edac_mc_find);
 657
 658
 659 /* FIXME - should a warning be printed if no error detection? correction? */
 660 int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
 661                                const struct attribute_group **groups)
 662 {
 663         int ret = -EINVAL;
 664         edac_dbg(0, "\n");
 665
 666         if (mci->mc_idx >= EDAC_MAX_MCS) {
 667                 pr_warn_once("Too many memory controllers: %d\n", mci->mc_idx);
 668                 return -ENODEV;
 669         }
 670
 671 #ifdef CONFIG_EDAC_DEBUG
 672         if (edac_debug_level >= 3)
 673                 edac_mc_dump_mci(mci);
 674
 675         if (edac_debug_level >= 4) {
 676                 int i;
 677
 678                 for (i = 0; i < mci->nr_csrows; i++) {
 679                         struct csrow_info *csrow = mci->csrows[i];
 680                         u32 nr_pages = 0;
 681                         int j;
 682
 683                         for (j = 0; j < csrow->nr_channels; j++)
 684                                 nr_pages += csrow->channels[j]->dimm->nr_pages;
 685                         if (!nr_pages)
 686                                 continue;
 687                         edac_mc_dump_csrow(csrow);
 688                         for (j = 0; j < csrow->nr_channels; j++)
 689                                 if (csrow->channels[j]->dimm->nr_pages)
 690                                         edac_mc_dump_channel(csrow->channels[j]);
 691                 }
 692                 for (i = 0; i < mci->tot_dimms; i++)
 693                         if (mci->dimms[i]->nr_pages)
 694                                 edac_mc_dump_dimm(mci->dimms[i], i);
 695         }
 696 #endif
 697         mutex_lock(&mem_ctls_mutex);
 698
 699         if (edac_mc_owner && edac_mc_owner != mci->mod_name) {
 700                 ret = -EPERM;
 701                 goto fail0;
 702         }
 703
 704         if (add_mc_to_global_list(mci))
 705                 goto fail0;
 706
 707         /* set load time so that error rate can be tracked */
 708         mci->start_time = jiffies;
 709
 710         mci->bus = &mc_bus[mci->mc_idx];
 711
 712         if (edac_create_sysfs_mci_device(mci, groups)) {
 713                 edac_mc_printk(mci, KERN_WARNING,
 714                         "failed to create sysfs device\n");
 715                 goto fail1;
 716         }
 717
 718         if (mci->edac_check) {
 719                 mci->op_state = OP_RUNNING_POLL;
 720
 721                 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
 722                 edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 723
 724         } else {
 725                 mci->op_state = OP_RUNNING_INTERRUPT;
 726         }
 727
 728         /* Report action taken */
 729         edac_mc_printk(mci, KERN_INFO,
 730                 "Giving out device to module %s controller %s: DEV %s (%s)\n",
 731                 mci->mod_name, mci->ctl_name, mci->dev_name,
 732                 edac_op_state_to_string(mci->op_state));
 733
 734         edac_mc_owner = mci->mod_name;
 735
 736         mutex_unlock(&mem_ctls_mutex);
 737         return 0;
 738
 739 fail1:
 740         del_mc_from_global_list(mci);
 741
 742 fail0:
 743         mutex_unlock(&mem_ctls_mutex);
 744         return ret;
 745 }
 746 EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups);
 747
 748 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
 749 {
 750         struct mem_ctl_info *mci;
 751
 752         edac_dbg(0, "\n");
 753
 754         mutex_lock(&mem_ctls_mutex);
 755
 756         /* find the requested mci struct in the global list */
 757         mci = __find_mci_by_dev(dev);
 758         if (mci == NULL) {
 759                 mutex_unlock(&mem_ctls_mutex);
 760                 return NULL;
 761         }
 762
 763         /* mark MCI offline: */
 764         mci->op_state = OP_OFFLINE;
 765
 766         if (!del_mc_from_global_list(mci))
 767                 edac_mc_owner = NULL;
 768
 769         mutex_unlock(&mem_ctls_mutex);
 770
 771         if (mci->edac_check)
 772                 edac_stop_work(&mci->work);
 773
 774         /* remove from sysfs */
 775         edac_remove_sysfs_mci_device(mci);
 776
 777         edac_printk(KERN_INFO, EDAC_MC,
 778                 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
 779                 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
 780
 781         return mci;
 782 }
 783 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
 784
 785 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
 786                                 u32 size)
 787 {
 788         struct page *pg;
 789         void *virt_addr;
 790         unsigned long flags = 0;
 791
 792         edac_dbg(3, "\n");
 793
 794         /* ECC error page was not in our memory. Ignore it. */
 795         if (!pfn_valid(page))
 796                 return;
 797
 798         /* Find the actual page structure then map it and fix */
 799         pg = pfn_to_page(page);
 800
 801         if (PageHighMem(pg))
 802                 local_irq_save(flags);
 803
 804         virt_addr = kmap_atomic(pg);
 805
 806         /* Perform architecture specific atomic scrub operation */
 807         edac_atomic_scrub(virt_addr + offset, size);
 808
 809         /* Unmap and complete */
 810         kunmap_atomic(virt_addr);
 811
 812         if (PageHighMem(pg))
 813                 local_irq_restore(flags);
 814 }
 815
 816 /* FIXME - should return -1 */
 817 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
 818 {
 819         struct csrow_info **csrows = mci->csrows;
 820         int row, i, j, n;
 821
 822         edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
 823         row = -1;
 824
 825         for (i = 0; i < mci->nr_csrows; i++) {
 826                 struct csrow_info *csrow = csrows[i];
 827                 n = 0;
 828                 for (j = 0; j < csrow->nr_channels; j++) {
 829                         struct dimm_info *dimm = csrow->channels[j]->dimm;
 830                         n += dimm->nr_pages;
 831                 }
 832                 if (n == 0)
 833                         continue;
 834
 835                 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
 836                          mci->mc_idx,
 837                          csrow->first_page, page, csrow->last_page,
 838                          csrow->page_mask);
 839
 840                 if ((page >= csrow->first_page) &&
 841                     (page <= csrow->last_page) &&
 842                     ((page & csrow->page_mask) ==
 843                      (csrow->first_page & csrow->page_mask))) {
 844                         row = i;
 845                         break;
 846                 }
 847         }
 848
 849         if (row == -1)
 850                 edac_mc_printk(mci, KERN_ERR,
 851                         "could not look up page error address %lx\n",
 852                         (unsigned long)page);
 853
 854         return row;
 855 }
 856 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
 857
 858 const char *edac_layer_name[] = {
 859         [EDAC_MC_LAYER_BRANCH] = "branch",
 860         [EDAC_MC_LAYER_CHANNEL] = "channel",
 861         [EDAC_MC_LAYER_SLOT] = "slot",
 862         [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
 863         [EDAC_MC_LAYER_ALL_MEM] = "memory",
 864 };
 865 EXPORT_SYMBOL_GPL(edac_layer_name);
 866
 867 static void edac_inc_ce_error(struct mem_ctl_info *mci,
 868                               bool enable_per_layer_report,
 869                               const int pos[EDAC_MAX_LAYERS],
 870                               const u16 count)
 871 {
 872         int i, index = 0;
 873
 874         mci->ce_mc += count;
 875
 876         if (!enable_per_layer_report) {
 877                 mci->ce_noinfo_count += count;
 878                 return;
 879         }
 880
 881         for (i = 0; i < mci->n_layers; i++) {
 882                 if (pos[i] < 0)
 883                         break;
 884                 index += pos[i];
 885                 mci->ce_per_layer[i][index] += count;
 886
 887                 if (i < mci->n_layers - 1)
 888                         index *= mci->layers[i + 1].size;
 889         }
 890 }
 891
 892 static void edac_inc_ue_error(struct mem_ctl_info *mci,
 893                                     bool enable_per_layer_report,
 894                                     const int pos[EDAC_MAX_LAYERS],
 895                                     const u16 count)
 896 {
 897         int i, index = 0;
 898
 899         mci->ue_mc += count;
 900
 901         if (!enable_per_layer_report) {
 902                 mci->ue_noinfo_count += count;
 903                 return;
 904         }
 905
 906         for (i = 0; i < mci->n_layers; i++) {
 907                 if (pos[i] < 0)
 908                         break;
 909                 index += pos[i];
 910                 mci->ue_per_layer[i][index] += count;
 911
 912                 if (i < mci->n_layers - 1)
 913                         index *= mci->layers[i + 1].size;
 914         }
 915 }
 916
 917 static void edac_ce_error(struct mem_ctl_info *mci,
 918                           const u16 error_count,
 919                           const int pos[EDAC_MAX_LAYERS],
 920                           const char *msg,
 921                           const char *location,
 922                           const char *label,
 923                           const char *detail,
 924                           const char *other_detail,
 925                           const bool enable_per_layer_report,
 926                           const unsigned long page_frame_number,
 927                           const unsigned long offset_in_page,
 928                           long grain)
 929 {
 930         unsigned long remapped_page;
 931         char *msg_aux = "";
 932
 933         if (*msg)
 934                 msg_aux = " ";
 935
 936         if (edac_mc_get_log_ce()) {
 937                 if (other_detail && *other_detail)
 938                         edac_mc_printk(mci, KERN_WARNING,
 939                                        "%d CE %s%son %s (%s %s - %s)\n",
 940                                        error_count, msg, msg_aux, label,
 941                                        location, detail, other_detail);
 942                 else
 943                         edac_mc_printk(mci, KERN_WARNING,
 944                                        "%d CE %s%son %s (%s %s)\n",
 945                                        error_count, msg, msg_aux, label,
 946                                        location, detail);
 947         }
 948         edac_inc_ce_error(mci, enable_per_layer_report, pos, error_count);
 949
 950         if (mci->scrub_mode == SCRUB_SW_SRC) {
 951                 /*
 952                         * Some memory controllers (called MCs below) can remap
 953                         * memory so that it is still available at a different
 954                         * address when PCI devices map into memory.
 955                         * MC's that can't do this, lose the memory where PCI
 956                         * devices are mapped. This mapping is MC-dependent
 957                         * and so we call back into the MC driver for it to
 958                         * map the MC page to a physical (CPU) page which can
 959                         * then be mapped to a virtual page - which can then
 960                         * be scrubbed.
 961                         */
 962                 remapped_page = mci->ctl_page_to_phys ?
 963                         mci->ctl_page_to_phys(mci, page_frame_number) :
 964                         page_frame_number;
 965
 966                 edac_mc_scrub_block(remapped_page,
 967                                         offset_in_page, grain);
 968         }
 969 }
 970
 971 static void edac_ue_error(struct mem_ctl_info *mci,
 972                           const u16 error_count,
 973                           const int pos[EDAC_MAX_LAYERS],
 974                           const char *msg,
 975                           const char *location,
 976                           const char *label,
 977                           const char *detail,
 978                           const char *other_detail,
 979                           const bool enable_per_layer_report)
 980 {
 981         char *msg_aux = "";
 982
 983         if (*msg)
 984                 msg_aux = " ";
 985
 986         if (edac_mc_get_log_ue()) {
 987                 if (other_detail && *other_detail)
 988                         edac_mc_printk(mci, KERN_WARNING,
 989                                        "%d UE %s%son %s (%s %s - %s)\n",
 990                                        error_count, msg, msg_aux, label,
 991                                        location, detail, other_detail);
 992                 else
 993                         edac_mc_printk(mci, KERN_WARNING,
 994                                        "%d UE %s%son %s (%s %s)\n",
 995                                        error_count, msg, msg_aux, label,
 996                                        location, detail);
 997         }
 998
 999         if (edac_mc_get_panic_on_ue()) {
1000                 if (other_detail && *other_detail)
1001                         panic("UE %s%son %s (%s%s - %s)\n",
1002                               msg, msg_aux, label, location, detail, other_detail);
1003                 else
1004                         panic("UE %s%son %s (%s%s)\n",
1005                               msg, msg_aux, label, location, detail);
1006         }
1007
1008         edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count);
1009 }
1010
1011 void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type,
1012                               struct mem_ctl_info *mci,
1013                               struct edac_raw_error_desc *e)
1014 {
1015         char detail[80];
1016         int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
1017
1018         /* Memory type dependent details about the error */
1019         if (type == HW_EVENT_ERR_CORRECTED) {
1020                 snprintf(detail, sizeof(detail),
1021                         "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1022                         e->page_frame_number, e->offset_in_page,
1023                         e->grain, e->syndrome);
1024                 edac_ce_error(mci, e->error_count, pos, e->msg, e->location, e->label,
1025                               detail, e->other_detail, e->enable_per_layer_report,
1026                               e->page_frame_number, e->offset_in_page, e->grain);
1027         } else {
1028                 snprintf(detail, sizeof(detail),
1029                         "page:0x%lx offset:0x%lx grain:%ld",
1030                         e->page_frame_number, e->offset_in_page, e->grain);
1031
1032                 edac_ue_error(mci, e->error_count, pos, e->msg, e->location, e->label,
1033                               detail, e->other_detail, e->enable_per_layer_report);
1034         }
1035
1036
1037 }
1038 EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error);
1039
1040 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1041                           struct mem_ctl_info *mci,
1042                           const u16 error_count,
1043                           const unsigned long page_frame_number,
1044                           const unsigned long offset_in_page,
1045                           const unsigned long syndrome,
1046                           const int top_layer,
1047                           const int mid_layer,
1048                           const int low_layer,
1049                           const char *msg,
1050                           const char *other_detail)
1051 {
1052         char *p;
1053         int row = -1, chan = -1;
1054         int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1055         int i, n_labels = 0;
1056         u8 grain_bits;
1057         struct edac_raw_error_desc *e = &mci->error_desc;
1058
1059         edac_dbg(3, "MC%d\n", mci->mc_idx);
1060
1061         /* Fills the error report buffer */
1062         memset(e, 0, sizeof (*e));
1063         e->error_count = error_count;
1064         e->top_layer = top_layer;
1065         e->mid_layer = mid_layer;
1066         e->low_layer = low_layer;
1067         e->page_frame_number = page_frame_number;
1068         e->offset_in_page = offset_in_page;
1069         e->syndrome = syndrome;
1070         e->msg = msg;
1071         e->other_detail = other_detail;
1072
1073         /*
1074          * Check if the event report is consistent and if the memory
1075          * location is known. If it is known, enable_per_layer_report will be
1076          * true, the DIMM(s) label info will be filled and the per-layer
1077          * error counters will be incremented.
1078          */
1079         for (i = 0; i < mci->n_layers; i++) {
1080                 if (pos[i] >= (int)mci->layers[i].size) {
1081
1082                         edac_mc_printk(mci, KERN_ERR,
1083                                        "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1084                                        edac_layer_name[mci->layers[i].type],
1085                                        pos[i], mci->layers[i].size);
1086                         /*
1087                          * Instead of just returning it, let's use what's
1088                          * known about the error. The increment routines and
1089                          * the DIMM filter logic will do the right thing by
1090                          * pointing the likely damaged DIMMs.
1091                          */
1092                         pos[i] = -1;
1093                 }
1094                 if (pos[i] >= 0)
1095                         e->enable_per_layer_report = true;
1096         }
1097
1098         /*
1099          * Get the dimm label/grain that applies to the match criteria.
1100          * As the error algorithm may not be able to point to just one memory
1101          * stick, the logic here will get all possible labels that could
1102          * pottentially be affected by the error.
1103          * On FB-DIMM memory controllers, for uncorrected errors, it is common
1104          * to have only the MC channel and the MC dimm (also called "branch")
1105          * but the channel is not known, as the memory is arranged in pairs,
1106          * where each memory belongs to a separate channel within the same
1107          * branch.
1108          */
1109         p = e->label;
1110         *p = '\0';
1111
1112         for (i = 0; i < mci->tot_dimms; i++) {
1113                 struct dimm_info *dimm = mci->dimms[i];
1114
1115                 if (top_layer >= 0 && top_layer != dimm->location[0])
1116                         continue;
1117                 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1118                         continue;
1119                 if (low_layer >= 0 && low_layer != dimm->location[2])
1120                         continue;
1121
1122                 /* get the max grain, over the error match range */
1123                 if (dimm->grain > e->grain)
1124                         e->grain = dimm->grain;
1125
1126                 /*
1127                  * If the error is memory-controller wide, there's no need to
1128                  * seek for the affected DIMMs because the whole
1129                  * channel/memory controller/...  may be affected.
1130                  * Also, don't show errors for empty DIMM slots.
1131                  */
1132                 if (e->enable_per_layer_report && dimm->nr_pages) {
1133                         if (n_labels >= EDAC_MAX_LABELS) {
1134                                 e->enable_per_layer_report = false;
1135                                 break;
1136                         }
1137                         n_labels++;
1138                         if (p != e->label) {
1139                                 strcpy(p, OTHER_LABEL);
1140                                 p += strlen(OTHER_LABEL);
1141                         }
1142                         strcpy(p, dimm->label);
1143                         p += strlen(p);
1144                         *p = '\0';
1145
1146                         /*
1147                          * get csrow/channel of the DIMM, in order to allow
1148                          * incrementing the compat API counters
1149                          */
1150                         edac_dbg(4, "%s csrows map: (%d,%d)\n",
1151                                  mci->csbased ? "rank" : "dimm",
1152                                  dimm->csrow, dimm->cschannel);
1153                         if (row == -1)
1154                                 row = dimm->csrow;
1155                         else if (row >= 0 && row != dimm->csrow)
1156                                 row = -2;
1157
1158                         if (chan == -1)
1159                                 chan = dimm->cschannel;
1160                         else if (chan >= 0 && chan != dimm->cschannel)
1161                                 chan = -2;
1162                 }
1163         }
1164
1165         if (!e->enable_per_layer_report) {
1166                 strcpy(e->label, "any memory");
1167         } else {
1168                 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
1169                 if (p == e->label)
1170                         strcpy(e->label, "unknown memory");
1171                 if (type == HW_EVENT_ERR_CORRECTED) {
1172                         if (row >= 0) {
1173                                 mci->csrows[row]->ce_count += error_count;
1174                                 if (chan >= 0)
1175                                         mci->csrows[row]->channels[chan]->ce_count += error_count;
1176                         }
1177                 } else
1178                         if (row >= 0)
1179                                 mci->csrows[row]->ue_count += error_count;
1180         }
1181
1182         /* Fill the RAM location data */
1183         p = e->location;
1184
1185         for (i = 0; i < mci->n_layers; i++) {
1186                 if (pos[i] < 0)
1187                         continue;
1188
1189                 p += sprintf(p, "%s:%d ",
1190                              edac_layer_name[mci->layers[i].type],
1191                              pos[i]);
1192         }
1193         if (p > e->location)
1194                 *(p - 1) = '\0';
1195
1196         /* Report the error via the trace interface */
1197         grain_bits = fls_long(e->grain) + 1;
1198         trace_mc_event(type, e->msg, e->label, e->error_count,
1199                        mci->mc_idx, e->top_layer, e->mid_layer, e->low_layer,
1200                        (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
1201                        grain_bits, e->syndrome, e->other_detail);
1202
1203         edac_raw_mc_handle_error(type, mci, e);
1204 }
1205 EXPORT_SYMBOL_GPL(edac_mc_handle_error);