drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char * const tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         i915_reg_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107         bool color_range_auto;
 108
 109         /**
 110          * This is set if we're going to treat the device as TV-out.
 111          *
 112          * While we have these nice friendly flags for output types that ought
 113          * to decide this for us, the S-Video output on our HDMI+S-Video card
 114          * shows up as RGB1 (VGA).
 115          */
 116         bool is_tv;
 117
 118         enum port port;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129         bool rgb_quant_range_selectable;
 130
 131         /**
 132          * This is set if we detect output of sdvo device as LVDS and
 133          * have a valid fixed mode to use with the panel.
 134          */
 135         bool is_lvds;
 136
 137         /**
 138          * This is sdvo fixed pannel mode pointer
 139          */
 140         struct drm_display_mode *sdvo_lvds_fixed_mode;
 141
 142         /* DDC bus used by this SDVO encoder */
 143         uint8_t ddc_bus;
 144
 145         /*
 146          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 147          */
 148         uint8_t dtd_sdvo_flags;
 149 };
 150
 151 struct intel_sdvo_connector {
 152         struct intel_connector base;
 153
 154         /* Mark the type of connector */
 155         uint16_t output_flag;
 156
 157         enum hdmi_force_audio force_audio;
 158
 159         /* This contains all current supported TV format */
 160         u8 tv_format_supported[TV_FORMAT_NUM];
 161         int   format_supported_num;
 162         struct drm_property *tv_format;
 163
 164         /* add the property for the SDVO-TV */
 165         struct drm_property *left;
 166         struct drm_property *right;
 167         struct drm_property *top;
 168         struct drm_property *bottom;
 169         struct drm_property *hpos;
 170         struct drm_property *vpos;
 171         struct drm_property *contrast;
 172         struct drm_property *saturation;
 173         struct drm_property *hue;
 174         struct drm_property *sharpness;
 175         struct drm_property *flicker_filter;
 176         struct drm_property *flicker_filter_adaptive;
 177         struct drm_property *flicker_filter_2d;
 178         struct drm_property *tv_chroma_filter;
 179         struct drm_property *tv_luma_filter;
 180         struct drm_property *dot_crawl;
 181
 182         /* add the property for the SDVO-TV/LVDS */
 183         struct drm_property *brightness;
 184
 185         /* Add variable to record current setting for the above property */
 186         u32     left_margin, right_margin, top_margin, bottom_margin;
 187
 188         /* this is to get the range of margin.*/
 189         u32     max_hscan,  max_vscan;
 190         u32     max_hpos, cur_hpos;
 191         u32     max_vpos, cur_vpos;
 192         u32     cur_brightness, max_brightness;
 193         u32     cur_contrast,   max_contrast;
 194         u32     cur_saturation, max_saturation;
 195         u32     cur_hue,        max_hue;
 196         u32     cur_sharpness,  max_sharpness;
 197         u32     cur_flicker_filter,             max_flicker_filter;
 198         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 199         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 200         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 201         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 202         u32     cur_dot_crawl,  max_dot_crawl;
 203 };
 204
 205 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 206 {
 207         return container_of(encoder, struct intel_sdvo, base);
 208 }
 209
 210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 211 {
 212         return to_sdvo(intel_attached_encoder(connector));
 213 }
 214
 215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 216 {
 217         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 218 }
 219
 220 static bool
 221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 222 static bool
 223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 224                               struct intel_sdvo_connector *intel_sdvo_connector,
 225                               int type);
 226 static bool
 227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 228                                    struct intel_sdvo_connector *intel_sdvo_connector);
 229
 230 /**
 231  * Writes the SDVOB or SDVOC with the given value, but always writes both
 232  * SDVOB and SDVOC to work around apparent hardware issues (according to
 233  * comments in the BIOS).
 234  */
 235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 236 {
 237         struct drm_device *dev = intel_sdvo->base.base.dev;
 238         struct drm_i915_private *dev_priv = to_i915(dev);
 239         u32 bval = val, cval = val;
 240         int i;
 241
 242         if (HAS_PCH_SPLIT(dev_priv)) {
 243                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 244                 POSTING_READ(intel_sdvo->sdvo_reg);
 245                 /*
 246                  * HW workaround, need to write this twice for issue
 247                  * that may result in first write getting masked.
 248                  */
 249                 if (HAS_PCH_IBX(dev_priv)) {
 250                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 251                         POSTING_READ(intel_sdvo->sdvo_reg);
 252                 }
 253                 return;
 254         }
 255
 256         if (intel_sdvo->port == PORT_B)
 257                 cval = I915_READ(GEN3_SDVOC);
 258         else
 259                 bval = I915_READ(GEN3_SDVOB);
 260
 261         /*
 262          * Write the registers twice for luck. Sometimes,
 263          * writing them only once doesn't appear to 'stick'.
 264          * The BIOS does this too. Yay, magic
 265          */
 266         for (i = 0; i < 2; i++)
 267         {
 268                 I915_WRITE(GEN3_SDVOB, bval);
 269                 POSTING_READ(GEN3_SDVOB);
 270                 I915_WRITE(GEN3_SDVOC, cval);
 271                 POSTING_READ(GEN3_SDVOC);
 272         }
 273 }
 274
 275 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 276 {
 277         struct i2c_msg msgs[] = {
 278                 {
 279                         .addr = intel_sdvo->slave_addr,
 280                         .flags = 0,
 281                         .len = 1,
 282                         .buf = &addr,
 283                 },
 284                 {
 285                         .addr = intel_sdvo->slave_addr,
 286                         .flags = I2C_M_RD,
 287                         .len = 1,
 288                         .buf = ch,
 289                 }
 290         };
 291         int ret;
 292
 293         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 294                 return true;
 295
 296         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 297         return false;
 298 }
 299
 300 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 301 /** Mapping of command numbers to names, for debug output */
 302 static const struct _sdvo_cmd_name {
 303         u8 cmd;
 304         const char *name;
 305 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 349
 350         /* Add the op code for SDVO enhancements */
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 395
 396         /* HDMI op code */
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 411         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 412         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 413         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 414         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 415         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 416         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 417 };
 418
 419 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 420
 421 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 422                                    const void *args, int args_len)
 423 {
 424         int i, pos = 0;
 425 #define BUF_LEN 256
 426         char buffer[BUF_LEN];
 427
 428 #define BUF_PRINT(args...) \
 429         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 430
 431
 432         for (i = 0; i < args_len; i++) {
 433                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 434         }
 435         for (; i < 8; i++) {
 436                 BUF_PRINT("   ");
 437         }
 438         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 439                 if (cmd == sdvo_cmd_names[i].cmd) {
 440                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 441                         break;
 442                 }
 443         }
 444         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 445                 BUF_PRINT("(%02X)", cmd);
 446         }
 447         BUG_ON(pos >= BUF_LEN - 1);
 448 #undef BUF_PRINT
 449 #undef BUF_LEN
 450
 451         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 452 }
 453
 454 static const char * const cmd_status_names[] = {
 455         "Power on",
 456         "Success",
 457         "Not supported",
 458         "Invalid arg",
 459         "Pending",
 460         "Target not specified",
 461         "Scaling not supported"
 462 };
 463
 464 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 465                                  const void *args, int args_len)
 466 {
 467         u8 *buf, status;
 468         struct i2c_msg *msgs;
 469         int i, ret = true;
 470
 471         /* Would be simpler to allocate both in one go ? */
 472         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 473         if (!buf)
 474                 return false;
 475
 476         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 477         if (!msgs) {
 478                 kfree(buf);
 479                 return false;
 480         }
 481
 482         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 483
 484         for (i = 0; i < args_len; i++) {
 485                 msgs[i].addr = intel_sdvo->slave_addr;
 486                 msgs[i].flags = 0;
 487                 msgs[i].len = 2;
 488                 msgs[i].buf = buf + 2 *i;
 489                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 490                 buf[2*i + 1] = ((u8*)args)[i];
 491         }
 492         msgs[i].addr = intel_sdvo->slave_addr;
 493         msgs[i].flags = 0;
 494         msgs[i].len = 2;
 495         msgs[i].buf = buf + 2*i;
 496         buf[2*i + 0] = SDVO_I2C_OPCODE;
 497         buf[2*i + 1] = cmd;
 498
 499         /* the following two are to read the response */
 500         status = SDVO_I2C_CMD_STATUS;
 501         msgs[i+1].addr = intel_sdvo->slave_addr;
 502         msgs[i+1].flags = 0;
 503         msgs[i+1].len = 1;
 504         msgs[i+1].buf = &status;
 505
 506         msgs[i+2].addr = intel_sdvo->slave_addr;
 507         msgs[i+2].flags = I2C_M_RD;
 508         msgs[i+2].len = 1;
 509         msgs[i+2].buf = &status;
 510
 511         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 512         if (ret < 0) {
 513                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 514                 ret = false;
 515                 goto out;
 516         }
 517         if (ret != i+3) {
 518                 /* failure in I2C transfer */
 519                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 520                 ret = false;
 521         }
 522
 523 out:
 524         kfree(msgs);
 525         kfree(buf);
 526         return ret;
 527 }
 528
 529 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 530                                      void *response, int response_len)
 531 {
 532         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 533         u8 status;
 534         int i, pos = 0;
 535 #define BUF_LEN 256
 536         char buffer[BUF_LEN];
 537
 538
 539         /*
 540          * The documentation states that all commands will be
 541          * processed within 15µs, and that we need only poll
 542          * the status byte a maximum of 3 times in order for the
 543          * command to be complete.
 544          *
 545          * Check 5 times in case the hardware failed to read the docs.
 546          *
 547          * Also beware that the first response by many devices is to
 548          * reply PENDING and stall for time. TVs are notorious for
 549          * requiring longer than specified to complete their replies.
 550          * Originally (in the DDX long ago), the delay was only ever 15ms
 551          * with an additional delay of 30ms applied for TVs added later after
 552          * many experiments. To accommodate both sets of delays, we do a
 553          * sequence of slow checks if the device is falling behind and fails
 554          * to reply within 5*15µs.
 555          */
 556         if (!intel_sdvo_read_byte(intel_sdvo,
 557                                   SDVO_I2C_CMD_STATUS,
 558                                   &status))
 559                 goto log_fail;
 560
 561         while ((status == SDVO_CMD_STATUS_PENDING ||
 562                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 563                 if (retry < 10)
 564                         msleep(15);
 565                 else
 566                         udelay(15);
 567
 568                 if (!intel_sdvo_read_byte(intel_sdvo,
 569                                           SDVO_I2C_CMD_STATUS,
 570                                           &status))
 571                         goto log_fail;
 572         }
 573
 574 #define BUF_PRINT(args...) \
 575         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 576
 577         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 578                 BUF_PRINT("(%s)", cmd_status_names[status]);
 579         else
 580                 BUF_PRINT("(??? %d)", status);
 581
 582         if (status != SDVO_CMD_STATUS_SUCCESS)
 583                 goto log_fail;
 584
 585         /* Read the command response */
 586         for (i = 0; i < response_len; i++) {
 587                 if (!intel_sdvo_read_byte(intel_sdvo,
 588                                           SDVO_I2C_RETURN_0 + i,
 589                                           &((u8 *)response)[i]))
 590                         goto log_fail;
 591                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 592         }
 593         BUG_ON(pos >= BUF_LEN - 1);
 594 #undef BUF_PRINT
 595 #undef BUF_LEN
 596
 597         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 598         return true;
 599
 600 log_fail:
 601         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 602         return false;
 603 }
 604
 605 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 606 {
 607         if (adjusted_mode->crtc_clock >= 100000)
 608                 return 1;
 609         else if (adjusted_mode->crtc_clock >= 50000)
 610                 return 2;
 611         else
 612                 return 4;
 613 }
 614
 615 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 616                                               u8 ddc_bus)
 617 {
 618         /* This must be the immediately preceding write before the i2c xfer */
 619         return intel_sdvo_write_cmd(intel_sdvo,
 620                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 621                                     &ddc_bus, 1);
 622 }
 623
 624 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 625 {
 626         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 627                 return false;
 628
 629         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 630 }
 631
 632 static bool
 633 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 634 {
 635         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 636                 return false;
 637
 638         return intel_sdvo_read_response(intel_sdvo, value, len);
 639 }
 640
 641 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 642 {
 643         struct intel_sdvo_set_target_input_args targets = {0};
 644         return intel_sdvo_set_value(intel_sdvo,
 645                                     SDVO_CMD_SET_TARGET_INPUT,
 646                                     &targets, sizeof(targets));
 647 }
 648
 649 /**
 650  * Return whether each input is trained.
 651  *
 652  * This function is making an assumption about the layout of the response,
 653  * which should be checked against the docs.
 654  */
 655 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 656 {
 657         struct intel_sdvo_get_trained_inputs_response response;
 658
 659         BUILD_BUG_ON(sizeof(response) != 1);
 660         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 661                                   &response, sizeof(response)))
 662                 return false;
 663
 664         *input_1 = response.input0_trained;
 665         *input_2 = response.input1_trained;
 666         return true;
 667 }
 668
 669 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 670                                           u16 outputs)
 671 {
 672         return intel_sdvo_set_value(intel_sdvo,
 673                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 674                                     &outputs, sizeof(outputs));
 675 }
 676
 677 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 678                                           u16 *outputs)
 679 {
 680         return intel_sdvo_get_value(intel_sdvo,
 681                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 682                                     outputs, sizeof(*outputs));
 683 }
 684
 685 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 686                                                int mode)
 687 {
 688         u8 state = SDVO_ENCODER_STATE_ON;
 689
 690         switch (mode) {
 691         case DRM_MODE_DPMS_ON:
 692                 state = SDVO_ENCODER_STATE_ON;
 693                 break;
 694         case DRM_MODE_DPMS_STANDBY:
 695                 state = SDVO_ENCODER_STATE_STANDBY;
 696                 break;
 697         case DRM_MODE_DPMS_SUSPEND:
 698                 state = SDVO_ENCODER_STATE_SUSPEND;
 699                 break;
 700         case DRM_MODE_DPMS_OFF:
 701                 state = SDVO_ENCODER_STATE_OFF;
 702                 break;
 703         }
 704
 705         return intel_sdvo_set_value(intel_sdvo,
 706                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 707 }
 708
 709 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 710                                                    int *clock_min,
 711                                                    int *clock_max)
 712 {
 713         struct intel_sdvo_pixel_clock_range clocks;
 714
 715         BUILD_BUG_ON(sizeof(clocks) != 4);
 716         if (!intel_sdvo_get_value(intel_sdvo,
 717                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 718                                   &clocks, sizeof(clocks)))
 719                 return false;
 720
 721         /* Convert the values from units of 10 kHz to kHz. */
 722         *clock_min = clocks.min * 10;
 723         *clock_max = clocks.max * 10;
 724         return true;
 725 }
 726
 727 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 728                                          u16 outputs)
 729 {
 730         return intel_sdvo_set_value(intel_sdvo,
 731                                     SDVO_CMD_SET_TARGET_OUTPUT,
 732                                     &outputs, sizeof(outputs));
 733 }
 734
 735 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 736                                   struct intel_sdvo_dtd *dtd)
 737 {
 738         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 739                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 740 }
 741
 742 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 743                                   struct intel_sdvo_dtd *dtd)
 744 {
 745         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 746                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 747 }
 748
 749 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 750                                          struct intel_sdvo_dtd *dtd)
 751 {
 752         return intel_sdvo_set_timing(intel_sdvo,
 753                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 754 }
 755
 756 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 757                                          struct intel_sdvo_dtd *dtd)
 758 {
 759         return intel_sdvo_set_timing(intel_sdvo,
 760                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 761 }
 762
 763 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 764                                         struct intel_sdvo_dtd *dtd)
 765 {
 766         return intel_sdvo_get_timing(intel_sdvo,
 767                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 768 }
 769
 770 static bool
 771 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 772                                          uint16_t clock,
 773                                          uint16_t width,
 774                                          uint16_t height)
 775 {
 776         struct intel_sdvo_preferred_input_timing_args args;
 777
 778         memset(&args, 0, sizeof(args));
 779         args.clock = clock;
 780         args.width = width;
 781         args.height = height;
 782         args.interlace = 0;
 783
 784         if (intel_sdvo->is_lvds &&
 785            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 786             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 787                 args.scaled = 1;
 788
 789         return intel_sdvo_set_value(intel_sdvo,
 790                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 791                                     &args, sizeof(args));
 792 }
 793
 794 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 795                                                   struct intel_sdvo_dtd *dtd)
 796 {
 797         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 798         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 799         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 800                                     &dtd->part1, sizeof(dtd->part1)) &&
 801                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 802                                      &dtd->part2, sizeof(dtd->part2));
 803 }
 804
 805 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 806 {
 807         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 808 }
 809
 810 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 811                                          const struct drm_display_mode *mode)
 812 {
 813         uint16_t width, height;
 814         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 815         uint16_t h_sync_offset, v_sync_offset;
 816         int mode_clock;
 817
 818         memset(dtd, 0, sizeof(*dtd));
 819
 820         width = mode->hdisplay;
 821         height = mode->vdisplay;
 822
 823         /* do some mode translations */
 824         h_blank_len = mode->htotal - mode->hdisplay;
 825         h_sync_len = mode->hsync_end - mode->hsync_start;
 826
 827         v_blank_len = mode->vtotal - mode->vdisplay;
 828         v_sync_len = mode->vsync_end - mode->vsync_start;
 829
 830         h_sync_offset = mode->hsync_start - mode->hdisplay;
 831         v_sync_offset = mode->vsync_start - mode->vdisplay;
 832
 833         mode_clock = mode->clock;
 834         mode_clock /= 10;
 835         dtd->part1.clock = mode_clock;
 836
 837         dtd->part1.h_active = width & 0xff;
 838         dtd->part1.h_blank = h_blank_len & 0xff;
 839         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 840                 ((h_blank_len >> 8) & 0xf);
 841         dtd->part1.v_active = height & 0xff;
 842         dtd->part1.v_blank = v_blank_len & 0xff;
 843         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 844                 ((v_blank_len >> 8) & 0xf);
 845
 846         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 847         dtd->part2.h_sync_width = h_sync_len & 0xff;
 848         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 849                 (v_sync_len & 0xf);
 850         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 851                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 852                 ((v_sync_len & 0x30) >> 4);
 853
 854         dtd->part2.dtd_flags = 0x18;
 855         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 856                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 857         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 858                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 859         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 860                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 861
 862         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 863 }
 864
 865 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 866                                          const struct intel_sdvo_dtd *dtd)
 867 {
 868         struct drm_display_mode mode = {};
 869
 870         mode.hdisplay = dtd->part1.h_active;
 871         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 872         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 873         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 874         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 875         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 876         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 877         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 878
 879         mode.vdisplay = dtd->part1.v_active;
 880         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 881         mode.vsync_start = mode.vdisplay;
 882         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 883         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 884         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 885         mode.vsync_end = mode.vsync_start +
 886                 (dtd->part2.v_sync_off_width & 0xf);
 887         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 888         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 889         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 890
 891         mode.clock = dtd->part1.clock * 10;
 892
 893         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 894                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 895         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 896                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 897         else
 898                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 899         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 900                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 901         else
 902                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 903
 904         drm_mode_set_crtcinfo(&mode, 0);
 905
 906         drm_mode_copy(pmode, &mode);
 907 }
 908
 909 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 910 {
 911         struct intel_sdvo_encode encode;
 912
 913         BUILD_BUG_ON(sizeof(encode) != 2);
 914         return intel_sdvo_get_value(intel_sdvo,
 915                                   SDVO_CMD_GET_SUPP_ENCODE,
 916                                   &encode, sizeof(encode));
 917 }
 918
 919 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 920                                   uint8_t mode)
 921 {
 922         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 923 }
 924
 925 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 926                                        uint8_t mode)
 927 {
 928         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 929 }
 930
 931 #if 0
 932 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 933 {
 934         int i, j;
 935         uint8_t set_buf_index[2];
 936         uint8_t av_split;
 937         uint8_t buf_size;
 938         uint8_t buf[48];
 939         uint8_t *pos;
 940
 941         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 942
 943         for (i = 0; i <= av_split; i++) {
 944                 set_buf_index[0] = i; set_buf_index[1] = 0;
 945                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 946                                      set_buf_index, 2);
 947                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 948                 intel_sdvo_read_response(encoder, &buf_size, 1);
 949
 950                 pos = buf;
 951                 for (j = 0; j <= buf_size; j += 8) {
 952                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 953                                              NULL, 0);
 954                         intel_sdvo_read_response(encoder, pos, 8);
 955                         pos += 8;
 956                 }
 957         }
 958 }
 959 #endif
 960
 961 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 962                                        unsigned if_index, uint8_t tx_rate,
 963                                        const uint8_t *data, unsigned length)
 964 {
 965         uint8_t set_buf_index[2] = { if_index, 0 };
 966         uint8_t hbuf_size, tmp[8];
 967         int i;
 968
 969         if (!intel_sdvo_set_value(intel_sdvo,
 970                                   SDVO_CMD_SET_HBUF_INDEX,
 971                                   set_buf_index, 2))
 972                 return false;
 973
 974         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 975                                   &hbuf_size, 1))
 976                 return false;
 977
 978         /* Buffer size is 0 based, hooray! */
 979         hbuf_size++;
 980
 981         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 982                       if_index, length, hbuf_size);
 983
 984         for (i = 0; i < hbuf_size; i += 8) {
 985                 memset(tmp, 0, 8);
 986                 if (i < length)
 987                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 988
 989                 if (!intel_sdvo_set_value(intel_sdvo,
 990                                           SDVO_CMD_SET_HBUF_DATA,
 991                                           tmp, 8))
 992                         return false;
 993         }
 994
 995         return intel_sdvo_set_value(intel_sdvo,
 996                                     SDVO_CMD_SET_HBUF_TXRATE,
 997                                     &tx_rate, 1);
 998 }
 999
1000 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1001                                          struct intel_crtc_state *pipe_config)
1002 {
1003         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1004         union hdmi_infoframe frame;
1005         int ret;
1006         ssize_t len;
1007
1008         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1009                                                        &pipe_config->base.adjusted_mode);
1010         if (ret < 0) {
1011                 DRM_ERROR("couldn't fill AVI infoframe\n");
1012                 return false;
1013         }
1014
1015         if (intel_sdvo->rgb_quant_range_selectable) {
1016                 if (pipe_config->limited_color_range)
1017                         frame.avi.quantization_range =
1018                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1019                 else
1020                         frame.avi.quantization_range =
1021                                 HDMI_QUANTIZATION_RANGE_FULL;
1022         }
1023
1024         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1025         if (len < 0)
1026                 return false;
1027
1028         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1029                                           SDVO_HBUF_TX_VSYNC,
1030                                           sdvo_data, sizeof(sdvo_data));
1031 }
1032
1033 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1034 {
1035         struct intel_sdvo_tv_format format;
1036         uint32_t format_map;
1037
1038         format_map = 1 << intel_sdvo->tv_format_index;
1039         memset(&format, 0, sizeof(format));
1040         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1041
1042         BUILD_BUG_ON(sizeof(format) != 6);
1043         return intel_sdvo_set_value(intel_sdvo,
1044                                     SDVO_CMD_SET_TV_FORMAT,
1045                                     &format, sizeof(format));
1046 }
1047
1048 static bool
1049 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1050                                         const struct drm_display_mode *mode)
1051 {
1052         struct intel_sdvo_dtd output_dtd;
1053
1054         if (!intel_sdvo_set_target_output(intel_sdvo,
1055                                           intel_sdvo->attached_output))
1056                 return false;
1057
1058         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1059         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1060                 return false;
1061
1062         return true;
1063 }
1064
1065 /* Asks the sdvo controller for the preferred input mode given the output mode.
1066  * Unfortunately we have to set up the full output mode to do that. */
1067 static bool
1068 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1069                                     const struct drm_display_mode *mode,
1070                                     struct drm_display_mode *adjusted_mode)
1071 {
1072         struct intel_sdvo_dtd input_dtd;
1073
1074         /* Reset the input timing to the screen. Assume always input 0. */
1075         if (!intel_sdvo_set_target_input(intel_sdvo))
1076                 return false;
1077
1078         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1079                                                       mode->clock / 10,
1080                                                       mode->hdisplay,
1081                                                       mode->vdisplay))
1082                 return false;
1083
1084         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1085                                                    &input_dtd))
1086                 return false;
1087
1088         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1089         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1090
1091         return true;
1092 }
1093
1094 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1095 {
1096         unsigned dotclock = pipe_config->port_clock;
1097         struct dpll *clock = &pipe_config->dpll;
1098
1099         /* SDVO TV has fixed PLL values depend on its clock range,
1100            this mirrors vbios setting. */
1101         if (dotclock >= 100000 && dotclock < 140500) {
1102                 clock->p1 = 2;
1103                 clock->p2 = 10;
1104                 clock->n = 3;
1105                 clock->m1 = 16;
1106                 clock->m2 = 8;
1107         } else if (dotclock >= 140500 && dotclock <= 200000) {
1108                 clock->p1 = 1;
1109                 clock->p2 = 10;
1110                 clock->n = 6;
1111                 clock->m1 = 12;
1112                 clock->m2 = 8;
1113         } else {
1114                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1115         }
1116
1117         pipe_config->clock_set = true;
1118 }
1119
1120 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1121                                       struct intel_crtc_state *pipe_config,
1122                                       struct drm_connector_state *conn_state)
1123 {
1124         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1125         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1126         struct drm_display_mode *mode = &pipe_config->base.mode;
1127
1128         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1129         pipe_config->pipe_bpp = 8*3;
1130
1131         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1132                 pipe_config->has_pch_encoder = true;
1133
1134         /* We need to construct preferred input timings based on our
1135          * output timings.  To do that, we have to set the output
1136          * timings, even though this isn't really the right place in
1137          * the sequence to do it. Oh well.
1138          */
1139         if (intel_sdvo->is_tv) {
1140                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1141                         return false;
1142
1143                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1144                                                            mode,
1145                                                            adjusted_mode);
1146                 pipe_config->sdvo_tv_clock = true;
1147         } else if (intel_sdvo->is_lvds) {
1148                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1149                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1150                         return false;
1151
1152                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1153                                                            mode,
1154                                                            adjusted_mode);
1155         }
1156
1157         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1158          * SDVO device will factor out the multiplier during mode_set.
1159          */
1160         pipe_config->pixel_multiplier =
1161                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1162
1163         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1164
1165         if (intel_sdvo->color_range_auto) {
1166                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1167                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1168                  * bit per color mode. */
1169                 if (pipe_config->has_hdmi_sink &&
1170                     drm_match_cea_mode(adjusted_mode) > 1)
1171                         pipe_config->limited_color_range = true;
1172         } else {
1173                 if (pipe_config->has_hdmi_sink &&
1174                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1175                         pipe_config->limited_color_range = true;
1176         }
1177
1178         /* Clock computation needs to happen after pixel multiplier. */
1179         if (intel_sdvo->is_tv)
1180                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1181
1182         /* Set user selected PAR to incoming mode's member */
1183         if (intel_sdvo->is_hdmi)
1184                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1185
1186         return true;
1187 }
1188
1189 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1190                                   struct intel_crtc_state *crtc_state,
1191                                   struct drm_connector_state *conn_state)
1192 {
1193         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1194         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1195         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1196         struct drm_display_mode *mode = &crtc_state->base.mode;
1197         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1198         u32 sdvox;
1199         struct intel_sdvo_in_out_map in_out;
1200         struct intel_sdvo_dtd input_dtd, output_dtd;
1201         int rate;
1202
1203         /* First, set the input mapping for the first input to our controlled
1204          * output. This is only correct if we're a single-input device, in
1205          * which case the first input is the output from the appropriate SDVO
1206          * channel on the motherboard.  In a two-input device, the first input
1207          * will be SDVOB and the second SDVOC.
1208          */
1209         in_out.in0 = intel_sdvo->attached_output;
1210         in_out.in1 = 0;
1211
1212         intel_sdvo_set_value(intel_sdvo,
1213                              SDVO_CMD_SET_IN_OUT_MAP,
1214                              &in_out, sizeof(in_out));
1215
1216         /* Set the output timings to the screen */
1217         if (!intel_sdvo_set_target_output(intel_sdvo,
1218                                           intel_sdvo->attached_output))
1219                 return;
1220
1221         /* lvds has a special fixed output timing. */
1222         if (intel_sdvo->is_lvds)
1223                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1224                                              intel_sdvo->sdvo_lvds_fixed_mode);
1225         else
1226                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1227         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1228                 DRM_INFO("Setting output timings on %s failed\n",
1229                          SDVO_NAME(intel_sdvo));
1230
1231         /* Set the input timing to the screen. Assume always input 0. */
1232         if (!intel_sdvo_set_target_input(intel_sdvo))
1233                 return;
1234
1235         if (crtc_state->has_hdmi_sink) {
1236                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1237                 intel_sdvo_set_colorimetry(intel_sdvo,
1238                                            SDVO_COLORIMETRY_RGB256);
1239                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1240         } else
1241                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1242
1243         if (intel_sdvo->is_tv &&
1244             !intel_sdvo_set_tv_format(intel_sdvo))
1245                 return;
1246
1247         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1248
1249         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1250                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1251         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1252                 DRM_INFO("Setting input timings on %s failed\n",
1253                          SDVO_NAME(intel_sdvo));
1254
1255         switch (crtc_state->pixel_multiplier) {
1256         default:
1257                 WARN(1, "unknown pixel multiplier specified\n");
1258         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1259         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1260         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1261         }
1262         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1263                 return;
1264
1265         /* Set the SDVO control regs. */
1266         if (INTEL_GEN(dev_priv) >= 4) {
1267                 /* The real mode polarity is set by the SDVO commands, using
1268                  * struct intel_sdvo_dtd. */
1269                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1270                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1271                         sdvox |= HDMI_COLOR_RANGE_16_235;
1272                 if (INTEL_GEN(dev_priv) < 5)
1273                         sdvox |= SDVO_BORDER_ENABLE;
1274         } else {
1275                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1276                 if (intel_sdvo->port == PORT_B)
1277                         sdvox &= SDVOB_PRESERVE_MASK;
1278                 else
1279                         sdvox &= SDVOC_PRESERVE_MASK;
1280                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1281         }
1282
1283         if (INTEL_PCH_TYPE(dev_priv) >= PCH_CPT)
1284                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1285         else
1286                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1287
1288         if (intel_sdvo->has_hdmi_audio)
1289                 sdvox |= SDVO_AUDIO_ENABLE;
1290
1291         if (INTEL_GEN(dev_priv) >= 4) {
1292                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1293         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1294                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1295                 /* done in crtc_mode_set as it lives inside the dpll register */
1296         } else {
1297                 sdvox |= (crtc_state->pixel_multiplier - 1)
1298                         << SDVO_PORT_MULTIPLY_SHIFT;
1299         }
1300
1301         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1302             INTEL_GEN(dev_priv) < 5)
1303                 sdvox |= SDVO_STALL_SELECT;
1304         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1305 }
1306
1307 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1308 {
1309         struct intel_sdvo_connector *intel_sdvo_connector =
1310                 to_intel_sdvo_connector(&connector->base);
1311         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1312         u16 active_outputs = 0;
1313
1314         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1315
1316         if (active_outputs & intel_sdvo_connector->output_flag)
1317                 return true;
1318         else
1319                 return false;
1320 }
1321
1322 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1323                                     enum pipe *pipe)
1324 {
1325         struct drm_device *dev = encoder->base.dev;
1326         struct drm_i915_private *dev_priv = to_i915(dev);
1327         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1328         u16 active_outputs = 0;
1329         u32 tmp;
1330
1331         tmp = I915_READ(intel_sdvo->sdvo_reg);
1332         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1333
1334         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1335                 return false;
1336
1337         if (HAS_PCH_CPT(dev_priv))
1338                 *pipe = PORT_TO_PIPE_CPT(tmp);
1339         else
1340                 *pipe = PORT_TO_PIPE(tmp);
1341
1342         return true;
1343 }
1344
1345 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1346                                   struct intel_crtc_state *pipe_config)
1347 {
1348         struct drm_device *dev = encoder->base.dev;
1349         struct drm_i915_private *dev_priv = to_i915(dev);
1350         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1351         struct intel_sdvo_dtd dtd;
1352         int encoder_pixel_multiplier = 0;
1353         int dotclock;
1354         u32 flags = 0, sdvox;
1355         u8 val;
1356         bool ret;
1357
1358         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1359
1360         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1361         if (!ret) {
1362                 /* Some sdvo encoders are not spec compliant and don't
1363                  * implement the mandatory get_timings function. */
1364                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1365                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1366         } else {
1367                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1368                         flags |= DRM_MODE_FLAG_PHSYNC;
1369                 else
1370                         flags |= DRM_MODE_FLAG_NHSYNC;
1371
1372                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1373                         flags |= DRM_MODE_FLAG_PVSYNC;
1374                 else
1375                         flags |= DRM_MODE_FLAG_NVSYNC;
1376         }
1377
1378         pipe_config->base.adjusted_mode.flags |= flags;
1379
1380         /*
1381          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1382          * the sdvo port register, on all other platforms it is part of the dpll
1383          * state. Since the general pipe state readout happens before the
1384          * encoder->get_config we so already have a valid pixel multplier on all
1385          * other platfroms.
1386          */
1387         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1388                 pipe_config->pixel_multiplier =
1389                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1390                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1391         }
1392
1393         dotclock = pipe_config->port_clock;
1394
1395         if (pipe_config->pixel_multiplier)
1396                 dotclock /= pipe_config->pixel_multiplier;
1397
1398         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1399
1400         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1401         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1402                                  &val, 1)) {
1403                 switch (val) {
1404                 case SDVO_CLOCK_RATE_MULT_1X:
1405                         encoder_pixel_multiplier = 1;
1406                         break;
1407                 case SDVO_CLOCK_RATE_MULT_2X:
1408                         encoder_pixel_multiplier = 2;
1409                         break;
1410                 case SDVO_CLOCK_RATE_MULT_4X:
1411                         encoder_pixel_multiplier = 4;
1412                         break;
1413                 }
1414         }
1415
1416         if (sdvox & HDMI_COLOR_RANGE_16_235)
1417                 pipe_config->limited_color_range = true;
1418
1419         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1420                                  &val, 1)) {
1421                 if (val == SDVO_ENCODE_HDMI)
1422                         pipe_config->has_hdmi_sink = true;
1423         }
1424
1425         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1426              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1427              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1428 }
1429
1430 static void intel_disable_sdvo(struct intel_encoder *encoder,
1431                                struct intel_crtc_state *old_crtc_state,
1432                                struct drm_connector_state *conn_state)
1433 {
1434         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1435         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1436         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1437         u32 temp;
1438
1439         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1440         if (0)
1441                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1442                                                    DRM_MODE_DPMS_OFF);
1443
1444         temp = I915_READ(intel_sdvo->sdvo_reg);
1445
1446         temp &= ~SDVO_ENABLE;
1447         intel_sdvo_write_sdvox(intel_sdvo, temp);
1448
1449         /*
1450          * HW workaround for IBX, we need to move the port
1451          * to transcoder A after disabling it to allow the
1452          * matching DP port to be enabled on transcoder A.
1453          */
1454         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1455                 /*
1456                  * We get CPU/PCH FIFO underruns on the other pipe when
1457                  * doing the workaround. Sweep them under the rug.
1458                  */
1459                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1460                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1461
1462                 temp &= ~SDVO_PIPE_B_SELECT;
1463                 temp |= SDVO_ENABLE;
1464                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1465
1466                 temp &= ~SDVO_ENABLE;
1467                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1468
1469                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1470                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1471                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1472         }
1473 }
1474
1475 static void pch_disable_sdvo(struct intel_encoder *encoder,
1476                              struct intel_crtc_state *old_crtc_state,
1477                              struct drm_connector_state *old_conn_state)
1478 {
1479 }
1480
1481 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1482                                   struct intel_crtc_state *old_crtc_state,
1483                                   struct drm_connector_state *old_conn_state)
1484 {
1485         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1486 }
1487
1488 static void intel_enable_sdvo(struct intel_encoder *encoder,
1489                               struct intel_crtc_state *pipe_config,
1490                               struct drm_connector_state *conn_state)
1491 {
1492         struct drm_device *dev = encoder->base.dev;
1493         struct drm_i915_private *dev_priv = to_i915(dev);
1494         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1495         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1496         u32 temp;
1497         bool input1, input2;
1498         int i;
1499         bool success;
1500
1501         temp = I915_READ(intel_sdvo->sdvo_reg);
1502         temp |= SDVO_ENABLE;
1503         intel_sdvo_write_sdvox(intel_sdvo, temp);
1504
1505         for (i = 0; i < 2; i++)
1506                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1507
1508         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1509         /* Warn if the device reported failure to sync.
1510          * A lot of SDVO devices fail to notify of sync, but it's
1511          * a given it the status is a success, we succeeded.
1512          */
1513         if (success && !input1) {
1514                 DRM_DEBUG_KMS("First %s output reported failure to "
1515                                 "sync\n", SDVO_NAME(intel_sdvo));
1516         }
1517
1518         if (0)
1519                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1520                                                    DRM_MODE_DPMS_ON);
1521         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1522 }
1523
1524 static enum drm_mode_status
1525 intel_sdvo_mode_valid(struct drm_connector *connector,
1526                       struct drm_display_mode *mode)
1527 {
1528         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1529         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1530
1531         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1532                 return MODE_NO_DBLESCAN;
1533
1534         if (intel_sdvo->pixel_clock_min > mode->clock)
1535                 return MODE_CLOCK_LOW;
1536
1537         if (intel_sdvo->pixel_clock_max < mode->clock)
1538                 return MODE_CLOCK_HIGH;
1539
1540         if (mode->clock > max_dotclk)
1541                 return MODE_CLOCK_HIGH;
1542
1543         if (intel_sdvo->is_lvds) {
1544                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1545                         return MODE_PANEL;
1546
1547                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1548                         return MODE_PANEL;
1549         }
1550
1551         return MODE_OK;
1552 }
1553
1554 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1555 {
1556         BUILD_BUG_ON(sizeof(*caps) != 8);
1557         if (!intel_sdvo_get_value(intel_sdvo,
1558                                   SDVO_CMD_GET_DEVICE_CAPS,
1559                                   caps, sizeof(*caps)))
1560                 return false;
1561
1562         DRM_DEBUG_KMS("SDVO capabilities:\n"
1563                       "  vendor_id: %d\n"
1564                       "  device_id: %d\n"
1565                       "  device_rev_id: %d\n"
1566                       "  sdvo_version_major: %d\n"
1567                       "  sdvo_version_minor: %d\n"
1568                       "  sdvo_inputs_mask: %d\n"
1569                       "  smooth_scaling: %d\n"
1570                       "  sharp_scaling: %d\n"
1571                       "  up_scaling: %d\n"
1572                       "  down_scaling: %d\n"
1573                       "  stall_support: %d\n"
1574                       "  output_flags: %d\n",
1575                       caps->vendor_id,
1576                       caps->device_id,
1577                       caps->device_rev_id,
1578                       caps->sdvo_version_major,
1579                       caps->sdvo_version_minor,
1580                       caps->sdvo_inputs_mask,
1581                       caps->smooth_scaling,
1582                       caps->sharp_scaling,
1583                       caps->up_scaling,
1584                       caps->down_scaling,
1585                       caps->stall_support,
1586                       caps->output_flags);
1587
1588         return true;
1589 }
1590
1591 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1592 {
1593         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1594         uint16_t hotplug;
1595
1596         if (!I915_HAS_HOTPLUG(dev_priv))
1597                 return 0;
1598
1599         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1600          * on the line. */
1601         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1602                 return 0;
1603
1604         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1605                                         &hotplug, sizeof(hotplug)))
1606                 return 0;
1607
1608         return hotplug;
1609 }
1610
1611 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1612 {
1613         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1614
1615         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1616                         &intel_sdvo->hotplug_active, 2);
1617 }
1618
1619 static bool
1620 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1621 {
1622         /* Is there more than one type of output? */
1623         return hweight16(intel_sdvo->caps.output_flags) > 1;
1624 }
1625
1626 static struct edid *
1627 intel_sdvo_get_edid(struct drm_connector *connector)
1628 {
1629         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1630         return drm_get_edid(connector, &sdvo->ddc);
1631 }
1632
1633 /* Mac mini hack -- use the same DDC as the analog connector */
1634 static struct edid *
1635 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1636 {
1637         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1638
1639         return drm_get_edid(connector,
1640                             intel_gmbus_get_adapter(dev_priv,
1641                                                     dev_priv->vbt.crt_ddc_pin));
1642 }
1643
1644 static enum drm_connector_status
1645 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1646 {
1647         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1648         enum drm_connector_status status;
1649         struct edid *edid;
1650
1651         edid = intel_sdvo_get_edid(connector);
1652
1653         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1654                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1655
1656                 /*
1657                  * Don't use the 1 as the argument of DDC bus switch to get
1658                  * the EDID. It is used for SDVO SPD ROM.
1659                  */
1660                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1661                         intel_sdvo->ddc_bus = ddc;
1662                         edid = intel_sdvo_get_edid(connector);
1663                         if (edid)
1664                                 break;
1665                 }
1666                 /*
1667                  * If we found the EDID on the other bus,
1668                  * assume that is the correct DDC bus.
1669                  */
1670                 if (edid == NULL)
1671                         intel_sdvo->ddc_bus = saved_ddc;
1672         }
1673
1674         /*
1675          * When there is no edid and no monitor is connected with VGA
1676          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1677          */
1678         if (edid == NULL)
1679                 edid = intel_sdvo_get_analog_edid(connector);
1680
1681         status = connector_status_unknown;
1682         if (edid != NULL) {
1683                 /* DDC bus is shared, match EDID to connector type */
1684                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1685                         status = connector_status_connected;
1686                         if (intel_sdvo->is_hdmi) {
1687                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1688                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1689                                 intel_sdvo->rgb_quant_range_selectable =
1690                                         drm_rgb_quant_range_selectable(edid);
1691                         }
1692                 } else
1693                         status = connector_status_disconnected;
1694                 kfree(edid);
1695         }
1696
1697         if (status == connector_status_connected) {
1698                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1699                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1700                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1701         }
1702
1703         return status;
1704 }
1705
1706 static bool
1707 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1708                                   struct edid *edid)
1709 {
1710         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1711         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1712
1713         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1714                       connector_is_digital, monitor_is_digital);
1715         return connector_is_digital == monitor_is_digital;
1716 }
1717
1718 static enum drm_connector_status
1719 intel_sdvo_detect(struct drm_connector *connector, bool force)
1720 {
1721         uint16_t response;
1722         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1723         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1724         enum drm_connector_status ret;
1725
1726         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1727                       connector->base.id, connector->name);
1728
1729         if (!intel_sdvo_get_value(intel_sdvo,
1730                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1731                                   &response, 2))
1732                 return connector_status_unknown;
1733
1734         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1735                       response & 0xff, response >> 8,
1736                       intel_sdvo_connector->output_flag);
1737
1738         if (response == 0)
1739                 return connector_status_disconnected;
1740
1741         intel_sdvo->attached_output = response;
1742
1743         intel_sdvo->has_hdmi_monitor = false;
1744         intel_sdvo->has_hdmi_audio = false;
1745         intel_sdvo->rgb_quant_range_selectable = false;
1746
1747         if ((intel_sdvo_connector->output_flag & response) == 0)
1748                 ret = connector_status_disconnected;
1749         else if (IS_TMDS(intel_sdvo_connector))
1750                 ret = intel_sdvo_tmds_sink_detect(connector);
1751         else {
1752                 struct edid *edid;
1753
1754                 /* if we have an edid check it matches the connection */
1755                 edid = intel_sdvo_get_edid(connector);
1756                 if (edid == NULL)
1757                         edid = intel_sdvo_get_analog_edid(connector);
1758                 if (edid != NULL) {
1759                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1760                                                               edid))
1761                                 ret = connector_status_connected;
1762                         else
1763                                 ret = connector_status_disconnected;
1764
1765                         kfree(edid);
1766                 } else
1767                         ret = connector_status_connected;
1768         }
1769
1770         /* May update encoder flag for like clock for SDVO TV, etc.*/
1771         if (ret == connector_status_connected) {
1772                 intel_sdvo->is_tv = false;
1773                 intel_sdvo->is_lvds = false;
1774
1775                 if (response & SDVO_TV_MASK)
1776                         intel_sdvo->is_tv = true;
1777                 if (response & SDVO_LVDS_MASK)
1778                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1779         }
1780
1781         return ret;
1782 }
1783
1784 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1785 {
1786         struct edid *edid;
1787
1788         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1789                       connector->base.id, connector->name);
1790
1791         /* set the bus switch and get the modes */
1792         edid = intel_sdvo_get_edid(connector);
1793
1794         /*
1795          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1796          * link between analog and digital outputs. So, if the regular SDVO
1797          * DDC fails, check to see if the analog output is disconnected, in
1798          * which case we'll look there for the digital DDC data.
1799          */
1800         if (edid == NULL)
1801                 edid = intel_sdvo_get_analog_edid(connector);
1802
1803         if (edid != NULL) {
1804                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1805                                                       edid)) {
1806                         drm_mode_connector_update_edid_property(connector, edid);
1807                         drm_add_edid_modes(connector, edid);
1808                 }
1809
1810                 kfree(edid);
1811         }
1812 }
1813
1814 /*
1815  * Set of SDVO TV modes.
1816  * Note!  This is in reply order (see loop in get_tv_modes).
1817  * XXX: all 60Hz refresh?
1818  */
1819 static const struct drm_display_mode sdvo_tv_modes[] = {
1820         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1821                    416, 0, 200, 201, 232, 233, 0,
1822                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1823         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1824                    416, 0, 240, 241, 272, 273, 0,
1825                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1826         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1827                    496, 0, 300, 301, 332, 333, 0,
1828                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1829         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1830                    736, 0, 350, 351, 382, 383, 0,
1831                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1832         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1833                    736, 0, 400, 401, 432, 433, 0,
1834                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1835         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1836                    736, 0, 480, 481, 512, 513, 0,
1837                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1838         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1839                    800, 0, 480, 481, 512, 513, 0,
1840                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1841         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1842                    800, 0, 576, 577, 608, 609, 0,
1843                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1844         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1845                    816, 0, 350, 351, 382, 383, 0,
1846                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1847         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1848                    816, 0, 400, 401, 432, 433, 0,
1849                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1850         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1851                    816, 0, 480, 481, 512, 513, 0,
1852                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1853         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1854                    816, 0, 540, 541, 572, 573, 0,
1855                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1856         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1857                    816, 0, 576, 577, 608, 609, 0,
1858                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1859         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1860                    864, 0, 576, 577, 608, 609, 0,
1861                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1862         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1863                    896, 0, 600, 601, 632, 633, 0,
1864                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1865         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1866                    928, 0, 624, 625, 656, 657, 0,
1867                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1868         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1869                    1016, 0, 766, 767, 798, 799, 0,
1870                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1871         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1872                    1120, 0, 768, 769, 800, 801, 0,
1873                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1874         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1875                    1376, 0, 1024, 1025, 1056, 1057, 0,
1876                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1877 };
1878
1879 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1880 {
1881         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1882         struct intel_sdvo_sdtv_resolution_request tv_res;
1883         uint32_t reply = 0, format_map = 0;
1884         int i;
1885
1886         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1887                       connector->base.id, connector->name);
1888
1889         /* Read the list of supported input resolutions for the selected TV
1890          * format.
1891          */
1892         format_map = 1 << intel_sdvo->tv_format_index;
1893         memcpy(&tv_res, &format_map,
1894                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1895
1896         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1897                 return;
1898
1899         BUILD_BUG_ON(sizeof(tv_res) != 3);
1900         if (!intel_sdvo_write_cmd(intel_sdvo,
1901                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1902                                   &tv_res, sizeof(tv_res)))
1903                 return;
1904         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1905                 return;
1906
1907         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1908                 if (reply & (1 << i)) {
1909                         struct drm_display_mode *nmode;
1910                         nmode = drm_mode_duplicate(connector->dev,
1911                                                    &sdvo_tv_modes[i]);
1912                         if (nmode)
1913                                 drm_mode_probed_add(connector, nmode);
1914                 }
1915 }
1916
1917 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1918 {
1919         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1920         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1921         struct drm_display_mode *newmode;
1922
1923         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1924                       connector->base.id, connector->name);
1925
1926         /*
1927          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1928          * SDVO->LVDS transcoders can't cope with the EDID mode.
1929          */
1930         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1931                 newmode = drm_mode_duplicate(connector->dev,
1932                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1933                 if (newmode != NULL) {
1934                         /* Guarantee the mode is preferred */
1935                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1936                                          DRM_MODE_TYPE_DRIVER);
1937                         drm_mode_probed_add(connector, newmode);
1938                 }
1939         }
1940
1941         /*
1942          * Attempt to get the mode list from DDC.
1943          * Assume that the preferred modes are
1944          * arranged in priority order.
1945          */
1946         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1947
1948         list_for_each_entry(newmode, &connector->probed_modes, head) {
1949                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1950                         intel_sdvo->sdvo_lvds_fixed_mode =
1951                                 drm_mode_duplicate(connector->dev, newmode);
1952
1953                         intel_sdvo->is_lvds = true;
1954                         break;
1955                 }
1956         }
1957 }
1958
1959 static int intel_sdvo_get_modes(struct drm_connector *connector)
1960 {
1961         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1962
1963         if (IS_TV(intel_sdvo_connector))
1964                 intel_sdvo_get_tv_modes(connector);
1965         else if (IS_LVDS(intel_sdvo_connector))
1966                 intel_sdvo_get_lvds_modes(connector);
1967         else
1968                 intel_sdvo_get_ddc_modes(connector);
1969
1970         return !list_empty(&connector->probed_modes);
1971 }
1972
1973 static void intel_sdvo_destroy(struct drm_connector *connector)
1974 {
1975         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1976
1977         drm_connector_cleanup(connector);
1978         kfree(intel_sdvo_connector);
1979 }
1980
1981 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1982 {
1983         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1984         struct edid *edid;
1985         bool has_audio = false;
1986
1987         if (!intel_sdvo->is_hdmi)
1988                 return false;
1989
1990         edid = intel_sdvo_get_edid(connector);
1991         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1992                 has_audio = drm_detect_monitor_audio(edid);
1993         kfree(edid);
1994
1995         return has_audio;
1996 }
1997
1998 static int
1999 intel_sdvo_set_property(struct drm_connector *connector,
2000                         struct drm_property *property,
2001                         uint64_t val)
2002 {
2003         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2004         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2005         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2006         uint16_t temp_value;
2007         uint8_t cmd;
2008         int ret;
2009
2010         ret = drm_object_property_set_value(&connector->base, property, val);
2011         if (ret)
2012                 return ret;
2013
2014         if (property == dev_priv->force_audio_property) {
2015                 int i = val;
2016                 bool has_audio;
2017
2018                 if (i == intel_sdvo_connector->force_audio)
2019                         return 0;
2020
2021                 intel_sdvo_connector->force_audio = i;
2022
2023                 if (i == HDMI_AUDIO_AUTO)
2024                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2025                 else
2026                         has_audio = (i == HDMI_AUDIO_ON);
2027
2028                 if (has_audio == intel_sdvo->has_hdmi_audio)
2029                         return 0;
2030
2031                 intel_sdvo->has_hdmi_audio = has_audio;
2032                 goto done;
2033         }
2034
2035         if (property == dev_priv->broadcast_rgb_property) {
2036                 bool old_auto = intel_sdvo->color_range_auto;
2037                 uint32_t old_range = intel_sdvo->color_range;
2038
2039                 switch (val) {
2040                 case INTEL_BROADCAST_RGB_AUTO:
2041                         intel_sdvo->color_range_auto = true;
2042                         break;
2043                 case INTEL_BROADCAST_RGB_FULL:
2044                         intel_sdvo->color_range_auto = false;
2045                         intel_sdvo->color_range = 0;
2046                         break;
2047                 case INTEL_BROADCAST_RGB_LIMITED:
2048                         intel_sdvo->color_range_auto = false;
2049                         /* FIXME: this bit is only valid when using TMDS
2050                          * encoding and 8 bit per color mode. */
2051                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2052                         break;
2053                 default:
2054                         return -EINVAL;
2055                 }
2056
2057                 if (old_auto == intel_sdvo->color_range_auto &&
2058                     old_range == intel_sdvo->color_range)
2059                         return 0;
2060
2061                 goto done;
2062         }
2063
2064         if (property == connector->dev->mode_config.aspect_ratio_property) {
2065                 connector->state->picture_aspect_ratio = val;
2066                 goto done;
2067         }
2068
2069 #define CHECK_PROPERTY(name, NAME) \
2070         if (intel_sdvo_connector->name == property) { \
2071                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2072                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2073                 cmd = SDVO_CMD_SET_##NAME; \
2074                 intel_sdvo_connector->cur_##name = temp_value; \
2075                 goto set_value; \
2076         }
2077
2078         if (property == intel_sdvo_connector->tv_format) {
2079                 if (val >= TV_FORMAT_NUM)
2080                         return -EINVAL;
2081
2082                 if (intel_sdvo->tv_format_index ==
2083                     intel_sdvo_connector->tv_format_supported[val])
2084                         return 0;
2085
2086                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2087                 goto done;
2088         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2089                 temp_value = val;
2090                 if (intel_sdvo_connector->left == property) {
2091                         drm_object_property_set_value(&connector->base,
2092                                                          intel_sdvo_connector->right, val);
2093                         if (intel_sdvo_connector->left_margin == temp_value)
2094                                 return 0;
2095
2096                         intel_sdvo_connector->left_margin = temp_value;
2097                         intel_sdvo_connector->right_margin = temp_value;
2098                         temp_value = intel_sdvo_connector->max_hscan -
2099                                 intel_sdvo_connector->left_margin;
2100                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2101                         goto set_value;
2102                 } else if (intel_sdvo_connector->right == property) {
2103                         drm_object_property_set_value(&connector->base,
2104                                                          intel_sdvo_connector->left, val);
2105                         if (intel_sdvo_connector->right_margin == temp_value)
2106                                 return 0;
2107
2108                         intel_sdvo_connector->left_margin = temp_value;
2109                         intel_sdvo_connector->right_margin = temp_value;
2110                         temp_value = intel_sdvo_connector->max_hscan -
2111                                 intel_sdvo_connector->left_margin;
2112                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2113                         goto set_value;
2114                 } else if (intel_sdvo_connector->top == property) {
2115                         drm_object_property_set_value(&connector->base,
2116                                                          intel_sdvo_connector->bottom, val);
2117                         if (intel_sdvo_connector->top_margin == temp_value)
2118                                 return 0;
2119
2120                         intel_sdvo_connector->top_margin = temp_value;
2121                         intel_sdvo_connector->bottom_margin = temp_value;
2122                         temp_value = intel_sdvo_connector->max_vscan -
2123                                 intel_sdvo_connector->top_margin;
2124                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2125                         goto set_value;
2126                 } else if (intel_sdvo_connector->bottom == property) {
2127                         drm_object_property_set_value(&connector->base,
2128                                                          intel_sdvo_connector->top, val);
2129                         if (intel_sdvo_connector->bottom_margin == temp_value)
2130                                 return 0;
2131
2132                         intel_sdvo_connector->top_margin = temp_value;
2133                         intel_sdvo_connector->bottom_margin = temp_value;
2134                         temp_value = intel_sdvo_connector->max_vscan -
2135                                 intel_sdvo_connector->top_margin;
2136                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2137                         goto set_value;
2138                 }
2139                 CHECK_PROPERTY(hpos, HPOS)
2140                 CHECK_PROPERTY(vpos, VPOS)
2141                 CHECK_PROPERTY(saturation, SATURATION)
2142                 CHECK_PROPERTY(contrast, CONTRAST)
2143                 CHECK_PROPERTY(hue, HUE)
2144                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2145                 CHECK_PROPERTY(sharpness, SHARPNESS)
2146                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2147                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2148                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2149                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2150                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2151                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2152         }
2153
2154         return -EINVAL; /* unknown property */
2155
2156 set_value:
2157         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2158                 return -EIO;
2159
2160
2161 done:
2162         if (intel_sdvo->base.base.crtc)
2163                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2164
2165         return 0;
2166 #undef CHECK_PROPERTY
2167 }
2168
2169 static int
2170 intel_sdvo_connector_register(struct drm_connector *connector)
2171 {
2172         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2173         int ret;
2174
2175         ret = intel_connector_register(connector);
2176         if (ret)
2177                 return ret;
2178
2179         return sysfs_create_link(&connector->kdev->kobj,
2180                                  &sdvo->ddc.dev.kobj,
2181                                  sdvo->ddc.dev.kobj.name);
2182 }
2183
2184 static void
2185 intel_sdvo_connector_unregister(struct drm_connector *connector)
2186 {
2187         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2188
2189         sysfs_remove_link(&connector->kdev->kobj,
2190                           sdvo->ddc.dev.kobj.name);
2191         intel_connector_unregister(connector);
2192 }
2193
2194 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2195         .dpms = drm_atomic_helper_connector_dpms,
2196         .detect = intel_sdvo_detect,
2197         .fill_modes = drm_helper_probe_single_connector_modes,
2198         .set_property = intel_sdvo_set_property,
2199         .atomic_get_property = intel_connector_atomic_get_property,
2200         .late_register = intel_sdvo_connector_register,
2201         .early_unregister = intel_sdvo_connector_unregister,
2202         .destroy = intel_sdvo_destroy,
2203         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2204         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
2205 };
2206
2207 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2208         .get_modes = intel_sdvo_get_modes,
2209         .mode_valid = intel_sdvo_mode_valid,
2210 };
2211
2212 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2213 {
2214         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2215
2216         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2217                 drm_mode_destroy(encoder->dev,
2218                                  intel_sdvo->sdvo_lvds_fixed_mode);
2219
2220         i2c_del_adapter(&intel_sdvo->ddc);
2221         intel_encoder_destroy(encoder);
2222 }
2223
2224 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2225         .destroy = intel_sdvo_enc_destroy,
2226 };
2227
2228 static void
2229 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2230 {
2231         uint16_t mask = 0;
2232         unsigned int num_bits;
2233
2234         /* Make a mask of outputs less than or equal to our own priority in the
2235          * list.
2236          */
2237         switch (sdvo->controlled_output) {
2238         case SDVO_OUTPUT_LVDS1:
2239                 mask |= SDVO_OUTPUT_LVDS1;
2240         case SDVO_OUTPUT_LVDS0:
2241                 mask |= SDVO_OUTPUT_LVDS0;
2242         case SDVO_OUTPUT_TMDS1:
2243                 mask |= SDVO_OUTPUT_TMDS1;
2244         case SDVO_OUTPUT_TMDS0:
2245                 mask |= SDVO_OUTPUT_TMDS0;
2246         case SDVO_OUTPUT_RGB1:
2247                 mask |= SDVO_OUTPUT_RGB1;
2248         case SDVO_OUTPUT_RGB0:
2249                 mask |= SDVO_OUTPUT_RGB0;
2250                 break;
2251         }
2252
2253         /* Count bits to find what number we are in the priority list. */
2254         mask &= sdvo->caps.output_flags;
2255         num_bits = hweight16(mask);
2256         /* If more than 3 outputs, default to DDC bus 3 for now. */
2257         if (num_bits > 3)
2258                 num_bits = 3;
2259
2260         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2261         sdvo->ddc_bus = 1 << num_bits;
2262 }
2263
2264 /**
2265  * Choose the appropriate DDC bus for control bus switch command for this
2266  * SDVO output based on the controlled output.
2267  *
2268  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2269  * outputs, then LVDS outputs.
2270  */
2271 static void
2272 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2273                           struct intel_sdvo *sdvo)
2274 {
2275         struct sdvo_device_mapping *mapping;
2276
2277         if (sdvo->port == PORT_B)
2278                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2279         else
2280                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2281
2282         if (mapping->initialized)
2283                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2284         else
2285                 intel_sdvo_guess_ddc_bus(sdvo);
2286 }
2287
2288 static void
2289 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2290                           struct intel_sdvo *sdvo)
2291 {
2292         struct sdvo_device_mapping *mapping;
2293         u8 pin;
2294
2295         if (sdvo->port == PORT_B)
2296                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2297         else
2298                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2299
2300         if (mapping->initialized &&
2301             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2302                 pin = mapping->i2c_pin;
2303         else
2304                 pin = GMBUS_PIN_DPB;
2305
2306         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2307
2308         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2309          * our code totally fails once we start using gmbus. Hence fall back to
2310          * bit banging for now. */
2311         intel_gmbus_force_bit(sdvo->i2c, true);
2312 }
2313
2314 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2315 static void
2316 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2317 {
2318         intel_gmbus_force_bit(sdvo->i2c, false);
2319 }
2320
2321 static bool
2322 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2323 {
2324         return intel_sdvo_check_supp_encode(intel_sdvo);
2325 }
2326
2327 static u8
2328 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2329                           struct intel_sdvo *sdvo)
2330 {
2331         struct sdvo_device_mapping *my_mapping, *other_mapping;
2332
2333         if (sdvo->port == PORT_B) {
2334                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2335                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2336         } else {
2337                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2338                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2339         }
2340
2341         /* If the BIOS described our SDVO device, take advantage of it. */
2342         if (my_mapping->slave_addr)
2343                 return my_mapping->slave_addr;
2344
2345         /* If the BIOS only described a different SDVO device, use the
2346          * address that it isn't using.
2347          */
2348         if (other_mapping->slave_addr) {
2349                 if (other_mapping->slave_addr == 0x70)
2350                         return 0x72;
2351                 else
2352                         return 0x70;
2353         }
2354
2355         /* No SDVO device info is found for another DVO port,
2356          * so use mapping assumption we had before BIOS parsing.
2357          */
2358         if (sdvo->port == PORT_B)
2359                 return 0x70;
2360         else
2361                 return 0x72;
2362 }
2363
2364 static int
2365 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2366                           struct intel_sdvo *encoder)
2367 {
2368         struct drm_connector *drm_connector;
2369         int ret;
2370
2371         drm_connector = &connector->base.base;
2372         ret = drm_connector_init(encoder->base.base.dev,
2373                            drm_connector,
2374                            &intel_sdvo_connector_funcs,
2375                            connector->base.base.connector_type);
2376         if (ret < 0)
2377                 return ret;
2378
2379         drm_connector_helper_add(drm_connector,
2380                                  &intel_sdvo_connector_helper_funcs);
2381
2382         connector->base.base.interlace_allowed = 1;
2383         connector->base.base.doublescan_allowed = 0;
2384         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2385         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2386
2387         intel_connector_attach_encoder(&connector->base, &encoder->base);
2388
2389         return 0;
2390 }
2391
2392 static void
2393 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2394                                struct intel_sdvo_connector *connector)
2395 {
2396         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2397
2398         intel_attach_force_audio_property(&connector->base.base);
2399         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2400                 intel_attach_broadcast_rgb_property(&connector->base.base);
2401                 intel_sdvo->color_range_auto = true;
2402         }
2403         intel_attach_aspect_ratio_property(&connector->base.base);
2404         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2405 }
2406
2407 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2408 {
2409         struct intel_sdvo_connector *sdvo_connector;
2410
2411         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2412         if (!sdvo_connector)
2413                 return NULL;
2414
2415         if (intel_connector_init(&sdvo_connector->base) < 0) {
2416                 kfree(sdvo_connector);
2417                 return NULL;
2418         }
2419
2420         return sdvo_connector;
2421 }
2422
2423 static bool
2424 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2425 {
2426         struct drm_encoder *encoder = &intel_sdvo->base.base;
2427         struct drm_connector *connector;
2428         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2429         struct intel_connector *intel_connector;
2430         struct intel_sdvo_connector *intel_sdvo_connector;
2431
2432         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2433
2434         intel_sdvo_connector = intel_sdvo_connector_alloc();
2435         if (!intel_sdvo_connector)
2436                 return false;
2437
2438         if (device == 0) {
2439                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2440                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2441         } else if (device == 1) {
2442                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2443                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2444         }
2445
2446         intel_connector = &intel_sdvo_connector->base;
2447         connector = &intel_connector->base;
2448         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2449                 intel_sdvo_connector->output_flag) {
2450                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2451                 /* Some SDVO devices have one-shot hotplug interrupts.
2452                  * Ensure that they get re-enabled when an interrupt happens.
2453                  */
2454                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2455                 intel_sdvo_enable_hotplug(intel_encoder);
2456         } else {
2457                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2458         }
2459         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2460         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2461
2462         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2463                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2464                 intel_sdvo->is_hdmi = true;
2465         }
2466
2467         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2468                 kfree(intel_sdvo_connector);
2469                 return false;
2470         }
2471
2472         if (intel_sdvo->is_hdmi)
2473                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2474
2475         return true;
2476 }
2477
2478 static bool
2479 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2480 {
2481         struct drm_encoder *encoder = &intel_sdvo->base.base;
2482         struct drm_connector *connector;
2483         struct intel_connector *intel_connector;
2484         struct intel_sdvo_connector *intel_sdvo_connector;
2485
2486         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2487
2488         intel_sdvo_connector = intel_sdvo_connector_alloc();
2489         if (!intel_sdvo_connector)
2490                 return false;
2491
2492         intel_connector = &intel_sdvo_connector->base;
2493         connector = &intel_connector->base;
2494         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2495         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2496
2497         intel_sdvo->controlled_output |= type;
2498         intel_sdvo_connector->output_flag = type;
2499
2500         intel_sdvo->is_tv = true;
2501
2502         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2503                 kfree(intel_sdvo_connector);
2504                 return false;
2505         }
2506
2507         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2508                 goto err;
2509
2510         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2511                 goto err;
2512
2513         return true;
2514
2515 err:
2516         intel_sdvo_destroy(connector);
2517         return false;
2518 }
2519
2520 static bool
2521 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2522 {
2523         struct drm_encoder *encoder = &intel_sdvo->base.base;
2524         struct drm_connector *connector;
2525         struct intel_connector *intel_connector;
2526         struct intel_sdvo_connector *intel_sdvo_connector;
2527
2528         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2529
2530         intel_sdvo_connector = intel_sdvo_connector_alloc();
2531         if (!intel_sdvo_connector)
2532                 return false;
2533
2534         intel_connector = &intel_sdvo_connector->base;
2535         connector = &intel_connector->base;
2536         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2537         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2538         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2539
2540         if (device == 0) {
2541                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2542                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2543         } else if (device == 1) {
2544                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2545                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2546         }
2547
2548         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2549                 kfree(intel_sdvo_connector);
2550                 return false;
2551         }
2552
2553         return true;
2554 }
2555
2556 static bool
2557 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2558 {
2559         struct drm_encoder *encoder = &intel_sdvo->base.base;
2560         struct drm_connector *connector;
2561         struct intel_connector *intel_connector;
2562         struct intel_sdvo_connector *intel_sdvo_connector;
2563
2564         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2565
2566         intel_sdvo_connector = intel_sdvo_connector_alloc();
2567         if (!intel_sdvo_connector)
2568                 return false;
2569
2570         intel_connector = &intel_sdvo_connector->base;
2571         connector = &intel_connector->base;
2572         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2573         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2574
2575         if (device == 0) {
2576                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2577                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2578         } else if (device == 1) {
2579                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2580                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2581         }
2582
2583         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2584                 kfree(intel_sdvo_connector);
2585                 return false;
2586         }
2587
2588         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2589                 goto err;
2590
2591         return true;
2592
2593 err:
2594         intel_sdvo_destroy(connector);
2595         return false;
2596 }
2597
2598 static bool
2599 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2600 {
2601         intel_sdvo->is_tv = false;
2602         intel_sdvo->is_lvds = false;
2603
2604         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2605
2606         if (flags & SDVO_OUTPUT_TMDS0)
2607                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2608                         return false;
2609
2610         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2611                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2612                         return false;
2613
2614         /* TV has no XXX1 function block */
2615         if (flags & SDVO_OUTPUT_SVID0)
2616                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2617                         return false;
2618
2619         if (flags & SDVO_OUTPUT_CVBS0)
2620                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2621                         return false;
2622
2623         if (flags & SDVO_OUTPUT_YPRPB0)
2624                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2625                         return false;
2626
2627         if (flags & SDVO_OUTPUT_RGB0)
2628                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2629                         return false;
2630
2631         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2632                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2633                         return false;
2634
2635         if (flags & SDVO_OUTPUT_LVDS0)
2636                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2637                         return false;
2638
2639         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2640                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2641                         return false;
2642
2643         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2644                 unsigned char bytes[2];
2645
2646                 intel_sdvo->controlled_output = 0;
2647                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2648                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2649                               SDVO_NAME(intel_sdvo),
2650                               bytes[0], bytes[1]);
2651                 return false;
2652         }
2653         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2654
2655         return true;
2656 }
2657
2658 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2659 {
2660         struct drm_device *dev = intel_sdvo->base.base.dev;
2661         struct drm_connector *connector, *tmp;
2662
2663         list_for_each_entry_safe(connector, tmp,
2664                                  &dev->mode_config.connector_list, head) {
2665                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2666                         drm_connector_unregister(connector);
2667                         intel_sdvo_destroy(connector);
2668                 }
2669         }
2670 }
2671
2672 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2673                                           struct intel_sdvo_connector *intel_sdvo_connector,
2674                                           int type)
2675 {
2676         struct drm_device *dev = intel_sdvo->base.base.dev;
2677         struct intel_sdvo_tv_format format;
2678         uint32_t format_map, i;
2679
2680         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2681                 return false;
2682
2683         BUILD_BUG_ON(sizeof(format) != 6);
2684         if (!intel_sdvo_get_value(intel_sdvo,
2685                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2686                                   &format, sizeof(format)))
2687                 return false;
2688
2689         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2690
2691         if (format_map == 0)
2692                 return false;
2693
2694         intel_sdvo_connector->format_supported_num = 0;
2695         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2696                 if (format_map & (1 << i))
2697                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2698
2699
2700         intel_sdvo_connector->tv_format =
2701                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2702                                             "mode", intel_sdvo_connector->format_supported_num);
2703         if (!intel_sdvo_connector->tv_format)
2704                 return false;
2705
2706         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2707                 drm_property_add_enum(
2708                                 intel_sdvo_connector->tv_format, i,
2709                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2710
2711         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2712         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2713                                       intel_sdvo_connector->tv_format, 0);
2714         return true;
2715
2716 }
2717
2718 #define ENHANCEMENT(name, NAME) do { \
2719         if (enhancements.name) { \
2720                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2721                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2722                         return false; \
2723                 intel_sdvo_connector->max_##name = data_value[0]; \
2724                 intel_sdvo_connector->cur_##name = response; \
2725                 intel_sdvo_connector->name = \
2726                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2727                 if (!intel_sdvo_connector->name) return false; \
2728                 drm_object_attach_property(&connector->base, \
2729                                               intel_sdvo_connector->name, \
2730                                               intel_sdvo_connector->cur_##name); \
2731                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2732                               data_value[0], data_value[1], response); \
2733         } \
2734 } while (0)
2735
2736 static bool
2737 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2738                                       struct intel_sdvo_connector *intel_sdvo_connector,
2739                                       struct intel_sdvo_enhancements_reply enhancements)
2740 {
2741         struct drm_device *dev = intel_sdvo->base.base.dev;
2742         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2743         uint16_t response, data_value[2];
2744
2745         /* when horizontal overscan is supported, Add the left/right  property */
2746         if (enhancements.overscan_h) {
2747                 if (!intel_sdvo_get_value(intel_sdvo,
2748                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2749                                           &data_value, 4))
2750                         return false;
2751
2752                 if (!intel_sdvo_get_value(intel_sdvo,
2753                                           SDVO_CMD_GET_OVERSCAN_H,
2754                                           &response, 2))
2755                         return false;
2756
2757                 intel_sdvo_connector->max_hscan = data_value[0];
2758                 intel_sdvo_connector->left_margin = data_value[0] - response;
2759                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2760                 intel_sdvo_connector->left =
2761                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2762                 if (!intel_sdvo_connector->left)
2763                         return false;
2764
2765                 drm_object_attach_property(&connector->base,
2766                                               intel_sdvo_connector->left,
2767                                               intel_sdvo_connector->left_margin);
2768
2769                 intel_sdvo_connector->right =
2770                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2771                 if (!intel_sdvo_connector->right)
2772                         return false;
2773
2774                 drm_object_attach_property(&connector->base,
2775                                               intel_sdvo_connector->right,
2776                                               intel_sdvo_connector->right_margin);
2777                 DRM_DEBUG_KMS("h_overscan: max %d, "
2778                               "default %d, current %d\n",
2779                               data_value[0], data_value[1], response);
2780         }
2781
2782         if (enhancements.overscan_v) {
2783                 if (!intel_sdvo_get_value(intel_sdvo,
2784                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2785                                           &data_value, 4))
2786                         return false;
2787
2788                 if (!intel_sdvo_get_value(intel_sdvo,
2789                                           SDVO_CMD_GET_OVERSCAN_V,
2790                                           &response, 2))
2791                         return false;
2792
2793                 intel_sdvo_connector->max_vscan = data_value[0];
2794                 intel_sdvo_connector->top_margin = data_value[0] - response;
2795                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2796                 intel_sdvo_connector->top =
2797                         drm_property_create_range(dev, 0,
2798                                             "top_margin", 0, data_value[0]);
2799                 if (!intel_sdvo_connector->top)
2800                         return false;
2801
2802                 drm_object_attach_property(&connector->base,
2803                                               intel_sdvo_connector->top,
2804                                               intel_sdvo_connector->top_margin);
2805
2806                 intel_sdvo_connector->bottom =
2807                         drm_property_create_range(dev, 0,
2808                                             "bottom_margin", 0, data_value[0]);
2809                 if (!intel_sdvo_connector->bottom)
2810                         return false;
2811
2812                 drm_object_attach_property(&connector->base,
2813                                               intel_sdvo_connector->bottom,
2814                                               intel_sdvo_connector->bottom_margin);
2815                 DRM_DEBUG_KMS("v_overscan: max %d, "
2816                               "default %d, current %d\n",
2817                               data_value[0], data_value[1], response);
2818         }
2819
2820         ENHANCEMENT(hpos, HPOS);
2821         ENHANCEMENT(vpos, VPOS);
2822         ENHANCEMENT(saturation, SATURATION);
2823         ENHANCEMENT(contrast, CONTRAST);
2824         ENHANCEMENT(hue, HUE);
2825         ENHANCEMENT(sharpness, SHARPNESS);
2826         ENHANCEMENT(brightness, BRIGHTNESS);
2827         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2828         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2829         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2830         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2831         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2832
2833         if (enhancements.dot_crawl) {
2834                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2835                         return false;
2836
2837                 intel_sdvo_connector->max_dot_crawl = 1;
2838                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2839                 intel_sdvo_connector->dot_crawl =
2840                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2841                 if (!intel_sdvo_connector->dot_crawl)
2842                         return false;
2843
2844                 drm_object_attach_property(&connector->base,
2845                                               intel_sdvo_connector->dot_crawl,
2846                                               intel_sdvo_connector->cur_dot_crawl);
2847                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2848         }
2849
2850         return true;
2851 }
2852
2853 static bool
2854 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2855                                         struct intel_sdvo_connector *intel_sdvo_connector,
2856                                         struct intel_sdvo_enhancements_reply enhancements)
2857 {
2858         struct drm_device *dev = intel_sdvo->base.base.dev;
2859         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2860         uint16_t response, data_value[2];
2861
2862         ENHANCEMENT(brightness, BRIGHTNESS);
2863
2864         return true;
2865 }
2866 #undef ENHANCEMENT
2867
2868 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2869                                                struct intel_sdvo_connector *intel_sdvo_connector)
2870 {
2871         union {
2872                 struct intel_sdvo_enhancements_reply reply;
2873                 uint16_t response;
2874         } enhancements;
2875
2876         BUILD_BUG_ON(sizeof(enhancements) != 2);
2877
2878         if (!intel_sdvo_get_value(intel_sdvo,
2879                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2880                                   &enhancements, sizeof(enhancements)) ||
2881             enhancements.response == 0) {
2882                 DRM_DEBUG_KMS("No enhancement is supported\n");
2883                 return true;
2884         }
2885
2886         if (IS_TV(intel_sdvo_connector))
2887                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2888         else if (IS_LVDS(intel_sdvo_connector))
2889                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2890         else
2891                 return true;
2892 }
2893
2894 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2895                                      struct i2c_msg *msgs,
2896                                      int num)
2897 {
2898         struct intel_sdvo *sdvo = adapter->algo_data;
2899
2900         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2901                 return -EIO;
2902
2903         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2904 }
2905
2906 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2907 {
2908         struct intel_sdvo *sdvo = adapter->algo_data;
2909         return sdvo->i2c->algo->functionality(sdvo->i2c);
2910 }
2911
2912 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2913         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2914         .functionality  = intel_sdvo_ddc_proxy_func
2915 };
2916
2917 static bool
2918 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2919                           struct drm_i915_private *dev_priv)
2920 {
2921         struct pci_dev *pdev = dev_priv->drm.pdev;
2922
2923         sdvo->ddc.owner = THIS_MODULE;
2924         sdvo->ddc.class = I2C_CLASS_DDC;
2925         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2926         sdvo->ddc.dev.parent = &pdev->dev;
2927         sdvo->ddc.algo_data = sdvo;
2928         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2929
2930         return i2c_add_adapter(&sdvo->ddc) == 0;
2931 }
2932
2933 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
2934                                    enum port port)
2935 {
2936         if (HAS_PCH_SPLIT(dev_priv))
2937                 WARN_ON(port != PORT_B);
2938         else
2939                 WARN_ON(port != PORT_B && port != PORT_C);
2940 }
2941
2942 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
2943                      i915_reg_t sdvo_reg, enum port port)
2944 {
2945         struct intel_encoder *intel_encoder;
2946         struct intel_sdvo *intel_sdvo;
2947         int i;
2948
2949         assert_sdvo_port_valid(dev_priv, port);
2950
2951         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2952         if (!intel_sdvo)
2953                 return false;
2954
2955         intel_sdvo->sdvo_reg = sdvo_reg;
2956         intel_sdvo->port = port;
2957         intel_sdvo->slave_addr =
2958                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
2959         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
2960         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
2961                 goto err_i2c_bus;
2962
2963         /* encoder type will be decided later */
2964         intel_encoder = &intel_sdvo->base;
2965         intel_encoder->type = INTEL_OUTPUT_SDVO;
2966         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
2967         intel_encoder->port = port;
2968         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
2969                          &intel_sdvo_enc_funcs, 0,
2970                          "SDVO %c", port_name(port));
2971
2972         /* Read the regs to test if we can talk to the device */
2973         for (i = 0; i < 0x40; i++) {
2974                 u8 byte;
2975
2976                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2977                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2978                                       SDVO_NAME(intel_sdvo));
2979                         goto err;
2980                 }
2981         }
2982
2983         intel_encoder->compute_config = intel_sdvo_compute_config;
2984         if (HAS_PCH_SPLIT(dev_priv)) {
2985                 intel_encoder->disable = pch_disable_sdvo;
2986                 intel_encoder->post_disable = pch_post_disable_sdvo;
2987         } else {
2988                 intel_encoder->disable = intel_disable_sdvo;
2989         }
2990         intel_encoder->pre_enable = intel_sdvo_pre_enable;
2991         intel_encoder->enable = intel_enable_sdvo;
2992         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2993         intel_encoder->get_config = intel_sdvo_get_config;
2994
2995         /* In default case sdvo lvds is false */
2996         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2997                 goto err;
2998
2999         if (intel_sdvo_output_setup(intel_sdvo,
3000                                     intel_sdvo->caps.output_flags) != true) {
3001                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3002                               SDVO_NAME(intel_sdvo));
3003                 /* Output_setup can leave behind connectors! */
3004                 goto err_output;
3005         }
3006
3007         /* Only enable the hotplug irq if we need it, to work around noisy
3008          * hotplug lines.
3009          */
3010         if (intel_sdvo->hotplug_active) {
3011                 if (intel_sdvo->port == PORT_B)
3012                         intel_encoder->hpd_pin = HPD_SDVO_B;
3013                 else
3014                         intel_encoder->hpd_pin = HPD_SDVO_C;
3015         }
3016
3017         /*
3018          * Cloning SDVO with anything is often impossible, since the SDVO
3019          * encoder can request a special input timing mode. And even if that's
3020          * not the case we have evidence that cloning a plain unscaled mode with
3021          * VGA doesn't really work. Furthermore the cloning flags are way too
3022          * simplistic anyway to express such constraints, so just give up on
3023          * cloning for SDVO encoders.
3024          */
3025         intel_sdvo->base.cloneable = 0;
3026
3027         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3028
3029         /* Set the input timing to the screen. Assume always input 0. */
3030         if (!intel_sdvo_set_target_input(intel_sdvo))
3031                 goto err_output;
3032
3033         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3034                                                     &intel_sdvo->pixel_clock_min,
3035                                                     &intel_sdvo->pixel_clock_max))
3036                 goto err_output;
3037
3038         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3039                         "clock range %dMHz - %dMHz, "
3040                         "input 1: %c, input 2: %c, "
3041                         "output 1: %c, output 2: %c\n",
3042                         SDVO_NAME(intel_sdvo),
3043                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3044                         intel_sdvo->caps.device_rev_id,
3045                         intel_sdvo->pixel_clock_min / 1000,
3046                         intel_sdvo->pixel_clock_max / 1000,
3047                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3048                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3049                         /* check currently supported outputs */
3050                         intel_sdvo->caps.output_flags &
3051                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3052                         intel_sdvo->caps.output_flags &
3053                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3054         return true;
3055
3056 err_output:
3057         intel_sdvo_output_cleanup(intel_sdvo);
3058
3059 err:
3060         drm_encoder_cleanup(&intel_encoder->base);
3061         i2c_del_adapter(&intel_sdvo->ddc);
3062 err_i2c_bus:
3063         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3064         kfree(intel_sdvo);
3065
3066         return false;
3067 }