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[karo-tx-linux.git] / drivers / i2c / busses / i2c-meson.c
1 /*
2  * I2C bus driver for Amlogic Meson SoCs
3  *
4  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/clk.h>
12 #include <linux/completion.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/platform_device.h>
20 #include <linux/types.h>
21
22 /* Meson I2C register map */
23 #define REG_CTRL                0x00
24 #define REG_SLAVE_ADDR          0x04
25 #define REG_TOK_LIST0           0x08
26 #define REG_TOK_LIST1           0x0c
27 #define REG_TOK_WDATA0          0x10
28 #define REG_TOK_WDATA1          0x14
29 #define REG_TOK_RDATA0          0x18
30 #define REG_TOK_RDATA1          0x1c
31
32 /* Control register fields */
33 #define REG_CTRL_START          BIT(0)
34 #define REG_CTRL_ACK_IGNORE     BIT(1)
35 #define REG_CTRL_STATUS         BIT(2)
36 #define REG_CTRL_ERROR          BIT(3)
37 #define REG_CTRL_CLKDIV_SHIFT   12
38 #define REG_CTRL_CLKDIV_MASK    ((BIT(10) - 1) << REG_CTRL_CLKDIV_SHIFT)
39
40 #define I2C_TIMEOUT_MS          500
41
42 enum {
43         TOKEN_END = 0,
44         TOKEN_START,
45         TOKEN_SLAVE_ADDR_WRITE,
46         TOKEN_SLAVE_ADDR_READ,
47         TOKEN_DATA,
48         TOKEN_DATA_LAST,
49         TOKEN_STOP,
50 };
51
52 enum {
53         STATE_IDLE,
54         STATE_READ,
55         STATE_WRITE,
56         STATE_STOP,
57 };
58
59 /**
60  * struct meson_i2c - Meson I2C device private data
61  *
62  * @adap:       I2C adapter instance
63  * @dev:        Pointer to device structure
64  * @regs:       Base address of the device memory mapped registers
65  * @clk:        Pointer to clock structure
66  * @irq:        IRQ number
67  * @msg:        Pointer to the current I2C message
68  * @state:      Current state in the driver state machine
69  * @last:       Flag set for the last message in the transfer
70  * @count:      Number of bytes to be sent/received in current transfer
71  * @pos:        Current position in the send/receive buffer
72  * @error:      Flag set when an error is received
73  * @lock:       To avoid race conditions between irq handler and xfer code
74  * @done:       Completion used to wait for transfer termination
75  * @tokens:     Sequence of tokens to be written to the device
76  * @num_tokens: Number of tokens
77  */
78 struct meson_i2c {
79         struct i2c_adapter      adap;
80         struct device           *dev;
81         void __iomem            *regs;
82         struct clk              *clk;
83
84         struct i2c_msg          *msg;
85         int                     state;
86         bool                    last;
87         int                     count;
88         int                     pos;
89         int                     error;
90
91         spinlock_t              lock;
92         struct completion       done;
93         u32                     tokens[2];
94         int                     num_tokens;
95 };
96
97 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask,
98                                u32 val)
99 {
100         u32 data;
101
102         data = readl(i2c->regs + reg);
103         data &= ~mask;
104         data |= val & mask;
105         writel(data, i2c->regs + reg);
106 }
107
108 static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
109 {
110         i2c->tokens[0] = 0;
111         i2c->tokens[1] = 0;
112         i2c->num_tokens = 0;
113 }
114
115 static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
116 {
117         if (i2c->num_tokens < 8)
118                 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
119         else
120                 i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
121
122         i2c->num_tokens++;
123 }
124
125 static void meson_i2c_write_tokens(struct meson_i2c *i2c)
126 {
127         writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
128         writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
129 }
130
131 static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq)
132 {
133         unsigned long clk_rate = clk_get_rate(i2c->clk);
134         unsigned int div;
135
136         div = DIV_ROUND_UP(clk_rate, freq * 4);
137         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
138                            div << REG_CTRL_CLKDIV_SHIFT);
139
140         dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
141                 clk_rate, freq, div);
142 }
143
144 static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
145 {
146         u32 rdata0, rdata1;
147         int i;
148
149         rdata0 = readl(i2c->regs + REG_TOK_RDATA0);
150         rdata1 = readl(i2c->regs + REG_TOK_RDATA1);
151
152         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
153                 rdata0, rdata1, len);
154
155         for (i = 0; i < min(4, len); i++)
156                 *buf++ = (rdata0 >> i * 8) & 0xff;
157
158         for (i = 4; i < min(8, len); i++)
159                 *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
160 }
161
162 static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len)
163 {
164         u32 wdata0 = 0, wdata1 = 0;
165         int i;
166
167         for (i = 0; i < min(4, len); i++)
168                 wdata0 |= *buf++ << (i * 8);
169
170         for (i = 4; i < min(8, len); i++)
171                 wdata1 |= *buf++ << ((i - 4) * 8);
172
173         writel(wdata0, i2c->regs + REG_TOK_WDATA0);
174         writel(wdata1, i2c->regs + REG_TOK_WDATA1);
175
176         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
177                 wdata0, wdata1, len);
178 }
179
180 static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
181 {
182         bool write = !(i2c->msg->flags & I2C_M_RD);
183         int i;
184
185         i2c->count = min(i2c->msg->len - i2c->pos, 8);
186
187         for (i = 0; i < i2c->count - 1; i++)
188                 meson_i2c_add_token(i2c, TOKEN_DATA);
189
190         if (i2c->count) {
191                 if (write || i2c->pos + i2c->count < i2c->msg->len)
192                         meson_i2c_add_token(i2c, TOKEN_DATA);
193                 else
194                         meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
195         }
196
197         if (write)
198                 meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
199 }
200
201 static void meson_i2c_stop(struct meson_i2c *i2c)
202 {
203         dev_dbg(i2c->dev, "%s: last %d\n", __func__, i2c->last);
204
205         if (i2c->last) {
206                 i2c->state = STATE_STOP;
207                 meson_i2c_add_token(i2c, TOKEN_STOP);
208         } else {
209                 i2c->state = STATE_IDLE;
210                 complete(&i2c->done);
211         }
212 }
213
214 static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
215 {
216         struct meson_i2c *i2c = dev_id;
217         unsigned int ctrl;
218
219         spin_lock(&i2c->lock);
220
221         meson_i2c_reset_tokens(i2c);
222         ctrl = readl(i2c->regs + REG_CTRL);
223
224         dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n",
225                 i2c->state, i2c->pos, i2c->count, ctrl);
226
227         if (ctrl & REG_CTRL_ERROR && i2c->state != STATE_IDLE) {
228                 /*
229                  * The bit is set when the IGNORE_NAK bit is cleared
230                  * and the device didn't respond. In this case, the
231                  * I2C controller automatically generates a STOP
232                  * condition.
233                  */
234                 dev_dbg(i2c->dev, "error bit set\n");
235                 i2c->error = -ENXIO;
236                 i2c->state = STATE_IDLE;
237                 complete(&i2c->done);
238                 goto out;
239         }
240
241         switch (i2c->state) {
242         case STATE_READ:
243                 if (i2c->count > 0) {
244                         meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
245                                            i2c->count);
246                         i2c->pos += i2c->count;
247                 }
248
249                 if (i2c->pos >= i2c->msg->len) {
250                         meson_i2c_stop(i2c);
251                         break;
252                 }
253
254                 meson_i2c_prepare_xfer(i2c);
255                 break;
256         case STATE_WRITE:
257                 i2c->pos += i2c->count;
258
259                 if (i2c->pos >= i2c->msg->len) {
260                         meson_i2c_stop(i2c);
261                         break;
262                 }
263
264                 meson_i2c_prepare_xfer(i2c);
265                 break;
266         case STATE_STOP:
267                 i2c->state = STATE_IDLE;
268                 complete(&i2c->done);
269                 break;
270         case STATE_IDLE:
271                 break;
272         }
273
274 out:
275         if (i2c->state != STATE_IDLE) {
276                 /* Restart the processing */
277                 meson_i2c_write_tokens(i2c);
278                 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
279                 meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START,
280                                    REG_CTRL_START);
281         }
282
283         spin_unlock(&i2c->lock);
284
285         return IRQ_HANDLED;
286 }
287
288 static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
289 {
290         int token;
291
292         token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
293                 TOKEN_SLAVE_ADDR_WRITE;
294
295         writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR);
296         meson_i2c_add_token(i2c, TOKEN_START);
297         meson_i2c_add_token(i2c, token);
298 }
299
300 static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
301                               int last)
302 {
303         unsigned long time_left, flags;
304         int ret = 0;
305
306         i2c->msg = msg;
307         i2c->last = last;
308         i2c->pos = 0;
309         i2c->count = 0;
310         i2c->error = 0;
311
312         meson_i2c_reset_tokens(i2c);
313
314         flags = (msg->flags & I2C_M_IGNORE_NAK) ? REG_CTRL_ACK_IGNORE : 0;
315         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags);
316
317         if (!(msg->flags & I2C_M_NOSTART))
318                 meson_i2c_do_start(i2c, msg);
319
320         i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
321         meson_i2c_prepare_xfer(i2c);
322         meson_i2c_write_tokens(i2c);
323         reinit_completion(&i2c->done);
324
325         /* Start the transfer */
326         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
327
328         time_left = msecs_to_jiffies(I2C_TIMEOUT_MS);
329         time_left = wait_for_completion_timeout(&i2c->done, time_left);
330
331         /*
332          * Protect access to i2c struct and registers from interrupt
333          * handlers triggered by a transfer terminated after the
334          * timeout period
335          */
336         spin_lock_irqsave(&i2c->lock, flags);
337
338         /* Abort any active operation */
339         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
340
341         if (!time_left) {
342                 i2c->state = STATE_IDLE;
343                 ret = -ETIMEDOUT;
344         }
345
346         if (i2c->error)
347                 ret = i2c->error;
348
349         spin_unlock_irqrestore(&i2c->lock, flags);
350
351         return ret;
352 }
353
354 static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
355                           int num)
356 {
357         struct meson_i2c *i2c = adap->algo_data;
358         int i, ret = 0, count = 0;
359
360         clk_enable(i2c->clk);
361
362         for (i = 0; i < num; i++) {
363                 ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1);
364                 if (ret)
365                         break;
366                 count++;
367         }
368
369         clk_disable(i2c->clk);
370
371         return ret ? ret : count;
372 }
373
374 static u32 meson_i2c_func(struct i2c_adapter *adap)
375 {
376         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
377 }
378
379 static const struct i2c_algorithm meson_i2c_algorithm = {
380         .master_xfer    = meson_i2c_xfer,
381         .functionality  = meson_i2c_func,
382 };
383
384 static int meson_i2c_probe(struct platform_device *pdev)
385 {
386         struct device_node *np = pdev->dev.of_node;
387         struct meson_i2c *i2c;
388         struct resource *mem;
389         struct i2c_timings timings;
390         int irq, ret = 0;
391
392         i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL);
393         if (!i2c)
394                 return -ENOMEM;
395
396         i2c_parse_fw_timings(&pdev->dev, &timings, true);
397
398         i2c->dev = &pdev->dev;
399         platform_set_drvdata(pdev, i2c);
400
401         spin_lock_init(&i2c->lock);
402         init_completion(&i2c->done);
403
404         i2c->clk = devm_clk_get(&pdev->dev, NULL);
405         if (IS_ERR(i2c->clk)) {
406                 dev_err(&pdev->dev, "can't get device clock\n");
407                 return PTR_ERR(i2c->clk);
408         }
409
410         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
411         i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
412         if (IS_ERR(i2c->regs))
413                 return PTR_ERR(i2c->regs);
414
415         irq = platform_get_irq(pdev, 0);
416         if (irq < 0) {
417                 dev_err(&pdev->dev, "can't find IRQ\n");
418                 return irq;
419         }
420
421         ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c);
422         if (ret < 0) {
423                 dev_err(&pdev->dev, "can't request IRQ\n");
424                 return ret;
425         }
426
427         ret = clk_prepare(i2c->clk);
428         if (ret < 0) {
429                 dev_err(&pdev->dev, "can't prepare clock\n");
430                 return ret;
431         }
432
433         strlcpy(i2c->adap.name, "Meson I2C adapter",
434                 sizeof(i2c->adap.name));
435         i2c->adap.owner = THIS_MODULE;
436         i2c->adap.algo = &meson_i2c_algorithm;
437         i2c->adap.dev.parent = &pdev->dev;
438         i2c->adap.dev.of_node = np;
439         i2c->adap.algo_data = i2c;
440
441         /*
442          * A transfer is triggered when START bit changes from 0 to 1.
443          * Ensure that the bit is set to 0 after probe
444          */
445         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
446
447         ret = i2c_add_adapter(&i2c->adap);
448         if (ret < 0) {
449                 clk_unprepare(i2c->clk);
450                 return ret;
451         }
452
453         meson_i2c_set_clk_div(i2c, timings.bus_freq_hz);
454
455         return 0;
456 }
457
458 static int meson_i2c_remove(struct platform_device *pdev)
459 {
460         struct meson_i2c *i2c = platform_get_drvdata(pdev);
461
462         i2c_del_adapter(&i2c->adap);
463         clk_unprepare(i2c->clk);
464
465         return 0;
466 }
467
468 static const struct of_device_id meson_i2c_match[] = {
469         { .compatible = "amlogic,meson6-i2c" },
470         { .compatible = "amlogic,meson-gxbb-i2c" },
471         { },
472 };
473 MODULE_DEVICE_TABLE(of, meson_i2c_match);
474
475 static struct platform_driver meson_i2c_driver = {
476         .probe   = meson_i2c_probe,
477         .remove  = meson_i2c_remove,
478         .driver  = {
479                 .name  = "meson-i2c",
480                 .of_match_table = meson_i2c_match,
481         },
482 };
483
484 module_platform_driver(meson_i2c_driver);
485
486 MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver");
487 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
488 MODULE_LICENSE("GPL v2");