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1 /*
2  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R,
3  * AD5648, AD5666, AD5668, AD5669R Digital to analog converters driver
4  *
5  * Copyright 2011 Analog Devices Inc.
6  *
7  * Licensed under the GPL-2.
8  */
9
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/regulator/consumer.h>
19 #include <asm/unaligned.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23
24 #define AD5064_MAX_DAC_CHANNELS                 8
25 #define AD5064_MAX_VREFS                        4
26
27 #define AD5064_ADDR(x)                          ((x) << 20)
28 #define AD5064_CMD(x)                           ((x) << 24)
29
30 #define AD5064_ADDR_ALL_DAC                     0xF
31
32 #define AD5064_CMD_WRITE_INPUT_N                0x0
33 #define AD5064_CMD_UPDATE_DAC_N                 0x1
34 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL     0x2
35 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N       0x3
36 #define AD5064_CMD_POWERDOWN_DAC                0x4
37 #define AD5064_CMD_CLEAR                        0x5
38 #define AD5064_CMD_LDAC_MASK                    0x6
39 #define AD5064_CMD_RESET                        0x7
40 #define AD5064_CMD_CONFIG                       0x8
41
42 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE        BIT(1)
43 #define AD5064_CONFIG_INT_VREF_ENABLE           BIT(0)
44
45 #define AD5064_LDAC_PWRDN_NONE                  0x0
46 #define AD5064_LDAC_PWRDN_1K                    0x1
47 #define AD5064_LDAC_PWRDN_100K                  0x2
48 #define AD5064_LDAC_PWRDN_3STATE                0x3
49
50 /**
51  * struct ad5064_chip_info - chip specific information
52  * @shared_vref:        whether the vref supply is shared between channels
53  * @internal_vref:      internal reference voltage. 0 if the chip has no internal
54  *                      vref.
55  * @channel:            channel specification
56  * @num_channels:       number of channels
57  */
58
59 struct ad5064_chip_info {
60         bool shared_vref;
61         unsigned long internal_vref;
62         const struct iio_chan_spec *channels;
63         unsigned int num_channels;
64 };
65
66 struct ad5064_state;
67
68 typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
69                 unsigned int addr, unsigned int val);
70
71 /**
72  * struct ad5064_state - driver instance specific data
73  * @dev:                the device for this driver instance
74  * @chip_info:          chip model specific constants, available modes etc
75  * @vref_reg:           vref supply regulators
76  * @pwr_down:           whether channel is powered down
77  * @pwr_down_mode:      channel's current power down mode
78  * @dac_cache:          current DAC raw value (chip does not support readback)
79  * @use_internal_vref:  set to true if the internal reference voltage should be
80  *                      used.
81  * @write:              register write callback
82  * @data:               i2c/spi transfer buffers
83  */
84
85 struct ad5064_state {
86         struct device                   *dev;
87         const struct ad5064_chip_info   *chip_info;
88         struct regulator_bulk_data      vref_reg[AD5064_MAX_VREFS];
89         bool                            pwr_down[AD5064_MAX_DAC_CHANNELS];
90         u8                              pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
91         unsigned int                    dac_cache[AD5064_MAX_DAC_CHANNELS];
92         bool                            use_internal_vref;
93
94         ad5064_write_func               write;
95
96         /*
97          * DMA (thus cache coherency maintenance) requires the
98          * transfer buffers to live in their own cache lines.
99          */
100         union {
101                 u8 i2c[3];
102                 __be32 spi;
103         } data ____cacheline_aligned;
104 };
105
106 enum ad5064_type {
107         ID_AD5024,
108         ID_AD5025,
109         ID_AD5044,
110         ID_AD5045,
111         ID_AD5064,
112         ID_AD5064_1,
113         ID_AD5065,
114         ID_AD5628_1,
115         ID_AD5628_2,
116         ID_AD5648_1,
117         ID_AD5648_2,
118         ID_AD5666_1,
119         ID_AD5666_2,
120         ID_AD5668_1,
121         ID_AD5668_2,
122 };
123
124 static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
125         unsigned int addr, unsigned int val, unsigned int shift)
126 {
127         val <<= shift;
128
129         return st->write(st, cmd, addr, val);
130 }
131
132 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
133         const struct iio_chan_spec *chan)
134 {
135         unsigned int val;
136         int ret;
137
138         val = (0x1 << chan->address);
139
140         if (st->pwr_down[chan->channel])
141                 val |= st->pwr_down_mode[chan->channel] << 8;
142
143         ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
144
145         return ret;
146 }
147
148 static const char * const ad5064_powerdown_modes[] = {
149         "1kohm_to_gnd",
150         "100kohm_to_gnd",
151         "three_state",
152 };
153
154 static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
155         const struct iio_chan_spec *chan)
156 {
157         struct ad5064_state *st = iio_priv(indio_dev);
158
159         return st->pwr_down_mode[chan->channel] - 1;
160 }
161
162 static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
163         const struct iio_chan_spec *chan, unsigned int mode)
164 {
165         struct ad5064_state *st = iio_priv(indio_dev);
166         int ret;
167
168         mutex_lock(&indio_dev->mlock);
169         st->pwr_down_mode[chan->channel] = mode + 1;
170
171         ret = ad5064_sync_powerdown_mode(st, chan);
172         mutex_unlock(&indio_dev->mlock);
173
174         return ret;
175 }
176
177 static const struct iio_enum ad5064_powerdown_mode_enum = {
178         .items = ad5064_powerdown_modes,
179         .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
180         .get = ad5064_get_powerdown_mode,
181         .set = ad5064_set_powerdown_mode,
182 };
183
184 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
185         uintptr_t private, const struct iio_chan_spec *chan, char *buf)
186 {
187         struct ad5064_state *st = iio_priv(indio_dev);
188
189         return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
190 }
191
192 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
193          uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
194          size_t len)
195 {
196         struct ad5064_state *st = iio_priv(indio_dev);
197         bool pwr_down;
198         int ret;
199
200         ret = strtobool(buf, &pwr_down);
201         if (ret)
202                 return ret;
203
204         mutex_lock(&indio_dev->mlock);
205         st->pwr_down[chan->channel] = pwr_down;
206
207         ret = ad5064_sync_powerdown_mode(st, chan);
208         mutex_unlock(&indio_dev->mlock);
209         return ret ? ret : len;
210 }
211
212 static int ad5064_get_vref(struct ad5064_state *st,
213         struct iio_chan_spec const *chan)
214 {
215         unsigned int i;
216
217         if (st->use_internal_vref)
218                 return st->chip_info->internal_vref;
219
220         i = st->chip_info->shared_vref ? 0 : chan->channel;
221         return regulator_get_voltage(st->vref_reg[i].consumer);
222 }
223
224 static int ad5064_read_raw(struct iio_dev *indio_dev,
225                            struct iio_chan_spec const *chan,
226                            int *val,
227                            int *val2,
228                            long m)
229 {
230         struct ad5064_state *st = iio_priv(indio_dev);
231         int scale_uv;
232
233         switch (m) {
234         case IIO_CHAN_INFO_RAW:
235                 *val = st->dac_cache[chan->channel];
236                 return IIO_VAL_INT;
237         case IIO_CHAN_INFO_SCALE:
238                 scale_uv = ad5064_get_vref(st, chan);
239                 if (scale_uv < 0)
240                         return scale_uv;
241
242                 *val = scale_uv / 1000;
243                 *val2 = chan->scan_type.realbits;
244                 return IIO_VAL_FRACTIONAL_LOG2;
245         default:
246                 break;
247         }
248         return -EINVAL;
249 }
250
251 static int ad5064_write_raw(struct iio_dev *indio_dev,
252         struct iio_chan_spec const *chan, int val, int val2, long mask)
253 {
254         struct ad5064_state *st = iio_priv(indio_dev);
255         int ret;
256
257         switch (mask) {
258         case IIO_CHAN_INFO_RAW:
259                 if (val >= (1 << chan->scan_type.realbits) || val < 0)
260                         return -EINVAL;
261
262                 mutex_lock(&indio_dev->mlock);
263                 ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
264                                 chan->address, val, chan->scan_type.shift);
265                 if (ret == 0)
266                         st->dac_cache[chan->channel] = val;
267                 mutex_unlock(&indio_dev->mlock);
268                 break;
269         default:
270                 ret = -EINVAL;
271         }
272
273         return ret;
274 }
275
276 static const struct iio_info ad5064_info = {
277         .read_raw = ad5064_read_raw,
278         .write_raw = ad5064_write_raw,
279         .driver_module = THIS_MODULE,
280 };
281
282 static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
283         {
284                 .name = "powerdown",
285                 .read = ad5064_read_dac_powerdown,
286                 .write = ad5064_write_dac_powerdown,
287                 .shared = IIO_SEPARATE,
288         },
289         IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5064_powerdown_mode_enum),
290         IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
291         { },
292 };
293
294 #define AD5064_CHANNEL(chan, addr, bits) {                      \
295         .type = IIO_VOLTAGE,                                    \
296         .indexed = 1,                                           \
297         .output = 1,                                            \
298         .channel = (chan),                                      \
299         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
300         BIT(IIO_CHAN_INFO_SCALE),                                       \
301         .address = addr,                                        \
302         .scan_type = {                                          \
303                 .sign = 'u',                                    \
304                 .realbits = (bits),                             \
305                 .storagebits = 16,                              \
306                 .shift = 20 - bits,                             \
307         },                                                      \
308         .ext_info = ad5064_ext_info,                            \
309 }
310
311 #define DECLARE_AD5064_CHANNELS(name, bits) \
312 const struct iio_chan_spec name[] = { \
313         AD5064_CHANNEL(0, 0, bits), \
314         AD5064_CHANNEL(1, 1, bits), \
315         AD5064_CHANNEL(2, 2, bits), \
316         AD5064_CHANNEL(3, 3, bits), \
317         AD5064_CHANNEL(4, 4, bits), \
318         AD5064_CHANNEL(5, 5, bits), \
319         AD5064_CHANNEL(6, 6, bits), \
320         AD5064_CHANNEL(7, 7, bits), \
321 }
322
323 #define DECLARE_AD5065_CHANNELS(name, bits) \
324 const struct iio_chan_spec name[] = { \
325         AD5064_CHANNEL(0, 0, bits), \
326         AD5064_CHANNEL(1, 3, bits), \
327 }
328
329 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
330 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
331 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
332
333 static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
334 static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
335 static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
336
337 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
338         [ID_AD5024] = {
339                 .shared_vref = false,
340                 .channels = ad5024_channels,
341                 .num_channels = 4,
342         },
343         [ID_AD5025] = {
344                 .shared_vref = false,
345                 .channels = ad5025_channels,
346                 .num_channels = 2,
347         },
348         [ID_AD5044] = {
349                 .shared_vref = false,
350                 .channels = ad5044_channels,
351                 .num_channels = 4,
352         },
353         [ID_AD5045] = {
354                 .shared_vref = false,
355                 .channels = ad5045_channels,
356                 .num_channels = 2,
357         },
358         [ID_AD5064] = {
359                 .shared_vref = false,
360                 .channels = ad5064_channels,
361                 .num_channels = 4,
362         },
363         [ID_AD5064_1] = {
364                 .shared_vref = true,
365                 .channels = ad5064_channels,
366                 .num_channels = 4,
367         },
368         [ID_AD5065] = {
369                 .shared_vref = false,
370                 .channels = ad5065_channels,
371                 .num_channels = 2,
372         },
373         [ID_AD5628_1] = {
374                 .shared_vref = true,
375                 .internal_vref = 2500000,
376                 .channels = ad5024_channels,
377                 .num_channels = 8,
378         },
379         [ID_AD5628_2] = {
380                 .shared_vref = true,
381                 .internal_vref = 5000000,
382                 .channels = ad5024_channels,
383                 .num_channels = 8,
384         },
385         [ID_AD5648_1] = {
386                 .shared_vref = true,
387                 .internal_vref = 2500000,
388                 .channels = ad5044_channels,
389                 .num_channels = 8,
390         },
391         [ID_AD5648_2] = {
392                 .shared_vref = true,
393                 .internal_vref = 5000000,
394                 .channels = ad5044_channels,
395                 .num_channels = 8,
396         },
397         [ID_AD5666_1] = {
398                 .shared_vref = true,
399                 .internal_vref = 2500000,
400                 .channels = ad5064_channels,
401                 .num_channels = 4,
402         },
403         [ID_AD5666_2] = {
404                 .shared_vref = true,
405                 .internal_vref = 5000000,
406                 .channels = ad5064_channels,
407                 .num_channels = 4,
408         },
409         [ID_AD5668_1] = {
410                 .shared_vref = true,
411                 .internal_vref = 2500000,
412                 .channels = ad5064_channels,
413                 .num_channels = 8,
414         },
415         [ID_AD5668_2] = {
416                 .shared_vref = true,
417                 .internal_vref = 5000000,
418                 .channels = ad5064_channels,
419                 .num_channels = 8,
420         },
421 };
422
423 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
424 {
425         return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
426 }
427
428 static const char * const ad5064_vref_names[] = {
429         "vrefA",
430         "vrefB",
431         "vrefC",
432         "vrefD",
433 };
434
435 static const char * const ad5064_vref_name(struct ad5064_state *st,
436         unsigned int vref)
437 {
438         return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
439 }
440
441 static int ad5064_probe(struct device *dev, enum ad5064_type type,
442                         const char *name, ad5064_write_func write)
443 {
444         struct iio_dev *indio_dev;
445         struct ad5064_state *st;
446         unsigned int midscale;
447         unsigned int i;
448         int ret;
449
450         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
451         if (indio_dev == NULL)
452                 return  -ENOMEM;
453
454         st = iio_priv(indio_dev);
455         dev_set_drvdata(dev, indio_dev);
456
457         st->chip_info = &ad5064_chip_info_tbl[type];
458         st->dev = dev;
459         st->write = write;
460
461         for (i = 0; i < ad5064_num_vref(st); ++i)
462                 st->vref_reg[i].supply = ad5064_vref_name(st, i);
463
464         ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st),
465                 st->vref_reg);
466         if (ret) {
467                 if (!st->chip_info->internal_vref)
468                         return ret;
469                 st->use_internal_vref = true;
470                 ret = ad5064_write(st, AD5064_CMD_CONFIG, 0,
471                         AD5064_CONFIG_INT_VREF_ENABLE, 0);
472                 if (ret) {
473                         dev_err(dev, "Failed to enable internal vref: %d\n",
474                                 ret);
475                         return ret;
476                 }
477         } else {
478                 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
479                 if (ret)
480                         return ret;
481         }
482
483         indio_dev->dev.parent = dev;
484         indio_dev->name = name;
485         indio_dev->info = &ad5064_info;
486         indio_dev->modes = INDIO_DIRECT_MODE;
487         indio_dev->channels = st->chip_info->channels;
488         indio_dev->num_channels = st->chip_info->num_channels;
489
490         midscale = (1 << indio_dev->channels[0].scan_type.realbits) /  2;
491
492         for (i = 0; i < st->chip_info->num_channels; ++i) {
493                 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
494                 st->dac_cache[i] = midscale;
495         }
496
497         ret = iio_device_register(indio_dev);
498         if (ret)
499                 goto error_disable_reg;
500
501         return 0;
502
503 error_disable_reg:
504         if (!st->use_internal_vref)
505                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
506
507         return ret;
508 }
509
510 static int ad5064_remove(struct device *dev)
511 {
512         struct iio_dev *indio_dev = dev_get_drvdata(dev);
513         struct ad5064_state *st = iio_priv(indio_dev);
514
515         iio_device_unregister(indio_dev);
516
517         if (!st->use_internal_vref)
518                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
519
520         return 0;
521 }
522
523 #if IS_ENABLED(CONFIG_SPI_MASTER)
524
525 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
526         unsigned int addr, unsigned int val)
527 {
528         struct spi_device *spi = to_spi_device(st->dev);
529
530         st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
531         return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
532 }
533
534 static int ad5064_spi_probe(struct spi_device *spi)
535 {
536         const struct spi_device_id *id = spi_get_device_id(spi);
537
538         return ad5064_probe(&spi->dev, id->driver_data, id->name,
539                                 ad5064_spi_write);
540 }
541
542 static int ad5064_spi_remove(struct spi_device *spi)
543 {
544         return ad5064_remove(&spi->dev);
545 }
546
547 static const struct spi_device_id ad5064_spi_ids[] = {
548         {"ad5024", ID_AD5024},
549         {"ad5025", ID_AD5025},
550         {"ad5044", ID_AD5044},
551         {"ad5045", ID_AD5045},
552         {"ad5064", ID_AD5064},
553         {"ad5064-1", ID_AD5064_1},
554         {"ad5065", ID_AD5065},
555         {"ad5628-1", ID_AD5628_1},
556         {"ad5628-2", ID_AD5628_2},
557         {"ad5648-1", ID_AD5648_1},
558         {"ad5648-2", ID_AD5648_2},
559         {"ad5666-1", ID_AD5666_1},
560         {"ad5666-2", ID_AD5666_2},
561         {"ad5668-1", ID_AD5668_1},
562         {"ad5668-2", ID_AD5668_2},
563         {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
564         {}
565 };
566 MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
567
568 static struct spi_driver ad5064_spi_driver = {
569         .driver = {
570                    .name = "ad5064",
571         },
572         .probe = ad5064_spi_probe,
573         .remove = ad5064_spi_remove,
574         .id_table = ad5064_spi_ids,
575 };
576
577 static int __init ad5064_spi_register_driver(void)
578 {
579         return spi_register_driver(&ad5064_spi_driver);
580 }
581
582 static void ad5064_spi_unregister_driver(void)
583 {
584         spi_unregister_driver(&ad5064_spi_driver);
585 }
586
587 #else
588
589 static inline int ad5064_spi_register_driver(void) { return 0; }
590 static inline void ad5064_spi_unregister_driver(void) { }
591
592 #endif
593
594 #if IS_ENABLED(CONFIG_I2C)
595
596 static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
597         unsigned int addr, unsigned int val)
598 {
599         struct i2c_client *i2c = to_i2c_client(st->dev);
600
601         st->data.i2c[0] = (cmd << 4) | addr;
602         put_unaligned_be16(val, &st->data.i2c[1]);
603         return i2c_master_send(i2c, st->data.i2c, 3);
604 }
605
606 static int ad5064_i2c_probe(struct i2c_client *i2c,
607         const struct i2c_device_id *id)
608 {
609         return ad5064_probe(&i2c->dev, id->driver_data, id->name,
610                                                 ad5064_i2c_write);
611 }
612
613 static int ad5064_i2c_remove(struct i2c_client *i2c)
614 {
615         return ad5064_remove(&i2c->dev);
616 }
617
618 static const struct i2c_device_id ad5064_i2c_ids[] = {
619         {"ad5629-1", ID_AD5628_1},
620         {"ad5629-2", ID_AD5628_2},
621         {"ad5629-3", ID_AD5628_2}, /* similar enough to ad5629-2 */
622         {"ad5669-1", ID_AD5668_1},
623         {"ad5669-2", ID_AD5668_2},
624         {"ad5669-3", ID_AD5668_2}, /* similar enough to ad5669-2 */
625         {}
626 };
627 MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
628
629 static struct i2c_driver ad5064_i2c_driver = {
630         .driver = {
631                    .name = "ad5064",
632         },
633         .probe = ad5064_i2c_probe,
634         .remove = ad5064_i2c_remove,
635         .id_table = ad5064_i2c_ids,
636 };
637
638 static int __init ad5064_i2c_register_driver(void)
639 {
640         return i2c_add_driver(&ad5064_i2c_driver);
641 }
642
643 static void __exit ad5064_i2c_unregister_driver(void)
644 {
645         i2c_del_driver(&ad5064_i2c_driver);
646 }
647
648 #else
649
650 static inline int ad5064_i2c_register_driver(void) { return 0; }
651 static inline void ad5064_i2c_unregister_driver(void) { }
652
653 #endif
654
655 static int __init ad5064_init(void)
656 {
657         int ret;
658
659         ret = ad5064_spi_register_driver();
660         if (ret)
661                 return ret;
662
663         ret = ad5064_i2c_register_driver();
664         if (ret) {
665                 ad5064_spi_unregister_driver();
666                 return ret;
667         }
668
669         return 0;
670 }
671 module_init(ad5064_init);
672
673 static void __exit ad5064_exit(void)
674 {
675         ad5064_i2c_unregister_driver();
676         ad5064_spi_unregister_driver();
677 }
678 module_exit(ad5064_exit);
679
680 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
681 MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
682 MODULE_LICENSE("GPL v2");