2 * Copyright(c) 2015, 2016 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
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34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 #include <linux/types.h>
49 #include <linux/device.h>
50 #include <linux/dmapool.h>
51 #include <linux/slab.h>
52 #include <linux/list.h>
53 #include <linux/highmem.h>
55 #include <linux/uio.h>
56 #include <linux/rbtree.h>
57 #include <linux/spinlock.h>
58 #include <linux/delay.h>
59 #include <linux/kthread.h>
60 #include <linux/mmu_context.h>
61 #include <linux/module.h>
62 #include <linux/vmalloc.h>
63 #include <linux/string.h>
67 #include "user_sdma.h"
68 #include "verbs.h" /* for the headers */
69 #include "common.h" /* for struct hfi1_tid_info */
73 static uint hfi1_sdma_comp_ring_size = 128;
74 module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
75 MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
77 /* The maximum number of Data io vectors per message/request */
78 #define MAX_VECTORS_PER_REQ 8
80 * Maximum number of packet to send from each message/request
81 * before moving to the next one.
83 #define MAX_PKTS_PER_QUEUE 16
85 #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
87 #define req_opcode(x) \
88 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
89 #define req_version(x) \
90 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
91 #define req_iovcnt(x) \
92 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
94 /* Number of BTH.PSN bits used for sequence number in expected rcvs */
95 #define BTH_SEQ_MASK 0x7ffull
98 * Define fields in the KDETH header so we can update the header
101 #define KDETH_OFFSET_SHIFT 0
102 #define KDETH_OFFSET_MASK 0x7fff
103 #define KDETH_OM_SHIFT 15
104 #define KDETH_OM_MASK 0x1
105 #define KDETH_TID_SHIFT 16
106 #define KDETH_TID_MASK 0x3ff
107 #define KDETH_TIDCTRL_SHIFT 26
108 #define KDETH_TIDCTRL_MASK 0x3
109 #define KDETH_INTR_SHIFT 28
110 #define KDETH_INTR_MASK 0x1
111 #define KDETH_SH_SHIFT 29
112 #define KDETH_SH_MASK 0x1
113 #define KDETH_HCRC_UPPER_SHIFT 16
114 #define KDETH_HCRC_UPPER_MASK 0xff
115 #define KDETH_HCRC_LOWER_SHIFT 24
116 #define KDETH_HCRC_LOWER_MASK 0xff
118 #define AHG_KDETH_INTR_SHIFT 12
119 #define AHG_KDETH_SH_SHIFT 13
121 #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
122 #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
124 #define KDETH_GET(val, field) \
125 (((le32_to_cpu((val))) >> KDETH_##field##_SHIFT) & KDETH_##field##_MASK)
126 #define KDETH_SET(dw, field, val) do { \
127 u32 dwval = le32_to_cpu(dw); \
128 dwval &= ~(KDETH_##field##_MASK << KDETH_##field##_SHIFT); \
129 dwval |= (((val) & KDETH_##field##_MASK) << \
130 KDETH_##field##_SHIFT); \
131 dw = cpu_to_le32(dwval); \
134 #define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
136 if ((idx) < ARRAY_SIZE((arr))) \
137 (arr)[(idx++)] = sdma_build_ahg_descriptor( \
138 (__force u16)(value), (dw), (bit), \
144 /* KDETH OM multipliers and switch over point */
145 #define KDETH_OM_SMALL 4
146 #define KDETH_OM_LARGE 64
147 #define KDETH_OM_MAX_SIZE (1 << ((KDETH_OM_LARGE / KDETH_OM_SMALL) + 1))
149 /* Tx request flag bits */
150 #define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */
151 #define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */
153 /* SDMA request flag bits */
154 #define SDMA_REQ_FOR_THREAD 1
155 #define SDMA_REQ_SEND_DONE 2
156 #define SDMA_REQ_HAVE_AHG 3
157 #define SDMA_REQ_HAS_ERROR 4
158 #define SDMA_REQ_DONE_ERROR 5
160 #define SDMA_PKT_Q_INACTIVE BIT(0)
161 #define SDMA_PKT_Q_ACTIVE BIT(1)
162 #define SDMA_PKT_Q_DEFERRED BIT(2)
165 * Maximum retry attempts to submit a TX request
166 * before putting the process to sleep.
168 #define MAX_DEFER_RETRY_COUNT 1
170 static unsigned initial_pkt_count = 8;
172 #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
174 struct sdma_mmu_node;
176 struct user_sdma_iovec {
177 struct list_head list;
179 /* number of pages in this vector */
181 /* array of pinned pages for this vector */
184 * offset into the virtual address space of the vector at
185 * which we last left off.
188 struct sdma_mmu_node *node;
191 struct sdma_mmu_node {
192 struct mmu_rb_node rb;
193 struct hfi1_user_sdma_pkt_q *pq;
199 /* evict operation argument */
201 u32 cleared; /* count evicted so far */
202 u32 target; /* target count to evict */
205 struct user_sdma_request {
206 struct sdma_req_info info;
207 struct hfi1_user_sdma_pkt_q *pq;
208 struct hfi1_user_sdma_comp_q *cq;
209 /* This is the original header from user space */
210 struct hfi1_pkt_header hdr;
212 * Pointer to the SDMA engine for this request.
213 * Since different request could be on different VLs,
214 * each request will need it's own engine pointer.
216 struct sdma_engine *sde;
220 * KDETH.Offset (Eager) field
221 * We need to remember the initial value so the headers
222 * can be updated properly.
226 * KDETH.OFFSET (TID) field
227 * The offset can cover multiple packets, depending on the
228 * size of the TID entry.
233 * Remember this because the header template always sets it
238 * We copy the iovs for this request (based on
239 * info.iovcnt). These are only the data vectors
242 /* total length of the data in the request */
244 /* progress index moving along the iovs array */
246 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
247 /* number of elements copied to the tids array */
249 /* TID array values copied from the tid_iov vector */
256 struct list_head txps;
258 /* status of the last txreq completed */
263 * A single txreq could span up to 3 physical pages when the MTU
264 * is sufficiently large (> 4K). Each of the IOV pointers also
265 * needs it's own set of flags so the vector has been handled
266 * independently of each other.
268 struct user_sdma_txreq {
269 /* Packet header for the txreq */
270 struct hfi1_pkt_header hdr;
271 struct sdma_txreq txreq;
272 struct list_head list;
273 struct user_sdma_request *req;
279 #define SDMA_DBG(req, fmt, ...) \
280 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
281 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
283 #define SDMA_Q_DBG(pq, fmt, ...) \
284 hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \
285 (pq)->subctxt, ##__VA_ARGS__)
287 static int user_sdma_send_pkts(struct user_sdma_request *, unsigned);
288 static int num_user_pages(const struct iovec *);
289 static void user_sdma_txreq_cb(struct sdma_txreq *, int);
290 static inline void pq_update(struct hfi1_user_sdma_pkt_q *);
291 static void user_sdma_free_request(struct user_sdma_request *, bool);
292 static int pin_vector_pages(struct user_sdma_request *,
293 struct user_sdma_iovec *);
294 static void unpin_vector_pages(struct mm_struct *, struct page **, unsigned,
296 static int check_header_template(struct user_sdma_request *,
297 struct hfi1_pkt_header *, u32, u32);
298 static int set_txreq_header(struct user_sdma_request *,
299 struct user_sdma_txreq *, u32);
300 static int set_txreq_header_ahg(struct user_sdma_request *,
301 struct user_sdma_txreq *, u32);
302 static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *,
303 struct hfi1_user_sdma_comp_q *,
304 u16, enum hfi1_sdma_comp_state, int);
305 static inline u32 set_pkt_bth_psn(__be32, u8, u32);
306 static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
308 static int defer_packet_queue(
309 struct sdma_engine *,
313 static void activate_packet_queue(struct iowait *, int);
314 static bool sdma_rb_filter(struct mmu_rb_node *, unsigned long, unsigned long);
315 static int sdma_rb_insert(void *, struct mmu_rb_node *);
316 static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
317 void *arg2, bool *stop);
318 static void sdma_rb_remove(void *, struct mmu_rb_node *);
319 static int sdma_rb_invalidate(void *, struct mmu_rb_node *);
321 static struct mmu_rb_ops sdma_rb_ops = {
322 .filter = sdma_rb_filter,
323 .insert = sdma_rb_insert,
324 .evict = sdma_rb_evict,
325 .remove = sdma_rb_remove,
326 .invalidate = sdma_rb_invalidate
329 static int defer_packet_queue(
330 struct sdma_engine *sde,
332 struct sdma_txreq *txreq,
335 struct hfi1_user_sdma_pkt_q *pq =
336 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
337 struct hfi1_ibdev *dev = &pq->dd->verbs_dev;
338 struct user_sdma_txreq *tx =
339 container_of(txreq, struct user_sdma_txreq, txreq);
341 if (sdma_progress(sde, seq, txreq)) {
342 if (tx->busycount++ < MAX_DEFER_RETRY_COUNT)
346 * We are assuming that if the list is enqueued somewhere, it
347 * is to the dmawait list since that is the only place where
348 * it is supposed to be enqueued.
350 xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
351 write_seqlock(&dev->iowait_lock);
352 if (list_empty(&pq->busy.list))
353 list_add_tail(&pq->busy.list, &sde->dmawait);
354 write_sequnlock(&dev->iowait_lock);
360 static void activate_packet_queue(struct iowait *wait, int reason)
362 struct hfi1_user_sdma_pkt_q *pq =
363 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
364 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
365 wake_up(&wait->wait_dma);
368 static void sdma_kmem_cache_ctor(void *obj)
370 struct user_sdma_txreq *tx = obj;
372 memset(tx, 0, sizeof(*tx));
375 int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, struct file *fp)
377 struct hfi1_filedata *fd;
380 struct hfi1_devdata *dd;
381 struct hfi1_user_sdma_comp_q *cq;
382 struct hfi1_user_sdma_pkt_q *pq;
390 fd = fp->private_data;
392 if (!hfi1_sdma_comp_ring_size) {
399 pq = kzalloc(sizeof(*pq), GFP_KERNEL);
403 pq->reqs = kcalloc(hfi1_sdma_comp_ring_size,
409 pq->req_in_use = kcalloc(BITS_TO_LONGS(hfi1_sdma_comp_ring_size),
410 sizeof(*pq->req_in_use),
413 goto pq_reqs_no_in_use;
415 INIT_LIST_HEAD(&pq->list);
417 pq->ctxt = uctxt->ctxt;
418 pq->subctxt = fd->subctxt;
419 pq->n_max_reqs = hfi1_sdma_comp_ring_size;
420 pq->state = SDMA_PKT_Q_INACTIVE;
421 atomic_set(&pq->n_reqs, 0);
422 init_waitqueue_head(&pq->wait);
423 atomic_set(&pq->n_locked, 0);
426 iowait_init(&pq->busy, 0, NULL, defer_packet_queue,
427 activate_packet_queue, NULL);
429 snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
431 pq->txreq_cache = kmem_cache_create(buf,
432 sizeof(struct user_sdma_txreq),
435 sdma_kmem_cache_ctor);
436 if (!pq->txreq_cache) {
437 dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
442 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
446 cq->comps = vmalloc_user(PAGE_ALIGN(sizeof(*cq->comps)
447 * hfi1_sdma_comp_ring_size));
451 cq->nentries = hfi1_sdma_comp_ring_size;
454 ret = hfi1_mmu_rb_register(pq, pq->mm, &sdma_rb_ops, dd->pport->hfi1_wq,
457 dd_dev_err(dd, "Failed to register with MMU %d", ret);
461 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
462 list_add(&pq->list, &uctxt->sdma_queues);
463 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
469 kmem_cache_destroy(pq->txreq_cache);
471 kfree(pq->req_in_use);
483 int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd)
485 struct hfi1_ctxtdata *uctxt = fd->uctxt;
486 struct hfi1_user_sdma_pkt_q *pq;
489 hfi1_cdbg(SDMA, "[%u:%u:%u] Freeing user SDMA queues", uctxt->dd->unit,
490 uctxt->ctxt, fd->subctxt);
494 hfi1_mmu_rb_unregister(pq->handler);
495 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
496 if (!list_empty(&pq->list))
497 list_del_init(&pq->list);
498 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
499 iowait_sdma_drain(&pq->busy);
500 /* Wait until all requests have been freed. */
501 wait_event_interruptible(
503 (ACCESS_ONCE(pq->state) == SDMA_PKT_Q_INACTIVE));
505 kfree(pq->req_in_use);
506 kmem_cache_destroy(pq->txreq_cache);
511 vfree(fd->cq->comps);
518 static u8 dlid_to_selector(u16 dlid)
520 static u8 mapping[256];
521 static int initialized;
526 memset(mapping, 0xFF, 256);
530 hash = ((dlid >> 8) ^ dlid) & 0xFF;
531 if (mapping[hash] == 0xFF) {
532 mapping[hash] = next;
533 next = (next + 1) & 0x7F;
536 return mapping[hash];
539 int hfi1_user_sdma_process_request(struct file *fp, struct iovec *iovec,
540 unsigned long dim, unsigned long *count)
543 struct hfi1_filedata *fd = fp->private_data;
544 struct hfi1_ctxtdata *uctxt = fd->uctxt;
545 struct hfi1_user_sdma_pkt_q *pq = fd->pq;
546 struct hfi1_user_sdma_comp_q *cq = fd->cq;
547 struct hfi1_devdata *dd = pq->dd;
548 unsigned long idx = 0;
549 u8 pcount = initial_pkt_count;
550 struct sdma_req_info info;
551 struct user_sdma_request *req;
557 if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
560 "[%u:%u:%u] First vector not big enough for header %lu/%lu",
561 dd->unit, uctxt->ctxt, fd->subctxt,
562 iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
565 ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
567 hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
568 dd->unit, uctxt->ctxt, fd->subctxt, ret);
572 trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt,
575 if (info.comp_idx >= hfi1_sdma_comp_ring_size) {
577 "[%u:%u:%u:%u] Invalid comp index",
578 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
583 * Sanity check the header io vector count. Need at least 1 vector
584 * (header) and cannot be larger than the actual io vector count.
586 if (req_iovcnt(info.ctrl) < 1 || req_iovcnt(info.ctrl) > dim) {
588 "[%u:%u:%u:%u] Invalid iov count %d, dim %ld",
589 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx,
590 req_iovcnt(info.ctrl), dim);
594 if (!info.fragsize) {
596 "[%u:%u:%u:%u] Request does not specify fragsize",
597 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
601 /* Try to claim the request. */
602 if (test_and_set_bit(info.comp_idx, pq->req_in_use)) {
603 hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in use",
604 dd->unit, uctxt->ctxt, fd->subctxt,
609 * All safety checks have been done and this request has been claimed.
611 hfi1_cdbg(SDMA, "[%u:%u:%u] Using req/comp entry %u\n", dd->unit,
612 uctxt->ctxt, fd->subctxt, info.comp_idx);
613 req = pq->reqs + info.comp_idx;
614 memset(req, 0, sizeof(*req));
615 req->data_iovs = req_iovcnt(info.ctrl) - 1; /* subtract header vector */
619 INIT_LIST_HEAD(&req->txps);
621 memcpy(&req->info, &info, sizeof(info));
623 if (req_opcode(info.ctrl) == EXPECTED) {
624 /* expected must have a TID info and at least one data vector */
625 if (req->data_iovs < 2) {
627 "Not enough vectors for expected request");
634 if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
635 SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
636 MAX_VECTORS_PER_REQ);
640 /* Copy the header from the user buffer */
641 ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
644 SDMA_DBG(req, "Failed to copy header template (%d)", ret);
649 /* If Static rate control is not enabled, sanitize the header. */
650 if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
653 /* Validate the opcode. Do not trust packets from user space blindly. */
654 opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
655 if ((opcode & USER_OPCODE_CHECK_MASK) !=
656 USER_OPCODE_CHECK_VAL) {
657 SDMA_DBG(req, "Invalid opcode (%d)", opcode);
662 * Validate the vl. Do not trust packets from user space blindly.
663 * VL comes from PBC, SC comes from LRH, and the VL needs to
664 * match the SC look up.
666 vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
667 sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
668 (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
669 if (vl >= dd->pport->vls_operational ||
670 vl != sc_to_vlt(dd, sc)) {
671 SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
676 /* Checking P_KEY for requests from user-space */
677 if (egress_pkey_check(dd->pport, req->hdr.lrh, req->hdr.bth, sc,
678 PKEY_CHECK_INVALID)) {
684 * Also should check the BTH.lnh. If it says the next header is GRH then
685 * the RXE parsing will be off and will land in the middle of the KDETH
686 * or miss it entirely.
688 if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
689 SDMA_DBG(req, "User tried to pass in a GRH");
694 req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
696 * Calculate the initial TID offset based on the values of
697 * KDETH.OFFSET and KDETH.OM that are passed in.
699 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
700 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
701 KDETH_OM_LARGE : KDETH_OM_SMALL);
702 SDMA_DBG(req, "Initial TID offset %u", req->tidoffset);
705 /* Save all the IO vector structures */
706 for (i = 0; i < req->data_iovs; i++) {
707 INIT_LIST_HEAD(&req->iovs[i].list);
708 memcpy(&req->iovs[i].iov,
710 sizeof(req->iovs[i].iov));
711 ret = pin_vector_pages(req, &req->iovs[i]);
716 req->data_len += req->iovs[i].iov.iov_len;
718 SDMA_DBG(req, "total data length %u", req->data_len);
720 if (pcount > req->info.npkts)
721 pcount = req->info.npkts;
724 * User space will provide the TID info only when the
725 * request type is EXPECTED. This is true even if there is
726 * only one packet in the request and the header is already
727 * setup. The reason for the singular TID case is that the
728 * driver needs to perform safety checks.
730 if (req_opcode(req->info.ctrl) == EXPECTED) {
731 u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
734 if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
740 * We have to copy all of the tids because they may vary
741 * in size and, therefore, the TID count might not be
742 * equal to the pkt count. However, there is no way to
743 * tell at this point.
745 tmp = memdup_user(iovec[idx].iov_base,
746 ntids * sizeof(*req->tids));
749 SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
758 dlid = be16_to_cpu(req->hdr.lrh[1]);
759 selector = dlid_to_selector(dlid);
760 selector += uctxt->ctxt + fd->subctxt;
761 req->sde = sdma_select_user_engine(dd, selector, vl);
763 if (!req->sde || !sdma_running(req->sde)) {
768 /* We don't need an AHG entry if the request contains only one packet */
769 if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG)) {
770 int ahg = sdma_ahg_alloc(req->sde);
772 if (likely(ahg >= 0)) {
773 req->ahg_idx = (u8)ahg;
774 set_bit(SDMA_REQ_HAVE_AHG, &req->flags);
778 set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
779 atomic_inc(&pq->n_reqs);
781 /* Send the first N packets in the request to buy us some time */
782 ret = user_sdma_send_pkts(req, pcount);
783 if (unlikely(ret < 0 && ret != -EBUSY)) {
789 * It is possible that the SDMA engine would have processed all the
790 * submitted packets by the time we get here. Therefore, only set
791 * packet queue state to ACTIVE if there are still uncompleted
794 if (atomic_read(&pq->n_reqs))
795 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
798 * This is a somewhat blocking send implementation.
799 * The driver will block the caller until all packets of the
800 * request have been submitted to the SDMA engine. However, it
801 * will not wait for send completions.
803 while (!test_bit(SDMA_REQ_SEND_DONE, &req->flags)) {
804 ret = user_sdma_send_pkts(req, pcount);
808 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
809 if (ACCESS_ONCE(req->seqcomp) ==
810 req->seqsubmitted - 1)
814 wait_event_interruptible_timeout(
816 (pq->state == SDMA_PKT_Q_ACTIVE),
818 SDMA_IOWAIT_TIMEOUT));
824 user_sdma_free_request(req, true);
827 set_comp_state(pq, cq, info.comp_idx, ERROR, req->status);
831 static inline u32 compute_data_length(struct user_sdma_request *req,
832 struct user_sdma_txreq *tx)
835 * Determine the proper size of the packet data.
836 * The size of the data of the first packet is in the header
837 * template. However, it includes the header and ICRC, which need
839 * The minimum representable packet data length in a header is 4 bytes,
840 * therefore, when the data length request is less than 4 bytes, there's
841 * only one packet, and the packet data length is equal to that of the
842 * request data length.
843 * The size of the remaining packets is the minimum of the frag
844 * size (MTU) or remaining data in the request.
849 if (req->data_len < sizeof(u32))
852 len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
853 (sizeof(tx->hdr) - 4));
854 } else if (req_opcode(req->info.ctrl) == EXPECTED) {
855 u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
858 * Get the data length based on the remaining space in the
861 len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
862 /* If we've filled up the TID pair, move to the next one. */
863 if (unlikely(!len) && ++req->tididx < req->n_tids &&
864 req->tids[req->tididx]) {
865 tidlen = EXP_TID_GET(req->tids[req->tididx],
868 len = min_t(u32, tidlen, req->info.fragsize);
871 * Since the TID pairs map entire pages, make sure that we
872 * are not going to try to send more data that we have
875 len = min(len, req->data_len - req->sent);
877 len = min(req->data_len - req->sent, (u32)req->info.fragsize);
879 SDMA_DBG(req, "Data Length = %u", len);
883 static inline u32 pad_len(u32 len)
885 if (len & (sizeof(u32) - 1))
886 len += sizeof(u32) - (len & (sizeof(u32) - 1));
890 static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
892 /* (Size of complete header - size of PBC) + 4B ICRC + data length */
893 return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
896 static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
900 struct user_sdma_txreq *tx = NULL;
901 struct hfi1_user_sdma_pkt_q *pq = NULL;
902 struct user_sdma_iovec *iovec = NULL;
909 /* If tx completion has reported an error, we are done. */
910 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
911 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
916 * Check if we might have sent the entire request already
918 if (unlikely(req->seqnum == req->info.npkts)) {
919 if (!list_empty(&req->txps))
924 if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
925 maxpkts = req->info.npkts - req->seqnum;
927 while (npkts < maxpkts) {
928 u32 datalen = 0, queued = 0, data_sent = 0;
932 * Check whether any of the completions have come back
933 * with errors. If so, we are not going to process any
934 * more packets from this request.
936 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
937 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
941 tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
948 INIT_LIST_HEAD(&tx->list);
951 * For the last packet set the ACK request
952 * and disable header suppression.
954 if (req->seqnum == req->info.npkts - 1)
955 tx->flags |= (TXREQ_FLAGS_REQ_ACK |
956 TXREQ_FLAGS_REQ_DISABLE_SH);
959 * Calculate the payload size - this is min of the fragment
960 * (MTU) size or the remaining bytes in the request but only
961 * if we have payload data.
964 iovec = &req->iovs[req->iov_idx];
965 if (ACCESS_ONCE(iovec->offset) == iovec->iov.iov_len) {
966 if (++req->iov_idx == req->data_iovs) {
970 iovec = &req->iovs[req->iov_idx];
971 WARN_ON(iovec->offset);
974 datalen = compute_data_length(req, tx);
977 * Disable header suppression for the payload <= 8DWS.
978 * If there is an uncorrectable error in the receive
979 * data FIFO when the received payload size is less than
980 * or equal to 8DWS then the RxDmaDataFifoRdUncErr is
981 * not reported.There is set RHF.EccErr if the header
986 "Request has data but pkt len is 0");
989 } else if (datalen <= 32) {
990 tx->flags |= TXREQ_FLAGS_REQ_DISABLE_SH;
994 if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags)) {
996 u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
997 u32 lrhlen = get_lrh_len(req->hdr,
1000 * Copy the request header into the tx header
1001 * because the HW needs a cacheline-aligned
1003 * This copy can be optimized out if the hdr
1004 * member of user_sdma_request were also
1005 * cacheline aligned.
1007 memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
1008 if (PBC2LRH(pbclen) != lrhlen) {
1009 pbclen = (pbclen & 0xf000) |
1011 tx->hdr.pbc[0] = cpu_to_le16(pbclen);
1013 ret = check_header_template(req, &tx->hdr,
1017 ret = sdma_txinit_ahg(&tx->txreq,
1018 SDMA_TXREQ_F_AHG_COPY,
1019 sizeof(tx->hdr) + datalen,
1020 req->ahg_idx, 0, NULL, 0,
1021 user_sdma_txreq_cb);
1024 ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq,
1032 changes = set_txreq_header_ahg(req, tx,
1036 sdma_txinit_ahg(&tx->txreq,
1037 SDMA_TXREQ_F_USE_AHG,
1038 datalen, req->ahg_idx, changes,
1039 req->ahg, sizeof(req->hdr),
1040 user_sdma_txreq_cb);
1043 ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
1044 datalen, user_sdma_txreq_cb);
1048 * Modify the header for this packet. This only needs
1049 * to be done if we are not going to use AHG. Otherwise,
1050 * the HW will do it based on the changes we gave it
1051 * during sdma_txinit_ahg().
1053 ret = set_txreq_header(req, tx, datalen);
1059 * If the request contains any data vectors, add up to
1060 * fragsize bytes to the descriptor.
1062 while (queued < datalen &&
1063 (req->sent + data_sent) < req->data_len) {
1064 unsigned long base, offset;
1065 unsigned pageidx, len;
1067 base = (unsigned long)iovec->iov.iov_base;
1068 offset = offset_in_page(base + iovec->offset +
1070 pageidx = (((iovec->offset + iov_offset +
1071 base) - (base & PAGE_MASK)) >> PAGE_SHIFT);
1072 len = offset + req->info.fragsize > PAGE_SIZE ?
1073 PAGE_SIZE - offset : req->info.fragsize;
1074 len = min((datalen - queued), len);
1075 ret = sdma_txadd_page(pq->dd, &tx->txreq,
1076 iovec->pages[pageidx],
1079 SDMA_DBG(req, "SDMA txreq add page failed %d\n",
1086 if (unlikely(queued < datalen &&
1087 pageidx == iovec->npages &&
1088 req->iov_idx < req->data_iovs - 1)) {
1089 iovec->offset += iov_offset;
1090 iovec = &req->iovs[++req->iov_idx];
1095 * The txreq was submitted successfully so we can update
1098 req->koffset += datalen;
1099 if (req_opcode(req->info.ctrl) == EXPECTED)
1100 req->tidoffset += datalen;
1101 req->sent += data_sent;
1103 iovec->offset += iov_offset;
1104 list_add_tail(&tx->txreq.list, &req->txps);
1106 * It is important to increment this here as it is used to
1107 * generate the BTH.PSN and, therefore, can't be bulk-updated
1108 * outside of the loop.
1110 tx->seqnum = req->seqnum++;
1114 ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps, &count);
1115 req->seqsubmitted += count;
1116 if (req->seqsubmitted == req->info.npkts) {
1117 set_bit(SDMA_REQ_SEND_DONE, &req->flags);
1119 * The txreq has already been submitted to the HW queue
1120 * so we can free the AHG entry now. Corruption will not
1121 * happen due to the sequential manner in which
1122 * descriptors are processed.
1124 if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags))
1125 sdma_ahg_free(req->sde, req->ahg_idx);
1130 sdma_txclean(pq->dd, &tx->txreq);
1132 kmem_cache_free(pq->txreq_cache, tx);
1137 * How many pages in this iovec element?
1139 static inline int num_user_pages(const struct iovec *iov)
1141 const unsigned long addr = (unsigned long)iov->iov_base;
1142 const unsigned long len = iov->iov_len;
1143 const unsigned long spage = addr & PAGE_MASK;
1144 const unsigned long epage = (addr + len - 1) & PAGE_MASK;
1146 return 1 + ((epage - spage) >> PAGE_SHIFT);
1149 static u32 sdma_cache_evict(struct hfi1_user_sdma_pkt_q *pq, u32 npages)
1151 struct evict_data evict_data;
1153 evict_data.cleared = 0;
1154 evict_data.target = npages;
1155 hfi1_mmu_rb_evict(pq->handler, &evict_data);
1156 return evict_data.cleared;
1159 static int pin_vector_pages(struct user_sdma_request *req,
1160 struct user_sdma_iovec *iovec)
1162 int ret = 0, pinned, npages, cleared;
1163 struct page **pages;
1164 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1165 struct sdma_mmu_node *node = NULL;
1166 struct mmu_rb_node *rb_node;
1168 rb_node = hfi1_mmu_rb_extract(pq->handler,
1169 (unsigned long)iovec->iov.iov_base,
1170 iovec->iov.iov_len);
1172 node = container_of(rb_node, struct sdma_mmu_node, rb);
1177 node = kzalloc(sizeof(*node), GFP_KERNEL);
1181 node->rb.addr = (unsigned long)iovec->iov.iov_base;
1183 atomic_set(&node->refcount, 0);
1186 npages = num_user_pages(&iovec->iov);
1187 if (node->npages < npages) {
1188 pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL);
1190 SDMA_DBG(req, "Failed page array alloc");
1194 memcpy(pages, node->pages, node->npages * sizeof(*pages));
1196 npages -= node->npages;
1199 if (!hfi1_can_pin_pages(pq->dd, pq->mm,
1200 atomic_read(&pq->n_locked), npages)) {
1201 cleared = sdma_cache_evict(pq, npages);
1202 if (cleared >= npages)
1205 pinned = hfi1_acquire_user_pages(pq->mm,
1206 ((unsigned long)iovec->iov.iov_base +
1207 (node->npages * PAGE_SIZE)), npages, 0,
1208 pages + node->npages);
1214 if (pinned != npages) {
1215 unpin_vector_pages(pq->mm, pages, node->npages,
1221 node->rb.len = iovec->iov.iov_len;
1222 node->pages = pages;
1223 node->npages += pinned;
1224 npages = node->npages;
1225 atomic_add(pinned, &pq->n_locked);
1227 iovec->pages = node->pages;
1228 iovec->npages = npages;
1231 ret = hfi1_mmu_rb_insert(req->pq->handler, &node->rb);
1233 atomic_sub(node->npages, &pq->n_locked);
1240 unpin_vector_pages(pq->mm, node->pages, 0, node->npages);
1245 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
1246 unsigned start, unsigned npages)
1248 hfi1_release_user_pages(mm, pages + start, npages, false);
1252 static int check_header_template(struct user_sdma_request *req,
1253 struct hfi1_pkt_header *hdr, u32 lrhlen,
1257 * Perform safety checks for any type of packet:
1258 * - transfer size is multiple of 64bytes
1259 * - packet length is multiple of 4 bytes
1260 * - packet length is not larger than MTU size
1262 * These checks are only done for the first packet of the
1263 * transfer since the header is "given" to us by user space.
1264 * For the remainder of the packets we compute the values.
1266 if (req->info.fragsize % PIO_BLOCK_SIZE || lrhlen & 0x3 ||
1267 lrhlen > get_lrh_len(*hdr, req->info.fragsize))
1270 if (req_opcode(req->info.ctrl) == EXPECTED) {
1272 * The header is checked only on the first packet. Furthermore,
1273 * we ensure that at least one TID entry is copied when the
1274 * request is submitted. Therefore, we don't have to verify that
1275 * tididx points to something sane.
1277 u32 tidval = req->tids[req->tididx],
1278 tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
1279 tididx = EXP_TID_GET(tidval, IDX),
1280 tidctrl = EXP_TID_GET(tidval, CTRL),
1282 __le32 kval = hdr->kdeth.ver_tid_offset;
1284 tidoff = KDETH_GET(kval, OFFSET) *
1285 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
1286 KDETH_OM_LARGE : KDETH_OM_SMALL);
1288 * Expected receive packets have the following
1289 * additional checks:
1290 * - offset is not larger than the TID size
1291 * - TIDCtrl values match between header and TID array
1292 * - TID indexes match between header and TID array
1294 if ((tidoff + datalen > tidlen) ||
1295 KDETH_GET(kval, TIDCTRL) != tidctrl ||
1296 KDETH_GET(kval, TID) != tididx)
1303 * Correctly set the BTH.PSN field based on type of
1304 * transfer - eager packets can just increment the PSN but
1305 * expected packets encode generation and sequence in the
1306 * BTH.PSN field so just incrementing will result in errors.
1308 static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
1310 u32 val = be32_to_cpu(bthpsn),
1311 mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
1315 psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);
1321 static int set_txreq_header(struct user_sdma_request *req,
1322 struct user_sdma_txreq *tx, u32 datalen)
1324 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1325 struct hfi1_pkt_header *hdr = &tx->hdr;
1328 u32 tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
1330 /* Copy the header template to the request before modification */
1331 memcpy(hdr, &req->hdr, sizeof(*hdr));
1334 * Check if the PBC and LRH length are mismatched. If so
1335 * adjust both in the header.
1337 pbclen = le16_to_cpu(hdr->pbc[0]);
1338 if (PBC2LRH(pbclen) != lrhlen) {
1339 pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
1340 hdr->pbc[0] = cpu_to_le16(pbclen);
1341 hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
1344 * This is the first packet in the sequence that has
1345 * a "static" size that can be used for the rest of
1346 * the packets (besides the last one).
1348 if (unlikely(req->seqnum == 2)) {
1350 * From this point on the lengths in both the
1351 * PBC and LRH are the same until the last
1353 * Adjust the template so we don't have to update
1356 req->hdr.pbc[0] = hdr->pbc[0];
1357 req->hdr.lrh[2] = hdr->lrh[2];
1361 * We only have to modify the header if this is not the
1362 * first packet in the request. Otherwise, we use the
1363 * header given to us.
1365 if (unlikely(!req->seqnum)) {
1366 ret = check_header_template(req, hdr, lrhlen, datalen);
1372 hdr->bth[2] = cpu_to_be32(
1373 set_pkt_bth_psn(hdr->bth[2],
1374 (req_opcode(req->info.ctrl) == EXPECTED),
1377 /* Set ACK request on last packet */
1378 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1379 hdr->bth[2] |= cpu_to_be32(1UL << 31);
1381 /* Set the new offset */
1382 hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
1383 /* Expected packets have to fill in the new TID information */
1384 if (req_opcode(req->info.ctrl) == EXPECTED) {
1385 tidval = req->tids[req->tididx];
1387 * If the offset puts us at the end of the current TID,
1388 * advance everything.
1390 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1394 * Since we don't copy all the TIDs, all at once,
1395 * we have to check again.
1397 if (++req->tididx > req->n_tids - 1 ||
1398 !req->tids[req->tididx]) {
1401 tidval = req->tids[req->tididx];
1403 req->omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
1404 KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE : KDETH_OM_SMALL;
1405 /* Set KDETH.TIDCtrl based on value for this TID. */
1406 KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
1407 EXP_TID_GET(tidval, CTRL));
1408 /* Set KDETH.TID based on value for this TID */
1409 KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
1410 EXP_TID_GET(tidval, IDX));
1411 /* Clear KDETH.SH when DISABLE_SH flag is set */
1412 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH))
1413 KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
1415 * Set the KDETH.OFFSET and KDETH.OM based on size of
1418 SDMA_DBG(req, "TID offset %ubytes %uunits om%u",
1419 req->tidoffset, req->tidoffset / req->omfactor,
1420 req->omfactor != KDETH_OM_SMALL);
1421 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1422 req->tidoffset / req->omfactor);
1423 KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
1424 req->omfactor != KDETH_OM_SMALL);
1427 trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
1428 req->info.comp_idx, hdr, tidval);
1429 return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
1432 static int set_txreq_header_ahg(struct user_sdma_request *req,
1433 struct user_sdma_txreq *tx, u32 len)
1436 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1437 struct hfi1_pkt_header *hdr = &req->hdr;
1438 u16 pbclen = le16_to_cpu(hdr->pbc[0]);
1439 u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(len));
1441 if (PBC2LRH(pbclen) != lrhlen) {
1442 /* PBC.PbcLengthDWs */
1443 AHG_HEADER_SET(req->ahg, diff, 0, 0, 12,
1444 cpu_to_le16(LRH2PBC(lrhlen)));
1445 /* LRH.PktLen (we need the full 16 bits due to byte swap) */
1446 AHG_HEADER_SET(req->ahg, diff, 3, 0, 16,
1447 cpu_to_be16(lrhlen >> 2));
1451 * Do the common updates
1453 /* BTH.PSN and BTH.A */
1454 val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
1455 (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
1456 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1458 AHG_HEADER_SET(req->ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16));
1459 AHG_HEADER_SET(req->ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff));
1461 AHG_HEADER_SET(req->ahg, diff, 15, 0, 16,
1462 cpu_to_le16(req->koffset & 0xffff));
1463 AHG_HEADER_SET(req->ahg, diff, 15, 16, 16,
1464 cpu_to_le16(req->koffset >> 16));
1465 if (req_opcode(req->info.ctrl) == EXPECTED) {
1468 tidval = req->tids[req->tididx];
1471 * If the offset puts us at the end of the current TID,
1472 * advance everything.
1474 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1478 * Since we don't copy all the TIDs, all at once,
1479 * we have to check again.
1481 if (++req->tididx > req->n_tids - 1 ||
1482 !req->tids[req->tididx]) {
1485 tidval = req->tids[req->tididx];
1487 req->omfactor = ((EXP_TID_GET(tidval, LEN) *
1489 KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE :
1491 /* KDETH.OM and KDETH.OFFSET (TID) */
1492 AHG_HEADER_SET(req->ahg, diff, 7, 0, 16,
1493 ((!!(req->omfactor - KDETH_OM_SMALL)) << 15 |
1494 ((req->tidoffset / req->omfactor) & 0x7fff)));
1495 /* KDETH.TIDCtrl, KDETH.TID, KDETH.Intr, KDETH.SH */
1496 val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
1497 (EXP_TID_GET(tidval, IDX) & 0x3ff));
1499 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH)) {
1500 val |= cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1502 AHG_KDETH_INTR_SHIFT));
1504 val |= KDETH_GET(hdr->kdeth.ver_tid_offset, SH) ?
1505 cpu_to_le16(0x1 << AHG_KDETH_SH_SHIFT) :
1506 cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1508 AHG_KDETH_INTR_SHIFT));
1511 AHG_HEADER_SET(req->ahg, diff, 7, 16, 14, val);
1514 trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
1515 req->info.comp_idx, req->sde->this_idx,
1516 req->ahg_idx, req->ahg, diff, tidval);
1521 * SDMA tx request completion callback. Called when the SDMA progress
1522 * state machine gets notification that the SDMA descriptors for this
1523 * tx request have been processed by the DMA engine. Called in
1524 * interrupt context.
1526 static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
1528 struct user_sdma_txreq *tx =
1529 container_of(txreq, struct user_sdma_txreq, txreq);
1530 struct user_sdma_request *req;
1531 struct hfi1_user_sdma_pkt_q *pq;
1532 struct hfi1_user_sdma_comp_q *cq;
1542 if (status != SDMA_TXREQ_S_OK) {
1543 SDMA_DBG(req, "SDMA completion with error %d",
1545 set_bit(SDMA_REQ_HAS_ERROR, &req->flags);
1548 req->seqcomp = tx->seqnum;
1549 kmem_cache_free(pq->txreq_cache, tx);
1552 idx = req->info.comp_idx;
1553 if (req->status == -1 && status == SDMA_TXREQ_S_OK) {
1554 if (req->seqcomp == req->info.npkts - 1) {
1556 user_sdma_free_request(req, false);
1558 set_comp_state(pq, cq, idx, COMPLETE, 0);
1561 if (status != SDMA_TXREQ_S_OK)
1562 req->status = status;
1563 if (req->seqcomp == (ACCESS_ONCE(req->seqsubmitted) - 1) &&
1564 (test_bit(SDMA_REQ_SEND_DONE, &req->flags) ||
1565 test_bit(SDMA_REQ_DONE_ERROR, &req->flags))) {
1566 user_sdma_free_request(req, false);
1568 set_comp_state(pq, cq, idx, ERROR, req->status);
1573 static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
1575 if (atomic_dec_and_test(&pq->n_reqs)) {
1576 xchg(&pq->state, SDMA_PKT_Q_INACTIVE);
1581 static void user_sdma_free_request(struct user_sdma_request *req, bool unpin)
1583 if (!list_empty(&req->txps)) {
1584 struct sdma_txreq *t, *p;
1586 list_for_each_entry_safe(t, p, &req->txps, list) {
1587 struct user_sdma_txreq *tx =
1588 container_of(t, struct user_sdma_txreq, txreq);
1589 list_del_init(&t->list);
1590 sdma_txclean(req->pq->dd, t);
1591 kmem_cache_free(req->pq->txreq_cache, tx);
1594 if (req->data_iovs) {
1595 struct sdma_mmu_node *node;
1598 for (i = 0; i < req->data_iovs; i++) {
1599 node = req->iovs[i].node;
1604 hfi1_mmu_rb_remove(req->pq->handler,
1607 atomic_dec(&node->refcount);
1611 clear_bit(req->info.comp_idx, req->pq->req_in_use);
1614 static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
1615 struct hfi1_user_sdma_comp_q *cq,
1616 u16 idx, enum hfi1_sdma_comp_state state,
1619 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] Setting completion status %u %d",
1620 pq->dd->unit, pq->ctxt, pq->subctxt, idx, state, ret);
1622 cq->comps[idx].errcode = -ret;
1623 smp_wmb(); /* make sure errcode is visible first */
1624 cq->comps[idx].status = state;
1625 trace_hfi1_sdma_user_completion(pq->dd, pq->ctxt, pq->subctxt,
1629 static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
1632 return (bool)(node->addr == addr);
1635 static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode)
1637 struct sdma_mmu_node *node =
1638 container_of(mnode, struct sdma_mmu_node, rb);
1640 atomic_inc(&node->refcount);
1645 * Return 1 to remove the node from the rb tree and call the remove op.
1647 * Called with the rb tree lock held.
1649 static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
1650 void *evict_arg, bool *stop)
1652 struct sdma_mmu_node *node =
1653 container_of(mnode, struct sdma_mmu_node, rb);
1654 struct evict_data *evict_data = evict_arg;
1656 /* is this node still being used? */
1657 if (atomic_read(&node->refcount))
1658 return 0; /* keep this node */
1660 /* this node will be evicted, add its pages to our count */
1661 evict_data->cleared += node->npages;
1663 /* have enough pages been cleared? */
1664 if (evict_data->cleared >= evict_data->target)
1667 return 1; /* remove this node */
1670 static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode)
1672 struct sdma_mmu_node *node =
1673 container_of(mnode, struct sdma_mmu_node, rb);
1675 atomic_sub(node->npages, &node->pq->n_locked);
1677 unpin_vector_pages(node->pq->mm, node->pages, 0, node->npages);
1682 static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode)
1684 struct sdma_mmu_node *node =
1685 container_of(mnode, struct sdma_mmu_node, rb);
1687 if (!atomic_read(&node->refcount))