drivers/infiniband/hw/i40iw/i40iw_verbs.c

   1 /*******************************************************************************
   2 *
   3 * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
   4 *
   5 * This software is available to you under a choice of one of two
   6 * licenses.  You may choose to be licensed under the terms of the GNU
   7 * General Public License (GPL) Version 2, available from the file
   8 * COPYING in the main directory of this source tree, or the
   9 * OpenFabrics.org BSD license below:
  10 *
  11 *   Redistribution and use in source and binary forms, with or
  12 *   without modification, are permitted provided that the following
  13 *   conditions are met:
  14 *
  15 *    - Redistributions of source code must retain the above
  16 *       copyright notice, this list of conditions and the following
  17 *       disclaimer.
  18 *
  19 *    - Redistributions in binary form must reproduce the above
  20 *       copyright notice, this list of conditions and the following
  21 *       disclaimer in the documentation and/or other materials
  22 *       provided with the distribution.
  23 *
  24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31 * SOFTWARE.
  32 *
  33 *******************************************************************************/
  34
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/random.h>
  38 #include <linux/highmem.h>
  39 #include <linux/time.h>
  40 #include <linux/hugetlb.h>
  41 #include <asm/byteorder.h>
  42 #include <net/ip.h>
  43 #include <rdma/ib_verbs.h>
  44 #include <rdma/iw_cm.h>
  45 #include <rdma/ib_user_verbs.h>
  46 #include <rdma/ib_umem.h>
  47 #include "i40iw.h"
  48
  49 /**
  50  * i40iw_query_device - get device attributes
  51  * @ibdev: device pointer from stack
  52  * @props: returning device attributes
  53  * @udata: user data
  54  */
  55 static int i40iw_query_device(struct ib_device *ibdev,
  56                               struct ib_device_attr *props,
  57                               struct ib_udata *udata)
  58 {
  59         struct i40iw_device *iwdev = to_iwdev(ibdev);
  60
  61         if (udata->inlen || udata->outlen)
  62                 return -EINVAL;
  63         memset(props, 0, sizeof(*props));
  64         ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
  65         props->fw_ver = I40IW_FW_VERSION;
  66         props->device_cap_flags = iwdev->device_cap_flags;
  67         props->vendor_id = iwdev->ldev->pcidev->vendor;
  68         props->vendor_part_id = iwdev->ldev->pcidev->device;
  69         props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
  70         props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
  71         props->max_qp = iwdev->max_qp - iwdev->used_qps;
  72         props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
  73         props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
  74         props->max_cq = iwdev->max_cq - iwdev->used_cqs;
  75         props->max_cqe = iwdev->max_cqe;
  76         props->max_mr = iwdev->max_mr - iwdev->used_mrs;
  77         props->max_pd = iwdev->max_pd - iwdev->used_pds;
  78         props->max_sge_rd = I40IW_MAX_SGE_RD;
  79         props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
  80         props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  81         props->atomic_cap = IB_ATOMIC_NONE;
  82         props->max_map_per_fmr = 1;
  83         props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
  84         return 0;
  85 }
  86
  87 /**
  88  * i40iw_query_port - get port attrubutes
  89  * @ibdev: device pointer from stack
  90  * @port: port number for query
  91  * @props: returning device attributes
  92  */
  93 static int i40iw_query_port(struct ib_device *ibdev,
  94                             u8 port,
  95                             struct ib_port_attr *props)
  96 {
  97         struct i40iw_device *iwdev = to_iwdev(ibdev);
  98         struct net_device *netdev = iwdev->netdev;
  99
 100         /* props being zeroed by the caller, avoid zeroing it here */
 101         props->max_mtu = IB_MTU_4096;
 102         props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
 103
 104         props->lid = 1;
 105         if (netif_carrier_ok(iwdev->netdev))
 106                 props->state = IB_PORT_ACTIVE;
 107         else
 108                 props->state = IB_PORT_DOWN;
 109         props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
 110                 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
 111         props->gid_tbl_len = 1;
 112         props->pkey_tbl_len = 1;
 113         props->active_width = IB_WIDTH_4X;
 114         props->active_speed = 1;
 115         props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
 116         return 0;
 117 }
 118
 119 /**
 120  * i40iw_alloc_ucontext - Allocate the user context data structure
 121  * @ibdev: device pointer from stack
 122  * @udata: user data
 123  *
 124  * This keeps track of all objects associated with a particular
 125  * user-mode client.
 126  */
 127 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
 128                                                 struct ib_udata *udata)
 129 {
 130         struct i40iw_device *iwdev = to_iwdev(ibdev);
 131         struct i40iw_alloc_ucontext_req req;
 132         struct i40iw_alloc_ucontext_resp uresp;
 133         struct i40iw_ucontext *ucontext;
 134
 135         if (ib_copy_from_udata(&req, udata, sizeof(req)))
 136                 return ERR_PTR(-EINVAL);
 137
 138         if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
 139                 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
 140                 return ERR_PTR(-EINVAL);
 141         }
 142
 143         memset(&uresp, 0, sizeof(uresp));
 144         uresp.max_qps = iwdev->max_qp;
 145         uresp.max_pds = iwdev->max_pd;
 146         uresp.wq_size = iwdev->max_qp_wr * 2;
 147         uresp.kernel_ver = req.userspace_ver;
 148
 149         ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
 150         if (!ucontext)
 151                 return ERR_PTR(-ENOMEM);
 152
 153         ucontext->iwdev = iwdev;
 154         ucontext->abi_ver = req.userspace_ver;
 155
 156         if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 157                 kfree(ucontext);
 158                 return ERR_PTR(-EFAULT);
 159         }
 160
 161         INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 162         spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 163         INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 164         spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 165
 166         return &ucontext->ibucontext;
 167 }
 168
 169 /**
 170  * i40iw_dealloc_ucontext - deallocate the user context data structure
 171  * @context: user context created during alloc
 172  */
 173 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
 174 {
 175         struct i40iw_ucontext *ucontext = to_ucontext(context);
 176         unsigned long flags;
 177
 178         spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
 179         if (!list_empty(&ucontext->cq_reg_mem_list)) {
 180                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 181                 return -EBUSY;
 182         }
 183         spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
 184         spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 185         if (!list_empty(&ucontext->qp_reg_mem_list)) {
 186                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 187                 return -EBUSY;
 188         }
 189         spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 190
 191         kfree(ucontext);
 192         return 0;
 193 }
 194
 195 /**
 196  * i40iw_mmap - user memory map
 197  * @context: context created during alloc
 198  * @vma: kernel info for user memory map
 199  */
 200 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 201 {
 202         struct i40iw_ucontext *ucontext;
 203         u64 db_addr_offset;
 204         u64 push_offset;
 205
 206         ucontext = to_ucontext(context);
 207         if (ucontext->iwdev->sc_dev.is_pf) {
 208                 db_addr_offset = I40IW_DB_ADDR_OFFSET;
 209                 push_offset = I40IW_PUSH_OFFSET;
 210                 if (vma->vm_pgoff)
 211                         vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
 212         } else {
 213                 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
 214                 push_offset = I40IW_VF_PUSH_OFFSET;
 215                 if (vma->vm_pgoff)
 216                         vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
 217         }
 218
 219         vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
 220
 221         if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
 222                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 223                 vma->vm_private_data = ucontext;
 224         } else {
 225                 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
 226                         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 227                 else
 228                         vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 229         }
 230
 231         if (io_remap_pfn_range(vma, vma->vm_start,
 232                                vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
 233                                PAGE_SIZE, vma->vm_page_prot))
 234                 return -EAGAIN;
 235
 236         return 0;
 237 }
 238
 239 /**
 240  * i40iw_alloc_push_page - allocate a push page for qp
 241  * @iwdev: iwarp device
 242  * @qp: hardware control qp
 243  */
 244 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 245 {
 246         struct i40iw_cqp_request *cqp_request;
 247         struct cqp_commands_info *cqp_info;
 248         enum i40iw_status_code status;
 249
 250         if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
 251                 return;
 252
 253         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
 254         if (!cqp_request)
 255                 return;
 256
 257         atomic_inc(&cqp_request->refcount);
 258
 259         cqp_info = &cqp_request->info;
 260         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 261         cqp_info->post_sq = 1;
 262
 263         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 264         cqp_info->in.u.manage_push_page.info.free_page = 0;
 265         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 266         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 267
 268         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 269         if (!status)
 270                 qp->push_idx = cqp_request->compl_info.op_ret_val;
 271         else
 272                 i40iw_pr_err("CQP-OP Push page fail");
 273         i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
 274 }
 275
 276 /**
 277  * i40iw_dealloc_push_page - free a push page for qp
 278  * @iwdev: iwarp device
 279  * @qp: hardware control qp
 280  */
 281 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
 282 {
 283         struct i40iw_cqp_request *cqp_request;
 284         struct cqp_commands_info *cqp_info;
 285         enum i40iw_status_code status;
 286
 287         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
 288                 return;
 289
 290         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
 291         if (!cqp_request)
 292                 return;
 293
 294         cqp_info = &cqp_request->info;
 295         cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
 296         cqp_info->post_sq = 1;
 297
 298         cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
 299         cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
 300         cqp_info->in.u.manage_push_page.info.free_page = 1;
 301         cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
 302         cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 303
 304         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 305         if (!status)
 306                 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 307         else
 308                 i40iw_pr_err("CQP-OP Push page fail");
 309 }
 310
 311 /**
 312  * i40iw_alloc_pd - allocate protection domain
 313  * @ibdev: device pointer from stack
 314  * @context: user context created during alloc
 315  * @udata: user data
 316  */
 317 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
 318                                     struct ib_ucontext *context,
 319                                     struct ib_udata *udata)
 320 {
 321         struct i40iw_pd *iwpd;
 322         struct i40iw_device *iwdev = to_iwdev(ibdev);
 323         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 324         struct i40iw_alloc_pd_resp uresp;
 325         struct i40iw_sc_pd *sc_pd;
 326         struct i40iw_ucontext *ucontext;
 327         u32 pd_id = 0;
 328         int err;
 329
 330         if (iwdev->closing)
 331                 return ERR_PTR(-ENODEV);
 332
 333         err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
 334                                    iwdev->max_pd, &pd_id, &iwdev->next_pd);
 335         if (err) {
 336                 i40iw_pr_err("alloc resource failed\n");
 337                 return ERR_PTR(err);
 338         }
 339
 340         iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
 341         if (!iwpd) {
 342                 err = -ENOMEM;
 343                 goto free_res;
 344         }
 345
 346         sc_pd = &iwpd->sc_pd;
 347
 348         if (context) {
 349                 ucontext = to_ucontext(context);
 350                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 351                 memset(&uresp, 0, sizeof(uresp));
 352                 uresp.pd_id = pd_id;
 353                 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
 354                         err = -EFAULT;
 355                         goto error;
 356                 }
 357         } else {
 358                 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
 359         }
 360
 361         i40iw_add_pdusecount(iwpd);
 362         return &iwpd->ibpd;
 363 error:
 364         kfree(iwpd);
 365 free_res:
 366         i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
 367         return ERR_PTR(err);
 368 }
 369
 370 /**
 371  * i40iw_dealloc_pd - deallocate pd
 372  * @ibpd: ptr of pd to be deallocated
 373  */
 374 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
 375 {
 376         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 377         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 378
 379         i40iw_rem_pdusecount(iwpd, iwdev);
 380         return 0;
 381 }
 382
 383 /**
 384  * i40iw_qp_roundup - return round up qp ring size
 385  * @wr_ring_size: ring size to round up
 386  */
 387 static int i40iw_qp_roundup(u32 wr_ring_size)
 388 {
 389         int scount = 1;
 390
 391         if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
 392                 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
 393
 394         for (wr_ring_size--; scount <= 16; scount *= 2)
 395                 wr_ring_size |= wr_ring_size >> scount;
 396         return ++wr_ring_size;
 397 }
 398
 399 /**
 400  * i40iw_get_pbl - Retrieve pbl from a list given a virtual
 401  * address
 402  * @va: user virtual address
 403  * @pbl_list: pbl list to search in (QP's or CQ's)
 404  */
 405 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
 406                                        struct list_head *pbl_list)
 407 {
 408         struct i40iw_pbl *iwpbl;
 409
 410         list_for_each_entry(iwpbl, pbl_list, list) {
 411                 if (iwpbl->user_base == va) {
 412                         list_del(&iwpbl->list);
 413                         return iwpbl;
 414                 }
 415         }
 416         return NULL;
 417 }
 418
 419 /**
 420  * i40iw_free_qp_resources - free up memory resources for qp
 421  * @iwdev: iwarp device
 422  * @iwqp: qp ptr (user or kernel)
 423  * @qp_num: qp number assigned
 424  */
 425 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
 426                              struct i40iw_qp *iwqp,
 427                              u32 qp_num)
 428 {
 429         i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
 430         if (qp_num)
 431                 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
 432         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
 433         i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
 434         kfree(iwqp->kqp.wrid_mem);
 435         iwqp->kqp.wrid_mem = NULL;
 436         kfree(iwqp->allocated_buffer);
 437 }
 438
 439 /**
 440  * i40iw_clean_cqes - clean cq entries for qp
 441  * @iwqp: qp ptr (user or kernel)
 442  * @iwcq: cq ptr
 443  */
 444 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
 445 {
 446         struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 447
 448         ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
 449 }
 450
 451 /**
 452  * i40iw_destroy_qp - destroy qp
 453  * @ibqp: qp's ib pointer also to get to device's qp address
 454  */
 455 static int i40iw_destroy_qp(struct ib_qp *ibqp)
 456 {
 457         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 458
 459         iwqp->destroyed = 1;
 460
 461         if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
 462                 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
 463
 464         if (!iwqp->user_mode) {
 465                 if (iwqp->iwscq) {
 466                         i40iw_clean_cqes(iwqp, iwqp->iwscq);
 467                         if (iwqp->iwrcq != iwqp->iwscq)
 468                                 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
 469                 }
 470         }
 471
 472         i40iw_rem_ref(&iwqp->ibqp);
 473         return 0;
 474 }
 475
 476 /**
 477  * i40iw_setup_virt_qp - setup for allocation of virtual qp
 478  * @dev: iwarp device
 479  * @qp: qp ptr
 480  * @init_info: initialize info to return
 481  */
 482 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
 483                                struct i40iw_qp *iwqp,
 484                                struct i40iw_qp_init_info *init_info)
 485 {
 486         struct i40iw_pbl *iwpbl = iwqp->iwpbl;
 487         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
 488
 489         iwqp->page = qpmr->sq_page;
 490         init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
 491         if (iwpbl->pbl_allocated) {
 492                 init_info->virtual_map = true;
 493                 init_info->sq_pa = qpmr->sq_pbl.idx;
 494                 init_info->rq_pa = qpmr->rq_pbl.idx;
 495         } else {
 496                 init_info->sq_pa = qpmr->sq_pbl.addr;
 497                 init_info->rq_pa = qpmr->rq_pbl.addr;
 498         }
 499         return 0;
 500 }
 501
 502 /**
 503  * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
 504  * @iwdev: iwarp device
 505  * @iwqp: qp ptr (user or kernel)
 506  * @info: initialize info to return
 507  */
 508 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
 509                                 struct i40iw_qp *iwqp,
 510                                 struct i40iw_qp_init_info *info)
 511 {
 512         struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
 513         u32 sqdepth, rqdepth;
 514         u32 sq_size, rq_size;
 515         u8 sqshift;
 516         u32 size;
 517         enum i40iw_status_code status;
 518         struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 519
 520         sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
 521         rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
 522
 523         status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
 524         if (status)
 525                 return -ENOMEM;
 526
 527         sqdepth = sq_size << sqshift;
 528         rqdepth = rq_size << I40IW_MAX_RQ_WQE_SHIFT;
 529
 530         size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
 531         iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
 532
 533         ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
 534         if (!ukinfo->sq_wrtrk_array)
 535                 return -ENOMEM;
 536
 537         ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
 538
 539         size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
 540         size += (I40IW_SHADOW_AREA_SIZE << 3);
 541
 542         status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
 543         if (status) {
 544                 kfree(ukinfo->sq_wrtrk_array);
 545                 ukinfo->sq_wrtrk_array = NULL;
 546                 return -ENOMEM;
 547         }
 548
 549         ukinfo->sq = mem->va;
 550         info->sq_pa = mem->pa;
 551
 552         ukinfo->rq = &ukinfo->sq[sqdepth];
 553         info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
 554
 555         ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
 556         info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
 557
 558         ukinfo->sq_size = sq_size;
 559         ukinfo->rq_size = rq_size;
 560         ukinfo->qp_id = iwqp->ibqp.qp_num;
 561         return 0;
 562 }
 563
 564 /**
 565  * i40iw_create_qp - create qp
 566  * @ibpd: ptr of pd
 567  * @init_attr: attributes for qp
 568  * @udata: user data for create qp
 569  */
 570 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
 571                                      struct ib_qp_init_attr *init_attr,
 572                                      struct ib_udata *udata)
 573 {
 574         struct i40iw_pd *iwpd = to_iwpd(ibpd);
 575         struct i40iw_device *iwdev = to_iwdev(ibpd->device);
 576         struct i40iw_cqp *iwcqp = &iwdev->cqp;
 577         struct i40iw_qp *iwqp;
 578         struct i40iw_ucontext *ucontext;
 579         struct i40iw_create_qp_req req;
 580         struct i40iw_create_qp_resp uresp;
 581         u32 qp_num = 0;
 582         void *mem;
 583         enum i40iw_status_code ret;
 584         int err_code;
 585         int sq_size;
 586         int rq_size;
 587         struct i40iw_sc_qp *qp;
 588         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 589         struct i40iw_qp_init_info init_info;
 590         struct i40iw_create_qp_info *qp_info;
 591         struct i40iw_cqp_request *cqp_request;
 592         struct cqp_commands_info *cqp_info;
 593
 594         struct i40iw_qp_host_ctx_info *ctx_info;
 595         struct i40iwarp_offload_info *iwarp_info;
 596         unsigned long flags;
 597
 598         if (iwdev->closing)
 599                 return ERR_PTR(-ENODEV);
 600
 601         if (init_attr->create_flags)
 602                 return ERR_PTR(-EINVAL);
 603         if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
 604                 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 605
 606         if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 607                 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 608
 609         if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
 610                 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 611
 612         memset(&init_info, 0, sizeof(init_info));
 613
 614         sq_size = init_attr->cap.max_send_wr;
 615         rq_size = init_attr->cap.max_recv_wr;
 616
 617         init_info.vsi = &iwdev->vsi;
 618         init_info.qp_uk_init_info.sq_size = sq_size;
 619         init_info.qp_uk_init_info.rq_size = rq_size;
 620         init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 621         init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 622         init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 623
 624         mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
 625         if (!mem)
 626                 return ERR_PTR(-ENOMEM);
 627
 628         iwqp = (struct i40iw_qp *)mem;
 629         qp = &iwqp->sc_qp;
 630         qp->back_qp = (void *)iwqp;
 631         qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
 632
 633         iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
 634
 635         if (i40iw_allocate_dma_mem(dev->hw,
 636                                    &iwqp->q2_ctx_mem,
 637                                    I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
 638                                    256)) {
 639                 i40iw_pr_err("dma_mem failed\n");
 640                 err_code = -ENOMEM;
 641                 goto error;
 642         }
 643
 644         init_info.q2 = iwqp->q2_ctx_mem.va;
 645         init_info.q2_pa = iwqp->q2_ctx_mem.pa;
 646
 647         init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
 648         init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
 649
 650         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
 651                                         &qp_num, &iwdev->next_qp);
 652         if (err_code) {
 653                 i40iw_pr_err("qp resource\n");
 654                 goto error;
 655         }
 656
 657         iwqp->allocated_buffer = mem;
 658         iwqp->iwdev = iwdev;
 659         iwqp->iwpd = iwpd;
 660         iwqp->ibqp.qp_num = qp_num;
 661         qp = &iwqp->sc_qp;
 662         iwqp->iwscq = to_iwcq(init_attr->send_cq);
 663         iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
 664
 665         iwqp->host_ctx.va = init_info.host_ctx;
 666         iwqp->host_ctx.pa = init_info.host_ctx_pa;
 667         iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
 668
 669         init_info.pd = &iwpd->sc_pd;
 670         init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
 671         iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
 672
 673         if (init_attr->qp_type != IB_QPT_RC) {
 674                 err_code = -EINVAL;
 675                 goto error;
 676         }
 677         if (iwdev->push_mode)
 678                 i40iw_alloc_push_page(iwdev, qp);
 679         if (udata) {
 680                 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
 681                 if (err_code) {
 682                         i40iw_pr_err("ib_copy_from_data\n");
 683                         goto error;
 684                 }
 685                 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 686                 if (ibpd->uobject && ibpd->uobject->context) {
 687                         iwqp->user_mode = 1;
 688                         ucontext = to_ucontext(ibpd->uobject->context);
 689
 690                         if (req.user_wqe_buffers) {
 691                                 spin_lock_irqsave(
 692                                     &ucontext->qp_reg_mem_list_lock, flags);
 693                                 iwqp->iwpbl = i40iw_get_pbl(
 694                                     (unsigned long)req.user_wqe_buffers,
 695                                     &ucontext->qp_reg_mem_list);
 696                                 spin_unlock_irqrestore(
 697                                     &ucontext->qp_reg_mem_list_lock, flags);
 698
 699                                 if (!iwqp->iwpbl) {
 700                                         err_code = -ENODATA;
 701                                         i40iw_pr_err("no pbl info\n");
 702                                         goto error;
 703                                 }
 704                         }
 705                 }
 706                 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
 707         } else {
 708                 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
 709         }
 710
 711         if (err_code) {
 712                 i40iw_pr_err("setup qp failed\n");
 713                 goto error;
 714         }
 715
 716         init_info.type = I40IW_QP_TYPE_IWARP;
 717         ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
 718         if (ret) {
 719                 err_code = -EPROTO;
 720                 i40iw_pr_err("qp_init fail\n");
 721                 goto error;
 722         }
 723         ctx_info = &iwqp->ctx_info;
 724         iwarp_info = &iwqp->iwarp_info;
 725         iwarp_info->rd_enable = true;
 726         iwarp_info->wr_rdresp_en = true;
 727         if (!iwqp->user_mode) {
 728                 iwarp_info->fast_reg_en = true;
 729                 iwarp_info->priv_mode_en = true;
 730         }
 731         iwarp_info->ddp_ver = 1;
 732         iwarp_info->rdmap_ver = 1;
 733
 734         ctx_info->iwarp_info_valid = true;
 735         ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
 736         ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
 737         if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
 738                 ctx_info->push_mode_en = false;
 739         } else {
 740                 ctx_info->push_mode_en = true;
 741                 ctx_info->push_idx = qp->push_idx;
 742         }
 743
 744         ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
 745                                              (u64 *)iwqp->host_ctx.va,
 746                                              ctx_info);
 747         ctx_info->iwarp_info_valid = false;
 748         cqp_request = i40iw_get_cqp_request(iwcqp, true);
 749         if (!cqp_request) {
 750                 err_code = -ENOMEM;
 751                 goto error;
 752         }
 753         cqp_info = &cqp_request->info;
 754         qp_info = &cqp_request->info.in.u.qp_create.info;
 755
 756         memset(qp_info, 0, sizeof(*qp_info));
 757
 758         qp_info->cq_num_valid = true;
 759         qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
 760
 761         cqp_info->cqp_cmd = OP_QP_CREATE;
 762         cqp_info->post_sq = 1;
 763         cqp_info->in.u.qp_create.qp = qp;
 764         cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 765         ret = i40iw_handle_cqp_op(iwdev, cqp_request);
 766         if (ret) {
 767                 i40iw_pr_err("CQP-OP QP create fail");
 768                 err_code = -EACCES;
 769                 goto error;
 770         }
 771
 772         i40iw_add_ref(&iwqp->ibqp);
 773         spin_lock_init(&iwqp->lock);
 774         iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
 775         iwdev->qp_table[qp_num] = iwqp;
 776         i40iw_add_pdusecount(iwqp->iwpd);
 777         i40iw_add_devusecount(iwdev);
 778         if (ibpd->uobject && udata) {
 779                 memset(&uresp, 0, sizeof(uresp));
 780                 uresp.actual_sq_size = sq_size;
 781                 uresp.actual_rq_size = rq_size;
 782                 uresp.qp_id = qp_num;
 783                 uresp.push_idx = qp->push_idx;
 784                 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
 785                 if (err_code) {
 786                         i40iw_pr_err("copy_to_udata failed\n");
 787                         i40iw_destroy_qp(&iwqp->ibqp);
 788                            /* let the completion of the qp destroy free the qp */
 789                         return ERR_PTR(err_code);
 790                 }
 791         }
 792         init_completion(&iwqp->sq_drained);
 793         init_completion(&iwqp->rq_drained);
 794
 795         return &iwqp->ibqp;
 796 error:
 797         i40iw_free_qp_resources(iwdev, iwqp, qp_num);
 798         return ERR_PTR(err_code);
 799 }
 800
 801 /**
 802  * i40iw_query - query qp attributes
 803  * @ibqp: qp pointer
 804  * @attr: attributes pointer
 805  * @attr_mask: Not used
 806  * @init_attr: qp attributes to return
 807  */
 808 static int i40iw_query_qp(struct ib_qp *ibqp,
 809                           struct ib_qp_attr *attr,
 810                           int attr_mask,
 811                           struct ib_qp_init_attr *init_attr)
 812 {
 813         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 814         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
 815
 816         attr->qp_access_flags = 0;
 817         attr->cap.max_send_wr = qp->qp_uk.sq_size;
 818         attr->cap.max_recv_wr = qp->qp_uk.rq_size;
 819         attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
 820         attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 821         attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
 822         init_attr->event_handler = iwqp->ibqp.event_handler;
 823         init_attr->qp_context = iwqp->ibqp.qp_context;
 824         init_attr->send_cq = iwqp->ibqp.send_cq;
 825         init_attr->recv_cq = iwqp->ibqp.recv_cq;
 826         init_attr->srq = iwqp->ibqp.srq;
 827         init_attr->cap = attr->cap;
 828         return 0;
 829 }
 830
 831 /**
 832  * i40iw_hw_modify_qp - setup cqp for modify qp
 833  * @iwdev: iwarp device
 834  * @iwqp: qp ptr (user or kernel)
 835  * @info: info for modify qp
 836  * @wait: flag to wait or not for modify qp completion
 837  */
 838 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
 839                         struct i40iw_modify_qp_info *info, bool wait)
 840 {
 841         enum i40iw_status_code status;
 842         struct i40iw_cqp_request *cqp_request;
 843         struct cqp_commands_info *cqp_info;
 844         struct i40iw_modify_qp_info *m_info;
 845
 846         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
 847         if (!cqp_request)
 848                 return;
 849
 850         cqp_info = &cqp_request->info;
 851         m_info = &cqp_info->in.u.qp_modify.info;
 852         memcpy(m_info, info, sizeof(*m_info));
 853         cqp_info->cqp_cmd = OP_QP_MODIFY;
 854         cqp_info->post_sq = 1;
 855         cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
 856         cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
 857         status = i40iw_handle_cqp_op(iwdev, cqp_request);
 858         if (status)
 859                 i40iw_pr_err("CQP-OP Modify QP fail");
 860 }
 861
 862 /**
 863  * i40iw_modify_qp - modify qp request
 864  * @ibqp: qp's pointer for modify
 865  * @attr: access attributes
 866  * @attr_mask: state mask
 867  * @udata: user data
 868  */
 869 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 870                     int attr_mask, struct ib_udata *udata)
 871 {
 872         struct i40iw_qp *iwqp = to_iwqp(ibqp);
 873         struct i40iw_device *iwdev = iwqp->iwdev;
 874         struct i40iw_qp_host_ctx_info *ctx_info;
 875         struct i40iwarp_offload_info *iwarp_info;
 876         struct i40iw_modify_qp_info info;
 877         u8 issue_modify_qp = 0;
 878         u8 dont_wait = 0;
 879         u32 err;
 880         unsigned long flags;
 881
 882         memset(&info, 0, sizeof(info));
 883         ctx_info = &iwqp->ctx_info;
 884         iwarp_info = &iwqp->iwarp_info;
 885
 886         spin_lock_irqsave(&iwqp->lock, flags);
 887
 888         if (attr_mask & IB_QP_STATE) {
 889                 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
 890                         err = -EINVAL;
 891                         goto exit;
 892                 }
 893
 894                 switch (attr->qp_state) {
 895                 case IB_QPS_INIT:
 896                 case IB_QPS_RTR:
 897                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
 898                                 err = -EINVAL;
 899                                 goto exit;
 900                         }
 901                         if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
 902                                 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
 903                                 issue_modify_qp = 1;
 904                         }
 905                         break;
 906                 case IB_QPS_RTS:
 907                         if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
 908                             (!iwqp->cm_id)) {
 909                                 err = -EINVAL;
 910                                 goto exit;
 911                         }
 912
 913                         issue_modify_qp = 1;
 914                         iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
 915                         iwqp->hte_added = 1;
 916                         info.next_iwarp_state = I40IW_QP_STATE_RTS;
 917                         info.tcp_ctx_valid = true;
 918                         info.ord_valid = true;
 919                         info.arp_cache_idx_valid = true;
 920                         info.cq_num_valid = true;
 921                         break;
 922                 case IB_QPS_SQD:
 923                         if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
 924                                 err = 0;
 925                                 goto exit;
 926                         }
 927                         if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
 928                             (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
 929                                 err = 0;
 930                                 goto exit;
 931                         }
 932                         if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
 933                                 err = -EINVAL;
 934                                 goto exit;
 935                         }
 936                         info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
 937                         issue_modify_qp = 1;
 938                         break;
 939                 case IB_QPS_SQE:
 940                         if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
 941                                 err = -EINVAL;
 942                                 goto exit;
 943                         }
 944                         info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
 945                         issue_modify_qp = 1;
 946                         break;
 947                 case IB_QPS_ERR:
 948                 case IB_QPS_RESET:
 949                         if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
 950                                 err = -EINVAL;
 951                                 goto exit;
 952                         }
 953                         if (iwqp->sc_qp.term_flags)
 954                                 i40iw_terminate_del_timer(&iwqp->sc_qp);
 955                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 956                         if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
 957                             iwdev->iw_status &&
 958                             (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
 959                                 info.reset_tcp_conn = true;
 960                         else
 961                                 dont_wait = 1;
 962                         issue_modify_qp = 1;
 963                         info.next_iwarp_state = I40IW_QP_STATE_ERROR;
 964                         break;
 965                 default:
 966                         err = -EINVAL;
 967                         goto exit;
 968                 }
 969
 970                 iwqp->ibqp_state = attr->qp_state;
 971
 972                 if (issue_modify_qp)
 973                         iwqp->iwarp_state = info.next_iwarp_state;
 974                 else
 975                         info.next_iwarp_state = iwqp->iwarp_state;
 976         }
 977         if (attr_mask & IB_QP_ACCESS_FLAGS) {
 978                 ctx_info->iwarp_info_valid = true;
 979                 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
 980                         iwarp_info->wr_rdresp_en = true;
 981                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
 982                         iwarp_info->wr_rdresp_en = true;
 983                 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
 984                         iwarp_info->rd_enable = true;
 985                 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
 986                         iwarp_info->bind_en = true;
 987
 988                 if (iwqp->user_mode) {
 989                         iwarp_info->rd_enable = true;
 990                         iwarp_info->wr_rdresp_en = true;
 991                         iwarp_info->priv_mode_en = false;
 992                 }
 993         }
 994
 995         if (ctx_info->iwarp_info_valid) {
 996                 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
 997                 int ret;
 998
 999                 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1000                 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1001                 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
1002                                                      (u64 *)iwqp->host_ctx.va,
1003                                                      ctx_info);
1004                 if (ret) {
1005                         i40iw_pr_err("setting QP context\n");
1006                         err = -EINVAL;
1007                         goto exit;
1008                 }
1009         }
1010
1011         spin_unlock_irqrestore(&iwqp->lock, flags);
1012
1013         if (issue_modify_qp)
1014                 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1015
1016         if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1017                 if (dont_wait) {
1018                         if (iwqp->cm_id && iwqp->hw_tcp_state) {
1019                                 spin_lock_irqsave(&iwqp->lock, flags);
1020                                 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1021                                 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1022                                 spin_unlock_irqrestore(&iwqp->lock, flags);
1023                         }
1024                 }
1025         }
1026         return 0;
1027 exit:
1028         spin_unlock_irqrestore(&iwqp->lock, flags);
1029         return err;
1030 }
1031
1032 /**
1033  * cq_free_resources - free up recources for cq
1034  * @iwdev: iwarp device
1035  * @iwcq: cq ptr
1036  */
1037 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1038 {
1039         struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1040
1041         if (!iwcq->user_mode)
1042                 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1043         i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1044 }
1045
1046 /**
1047  * i40iw_cq_wq_destroy - send cq destroy cqp
1048  * @iwdev: iwarp device
1049  * @cq: hardware control cq
1050  */
1051 void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1052 {
1053         enum i40iw_status_code status;
1054         struct i40iw_cqp_request *cqp_request;
1055         struct cqp_commands_info *cqp_info;
1056
1057         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1058         if (!cqp_request)
1059                 return;
1060
1061         cqp_info = &cqp_request->info;
1062
1063         cqp_info->cqp_cmd = OP_CQ_DESTROY;
1064         cqp_info->post_sq = 1;
1065         cqp_info->in.u.cq_destroy.cq = cq;
1066         cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1067         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1068         if (status)
1069                 i40iw_pr_err("CQP-OP Destroy QP fail");
1070 }
1071
1072 /**
1073  * i40iw_destroy_cq - destroy cq
1074  * @ib_cq: cq pointer
1075  */
1076 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1077 {
1078         struct i40iw_cq *iwcq;
1079         struct i40iw_device *iwdev;
1080         struct i40iw_sc_cq *cq;
1081
1082         if (!ib_cq) {
1083                 i40iw_pr_err("ib_cq == NULL\n");
1084                 return 0;
1085         }
1086
1087         iwcq = to_iwcq(ib_cq);
1088         iwdev = to_iwdev(ib_cq->device);
1089         cq = &iwcq->sc_cq;
1090         i40iw_cq_wq_destroy(iwdev, cq);
1091         cq_free_resources(iwdev, iwcq);
1092         kfree(iwcq);
1093         i40iw_rem_devusecount(iwdev);
1094         return 0;
1095 }
1096
1097 /**
1098  * i40iw_create_cq - create cq
1099  * @ibdev: device pointer from stack
1100  * @attr: attributes for cq
1101  * @context: user context created during alloc
1102  * @udata: user data
1103  */
1104 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1105                                      const struct ib_cq_init_attr *attr,
1106                                      struct ib_ucontext *context,
1107                                      struct ib_udata *udata)
1108 {
1109         struct i40iw_device *iwdev = to_iwdev(ibdev);
1110         struct i40iw_cq *iwcq;
1111         struct i40iw_pbl *iwpbl;
1112         u32 cq_num = 0;
1113         struct i40iw_sc_cq *cq;
1114         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1115         struct i40iw_cq_init_info info;
1116         enum i40iw_status_code status;
1117         struct i40iw_cqp_request *cqp_request;
1118         struct cqp_commands_info *cqp_info;
1119         struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1120         unsigned long flags;
1121         int err_code;
1122         int entries = attr->cqe;
1123
1124         if (iwdev->closing)
1125                 return ERR_PTR(-ENODEV);
1126
1127         if (entries > iwdev->max_cqe)
1128                 return ERR_PTR(-EINVAL);
1129
1130         iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1131         if (!iwcq)
1132                 return ERR_PTR(-ENOMEM);
1133
1134         memset(&info, 0, sizeof(info));
1135
1136         err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1137                                         iwdev->max_cq, &cq_num,
1138                                         &iwdev->next_cq);
1139         if (err_code)
1140                 goto error;
1141
1142         cq = &iwcq->sc_cq;
1143         cq->back_cq = (void *)iwcq;
1144         spin_lock_init(&iwcq->lock);
1145
1146         info.dev = dev;
1147         ukinfo->cq_size = max(entries, 4);
1148         ukinfo->cq_id = cq_num;
1149         iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1150         info.ceqe_mask = 0;
1151         if (attr->comp_vector < iwdev->ceqs_count)
1152                 info.ceq_id = attr->comp_vector;
1153         info.ceq_id_valid = true;
1154         info.ceqe_mask = 1;
1155         info.type = I40IW_CQ_TYPE_IWARP;
1156         if (context) {
1157                 struct i40iw_ucontext *ucontext;
1158                 struct i40iw_create_cq_req req;
1159                 struct i40iw_cq_mr *cqmr;
1160
1161                 memset(&req, 0, sizeof(req));
1162                 iwcq->user_mode = true;
1163                 ucontext = to_ucontext(context);
1164                 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req)))
1165                         goto cq_free_resources;
1166
1167                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1168                 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1169                                       &ucontext->cq_reg_mem_list);
1170                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1171                 if (!iwpbl) {
1172                         err_code = -EPROTO;
1173                         goto cq_free_resources;
1174                 }
1175
1176                 iwcq->iwpbl = iwpbl;
1177                 iwcq->cq_mem_size = 0;
1178                 cqmr = &iwpbl->cq_mr;
1179                 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1180                 if (iwpbl->pbl_allocated) {
1181                         info.virtual_map = true;
1182                         info.pbl_chunk_size = 1;
1183                         info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1184                 } else {
1185                         info.cq_base_pa = cqmr->cq_pbl.addr;
1186                 }
1187         } else {
1188                 /* Kmode allocations */
1189                 int rsize;
1190                 int shadow;
1191
1192                 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1193                 rsize = round_up(rsize, 256);
1194                 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1195                 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1196                                                 rsize + shadow, 256);
1197                 if (status) {
1198                         err_code = -ENOMEM;
1199                         goto cq_free_resources;
1200                 }
1201                 ukinfo->cq_base = iwcq->kmem.va;
1202                 info.cq_base_pa = iwcq->kmem.pa;
1203                 info.shadow_area_pa = info.cq_base_pa + rsize;
1204                 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1205         }
1206
1207         if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1208                 i40iw_pr_err("init cq fail\n");
1209                 err_code = -EPROTO;
1210                 goto cq_free_resources;
1211         }
1212
1213         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1214         if (!cqp_request) {
1215                 err_code = -ENOMEM;
1216                 goto cq_free_resources;
1217         }
1218
1219         cqp_info = &cqp_request->info;
1220         cqp_info->cqp_cmd = OP_CQ_CREATE;
1221         cqp_info->post_sq = 1;
1222         cqp_info->in.u.cq_create.cq = cq;
1223         cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1224         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1225         if (status) {
1226                 i40iw_pr_err("CQP-OP Create QP fail");
1227                 err_code = -EPROTO;
1228                 goto cq_free_resources;
1229         }
1230
1231         if (context) {
1232                 struct i40iw_create_cq_resp resp;
1233
1234                 memset(&resp, 0, sizeof(resp));
1235                 resp.cq_id = info.cq_uk_init_info.cq_id;
1236                 resp.cq_size = info.cq_uk_init_info.cq_size;
1237                 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1238                         i40iw_pr_err("copy to user data\n");
1239                         err_code = -EPROTO;
1240                         goto cq_destroy;
1241                 }
1242         }
1243
1244         i40iw_add_devusecount(iwdev);
1245         return (struct ib_cq *)iwcq;
1246
1247 cq_destroy:
1248         i40iw_cq_wq_destroy(iwdev, cq);
1249 cq_free_resources:
1250         cq_free_resources(iwdev, iwcq);
1251 error:
1252         kfree(iwcq);
1253         return ERR_PTR(err_code);
1254 }
1255
1256 /**
1257  * i40iw_get_user_access - get hw access from IB access
1258  * @acc: IB access to return hw access
1259  */
1260 static inline u16 i40iw_get_user_access(int acc)
1261 {
1262         u16 access = 0;
1263
1264         access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1265         access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1266         access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1267         access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1268         return access;
1269 }
1270
1271 /**
1272  * i40iw_free_stag - free stag resource
1273  * @iwdev: iwarp device
1274  * @stag: stag to free
1275  */
1276 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1277 {
1278         u32 stag_idx;
1279
1280         stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1281         i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1282         i40iw_rem_devusecount(iwdev);
1283 }
1284
1285 /**
1286  * i40iw_create_stag - create random stag
1287  * @iwdev: iwarp device
1288  */
1289 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1290 {
1291         u32 stag = 0;
1292         u32 stag_index = 0;
1293         u32 next_stag_index;
1294         u32 driver_key;
1295         u32 random;
1296         u8 consumer_key;
1297         int ret;
1298
1299         get_random_bytes(&random, sizeof(random));
1300         consumer_key = (u8)random;
1301
1302         driver_key = random & ~iwdev->mr_stagmask;
1303         next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1304         next_stag_index %= iwdev->max_mr;
1305
1306         ret = i40iw_alloc_resource(iwdev,
1307                                    iwdev->allocated_mrs, iwdev->max_mr,
1308                                    &stag_index, &next_stag_index);
1309         if (!ret) {
1310                 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1311                 stag |= driver_key;
1312                 stag += (u32)consumer_key;
1313                 i40iw_add_devusecount(iwdev);
1314         }
1315         return stag;
1316 }
1317
1318 /**
1319  * i40iw_next_pbl_addr - Get next pbl address
1320  * @pbl: pointer to a pble
1321  * @pinfo: info pointer
1322  * @idx: index
1323  */
1324 static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
1325                                        struct i40iw_pble_info **pinfo,
1326                                        u32 *idx)
1327 {
1328         *idx += 1;
1329         if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1330                 return ++pbl;
1331         *idx = 0;
1332         (*pinfo)++;
1333         return (u64 *)(*pinfo)->addr;
1334 }
1335
1336 /**
1337  * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1338  * @iwmr: iwmr for IB's user page addresses
1339  * @pbl: ple pointer to save 1 level or 0 level pble
1340  * @level: indicated level 0, 1 or 2
1341  */
1342 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1343                                     u64 *pbl,
1344                                     enum i40iw_pble_level level)
1345 {
1346         struct ib_umem *region = iwmr->region;
1347         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1348         int chunk_pages, entry, i;
1349         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1350         struct i40iw_pble_info *pinfo;
1351         struct scatterlist *sg;
1352         u64 pg_addr = 0;
1353         u32 idx = 0;
1354
1355         pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1356
1357         for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1358                 chunk_pages = sg_dma_len(sg) >> region->page_shift;
1359                 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1360                     !iwpbl->qp_mr.sq_page)
1361                         iwpbl->qp_mr.sq_page = sg_page(sg);
1362                 for (i = 0; i < chunk_pages; i++) {
1363                         pg_addr = sg_dma_address(sg) +
1364                                 (i << region->page_shift);
1365
1366                         if ((entry + i) == 0)
1367                                 *pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
1368                         else if (!(pg_addr & ~iwmr->page_msk))
1369                                 *pbl = cpu_to_le64(pg_addr);
1370                         else
1371                                 continue;
1372                         pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
1373                 }
1374         }
1375 }
1376
1377 /**
1378  * i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
1379  * @addr: virtual address
1380  * @iwmr: mr pointer for this memory registration
1381  */
1382 static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
1383 {
1384         struct vm_area_struct *vma;
1385         struct hstate *h;
1386
1387         vma = find_vma(current->mm, addr);
1388         if (vma && is_vm_hugetlb_page(vma)) {
1389                 h = hstate_vma(vma);
1390                 if (huge_page_size(h) == 0x200000) {
1391                         iwmr->page_size = huge_page_size(h);
1392                         iwmr->page_msk = huge_page_mask(h);
1393                 }
1394         }
1395 }
1396
1397 /**
1398  * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1399  * @arr: lvl1 pbl array
1400  * @npages: page count
1401  * pg_size: page size
1402  *
1403  */
1404 static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1405 {
1406         u32 pg_idx;
1407
1408         for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1409                 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1410                         return false;
1411         }
1412         return true;
1413 }
1414
1415 /**
1416  * i40iw_check_mr_contiguous - check if MR is physically contiguous
1417  * @palloc: pbl allocation struct
1418  * pg_size: page size
1419  */
1420 static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1421 {
1422         struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1423         struct i40iw_pble_info *leaf = lvl2->leaf;
1424         u64 *arr = NULL;
1425         u64 *start_addr = NULL;
1426         int i;
1427         bool ret;
1428
1429         if (palloc->level == I40IW_LEVEL_1) {
1430                 arr = (u64 *)palloc->level1.addr;
1431                 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1432                 return ret;
1433         }
1434
1435         start_addr = (u64 *)leaf->addr;
1436
1437         for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1438                 arr = (u64 *)leaf->addr;
1439                 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1440                         return false;
1441                 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1442                 if (!ret)
1443                         return false;
1444         }
1445
1446         return true;
1447 }
1448
1449 /**
1450  * i40iw_setup_pbles - copy user pg address to pble's
1451  * @iwdev: iwarp device
1452  * @iwmr: mr pointer for this memory registration
1453  * @use_pbles: flag if to use pble's
1454  */
1455 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1456                              struct i40iw_mr *iwmr,
1457                              bool use_pbles)
1458 {
1459         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1460         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1461         struct i40iw_pble_info *pinfo;
1462         u64 *pbl;
1463         enum i40iw_status_code status;
1464         enum i40iw_pble_level level = I40IW_LEVEL_1;
1465
1466         if (use_pbles) {
1467                 mutex_lock(&iwdev->pbl_mutex);
1468                 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1469                 mutex_unlock(&iwdev->pbl_mutex);
1470                 if (status)
1471                         return -ENOMEM;
1472
1473                 iwpbl->pbl_allocated = true;
1474                 level = palloc->level;
1475                 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1476                 pbl = (u64 *)pinfo->addr;
1477         } else {
1478                 pbl = iwmr->pgaddrmem;
1479         }
1480
1481         i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1482
1483         if (use_pbles)
1484                 iwmr->pgaddrmem[0] = *pbl;
1485
1486         return 0;
1487 }
1488
1489 /**
1490  * i40iw_handle_q_mem - handle memory for qp and cq
1491  * @iwdev: iwarp device
1492  * @req: information for q memory management
1493  * @iwpbl: pble struct
1494  * @use_pbles: flag to use pble
1495  */
1496 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1497                               struct i40iw_mem_reg_req *req,
1498                               struct i40iw_pbl *iwpbl,
1499                               bool use_pbles)
1500 {
1501         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1502         struct i40iw_mr *iwmr = iwpbl->iwmr;
1503         struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1504         struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1505         struct i40iw_hmc_pble *hmc_p;
1506         u64 *arr = iwmr->pgaddrmem;
1507         u32 pg_size;
1508         int err;
1509         int total;
1510         bool ret = true;
1511
1512         total = req->sq_pages + req->rq_pages + req->cq_pages;
1513         pg_size = iwmr->page_size;
1514
1515         err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1516         if (err)
1517                 return err;
1518
1519         if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1520                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1521                 iwpbl->pbl_allocated = false;
1522                 return -ENOMEM;
1523         }
1524
1525         if (use_pbles)
1526                 arr = (u64 *)palloc->level1.addr;
1527
1528         if (iwmr->type == IW_MEMREG_TYPE_QP) {
1529                 hmc_p = &qpmr->sq_pbl;
1530                 qpmr->shadow = (dma_addr_t)arr[total];
1531
1532                 if (use_pbles) {
1533                         ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1534                         if (ret)
1535                                 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1536                 }
1537
1538                 if (!ret) {
1539                         hmc_p->idx = palloc->level1.idx;
1540                         hmc_p = &qpmr->rq_pbl;
1541                         hmc_p->idx = palloc->level1.idx + req->sq_pages;
1542                 } else {
1543                         hmc_p->addr = arr[0];
1544                         hmc_p = &qpmr->rq_pbl;
1545                         hmc_p->addr = arr[req->sq_pages];
1546                 }
1547         } else {                /* CQ */
1548                 hmc_p = &cqmr->cq_pbl;
1549                 cqmr->shadow = (dma_addr_t)arr[total];
1550
1551                 if (use_pbles)
1552                         ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1553
1554                 if (!ret)
1555                         hmc_p->idx = palloc->level1.idx;
1556                 else
1557                         hmc_p->addr = arr[0];
1558         }
1559
1560         if (use_pbles && ret) {
1561                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1562                 iwpbl->pbl_allocated = false;
1563         }
1564
1565         return err;
1566 }
1567
1568 /**
1569  * i40iw_hw_alloc_stag - cqp command to allocate stag
1570  * @iwdev: iwarp device
1571  * @iwmr: iwarp mr pointer
1572  */
1573 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1574 {
1575         struct i40iw_allocate_stag_info *info;
1576         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1577         enum i40iw_status_code status;
1578         int err = 0;
1579         struct i40iw_cqp_request *cqp_request;
1580         struct cqp_commands_info *cqp_info;
1581
1582         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1583         if (!cqp_request)
1584                 return -ENOMEM;
1585
1586         cqp_info = &cqp_request->info;
1587         info = &cqp_info->in.u.alloc_stag.info;
1588         memset(info, 0, sizeof(*info));
1589         info->page_size = PAGE_SIZE;
1590         info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1591         info->pd_id = iwpd->sc_pd.pd_id;
1592         info->total_len = iwmr->length;
1593         info->remote_access = true;
1594         cqp_info->cqp_cmd = OP_ALLOC_STAG;
1595         cqp_info->post_sq = 1;
1596         cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1597         cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1598
1599         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1600         if (status) {
1601                 err = -ENOMEM;
1602                 i40iw_pr_err("CQP-OP MR Reg fail");
1603         }
1604         return err;
1605 }
1606
1607 /**
1608  * i40iw_alloc_mr - register stag for fast memory registration
1609  * @pd: ibpd pointer
1610  * @mr_type: memory for stag registrion
1611  * @max_num_sg: man number of pages
1612  */
1613 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1614                                     enum ib_mr_type mr_type,
1615                                     u32 max_num_sg)
1616 {
1617         struct i40iw_pd *iwpd = to_iwpd(pd);
1618         struct i40iw_device *iwdev = to_iwdev(pd->device);
1619         struct i40iw_pble_alloc *palloc;
1620         struct i40iw_pbl *iwpbl;
1621         struct i40iw_mr *iwmr;
1622         enum i40iw_status_code status;
1623         u32 stag;
1624         int err_code = -ENOMEM;
1625
1626         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1627         if (!iwmr)
1628                 return ERR_PTR(-ENOMEM);
1629
1630         stag = i40iw_create_stag(iwdev);
1631         if (!stag) {
1632                 err_code = -EOVERFLOW;
1633                 goto err;
1634         }
1635         iwmr->stag = stag;
1636         iwmr->ibmr.rkey = stag;
1637         iwmr->ibmr.lkey = stag;
1638         iwmr->ibmr.pd = pd;
1639         iwmr->ibmr.device = pd->device;
1640         iwpbl = &iwmr->iwpbl;
1641         iwpbl->iwmr = iwmr;
1642         iwmr->type = IW_MEMREG_TYPE_MEM;
1643         palloc = &iwpbl->pble_alloc;
1644         iwmr->page_cnt = max_num_sg;
1645         mutex_lock(&iwdev->pbl_mutex);
1646         status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1647         mutex_unlock(&iwdev->pbl_mutex);
1648         if (status)
1649                 goto err1;
1650
1651         if (palloc->level != I40IW_LEVEL_1)
1652                 goto err2;
1653         err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1654         if (err_code)
1655                 goto err2;
1656         iwpbl->pbl_allocated = true;
1657         i40iw_add_pdusecount(iwpd);
1658         return &iwmr->ibmr;
1659 err2:
1660         i40iw_free_pble(iwdev->pble_rsrc, palloc);
1661 err1:
1662         i40iw_free_stag(iwdev, stag);
1663 err:
1664         kfree(iwmr);
1665         return ERR_PTR(err_code);
1666 }
1667
1668 /**
1669  * i40iw_set_page - populate pbl list for fmr
1670  * @ibmr: ib mem to access iwarp mr pointer
1671  * @addr: page dma address fro pbl list
1672  */
1673 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1674 {
1675         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1676         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1677         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1678         u64 *pbl;
1679
1680         if (unlikely(iwmr->npages == iwmr->page_cnt))
1681                 return -ENOMEM;
1682
1683         pbl = (u64 *)palloc->level1.addr;
1684         pbl[iwmr->npages++] = cpu_to_le64(addr);
1685         return 0;
1686 }
1687
1688 /**
1689  * i40iw_map_mr_sg - map of sg list for fmr
1690  * @ibmr: ib mem to access iwarp mr pointer
1691  * @sg: scatter gather list for fmr
1692  * @sg_nents: number of sg pages
1693  */
1694 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1695                            int sg_nents, unsigned int *sg_offset)
1696 {
1697         struct i40iw_mr *iwmr = to_iwmr(ibmr);
1698
1699         iwmr->npages = 0;
1700         return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1701 }
1702
1703 /**
1704  * i40iw_drain_sq - drain the send queue
1705  * @ibqp: ib qp pointer
1706  */
1707 static void i40iw_drain_sq(struct ib_qp *ibqp)
1708 {
1709         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1710         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1711
1712         if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1713                 wait_for_completion(&iwqp->sq_drained);
1714 }
1715
1716 /**
1717  * i40iw_drain_rq - drain the receive queue
1718  * @ibqp: ib qp pointer
1719  */
1720 static void i40iw_drain_rq(struct ib_qp *ibqp)
1721 {
1722         struct i40iw_qp *iwqp = to_iwqp(ibqp);
1723         struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1724
1725         if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1726                 wait_for_completion(&iwqp->rq_drained);
1727 }
1728
1729 /**
1730  * i40iw_hwreg_mr - send cqp command for memory registration
1731  * @iwdev: iwarp device
1732  * @iwmr: iwarp mr pointer
1733  * @access: access for MR
1734  */
1735 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1736                           struct i40iw_mr *iwmr,
1737                           u16 access)
1738 {
1739         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1740         struct i40iw_reg_ns_stag_info *stag_info;
1741         struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1742         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1743         enum i40iw_status_code status;
1744         int err = 0;
1745         struct i40iw_cqp_request *cqp_request;
1746         struct cqp_commands_info *cqp_info;
1747
1748         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1749         if (!cqp_request)
1750                 return -ENOMEM;
1751
1752         cqp_info = &cqp_request->info;
1753         stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1754         memset(stag_info, 0, sizeof(*stag_info));
1755         stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1756         stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1757         stag_info->stag_key = (u8)iwmr->stag;
1758         stag_info->total_len = iwmr->length;
1759         stag_info->access_rights = access;
1760         stag_info->pd_id = iwpd->sc_pd.pd_id;
1761         stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1762         stag_info->page_size = iwmr->page_size;
1763
1764         if (iwpbl->pbl_allocated) {
1765                 if (palloc->level == I40IW_LEVEL_1) {
1766                         stag_info->first_pm_pbl_index = palloc->level1.idx;
1767                         stag_info->chunk_size = 1;
1768                 } else {
1769                         stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1770                         stag_info->chunk_size = 3;
1771                 }
1772         } else {
1773                 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1774         }
1775
1776         cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1777         cqp_info->post_sq = 1;
1778         cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1779         cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1780
1781         status = i40iw_handle_cqp_op(iwdev, cqp_request);
1782         if (status) {
1783                 err = -ENOMEM;
1784                 i40iw_pr_err("CQP-OP MR Reg fail");
1785         }
1786         return err;
1787 }
1788
1789 /**
1790  * i40iw_reg_user_mr - Register a user memory region
1791  * @pd: ptr of pd
1792  * @start: virtual start address
1793  * @length: length of mr
1794  * @virt: virtual address
1795  * @acc: access of mr
1796  * @udata: user data
1797  */
1798 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1799                                        u64 start,
1800                                        u64 length,
1801                                        u64 virt,
1802                                        int acc,
1803                                        struct ib_udata *udata)
1804 {
1805         struct i40iw_pd *iwpd = to_iwpd(pd);
1806         struct i40iw_device *iwdev = to_iwdev(pd->device);
1807         struct i40iw_ucontext *ucontext;
1808         struct i40iw_pble_alloc *palloc;
1809         struct i40iw_pbl *iwpbl;
1810         struct i40iw_mr *iwmr;
1811         struct ib_umem *region;
1812         struct i40iw_mem_reg_req req;
1813         u64 pbl_depth = 0;
1814         u32 stag = 0;
1815         u16 access;
1816         u64 region_length;
1817         bool use_pbles = false;
1818         unsigned long flags;
1819         int err = -ENOSYS;
1820         int ret;
1821         int pg_shift;
1822
1823         if (iwdev->closing)
1824                 return ERR_PTR(-ENODEV);
1825
1826         if (length > I40IW_MAX_MR_SIZE)
1827                 return ERR_PTR(-EINVAL);
1828         region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1829         if (IS_ERR(region))
1830                 return (struct ib_mr *)region;
1831
1832         if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1833                 ib_umem_release(region);
1834                 return ERR_PTR(-EFAULT);
1835         }
1836
1837         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1838         if (!iwmr) {
1839                 ib_umem_release(region);
1840                 return ERR_PTR(-ENOMEM);
1841         }
1842
1843         iwpbl = &iwmr->iwpbl;
1844         iwpbl->iwmr = iwmr;
1845         iwmr->region = region;
1846         iwmr->ibmr.pd = pd;
1847         iwmr->ibmr.device = pd->device;
1848         ucontext = to_ucontext(pd->uobject->context);
1849
1850         iwmr->page_size = PAGE_SIZE;
1851         iwmr->page_msk = PAGE_MASK;
1852
1853         if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
1854                 i40iw_set_hugetlb_values(start, iwmr);
1855
1856         region_length = region->length + (start & (iwmr->page_size - 1));
1857         pg_shift = ffs(iwmr->page_size) - 1;
1858         pbl_depth = region_length >> pg_shift;
1859         pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
1860         iwmr->length = region->length;
1861
1862         iwpbl->user_base = virt;
1863         palloc = &iwpbl->pble_alloc;
1864
1865         iwmr->type = req.reg_type;
1866         iwmr->page_cnt = (u32)pbl_depth;
1867
1868         switch (req.reg_type) {
1869         case IW_MEMREG_TYPE_QP:
1870                 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1871                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1872                 if (err)
1873                         goto error;
1874                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1875                 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1876                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1877                 break;
1878         case IW_MEMREG_TYPE_CQ:
1879                 use_pbles = (req.cq_pages > 1);
1880                 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1881                 if (err)
1882                         goto error;
1883
1884                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1885                 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1886                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1887                 break;
1888         case IW_MEMREG_TYPE_MEM:
1889                 use_pbles = (iwmr->page_cnt != 1);
1890                 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1891
1892                 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1893                 if (err)
1894                         goto error;
1895
1896                 if (use_pbles) {
1897                         ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
1898                         if (ret) {
1899                                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1900                                 iwpbl->pbl_allocated = false;
1901                         }
1902                 }
1903
1904                 access |= i40iw_get_user_access(acc);
1905                 stag = i40iw_create_stag(iwdev);
1906                 if (!stag) {
1907                         err = -ENOMEM;
1908                         goto error;
1909                 }
1910
1911                 iwmr->stag = stag;
1912                 iwmr->ibmr.rkey = stag;
1913                 iwmr->ibmr.lkey = stag;
1914
1915                 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1916                 if (err) {
1917                         i40iw_free_stag(iwdev, stag);
1918                         goto error;
1919                 }
1920
1921                 break;
1922         default:
1923                 goto error;
1924         }
1925
1926         iwmr->type = req.reg_type;
1927         if (req.reg_type == IW_MEMREG_TYPE_MEM)
1928                 i40iw_add_pdusecount(iwpd);
1929         return &iwmr->ibmr;
1930
1931 error:
1932         if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
1933                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1934         ib_umem_release(region);
1935         kfree(iwmr);
1936         return ERR_PTR(err);
1937 }
1938
1939 /**
1940  * i40iw_reg_phys_mr - register kernel physical memory
1941  * @pd: ibpd pointer
1942  * @addr: physical address of memory to register
1943  * @size: size of memory to register
1944  * @acc: Access rights
1945  * @iova_start: start of virtual address for physical buffers
1946  */
1947 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1948                                 u64 addr,
1949                                 u64 size,
1950                                 int acc,
1951                                 u64 *iova_start)
1952 {
1953         struct i40iw_pd *iwpd = to_iwpd(pd);
1954         struct i40iw_device *iwdev = to_iwdev(pd->device);
1955         struct i40iw_pbl *iwpbl;
1956         struct i40iw_mr *iwmr;
1957         enum i40iw_status_code status;
1958         u32 stag;
1959         u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1960         int ret;
1961
1962         iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1963         if (!iwmr)
1964                 return ERR_PTR(-ENOMEM);
1965         iwmr->ibmr.pd = pd;
1966         iwmr->ibmr.device = pd->device;
1967         iwpbl = &iwmr->iwpbl;
1968         iwpbl->iwmr = iwmr;
1969         iwmr->type = IW_MEMREG_TYPE_MEM;
1970         iwpbl->user_base = *iova_start;
1971         stag = i40iw_create_stag(iwdev);
1972         if (!stag) {
1973                 ret = -EOVERFLOW;
1974                 goto err;
1975         }
1976         access |= i40iw_get_user_access(acc);
1977         iwmr->stag = stag;
1978         iwmr->ibmr.rkey = stag;
1979         iwmr->ibmr.lkey = stag;
1980         iwmr->page_cnt = 1;
1981         iwmr->pgaddrmem[0]  = addr;
1982         iwmr->length = size;
1983         status = i40iw_hwreg_mr(iwdev, iwmr, access);
1984         if (status) {
1985                 i40iw_free_stag(iwdev, stag);
1986                 ret = -ENOMEM;
1987                 goto err;
1988         }
1989
1990         i40iw_add_pdusecount(iwpd);
1991         return &iwmr->ibmr;
1992  err:
1993         kfree(iwmr);
1994         return ERR_PTR(ret);
1995 }
1996
1997 /**
1998  * i40iw_get_dma_mr - register physical mem
1999  * @pd: ptr of pd
2000  * @acc: access for memory
2001  */
2002 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
2003 {
2004         u64 kva = 0;
2005
2006         return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
2007 }
2008
2009 /**
2010  * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
2011  * @iwmr: iwmr for IB's user page addresses
2012  * @ucontext: ptr to user context
2013  */
2014 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
2015                               struct i40iw_ucontext *ucontext)
2016 {
2017         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2018         unsigned long flags;
2019
2020         switch (iwmr->type) {
2021         case IW_MEMREG_TYPE_CQ:
2022                 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2023                 if (!list_empty(&ucontext->cq_reg_mem_list))
2024                         list_del(&iwpbl->list);
2025                 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2026                 break;
2027         case IW_MEMREG_TYPE_QP:
2028                 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2029                 if (!list_empty(&ucontext->qp_reg_mem_list))
2030                         list_del(&iwpbl->list);
2031                 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2032                 break;
2033         default:
2034                 break;
2035         }
2036 }
2037
2038 /**
2039  * i40iw_dereg_mr - deregister mr
2040  * @ib_mr: mr ptr for dereg
2041  */
2042 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
2043 {
2044         struct ib_pd *ibpd = ib_mr->pd;
2045         struct i40iw_pd *iwpd = to_iwpd(ibpd);
2046         struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2047         struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2048         enum i40iw_status_code status;
2049         struct i40iw_dealloc_stag_info *info;
2050         struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2051         struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2052         struct i40iw_cqp_request *cqp_request;
2053         struct cqp_commands_info *cqp_info;
2054         u32 stag_idx;
2055
2056         if (iwmr->region)
2057                 ib_umem_release(iwmr->region);
2058
2059         if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2060                 if (ibpd->uobject) {
2061                         struct i40iw_ucontext *ucontext;
2062
2063                         ucontext = to_ucontext(ibpd->uobject->context);
2064                         i40iw_del_memlist(iwmr, ucontext);
2065                 }
2066                 if (iwpbl->pbl_allocated)
2067                         i40iw_free_pble(iwdev->pble_rsrc, palloc);
2068                 kfree(iwmr);
2069                 return 0;
2070         }
2071
2072         cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2073         if (!cqp_request)
2074                 return -ENOMEM;
2075
2076         cqp_info = &cqp_request->info;
2077         info = &cqp_info->in.u.dealloc_stag.info;
2078         memset(info, 0, sizeof(*info));
2079
2080         info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2081         info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2082         stag_idx = info->stag_idx;
2083         info->mr = true;
2084         if (iwpbl->pbl_allocated)
2085                 info->dealloc_pbl = true;
2086
2087         cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2088         cqp_info->post_sq = 1;
2089         cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2090         cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2091         status = i40iw_handle_cqp_op(iwdev, cqp_request);
2092         if (status)
2093                 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2094         i40iw_rem_pdusecount(iwpd, iwdev);
2095         i40iw_free_stag(iwdev, iwmr->stag);
2096         if (iwpbl->pbl_allocated)
2097                 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2098         kfree(iwmr);
2099         return 0;
2100 }
2101
2102 /**
2103  * i40iw_show_rev
2104  */
2105 static ssize_t i40iw_show_rev(struct device *dev,
2106                               struct device_attribute *attr, char *buf)
2107 {
2108         struct i40iw_ib_device *iwibdev = container_of(dev,
2109                                                        struct i40iw_ib_device,
2110                                                        ibdev.dev);
2111         u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2112
2113         return sprintf(buf, "%x\n", hw_rev);
2114 }
2115
2116 /**
2117  * i40iw_show_hca
2118  */
2119 static ssize_t i40iw_show_hca(struct device *dev,
2120                               struct device_attribute *attr, char *buf)
2121 {
2122         return sprintf(buf, "I40IW\n");
2123 }
2124
2125 /**
2126  * i40iw_show_board
2127  */
2128 static ssize_t i40iw_show_board(struct device *dev,
2129                                 struct device_attribute *attr,
2130                                 char *buf)
2131 {
2132         return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2133 }
2134
2135 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
2136 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2137 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2138
2139 static struct device_attribute *i40iw_dev_attributes[] = {
2140         &dev_attr_hw_rev,
2141         &dev_attr_hca_type,
2142         &dev_attr_board_id
2143 };
2144
2145 /**
2146  * i40iw_copy_sg_list - copy sg list for qp
2147  * @sg_list: copied into sg_list
2148  * @sgl: copy from sgl
2149  * @num_sges: count of sg entries
2150  */
2151 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2152 {
2153         unsigned int i;
2154
2155         for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2156                 sg_list[i].tag_off = sgl[i].addr;
2157                 sg_list[i].len = sgl[i].length;
2158                 sg_list[i].stag = sgl[i].lkey;
2159         }
2160 }
2161
2162 /**
2163  * i40iw_post_send -  kernel application wr
2164  * @ibqp: qp ptr for wr
2165  * @ib_wr: work request ptr
2166  * @bad_wr: return of bad wr if err
2167  */
2168 static int i40iw_post_send(struct ib_qp *ibqp,
2169                            struct ib_send_wr *ib_wr,
2170                            struct ib_send_wr **bad_wr)
2171 {
2172         struct i40iw_qp *iwqp;
2173         struct i40iw_qp_uk *ukqp;
2174         struct i40iw_post_sq_info info;
2175         enum i40iw_status_code ret;
2176         int err = 0;
2177         unsigned long flags;
2178         bool inv_stag;
2179
2180         iwqp = (struct i40iw_qp *)ibqp;
2181         ukqp = &iwqp->sc_qp.qp_uk;
2182
2183         spin_lock_irqsave(&iwqp->lock, flags);
2184         while (ib_wr) {
2185                 inv_stag = false;
2186                 memset(&info, 0, sizeof(info));
2187                 info.wr_id = (u64)(ib_wr->wr_id);
2188                 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2189                         info.signaled = true;
2190                 if (ib_wr->send_flags & IB_SEND_FENCE)
2191                         info.read_fence = true;
2192
2193                 switch (ib_wr->opcode) {
2194                 case IB_WR_SEND:
2195                         /* fall-through */
2196                 case IB_WR_SEND_WITH_INV:
2197                         if (ib_wr->opcode == IB_WR_SEND) {
2198                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2199                                         info.op_type = I40IW_OP_TYPE_SEND_SOL;
2200                                 else
2201                                         info.op_type = I40IW_OP_TYPE_SEND;
2202                         } else {
2203                                 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2204                                         info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2205                                 else
2206                                         info.op_type = I40IW_OP_TYPE_SEND_INV;
2207                         }
2208
2209                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2210                                 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2211                                 info.op.inline_send.len = ib_wr->sg_list[0].length;
2212                                 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2213                         } else {
2214                                 info.op.send.num_sges = ib_wr->num_sge;
2215                                 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2216                                 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2217                         }
2218
2219                         if (ret) {
2220                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2221                                         err = -ENOMEM;
2222                                 else
2223                                         err = -EINVAL;
2224                         }
2225                         break;
2226                 case IB_WR_RDMA_WRITE:
2227                         info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2228
2229                         if (ib_wr->send_flags & IB_SEND_INLINE) {
2230                                 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2231                                 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2232                                 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2233                                 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2234                                 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2235                                 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2236                         } else {
2237                                 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2238                                 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2239                                 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2240                                 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2241                                 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2242                                 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2243                         }
2244
2245                         if (ret) {
2246                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2247                                         err = -ENOMEM;
2248                                 else
2249                                         err = -EINVAL;
2250                         }
2251                         break;
2252                 case IB_WR_RDMA_READ_WITH_INV:
2253                         inv_stag = true;
2254                         /* fall-through*/
2255                 case IB_WR_RDMA_READ:
2256                         if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2257                                 err = -EINVAL;
2258                                 break;
2259                         }
2260                         info.op_type = I40IW_OP_TYPE_RDMA_READ;
2261                         info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2262                         info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2263                         info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2264                         info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2265                         info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2266                         info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2267                         ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2268                         if (ret) {
2269                                 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2270                                         err = -ENOMEM;
2271                                 else
2272                                         err = -EINVAL;
2273                         }
2274                         break;
2275                 case IB_WR_LOCAL_INV:
2276                         info.op_type = I40IW_OP_TYPE_INV_STAG;
2277                         info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2278                         ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2279                         if (ret)
2280                                 err = -ENOMEM;
2281                         break;
2282                 case IB_WR_REG_MR:
2283                 {
2284                         struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2285                         int flags = reg_wr(ib_wr)->access;
2286                         struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2287                         struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2288                         struct i40iw_fast_reg_stag_info info;
2289
2290                         memset(&info, 0, sizeof(info));
2291                         info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2292                         info.access_rights |= i40iw_get_user_access(flags);
2293                         info.stag_key = reg_wr(ib_wr)->key & 0xff;
2294                         info.stag_idx = reg_wr(ib_wr)->key >> 8;
2295                         info.page_size = reg_wr(ib_wr)->mr->page_size;
2296                         info.wr_id = ib_wr->wr_id;
2297
2298                         info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2299                         info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2300                         info.total_len = iwmr->ibmr.length;
2301                         info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2302                         info.first_pm_pbl_index = palloc->level1.idx;
2303                         info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2304                         info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2305
2306                         if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2307                                 info.chunk_size = 1;
2308
2309                         ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2310                         if (ret)
2311                                 err = -ENOMEM;
2312                         break;
2313                 }
2314                 default:
2315                         err = -EINVAL;
2316                         i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2317                                      ib_wr->opcode);
2318                         break;
2319                 }
2320
2321                 if (err)
2322                         break;
2323                 ib_wr = ib_wr->next;
2324         }
2325
2326         if (err)
2327                 *bad_wr = ib_wr;
2328         else
2329                 ukqp->ops.iw_qp_post_wr(ukqp);
2330         spin_unlock_irqrestore(&iwqp->lock, flags);
2331
2332         return err;
2333 }
2334
2335 /**
2336  * i40iw_post_recv - post receive wr for kernel application
2337  * @ibqp: ib qp pointer
2338  * @ib_wr: work request for receive
2339  * @bad_wr: bad wr caused an error
2340  */
2341 static int i40iw_post_recv(struct ib_qp *ibqp,
2342                            struct ib_recv_wr *ib_wr,
2343                            struct ib_recv_wr **bad_wr)
2344 {
2345         struct i40iw_qp *iwqp;
2346         struct i40iw_qp_uk *ukqp;
2347         struct i40iw_post_rq_info post_recv;
2348         struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2349         enum i40iw_status_code ret = 0;
2350         unsigned long flags;
2351         int err = 0;
2352
2353         iwqp = (struct i40iw_qp *)ibqp;
2354         ukqp = &iwqp->sc_qp.qp_uk;
2355
2356         memset(&post_recv, 0, sizeof(post_recv));
2357         spin_lock_irqsave(&iwqp->lock, flags);
2358         while (ib_wr) {
2359                 post_recv.num_sges = ib_wr->num_sge;
2360                 post_recv.wr_id = ib_wr->wr_id;
2361                 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2362                 post_recv.sg_list = sg_list;
2363                 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2364                 if (ret) {
2365                         i40iw_pr_err(" post_recv err %d\n", ret);
2366                         if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2367                                 err = -ENOMEM;
2368                         else
2369                                 err = -EINVAL;
2370                         *bad_wr = ib_wr;
2371                         goto out;
2372                 }
2373                 ib_wr = ib_wr->next;
2374         }
2375  out:
2376         spin_unlock_irqrestore(&iwqp->lock, flags);
2377         return err;
2378 }
2379
2380 /**
2381  * i40iw_poll_cq - poll cq for completion (kernel apps)
2382  * @ibcq: cq to poll
2383  * @num_entries: number of entries to poll
2384  * @entry: wr of entry completed
2385  */
2386 static int i40iw_poll_cq(struct ib_cq *ibcq,
2387                          int num_entries,
2388                          struct ib_wc *entry)
2389 {
2390         struct i40iw_cq *iwcq;
2391         int cqe_count = 0;
2392         struct i40iw_cq_poll_info cq_poll_info;
2393         enum i40iw_status_code ret;
2394         struct i40iw_cq_uk *ukcq;
2395         struct i40iw_sc_qp *qp;
2396         struct i40iw_qp *iwqp;
2397         unsigned long flags;
2398
2399         iwcq = (struct i40iw_cq *)ibcq;
2400         ukcq = &iwcq->sc_cq.cq_uk;
2401
2402         spin_lock_irqsave(&iwcq->lock, flags);
2403         while (cqe_count < num_entries) {
2404                 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2405                 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2406                         break;
2407                 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2408                         continue;
2409                 } else if (ret) {
2410                         if (!cqe_count)
2411                                 cqe_count = -1;
2412                         break;
2413                 }
2414                 entry->wc_flags = 0;
2415                 entry->wr_id = cq_poll_info.wr_id;
2416                 if (cq_poll_info.error) {
2417                         entry->status = IB_WC_WR_FLUSH_ERR;
2418                         entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2419                 } else {
2420                         entry->status = IB_WC_SUCCESS;
2421                 }
2422
2423                 switch (cq_poll_info.op_type) {
2424                 case I40IW_OP_TYPE_RDMA_WRITE:
2425                         entry->opcode = IB_WC_RDMA_WRITE;
2426                         break;
2427                 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2428                 case I40IW_OP_TYPE_RDMA_READ:
2429                         entry->opcode = IB_WC_RDMA_READ;
2430                         break;
2431                 case I40IW_OP_TYPE_SEND_SOL:
2432                 case I40IW_OP_TYPE_SEND_SOL_INV:
2433                 case I40IW_OP_TYPE_SEND_INV:
2434                 case I40IW_OP_TYPE_SEND:
2435                         entry->opcode = IB_WC_SEND;
2436                         break;
2437                 case I40IW_OP_TYPE_REC:
2438                         entry->opcode = IB_WC_RECV;
2439                         break;
2440                 default:
2441                         entry->opcode = IB_WC_RECV;
2442                         break;
2443                 }
2444
2445                 entry->ex.imm_data = 0;
2446                 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2447                 entry->qp = (struct ib_qp *)qp->back_qp;
2448                 entry->src_qp = cq_poll_info.qp_id;
2449                 iwqp = (struct i40iw_qp *)qp->back_qp;
2450                 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2451                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2452                                 complete(&iwqp->sq_drained);
2453                         if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2454                                 complete(&iwqp->rq_drained);
2455                 }
2456                 entry->byte_len = cq_poll_info.bytes_xfered;
2457                 entry++;
2458                 cqe_count++;
2459         }
2460         spin_unlock_irqrestore(&iwcq->lock, flags);
2461         return cqe_count;
2462 }
2463
2464 /**
2465  * i40iw_req_notify_cq - arm cq kernel application
2466  * @ibcq: cq to arm
2467  * @notify_flags: notofication flags
2468  */
2469 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2470                                enum ib_cq_notify_flags notify_flags)
2471 {
2472         struct i40iw_cq *iwcq;
2473         struct i40iw_cq_uk *ukcq;
2474         unsigned long flags;
2475         enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2476
2477         iwcq = (struct i40iw_cq *)ibcq;
2478         ukcq = &iwcq->sc_cq.cq_uk;
2479         if (notify_flags == IB_CQ_SOLICITED)
2480                 cq_notify = IW_CQ_COMPL_SOLICITED;
2481         spin_lock_irqsave(&iwcq->lock, flags);
2482         ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2483         spin_unlock_irqrestore(&iwcq->lock, flags);
2484         return 0;
2485 }
2486
2487 /**
2488  * i40iw_port_immutable - return port's immutable data
2489  * @ibdev: ib dev struct
2490  * @port_num: port number
2491  * @immutable: immutable data for the port return
2492  */
2493 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2494                                 struct ib_port_immutable *immutable)
2495 {
2496         struct ib_port_attr attr;
2497         int err;
2498
2499         immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2500
2501         err = ib_query_port(ibdev, port_num, &attr);
2502
2503         if (err)
2504                 return err;
2505
2506         immutable->pkey_tbl_len = attr.pkey_tbl_len;
2507         immutable->gid_tbl_len = attr.gid_tbl_len;
2508
2509         return 0;
2510 }
2511
2512 static const char * const i40iw_hw_stat_names[] = {
2513         // 32bit names
2514         [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2515         [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2516         [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2517         [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2518         [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2519         [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2520         [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2521         [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2522         [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2523         // 64bit names
2524         [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2525                 "ip4InOctets",
2526         [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2527                 "ip4InPkts",
2528         [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2529                 "ip4InReasmRqd",
2530         [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2531                 "ip4InMcastPkts",
2532         [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2533                 "ip4OutOctets",
2534         [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2535                 "ip4OutPkts",
2536         [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2537                 "ip4OutSegRqd",
2538         [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2539                 "ip4OutMcastPkts",
2540         [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2541                 "ip6InOctets",
2542         [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2543                 "ip6InPkts",
2544         [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2545                 "ip6InReasmRqd",
2546         [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2547                 "ip6InMcastPkts",
2548         [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2549                 "ip6OutOctets",
2550         [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2551                 "ip6OutPkts",
2552         [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2553                 "ip6OutSegRqd",
2554         [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2555                 "ip6OutMcastPkts",
2556         [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2557                 "tcpInSegs",
2558         [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2559                 "tcpOutSegs",
2560         [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2561                 "iwInRdmaReads",
2562         [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2563                 "iwInRdmaSends",
2564         [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2565                 "iwInRdmaWrites",
2566         [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2567                 "iwOutRdmaReads",
2568         [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2569                 "iwOutRdmaSends",
2570         [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2571                 "iwOutRdmaWrites",
2572         [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2573                 "iwRdmaBnd",
2574         [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2575                 "iwRdmaInv"
2576 };
2577
2578 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str,
2579                                  size_t str_len)
2580 {
2581         u32 firmware_version = I40IW_FW_VERSION;
2582
2583         snprintf(str, str_len, "%u.%u", firmware_version,
2584                        (firmware_version & 0x000000ff));
2585 }
2586
2587 /**
2588  * i40iw_alloc_hw_stats - Allocate a hw stats structure
2589  * @ibdev: device pointer from stack
2590  * @port_num: port number
2591  */
2592 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2593                                                   u8 port_num)
2594 {
2595         struct i40iw_device *iwdev = to_iwdev(ibdev);
2596         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2597         int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2598                 I40IW_HW_STAT_INDEX_MAX_64;
2599         unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2600
2601         BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2602                      (I40IW_HW_STAT_INDEX_MAX_32 +
2603                       I40IW_HW_STAT_INDEX_MAX_64));
2604
2605         /*
2606          * PFs get the default update lifespan, but VFs only update once
2607          * per second
2608          */
2609         if (!dev->is_pf)
2610                 lifespan = 1000;
2611         return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2612                                           lifespan);
2613 }
2614
2615 /**
2616  * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2617  * @ibdev: device pointer from stack
2618  * @stats: stats pointer from stack
2619  * @port_num: port number
2620  * @index: which hw counter the stack is requesting we update
2621  */
2622 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2623                               struct rdma_hw_stats *stats,
2624                               u8 port_num, int index)
2625 {
2626         struct i40iw_device *iwdev = to_iwdev(ibdev);
2627         struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2628         struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
2629         struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2630
2631         if (dev->is_pf) {
2632                 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
2633         } else {
2634                 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2635                         return -ENOSYS;
2636         }
2637
2638         memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
2639
2640         return stats->num_counters;
2641 }
2642
2643 /**
2644  * i40iw_query_gid - Query port GID
2645  * @ibdev: device pointer from stack
2646  * @port: port number
2647  * @index: Entry index
2648  * @gid: Global ID
2649  */
2650 static int i40iw_query_gid(struct ib_device *ibdev,
2651                            u8 port,
2652                            int index,
2653                            union ib_gid *gid)
2654 {
2655         struct i40iw_device *iwdev = to_iwdev(ibdev);
2656
2657         memset(gid->raw, 0, sizeof(gid->raw));
2658         ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2659         return 0;
2660 }
2661
2662 /**
2663  * i40iw_modify_port  Modify port properties
2664  * @ibdev: device pointer from stack
2665  * @port: port number
2666  * @port_modify_mask: mask for port modifications
2667  * @props: port properties
2668  */
2669 static int i40iw_modify_port(struct ib_device *ibdev,
2670                              u8 port,
2671                              int port_modify_mask,
2672                              struct ib_port_modify *props)
2673 {
2674         return -ENOSYS;
2675 }
2676
2677 /**
2678  * i40iw_query_pkey - Query partition key
2679  * @ibdev: device pointer from stack
2680  * @port: port number
2681  * @index: index of pkey
2682  * @pkey: pointer to store the pkey
2683  */
2684 static int i40iw_query_pkey(struct ib_device *ibdev,
2685                             u8 port,
2686                             u16 index,
2687                             u16 *pkey)
2688 {
2689         *pkey = 0;
2690         return 0;
2691 }
2692
2693 /**
2694  * i40iw_create_ah - create address handle
2695  * @ibpd: ptr of pd
2696  * @ah_attr: address handle attributes
2697  */
2698 static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2699                                      struct rdma_ah_attr *attr,
2700                                      struct ib_udata *udata)
2701
2702 {
2703         return ERR_PTR(-ENOSYS);
2704 }
2705
2706 /**
2707  * i40iw_destroy_ah - Destroy address handle
2708  * @ah: pointer to address handle
2709  */
2710 static int i40iw_destroy_ah(struct ib_ah *ah)
2711 {
2712         return -ENOSYS;
2713 }
2714
2715 /**
2716  * i40iw_init_rdma_device - initialization of iwarp device
2717  * @iwdev: iwarp device
2718  */
2719 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2720 {
2721         struct i40iw_ib_device *iwibdev;
2722         struct net_device *netdev = iwdev->netdev;
2723         struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2724
2725         iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2726         if (!iwibdev) {
2727                 i40iw_pr_err("iwdev == NULL\n");
2728                 return NULL;
2729         }
2730         strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2731         iwibdev->ibdev.owner = THIS_MODULE;
2732         iwdev->iwibdev = iwibdev;
2733         iwibdev->iwdev = iwdev;
2734
2735         iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2736         ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2737
2738         iwibdev->ibdev.uverbs_cmd_mask =
2739             (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2740             (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2741             (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2742             (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2743             (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2744             (1ull << IB_USER_VERBS_CMD_REG_MR) |
2745             (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2746             (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2747             (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2748             (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2749             (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2750             (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2751             (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2752             (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2753             (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2754             (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2755             (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2756             (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2757             (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2758             (1ull << IB_USER_VERBS_CMD_POST_SEND);
2759         iwibdev->ibdev.phys_port_cnt = 1;
2760         iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2761         iwibdev->ibdev.dev.parent = &pcidev->dev;
2762         iwibdev->ibdev.query_port = i40iw_query_port;
2763         iwibdev->ibdev.modify_port = i40iw_modify_port;
2764         iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2765         iwibdev->ibdev.query_gid = i40iw_query_gid;
2766         iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2767         iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2768         iwibdev->ibdev.mmap = i40iw_mmap;
2769         iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2770         iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2771         iwibdev->ibdev.create_qp = i40iw_create_qp;
2772         iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2773         iwibdev->ibdev.query_qp = i40iw_query_qp;
2774         iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2775         iwibdev->ibdev.create_cq = i40iw_create_cq;
2776         iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2777         iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2778         iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2779         iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2780         iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2781         iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2782         iwibdev->ibdev.query_device = i40iw_query_device;
2783         iwibdev->ibdev.create_ah = i40iw_create_ah;
2784         iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2785         iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2786         iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2787         iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2788         iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2789         iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2790         if (!iwibdev->ibdev.iwcm) {
2791                 ib_dealloc_device(&iwibdev->ibdev);
2792                 return NULL;
2793         }
2794
2795         iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2796         iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2797         iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2798         iwibdev->ibdev.iwcm->connect = i40iw_connect;
2799         iwibdev->ibdev.iwcm->accept = i40iw_accept;
2800         iwibdev->ibdev.iwcm->reject = i40iw_reject;
2801         iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2802         iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2803         memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2804                sizeof(iwibdev->ibdev.iwcm->ifname));
2805         iwibdev->ibdev.get_port_immutable   = i40iw_port_immutable;
2806         iwibdev->ibdev.get_dev_fw_str       = i40iw_get_dev_fw_str;
2807         iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2808         iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2809         iwibdev->ibdev.post_send = i40iw_post_send;
2810         iwibdev->ibdev.post_recv = i40iw_post_recv;
2811
2812         return iwibdev;
2813 }
2814
2815 /**
2816  * i40iw_port_ibevent - indicate port event
2817  * @iwdev: iwarp device
2818  */
2819 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2820 {
2821         struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2822         struct ib_event event;
2823
2824         event.device = &iwibdev->ibdev;
2825         event.element.port_num = 1;
2826         event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2827         ib_dispatch_event(&event);
2828 }
2829
2830 /**
2831  * i40iw_unregister_rdma_device - unregister of iwarp from IB
2832  * @iwibdev: rdma device ptr
2833  */
2834 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2835 {
2836         int i;
2837
2838         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2839                 device_remove_file(&iwibdev->ibdev.dev,
2840                                    i40iw_dev_attributes[i]);
2841         ib_unregister_device(&iwibdev->ibdev);
2842 }
2843
2844 /**
2845  * i40iw_destroy_rdma_device - destroy rdma device and free resources
2846  * @iwibdev: IB device ptr
2847  */
2848 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2849 {
2850         if (!iwibdev)
2851                 return;
2852
2853         i40iw_unregister_rdma_device(iwibdev);
2854         kfree(iwibdev->ibdev.iwcm);
2855         iwibdev->ibdev.iwcm = NULL;
2856         wait_event_timeout(iwibdev->iwdev->close_wq,
2857                            !atomic64_read(&iwibdev->iwdev->use_count),
2858                            I40IW_EVENT_TIMEOUT);
2859         ib_dealloc_device(&iwibdev->ibdev);
2860 }
2861
2862 /**
2863  * i40iw_register_rdma_device - register iwarp device to IB
2864  * @iwdev: iwarp device
2865  */
2866 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2867 {
2868         int i, ret;
2869         struct i40iw_ib_device *iwibdev;
2870
2871         iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2872         if (!iwdev->iwibdev)
2873                 return -ENOMEM;
2874         iwibdev = iwdev->iwibdev;
2875
2876         ret = ib_register_device(&iwibdev->ibdev, NULL);
2877         if (ret)
2878                 goto error;
2879
2880         for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2881                 ret =
2882                     device_create_file(&iwibdev->ibdev.dev,
2883                                        i40iw_dev_attributes[i]);
2884                 if (ret) {
2885                         while (i > 0) {
2886                                 i--;
2887                                 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2888                         }
2889                         ib_unregister_device(&iwibdev->ibdev);
2890                         goto error;
2891                 }
2892         }
2893         return 0;
2894 error:
2895         kfree(iwdev->iwibdev->ibdev.iwcm);
2896         iwdev->iwibdev->ibdev.iwcm = NULL;
2897         ib_dealloc_device(&iwdev->iwibdev->ibdev);
2898         return ret;
2899 }