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1 /*
2  * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
41 #include <linux/io.h>
42 #include <linux/jiffies.h>
43 #include <asm/pgtable.h>
44 #include <linux/delay.h>
45 #include <linux/export.h>
46
47 #include "qib.h"
48 #include "qib_common.h"
49 #include "qib_user_sdma.h"
50
51 #undef pr_fmt
52 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
53
54 static int qib_open(struct inode *, struct file *);
55 static int qib_close(struct inode *, struct file *);
56 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
57 static ssize_t qib_aio_write(struct kiocb *, const struct iovec *,
58                              unsigned long, loff_t);
59 static unsigned int qib_poll(struct file *, struct poll_table_struct *);
60 static int qib_mmapf(struct file *, struct vm_area_struct *);
61
62 static const struct file_operations qib_file_ops = {
63         .owner = THIS_MODULE,
64         .write = qib_write,
65         .aio_write = qib_aio_write,
66         .open = qib_open,
67         .release = qib_close,
68         .poll = qib_poll,
69         .mmap = qib_mmapf,
70         .llseek = noop_llseek,
71 };
72
73 /*
74  * Convert kernel virtual addresses to physical addresses so they don't
75  * potentially conflict with the chip addresses used as mmap offsets.
76  * It doesn't really matter what mmap offset we use as long as we can
77  * interpret it correctly.
78  */
79 static u64 cvt_kvaddr(void *p)
80 {
81         struct page *page;
82         u64 paddr = 0;
83
84         page = vmalloc_to_page(p);
85         if (page)
86                 paddr = page_to_pfn(page) << PAGE_SHIFT;
87
88         return paddr;
89 }
90
91 static int qib_get_base_info(struct file *fp, void __user *ubase,
92                              size_t ubase_size)
93 {
94         struct qib_ctxtdata *rcd = ctxt_fp(fp);
95         int ret = 0;
96         struct qib_base_info *kinfo = NULL;
97         struct qib_devdata *dd = rcd->dd;
98         struct qib_pportdata *ppd = rcd->ppd;
99         unsigned subctxt_cnt;
100         int shared, master;
101         size_t sz;
102
103         subctxt_cnt = rcd->subctxt_cnt;
104         if (!subctxt_cnt) {
105                 shared = 0;
106                 master = 0;
107                 subctxt_cnt = 1;
108         } else {
109                 shared = 1;
110                 master = !subctxt_fp(fp);
111         }
112
113         sz = sizeof(*kinfo);
114         /* If context sharing is not requested, allow the old size structure */
115         if (!shared)
116                 sz -= 7 * sizeof(u64);
117         if (ubase_size < sz) {
118                 ret = -EINVAL;
119                 goto bail;
120         }
121
122         kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
123         if (kinfo == NULL) {
124                 ret = -ENOMEM;
125                 goto bail;
126         }
127
128         ret = dd->f_get_base_info(rcd, kinfo);
129         if (ret < 0)
130                 goto bail;
131
132         kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
133         kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
134         kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
135         kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
136         /*
137          * have to mmap whole thing
138          */
139         kinfo->spi_rcv_egrbuftotlen =
140                 rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
141         kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
142         kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
143                 rcd->rcvegrbuf_chunks;
144         kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
145         if (master)
146                 kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
147         /*
148          * for this use, may be cfgctxts summed over all chips that
149          * are are configured and present
150          */
151         kinfo->spi_nctxts = dd->cfgctxts;
152         /* unit (chip/board) our context is on */
153         kinfo->spi_unit = dd->unit;
154         kinfo->spi_port = ppd->port;
155         /* for now, only a single page */
156         kinfo->spi_tid_maxsize = PAGE_SIZE;
157
158         /*
159          * Doing this per context, and based on the skip value, etc.  This has
160          * to be the actual buffer size, since the protocol code treats it
161          * as an array.
162          *
163          * These have to be set to user addresses in the user code via mmap.
164          * These values are used on return to user code for the mmap target
165          * addresses only.  For 32 bit, same 44 bit address problem, so use
166          * the physical address, not virtual.  Before 2.6.11, using the
167          * page_address() macro worked, but in 2.6.11, even that returns the
168          * full 64 bit address (upper bits all 1's).  So far, using the
169          * physical addresses (or chip offsets, for chip mapping) works, but
170          * no doubt some future kernel release will change that, and we'll be
171          * on to yet another method of dealing with this.
172          * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
173          * since the chips with non-zero rhf_offset don't normally
174          * enable tail register updates to host memory, but for testing,
175          * both can be enabled and used.
176          */
177         kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
178         kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
179         kinfo->spi_rhf_offset = dd->rhf_offset;
180         kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
181         kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
182         /* setup per-unit (not port) status area for user programs */
183         kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
184                 (char *) ppd->statusp -
185                 (char *) dd->pioavailregs_dma;
186         kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
187         if (!shared) {
188                 kinfo->spi_piocnt = rcd->piocnt;
189                 kinfo->spi_piobufbase = (u64) rcd->piobufs;
190                 kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
191         } else if (master) {
192                 kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
193                                     (rcd->piocnt % subctxt_cnt);
194                 /* Master's PIO buffers are after all the slave's */
195                 kinfo->spi_piobufbase = (u64) rcd->piobufs +
196                         dd->palign *
197                         (rcd->piocnt - kinfo->spi_piocnt);
198         } else {
199                 unsigned slave = subctxt_fp(fp) - 1;
200
201                 kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
202                 kinfo->spi_piobufbase = (u64) rcd->piobufs +
203                         dd->palign * kinfo->spi_piocnt * slave;
204         }
205
206         if (shared) {
207                 kinfo->spi_sendbuf_status =
208                         cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
209                 /* only spi_subctxt_* fields should be set in this block! */
210                 kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
211
212                 kinfo->spi_subctxt_rcvegrbuf =
213                         cvt_kvaddr(rcd->subctxt_rcvegrbuf);
214                 kinfo->spi_subctxt_rcvhdr_base =
215                         cvt_kvaddr(rcd->subctxt_rcvhdr_base);
216         }
217
218         /*
219          * All user buffers are 2KB buffers.  If we ever support
220          * giving 4KB buffers to user processes, this will need some
221          * work.  Can't use piobufbase directly, because it has
222          * both 2K and 4K buffer base values.
223          */
224         kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
225                 dd->palign;
226         kinfo->spi_pioalign = dd->palign;
227         kinfo->spi_qpair = QIB_KD_QP;
228         /*
229          * user mode PIO buffers are always 2KB, even when 4KB can
230          * be received, and sent via the kernel; this is ibmaxlen
231          * for 2K MTU.
232          */
233         kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
234         kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
235         kinfo->spi_ctxt = rcd->ctxt;
236         kinfo->spi_subctxt = subctxt_fp(fp);
237         kinfo->spi_sw_version = QIB_KERN_SWVERSION;
238         kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
239         kinfo->spi_hw_version = dd->revision;
240
241         if (master)
242                 kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
243
244         sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
245         if (copy_to_user(ubase, kinfo, sz))
246                 ret = -EFAULT;
247 bail:
248         kfree(kinfo);
249         return ret;
250 }
251
252 /**
253  * qib_tid_update - update a context TID
254  * @rcd: the context
255  * @fp: the qib device file
256  * @ti: the TID information
257  *
258  * The new implementation as of Oct 2004 is that the driver assigns
259  * the tid and returns it to the caller.   To reduce search time, we
260  * keep a cursor for each context, walking the shadow tid array to find
261  * one that's not in use.
262  *
263  * For now, if we can't allocate the full list, we fail, although
264  * in the long run, we'll allocate as many as we can, and the
265  * caller will deal with that by trying the remaining pages later.
266  * That means that when we fail, we have to mark the tids as not in
267  * use again, in our shadow copy.
268  *
269  * It's up to the caller to free the tids when they are done.
270  * We'll unlock the pages as they free them.
271  *
272  * Also, right now we are locking one page at a time, but since
273  * the intended use of this routine is for a single group of
274  * virtually contiguous pages, that should change to improve
275  * performance.
276  */
277 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
278                           const struct qib_tid_info *ti)
279 {
280         int ret = 0, ntids;
281         u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
282         u16 *tidlist;
283         struct qib_devdata *dd = rcd->dd;
284         u64 physaddr;
285         unsigned long vaddr;
286         u64 __iomem *tidbase;
287         unsigned long tidmap[8];
288         struct page **pagep = NULL;
289         unsigned subctxt = subctxt_fp(fp);
290
291         if (!dd->pageshadow) {
292                 ret = -ENOMEM;
293                 goto done;
294         }
295
296         cnt = ti->tidcnt;
297         if (!cnt) {
298                 ret = -EFAULT;
299                 goto done;
300         }
301         ctxttid = rcd->ctxt * dd->rcvtidcnt;
302         if (!rcd->subctxt_cnt) {
303                 tidcnt = dd->rcvtidcnt;
304                 tid = rcd->tidcursor;
305                 tidoff = 0;
306         } else if (!subctxt) {
307                 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
308                          (dd->rcvtidcnt % rcd->subctxt_cnt);
309                 tidoff = dd->rcvtidcnt - tidcnt;
310                 ctxttid += tidoff;
311                 tid = tidcursor_fp(fp);
312         } else {
313                 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
314                 tidoff = tidcnt * (subctxt - 1);
315                 ctxttid += tidoff;
316                 tid = tidcursor_fp(fp);
317         }
318         if (cnt > tidcnt) {
319                 /* make sure it all fits in tid_pg_list */
320                 qib_devinfo(dd->pcidev,
321                         "Process tried to allocate %u TIDs, only trying max (%u)\n",
322                         cnt, tidcnt);
323                 cnt = tidcnt;
324         }
325         pagep = (struct page **) rcd->tid_pg_list;
326         tidlist = (u16 *) &pagep[dd->rcvtidcnt];
327         pagep += tidoff;
328         tidlist += tidoff;
329
330         memset(tidmap, 0, sizeof(tidmap));
331         /* before decrement; chip actual # */
332         ntids = tidcnt;
333         tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
334                                    dd->rcvtidbase +
335                                    ctxttid * sizeof(*tidbase));
336
337         /* virtual address of first page in transfer */
338         vaddr = ti->tidvaddr;
339         if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
340                        cnt * PAGE_SIZE)) {
341                 ret = -EFAULT;
342                 goto done;
343         }
344         ret = qib_get_user_pages(vaddr, cnt, pagep);
345         if (ret) {
346                 /*
347                  * if (ret == -EBUSY)
348                  * We can't continue because the pagep array won't be
349                  * initialized. This should never happen,
350                  * unless perhaps the user has mpin'ed the pages
351                  * themselves.
352                  */
353                 qib_devinfo(
354                         dd->pcidev,
355                         "Failed to lock addr %p, %u pages: errno %d\n",
356                         (void *) vaddr, cnt, -ret);
357                 goto done;
358         }
359         for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
360                 for (; ntids--; tid++) {
361                         if (tid == tidcnt)
362                                 tid = 0;
363                         if (!dd->pageshadow[ctxttid + tid])
364                                 break;
365                 }
366                 if (ntids < 0) {
367                         /*
368                          * Oops, wrapped all the way through their TIDs,
369                          * and didn't have enough free; see comments at
370                          * start of routine
371                          */
372                         i--;    /* last tidlist[i] not filled in */
373                         ret = -ENOMEM;
374                         break;
375                 }
376                 tidlist[i] = tid + tidoff;
377                 /* we "know" system pages and TID pages are same size */
378                 dd->pageshadow[ctxttid + tid] = pagep[i];
379                 dd->physshadow[ctxttid + tid] =
380                         qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
381                                      PCI_DMA_FROMDEVICE);
382                 /*
383                  * don't need atomic or it's overhead
384                  */
385                 __set_bit(tid, tidmap);
386                 physaddr = dd->physshadow[ctxttid + tid];
387                 /* PERFORMANCE: below should almost certainly be cached */
388                 dd->f_put_tid(dd, &tidbase[tid],
389                                   RCVHQ_RCV_TYPE_EXPECTED, physaddr);
390                 /*
391                  * don't check this tid in qib_ctxtshadow, since we
392                  * just filled it in; start with the next one.
393                  */
394                 tid++;
395         }
396
397         if (ret) {
398                 u32 limit;
399 cleanup:
400                 /* jump here if copy out of updated info failed... */
401                 /* same code that's in qib_free_tid() */
402                 limit = sizeof(tidmap) * BITS_PER_BYTE;
403                 if (limit > tidcnt)
404                         /* just in case size changes in future */
405                         limit = tidcnt;
406                 tid = find_first_bit((const unsigned long *)tidmap, limit);
407                 for (; tid < limit; tid++) {
408                         if (!test_bit(tid, tidmap))
409                                 continue;
410                         if (dd->pageshadow[ctxttid + tid]) {
411                                 dma_addr_t phys;
412
413                                 phys = dd->physshadow[ctxttid + tid];
414                                 dd->physshadow[ctxttid + tid] = dd->tidinvalid;
415                                 /* PERFORMANCE: below should almost certainly
416                                  * be cached
417                                  */
418                                 dd->f_put_tid(dd, &tidbase[tid],
419                                               RCVHQ_RCV_TYPE_EXPECTED,
420                                               dd->tidinvalid);
421                                 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
422                                                PCI_DMA_FROMDEVICE);
423                                 dd->pageshadow[ctxttid + tid] = NULL;
424                         }
425                 }
426                 qib_release_user_pages(pagep, cnt);
427         } else {
428                 /*
429                  * Copy the updated array, with qib_tid's filled in, back
430                  * to user.  Since we did the copy in already, this "should
431                  * never fail" If it does, we have to clean up...
432                  */
433                 if (copy_to_user((void __user *)
434                                  (unsigned long) ti->tidlist,
435                                  tidlist, cnt * sizeof(*tidlist))) {
436                         ret = -EFAULT;
437                         goto cleanup;
438                 }
439                 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
440                                  tidmap, sizeof(tidmap))) {
441                         ret = -EFAULT;
442                         goto cleanup;
443                 }
444                 if (tid == tidcnt)
445                         tid = 0;
446                 if (!rcd->subctxt_cnt)
447                         rcd->tidcursor = tid;
448                 else
449                         tidcursor_fp(fp) = tid;
450         }
451
452 done:
453         return ret;
454 }
455
456 /**
457  * qib_tid_free - free a context TID
458  * @rcd: the context
459  * @subctxt: the subcontext
460  * @ti: the TID info
461  *
462  * right now we are unlocking one page at a time, but since
463  * the intended use of this routine is for a single group of
464  * virtually contiguous pages, that should change to improve
465  * performance.  We check that the TID is in range for this context
466  * but otherwise don't check validity; if user has an error and
467  * frees the wrong tid, it's only their own data that can thereby
468  * be corrupted.  We do check that the TID was in use, for sanity
469  * We always use our idea of the saved address, not the address that
470  * they pass in to us.
471  */
472 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
473                         const struct qib_tid_info *ti)
474 {
475         int ret = 0;
476         u32 tid, ctxttid, cnt, limit, tidcnt;
477         struct qib_devdata *dd = rcd->dd;
478         u64 __iomem *tidbase;
479         unsigned long tidmap[8];
480
481         if (!dd->pageshadow) {
482                 ret = -ENOMEM;
483                 goto done;
484         }
485
486         if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
487                            sizeof(tidmap))) {
488                 ret = -EFAULT;
489                 goto done;
490         }
491
492         ctxttid = rcd->ctxt * dd->rcvtidcnt;
493         if (!rcd->subctxt_cnt)
494                 tidcnt = dd->rcvtidcnt;
495         else if (!subctxt) {
496                 tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
497                          (dd->rcvtidcnt % rcd->subctxt_cnt);
498                 ctxttid += dd->rcvtidcnt - tidcnt;
499         } else {
500                 tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
501                 ctxttid += tidcnt * (subctxt - 1);
502         }
503         tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
504                                    dd->rcvtidbase +
505                                    ctxttid * sizeof(*tidbase));
506
507         limit = sizeof(tidmap) * BITS_PER_BYTE;
508         if (limit > tidcnt)
509                 /* just in case size changes in future */
510                 limit = tidcnt;
511         tid = find_first_bit(tidmap, limit);
512         for (cnt = 0; tid < limit; tid++) {
513                 /*
514                  * small optimization; if we detect a run of 3 or so without
515                  * any set, use find_first_bit again.  That's mainly to
516                  * accelerate the case where we wrapped, so we have some at
517                  * the beginning, and some at the end, and a big gap
518                  * in the middle.
519                  */
520                 if (!test_bit(tid, tidmap))
521                         continue;
522                 cnt++;
523                 if (dd->pageshadow[ctxttid + tid]) {
524                         struct page *p;
525                         dma_addr_t phys;
526
527                         p = dd->pageshadow[ctxttid + tid];
528                         dd->pageshadow[ctxttid + tid] = NULL;
529                         phys = dd->physshadow[ctxttid + tid];
530                         dd->physshadow[ctxttid + tid] = dd->tidinvalid;
531                         /* PERFORMANCE: below should almost certainly be
532                          * cached
533                          */
534                         dd->f_put_tid(dd, &tidbase[tid],
535                                       RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
536                         pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
537                                        PCI_DMA_FROMDEVICE);
538                         qib_release_user_pages(&p, 1);
539                 }
540         }
541 done:
542         return ret;
543 }
544
545 /**
546  * qib_set_part_key - set a partition key
547  * @rcd: the context
548  * @key: the key
549  *
550  * We can have up to 4 active at a time (other than the default, which is
551  * always allowed).  This is somewhat tricky, since multiple contexts may set
552  * the same key, so we reference count them, and clean up at exit.  All 4
553  * partition keys are packed into a single qlogic_ib register.  It's an
554  * error for a process to set the same pkey multiple times.  We provide no
555  * mechanism to de-allocate a pkey at this time, we may eventually need to
556  * do that.  I've used the atomic operations, and no locking, and only make
557  * a single pass through what's available.  This should be more than
558  * adequate for some time. I'll think about spinlocks or the like if and as
559  * it's necessary.
560  */
561 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
562 {
563         struct qib_pportdata *ppd = rcd->ppd;
564         int i, any = 0, pidx = -1;
565         u16 lkey = key & 0x7FFF;
566         int ret;
567
568         if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) {
569                 /* nothing to do; this key always valid */
570                 ret = 0;
571                 goto bail;
572         }
573
574         if (!lkey) {
575                 ret = -EINVAL;
576                 goto bail;
577         }
578
579         /*
580          * Set the full membership bit, because it has to be
581          * set in the register or the packet, and it seems
582          * cleaner to set in the register than to force all
583          * callers to set it.
584          */
585         key |= 0x8000;
586
587         for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
588                 if (!rcd->pkeys[i] && pidx == -1)
589                         pidx = i;
590                 if (rcd->pkeys[i] == key) {
591                         ret = -EEXIST;
592                         goto bail;
593                 }
594         }
595         if (pidx == -1) {
596                 ret = -EBUSY;
597                 goto bail;
598         }
599         for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
600                 if (!ppd->pkeys[i]) {
601                         any++;
602                         continue;
603                 }
604                 if (ppd->pkeys[i] == key) {
605                         atomic_t *pkrefs = &ppd->pkeyrefs[i];
606
607                         if (atomic_inc_return(pkrefs) > 1) {
608                                 rcd->pkeys[pidx] = key;
609                                 ret = 0;
610                                 goto bail;
611                         } else {
612                                 /*
613                                  * lost race, decrement count, catch below
614                                  */
615                                 atomic_dec(pkrefs);
616                                 any++;
617                         }
618                 }
619                 if ((ppd->pkeys[i] & 0x7FFF) == lkey) {
620                         /*
621                          * It makes no sense to have both the limited and
622                          * full membership PKEY set at the same time since
623                          * the unlimited one will disable the limited one.
624                          */
625                         ret = -EEXIST;
626                         goto bail;
627                 }
628         }
629         if (!any) {
630                 ret = -EBUSY;
631                 goto bail;
632         }
633         for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
634                 if (!ppd->pkeys[i] &&
635                     atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
636                         rcd->pkeys[pidx] = key;
637                         ppd->pkeys[i] = key;
638                         (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
639                         ret = 0;
640                         goto bail;
641                 }
642         }
643         ret = -EBUSY;
644
645 bail:
646         return ret;
647 }
648
649 /**
650  * qib_manage_rcvq - manage a context's receive queue
651  * @rcd: the context
652  * @subctxt: the subcontext
653  * @start_stop: action to carry out
654  *
655  * start_stop == 0 disables receive on the context, for use in queue
656  * overflow conditions.  start_stop==1 re-enables, to be used to
657  * re-init the software copy of the head register
658  */
659 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
660                            int start_stop)
661 {
662         struct qib_devdata *dd = rcd->dd;
663         unsigned int rcvctrl_op;
664
665         if (subctxt)
666                 goto bail;
667         /* atomically clear receive enable ctxt. */
668         if (start_stop) {
669                 /*
670                  * On enable, force in-memory copy of the tail register to
671                  * 0, so that protocol code doesn't have to worry about
672                  * whether or not the chip has yet updated the in-memory
673                  * copy or not on return from the system call. The chip
674                  * always resets it's tail register back to 0 on a
675                  * transition from disabled to enabled.
676                  */
677                 if (rcd->rcvhdrtail_kvaddr)
678                         qib_clear_rcvhdrtail(rcd);
679                 rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
680         } else
681                 rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
682         dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
683         /* always; new head should be equal to new tail; see above */
684 bail:
685         return 0;
686 }
687
688 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
689                                struct qib_devdata *dd)
690 {
691         int i, j, pchanged = 0;
692         u64 oldpkey;
693         struct qib_pportdata *ppd = rcd->ppd;
694
695         /* for debugging only */
696         oldpkey = (u64) ppd->pkeys[0] |
697                 ((u64) ppd->pkeys[1] << 16) |
698                 ((u64) ppd->pkeys[2] << 32) |
699                 ((u64) ppd->pkeys[3] << 48);
700
701         for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
702                 if (!rcd->pkeys[i])
703                         continue;
704                 for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
705                         /* check for match independent of the global bit */
706                         if ((ppd->pkeys[j] & 0x7fff) !=
707                             (rcd->pkeys[i] & 0x7fff))
708                                 continue;
709                         if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
710                                 ppd->pkeys[j] = 0;
711                                 pchanged++;
712                         }
713                         break;
714                 }
715                 rcd->pkeys[i] = 0;
716         }
717         if (pchanged)
718                 (void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
719 }
720
721 /* common code for the mappings on dma_alloc_coherent mem */
722 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
723                         unsigned len, void *kvaddr, u32 write_ok, char *what)
724 {
725         struct qib_devdata *dd = rcd->dd;
726         unsigned long pfn;
727         int ret;
728
729         if ((vma->vm_end - vma->vm_start) > len) {
730                 qib_devinfo(dd->pcidev,
731                          "FAIL on %s: len %lx > %x\n", what,
732                          vma->vm_end - vma->vm_start, len);
733                 ret = -EFAULT;
734                 goto bail;
735         }
736
737         /*
738          * shared context user code requires rcvhdrq mapped r/w, others
739          * only allowed readonly mapping.
740          */
741         if (!write_ok) {
742                 if (vma->vm_flags & VM_WRITE) {
743                         qib_devinfo(dd->pcidev,
744                                  "%s must be mapped readonly\n", what);
745                         ret = -EPERM;
746                         goto bail;
747                 }
748
749                 /* don't allow them to later change with mprotect */
750                 vma->vm_flags &= ~VM_MAYWRITE;
751         }
752
753         pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
754         ret = remap_pfn_range(vma, vma->vm_start, pfn,
755                               len, vma->vm_page_prot);
756         if (ret)
757                 qib_devinfo(dd->pcidev,
758                         "%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
759                         what, rcd->ctxt, pfn, len, ret);
760 bail:
761         return ret;
762 }
763
764 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
765                      u64 ureg)
766 {
767         unsigned long phys;
768         unsigned long sz;
769         int ret;
770
771         /*
772          * This is real hardware, so use io_remap.  This is the mechanism
773          * for the user process to update the head registers for their ctxt
774          * in the chip.
775          */
776         sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
777         if ((vma->vm_end - vma->vm_start) > sz) {
778                 qib_devinfo(dd->pcidev,
779                         "FAIL mmap userreg: reqlen %lx > PAGE\n",
780                         vma->vm_end - vma->vm_start);
781                 ret = -EFAULT;
782         } else {
783                 phys = dd->physaddr + ureg;
784                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
785
786                 vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
787                 ret = io_remap_pfn_range(vma, vma->vm_start,
788                                          phys >> PAGE_SHIFT,
789                                          vma->vm_end - vma->vm_start,
790                                          vma->vm_page_prot);
791         }
792         return ret;
793 }
794
795 static int mmap_piobufs(struct vm_area_struct *vma,
796                         struct qib_devdata *dd,
797                         struct qib_ctxtdata *rcd,
798                         unsigned piobufs, unsigned piocnt)
799 {
800         unsigned long phys;
801         int ret;
802
803         /*
804          * When we map the PIO buffers in the chip, we want to map them as
805          * writeonly, no read possible; unfortunately, x86 doesn't allow
806          * for this in hardware, but we still prevent users from asking
807          * for it.
808          */
809         if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
810                 qib_devinfo(dd->pcidev,
811                         "FAIL mmap piobufs: reqlen %lx > PAGE\n",
812                          vma->vm_end - vma->vm_start);
813                 ret = -EINVAL;
814                 goto bail;
815         }
816
817         phys = dd->physaddr + piobufs;
818
819 #if defined(__powerpc__)
820         /* There isn't a generic way to specify writethrough mappings */
821         pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
822         pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
823         pgprot_val(vma->vm_page_prot) &= ~_PAGE_GUARDED;
824 #endif
825
826         /*
827          * don't allow them to later change to readable with mprotect (for when
828          * not initially mapped readable, as is normally the case)
829          */
830         vma->vm_flags &= ~VM_MAYREAD;
831         vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
832
833         if (qib_wc_pat)
834                 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
835
836         ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
837                                  vma->vm_end - vma->vm_start,
838                                  vma->vm_page_prot);
839 bail:
840         return ret;
841 }
842
843 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
844                            struct qib_ctxtdata *rcd)
845 {
846         struct qib_devdata *dd = rcd->dd;
847         unsigned long start, size;
848         size_t total_size, i;
849         unsigned long pfn;
850         int ret;
851
852         size = rcd->rcvegrbuf_size;
853         total_size = rcd->rcvegrbuf_chunks * size;
854         if ((vma->vm_end - vma->vm_start) > total_size) {
855                 qib_devinfo(dd->pcidev,
856                         "FAIL on egr bufs: reqlen %lx > actual %lx\n",
857                          vma->vm_end - vma->vm_start,
858                          (unsigned long) total_size);
859                 ret = -EINVAL;
860                 goto bail;
861         }
862
863         if (vma->vm_flags & VM_WRITE) {
864                 qib_devinfo(dd->pcidev,
865                         "Can't map eager buffers as writable (flags=%lx)\n",
866                         vma->vm_flags);
867                 ret = -EPERM;
868                 goto bail;
869         }
870         /* don't allow them to later change to writeable with mprotect */
871         vma->vm_flags &= ~VM_MAYWRITE;
872
873         start = vma->vm_start;
874
875         for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
876                 pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
877                 ret = remap_pfn_range(vma, start, pfn, size,
878                                       vma->vm_page_prot);
879                 if (ret < 0)
880                         goto bail;
881         }
882         ret = 0;
883
884 bail:
885         return ret;
886 }
887
888 /*
889  * qib_file_vma_fault - handle a VMA page fault.
890  */
891 static int qib_file_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
892 {
893         struct page *page;
894
895         page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
896         if (!page)
897                 return VM_FAULT_SIGBUS;
898
899         get_page(page);
900         vmf->page = page;
901
902         return 0;
903 }
904
905 static struct vm_operations_struct qib_file_vm_ops = {
906         .fault = qib_file_vma_fault,
907 };
908
909 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
910                        struct qib_ctxtdata *rcd, unsigned subctxt)
911 {
912         struct qib_devdata *dd = rcd->dd;
913         unsigned subctxt_cnt;
914         unsigned long len;
915         void *addr;
916         size_t size;
917         int ret = 0;
918
919         subctxt_cnt = rcd->subctxt_cnt;
920         size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
921
922         /*
923          * Each process has all the subctxt uregbase, rcvhdrq, and
924          * rcvegrbufs mmapped - as an array for all the processes,
925          * and also separately for this process.
926          */
927         if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
928                 addr = rcd->subctxt_uregbase;
929                 size = PAGE_SIZE * subctxt_cnt;
930         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
931                 addr = rcd->subctxt_rcvhdr_base;
932                 size = rcd->rcvhdrq_size * subctxt_cnt;
933         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
934                 addr = rcd->subctxt_rcvegrbuf;
935                 size *= subctxt_cnt;
936         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
937                                         PAGE_SIZE * subctxt)) {
938                 addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
939                 size = PAGE_SIZE;
940         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
941                                         rcd->rcvhdrq_size * subctxt)) {
942                 addr = rcd->subctxt_rcvhdr_base +
943                         rcd->rcvhdrq_size * subctxt;
944                 size = rcd->rcvhdrq_size;
945         } else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
946                 addr = rcd->user_event_mask;
947                 size = PAGE_SIZE;
948         } else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
949                                         size * subctxt)) {
950                 addr = rcd->subctxt_rcvegrbuf + size * subctxt;
951                 /* rcvegrbufs are read-only on the slave */
952                 if (vma->vm_flags & VM_WRITE) {
953                         qib_devinfo(dd->pcidev,
954                                  "Can't map eager buffers as writable (flags=%lx)\n",
955                                  vma->vm_flags);
956                         ret = -EPERM;
957                         goto bail;
958                 }
959                 /*
960                  * Don't allow permission to later change to writeable
961                  * with mprotect.
962                  */
963                 vma->vm_flags &= ~VM_MAYWRITE;
964         } else
965                 goto bail;
966         len = vma->vm_end - vma->vm_start;
967         if (len > size) {
968                 ret = -EINVAL;
969                 goto bail;
970         }
971
972         vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
973         vma->vm_ops = &qib_file_vm_ops;
974         vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
975         ret = 1;
976
977 bail:
978         return ret;
979 }
980
981 /**
982  * qib_mmapf - mmap various structures into user space
983  * @fp: the file pointer
984  * @vma: the VM area
985  *
986  * We use this to have a shared buffer between the kernel and the user code
987  * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
988  * buffers in the chip.  We have the open and close entries so we can bump
989  * the ref count and keep the driver from being unloaded while still mapped.
990  */
991 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
992 {
993         struct qib_ctxtdata *rcd;
994         struct qib_devdata *dd;
995         u64 pgaddr, ureg;
996         unsigned piobufs, piocnt;
997         int ret, match = 1;
998
999         rcd = ctxt_fp(fp);
1000         if (!rcd || !(vma->vm_flags & VM_SHARED)) {
1001                 ret = -EINVAL;
1002                 goto bail;
1003         }
1004         dd = rcd->dd;
1005
1006         /*
1007          * This is the qib_do_user_init() code, mapping the shared buffers
1008          * and per-context user registers into the user process. The address
1009          * referred to by vm_pgoff is the file offset passed via mmap().
1010          * For shared contexts, this is the kernel vmalloc() address of the
1011          * pages to share with the master.
1012          * For non-shared or master ctxts, this is a physical address.
1013          * We only do one mmap for each space mapped.
1014          */
1015         pgaddr = vma->vm_pgoff << PAGE_SHIFT;
1016
1017         /*
1018          * Check for 0 in case one of the allocations failed, but user
1019          * called mmap anyway.
1020          */
1021         if (!pgaddr)  {
1022                 ret = -EINVAL;
1023                 goto bail;
1024         }
1025
1026         /*
1027          * Physical addresses must fit in 40 bits for our hardware.
1028          * Check for kernel virtual addresses first, anything else must
1029          * match a HW or memory address.
1030          */
1031         ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1032         if (ret) {
1033                 if (ret > 0)
1034                         ret = 0;
1035                 goto bail;
1036         }
1037
1038         ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1039         if (!rcd->subctxt_cnt) {
1040                 /* ctxt is not shared */
1041                 piocnt = rcd->piocnt;
1042                 piobufs = rcd->piobufs;
1043         } else if (!subctxt_fp(fp)) {
1044                 /* caller is the master */
1045                 piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1046                          (rcd->piocnt % rcd->subctxt_cnt);
1047                 piobufs = rcd->piobufs +
1048                         dd->palign * (rcd->piocnt - piocnt);
1049         } else {
1050                 unsigned slave = subctxt_fp(fp) - 1;
1051
1052                 /* caller is a slave */
1053                 piocnt = rcd->piocnt / rcd->subctxt_cnt;
1054                 piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1055         }
1056
1057         if (pgaddr == ureg)
1058                 ret = mmap_ureg(vma, dd, ureg);
1059         else if (pgaddr == piobufs)
1060                 ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1061         else if (pgaddr == dd->pioavailregs_phys)
1062                 /* in-memory copy of pioavail registers */
1063                 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1064                                    (void *) dd->pioavailregs_dma, 0,
1065                                    "pioavail registers");
1066         else if (pgaddr == rcd->rcvegr_phys)
1067                 ret = mmap_rcvegrbufs(vma, rcd);
1068         else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1069                 /*
1070                  * The rcvhdrq itself; multiple pages, contiguous
1071                  * from an i/o perspective.  Shared contexts need
1072                  * to map r/w, so we allow writing.
1073                  */
1074                 ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1075                                    rcd->rcvhdrq, 1, "rcvhdrq");
1076         else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1077                 /* in-memory copy of rcvhdrq tail register */
1078                 ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1079                                    rcd->rcvhdrtail_kvaddr, 0,
1080                                    "rcvhdrq tail");
1081         else
1082                 match = 0;
1083         if (!match)
1084                 ret = -EINVAL;
1085
1086         vma->vm_private_data = NULL;
1087
1088         if (ret < 0)
1089                 qib_devinfo(dd->pcidev,
1090                          "mmap Failure %d: off %llx len %lx\n",
1091                          -ret, (unsigned long long)pgaddr,
1092                          vma->vm_end - vma->vm_start);
1093 bail:
1094         return ret;
1095 }
1096
1097 static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd,
1098                                     struct file *fp,
1099                                     struct poll_table_struct *pt)
1100 {
1101         struct qib_devdata *dd = rcd->dd;
1102         unsigned pollflag;
1103
1104         poll_wait(fp, &rcd->wait, pt);
1105
1106         spin_lock_irq(&dd->uctxt_lock);
1107         if (rcd->urgent != rcd->urgent_poll) {
1108                 pollflag = POLLIN | POLLRDNORM;
1109                 rcd->urgent_poll = rcd->urgent;
1110         } else {
1111                 pollflag = 0;
1112                 set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1113         }
1114         spin_unlock_irq(&dd->uctxt_lock);
1115
1116         return pollflag;
1117 }
1118
1119 static unsigned int qib_poll_next(struct qib_ctxtdata *rcd,
1120                                   struct file *fp,
1121                                   struct poll_table_struct *pt)
1122 {
1123         struct qib_devdata *dd = rcd->dd;
1124         unsigned pollflag;
1125
1126         poll_wait(fp, &rcd->wait, pt);
1127
1128         spin_lock_irq(&dd->uctxt_lock);
1129         if (dd->f_hdrqempty(rcd)) {
1130                 set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1131                 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1132                 pollflag = 0;
1133         } else
1134                 pollflag = POLLIN | POLLRDNORM;
1135         spin_unlock_irq(&dd->uctxt_lock);
1136
1137         return pollflag;
1138 }
1139
1140 static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt)
1141 {
1142         struct qib_ctxtdata *rcd;
1143         unsigned pollflag;
1144
1145         rcd = ctxt_fp(fp);
1146         if (!rcd)
1147                 pollflag = POLLERR;
1148         else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1149                 pollflag = qib_poll_urgent(rcd, fp, pt);
1150         else  if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1151                 pollflag = qib_poll_next(rcd, fp, pt);
1152         else /* invalid */
1153                 pollflag = POLLERR;
1154
1155         return pollflag;
1156 }
1157
1158 static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1159 {
1160         struct qib_filedata *fd = fp->private_data;
1161         const unsigned int weight = cpumask_weight(&current->cpus_allowed);
1162         const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus);
1163         int local_cpu;
1164
1165         /*
1166          * If process has NOT already set it's affinity, select and
1167          * reserve a processor for it on the local NUMA node.
1168          */
1169         if ((weight >= qib_cpulist_count) &&
1170                 (cpumask_weight(local_mask) <= qib_cpulist_count)) {
1171                 for_each_cpu(local_cpu, local_mask)
1172                         if (!test_and_set_bit(local_cpu, qib_cpulist)) {
1173                                 fd->rec_cpu_num = local_cpu;
1174                                 return;
1175                         }
1176         }
1177
1178         /*
1179          * If process has NOT already set it's affinity, select and
1180          * reserve a processor for it, as a rendevous for all
1181          * users of the driver.  If they don't actually later
1182          * set affinity to this cpu, or set it to some other cpu,
1183          * it just means that sooner or later we don't recommend
1184          * a cpu, and let the scheduler do it's best.
1185          */
1186         if (weight >= qib_cpulist_count) {
1187                 int cpu;
1188
1189                 cpu = find_first_zero_bit(qib_cpulist,
1190                                           qib_cpulist_count);
1191                 if (cpu == qib_cpulist_count)
1192                         qib_dev_err(dd,
1193                         "no cpus avail for affinity PID %u\n",
1194                         current->pid);
1195                 else {
1196                         __set_bit(cpu, qib_cpulist);
1197                         fd->rec_cpu_num = cpu;
1198                 }
1199         }
1200 }
1201
1202 /*
1203  * Check that userland and driver are compatible for subcontexts.
1204  */
1205 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1206 {
1207         /* this code is written long-hand for clarity */
1208         if (QIB_USER_SWMAJOR != user_swmajor) {
1209                 /* no promise of compatibility if major mismatch */
1210                 return 0;
1211         }
1212         if (QIB_USER_SWMAJOR == 1) {
1213                 switch (QIB_USER_SWMINOR) {
1214                 case 0:
1215                 case 1:
1216                 case 2:
1217                         /* no subctxt implementation so cannot be compatible */
1218                         return 0;
1219                 case 3:
1220                         /* 3 is only compatible with itself */
1221                         return user_swminor == 3;
1222                 default:
1223                         /* >= 4 are compatible (or are expected to be) */
1224                         return user_swminor <= QIB_USER_SWMINOR;
1225                 }
1226         }
1227         /* make no promises yet for future major versions */
1228         return 0;
1229 }
1230
1231 static int init_subctxts(struct qib_devdata *dd,
1232                          struct qib_ctxtdata *rcd,
1233                          const struct qib_user_info *uinfo)
1234 {
1235         int ret = 0;
1236         unsigned num_subctxts;
1237         size_t size;
1238
1239         /*
1240          * If the user is requesting zero subctxts,
1241          * skip the subctxt allocation.
1242          */
1243         if (uinfo->spu_subctxt_cnt <= 0)
1244                 goto bail;
1245         num_subctxts = uinfo->spu_subctxt_cnt;
1246
1247         /* Check for subctxt compatibility */
1248         if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1249                 uinfo->spu_userversion & 0xffff)) {
1250                 qib_devinfo(dd->pcidev,
1251                          "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1252                          (int) (uinfo->spu_userversion >> 16),
1253                          (int) (uinfo->spu_userversion & 0xffff),
1254                          QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1255                 goto bail;
1256         }
1257         if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1258                 ret = -EINVAL;
1259                 goto bail;
1260         }
1261
1262         rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1263         if (!rcd->subctxt_uregbase) {
1264                 ret = -ENOMEM;
1265                 goto bail;
1266         }
1267         /* Note: rcd->rcvhdrq_size isn't initialized yet. */
1268         size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1269                      sizeof(u32), PAGE_SIZE) * num_subctxts;
1270         rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1271         if (!rcd->subctxt_rcvhdr_base) {
1272                 ret = -ENOMEM;
1273                 goto bail_ureg;
1274         }
1275
1276         rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1277                                               rcd->rcvegrbuf_size *
1278                                               num_subctxts);
1279         if (!rcd->subctxt_rcvegrbuf) {
1280                 ret = -ENOMEM;
1281                 goto bail_rhdr;
1282         }
1283
1284         rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1285         rcd->subctxt_id = uinfo->spu_subctxt_id;
1286         rcd->active_slaves = 1;
1287         rcd->redirect_seq_cnt = 1;
1288         set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1289         goto bail;
1290
1291 bail_rhdr:
1292         vfree(rcd->subctxt_rcvhdr_base);
1293 bail_ureg:
1294         vfree(rcd->subctxt_uregbase);
1295         rcd->subctxt_uregbase = NULL;
1296 bail:
1297         return ret;
1298 }
1299
1300 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1301                       struct file *fp, const struct qib_user_info *uinfo)
1302 {
1303         struct qib_filedata *fd = fp->private_data;
1304         struct qib_devdata *dd = ppd->dd;
1305         struct qib_ctxtdata *rcd;
1306         void *ptmp = NULL;
1307         int ret;
1308         int numa_id;
1309
1310         assign_ctxt_affinity(fp, dd);
1311
1312         numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
1313                 cpu_to_node(fd->rec_cpu_num) :
1314                 numa_node_id()) : dd->assigned_node_id;
1315
1316         rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
1317
1318         /*
1319          * Allocate memory for use in qib_tid_update() at open to
1320          * reduce cost of expected send setup per message segment
1321          */
1322         if (rcd)
1323                 ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1324                                dd->rcvtidcnt * sizeof(struct page **),
1325                                GFP_KERNEL);
1326
1327         if (!rcd || !ptmp) {
1328                 qib_dev_err(dd,
1329                         "Unable to allocate ctxtdata memory, failing open\n");
1330                 ret = -ENOMEM;
1331                 goto bailerr;
1332         }
1333         rcd->userversion = uinfo->spu_userversion;
1334         ret = init_subctxts(dd, rcd, uinfo);
1335         if (ret)
1336                 goto bailerr;
1337         rcd->tid_pg_list = ptmp;
1338         rcd->pid = current->pid;
1339         init_waitqueue_head(&dd->rcd[ctxt]->wait);
1340         strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1341         ctxt_fp(fp) = rcd;
1342         qib_stats.sps_ctxts++;
1343         dd->freectxts--;
1344         ret = 0;
1345         goto bail;
1346
1347 bailerr:
1348         if (fd->rec_cpu_num != -1)
1349                 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1350
1351         dd->rcd[ctxt] = NULL;
1352         kfree(rcd);
1353         kfree(ptmp);
1354 bail:
1355         return ret;
1356 }
1357
1358 static inline int usable(struct qib_pportdata *ppd)
1359 {
1360         struct qib_devdata *dd = ppd->dd;
1361
1362         return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1363                 (ppd->lflags & QIBL_LINKACTIVE);
1364 }
1365
1366 /*
1367  * Select a context on the given device, either using a requested port
1368  * or the port based on the context number.
1369  */
1370 static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1371                             const struct qib_user_info *uinfo)
1372 {
1373         struct qib_pportdata *ppd = NULL;
1374         int ret, ctxt;
1375
1376         if (port) {
1377                 if (!usable(dd->pport + port - 1)) {
1378                         ret = -ENETDOWN;
1379                         goto done;
1380                 } else
1381                         ppd = dd->pport + port - 1;
1382         }
1383         for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt];
1384              ctxt++)
1385                 ;
1386         if (ctxt == dd->cfgctxts) {
1387                 ret = -EBUSY;
1388                 goto done;
1389         }
1390         if (!ppd) {
1391                 u32 pidx = ctxt % dd->num_pports;
1392
1393                 if (usable(dd->pport + pidx))
1394                         ppd = dd->pport + pidx;
1395                 else {
1396                         for (pidx = 0; pidx < dd->num_pports && !ppd;
1397                              pidx++)
1398                                 if (usable(dd->pport + pidx))
1399                                         ppd = dd->pport + pidx;
1400                 }
1401         }
1402         ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN;
1403 done:
1404         return ret;
1405 }
1406
1407 static int find_free_ctxt(int unit, struct file *fp,
1408                           const struct qib_user_info *uinfo)
1409 {
1410         struct qib_devdata *dd = qib_lookup(unit);
1411         int ret;
1412
1413         if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports))
1414                 ret = -ENODEV;
1415         else
1416                 ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo);
1417
1418         return ret;
1419 }
1420
1421 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1422                       unsigned alg)
1423 {
1424         struct qib_devdata *udd = NULL;
1425         int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i;
1426         u32 port = uinfo->spu_port, ctxt;
1427
1428         devmax = qib_count_units(&npresent, &nup);
1429         if (!npresent) {
1430                 ret = -ENXIO;
1431                 goto done;
1432         }
1433         if (nup == 0) {
1434                 ret = -ENETDOWN;
1435                 goto done;
1436         }
1437
1438         if (alg == QIB_PORT_ALG_ACROSS) {
1439                 unsigned inuse = ~0U;
1440
1441                 /* find device (with ACTIVE ports) with fewest ctxts in use */
1442                 for (ndev = 0; ndev < devmax; ndev++) {
1443                         struct qib_devdata *dd = qib_lookup(ndev);
1444                         unsigned cused = 0, cfree = 0, pusable = 0;
1445
1446                         if (!dd)
1447                                 continue;
1448                         if (port && port <= dd->num_pports &&
1449                             usable(dd->pport + port - 1))
1450                                 pusable = 1;
1451                         else
1452                                 for (i = 0; i < dd->num_pports; i++)
1453                                         if (usable(dd->pport + i))
1454                                                 pusable++;
1455                         if (!pusable)
1456                                 continue;
1457                         for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts;
1458                              ctxt++)
1459                                 if (dd->rcd[ctxt])
1460                                         cused++;
1461                                 else
1462                                         cfree++;
1463                         if (cfree && cused < inuse) {
1464                                 udd = dd;
1465                                 inuse = cused;
1466                         }
1467                 }
1468                 if (udd) {
1469                         ret = choose_port_ctxt(fp, udd, port, uinfo);
1470                         goto done;
1471                 }
1472         } else {
1473                 for (ndev = 0; ndev < devmax; ndev++) {
1474                         struct qib_devdata *dd = qib_lookup(ndev);
1475
1476                         if (dd) {
1477                                 ret = choose_port_ctxt(fp, dd, port, uinfo);
1478                                 if (!ret)
1479                                         goto done;
1480                                 if (ret == -EBUSY)
1481                                         dusable++;
1482                         }
1483                 }
1484         }
1485         ret = dusable ? -EBUSY : -ENETDOWN;
1486
1487 done:
1488         return ret;
1489 }
1490
1491 static int find_shared_ctxt(struct file *fp,
1492                             const struct qib_user_info *uinfo)
1493 {
1494         int devmax, ndev, i;
1495         int ret = 0;
1496
1497         devmax = qib_count_units(NULL, NULL);
1498
1499         for (ndev = 0; ndev < devmax; ndev++) {
1500                 struct qib_devdata *dd = qib_lookup(ndev);
1501
1502                 /* device portion of usable() */
1503                 if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1504                         continue;
1505                 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1506                         struct qib_ctxtdata *rcd = dd->rcd[i];
1507
1508                         /* Skip ctxts which are not yet open */
1509                         if (!rcd || !rcd->cnt)
1510                                 continue;
1511                         /* Skip ctxt if it doesn't match the requested one */
1512                         if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1513                                 continue;
1514                         /* Verify the sharing process matches the master */
1515                         if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1516                             rcd->userversion != uinfo->spu_userversion ||
1517                             rcd->cnt >= rcd->subctxt_cnt) {
1518                                 ret = -EINVAL;
1519                                 goto done;
1520                         }
1521                         ctxt_fp(fp) = rcd;
1522                         subctxt_fp(fp) = rcd->cnt++;
1523                         rcd->subpid[subctxt_fp(fp)] = current->pid;
1524                         tidcursor_fp(fp) = 0;
1525                         rcd->active_slaves |= 1 << subctxt_fp(fp);
1526                         ret = 1;
1527                         goto done;
1528                 }
1529         }
1530
1531 done:
1532         return ret;
1533 }
1534
1535 static int qib_open(struct inode *in, struct file *fp)
1536 {
1537         /* The real work is performed later in qib_assign_ctxt() */
1538         fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1539         if (fp->private_data) /* no cpu affinity by default */
1540                 ((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1541         return fp->private_data ? 0 : -ENOMEM;
1542 }
1543
1544 static int find_hca(unsigned int cpu, int *unit)
1545 {
1546         int ret = 0, devmax, npresent, nup, ndev;
1547
1548         *unit = -1;
1549
1550         devmax = qib_count_units(&npresent, &nup);
1551         if (!npresent) {
1552                 ret = -ENXIO;
1553                 goto done;
1554         }
1555         if (!nup) {
1556                 ret = -ENETDOWN;
1557                 goto done;
1558         }
1559         for (ndev = 0; ndev < devmax; ndev++) {
1560                 struct qib_devdata *dd = qib_lookup(ndev);
1561
1562                 if (dd) {
1563                         if (pcibus_to_node(dd->pcidev->bus) < 0) {
1564                                 ret = -EINVAL;
1565                                 goto done;
1566                         }
1567                         if (cpu_to_node(cpu) ==
1568                                 pcibus_to_node(dd->pcidev->bus)) {
1569                                 *unit = ndev;
1570                                 goto done;
1571                         }
1572                 }
1573         }
1574 done:
1575         return ret;
1576 }
1577
1578 static int do_qib_user_sdma_queue_create(struct file *fp)
1579 {
1580         struct qib_filedata *fd = fp->private_data;
1581         struct qib_ctxtdata *rcd = fd->rcd;
1582         struct qib_devdata *dd = rcd->dd;
1583
1584         if (dd->flags & QIB_HAS_SEND_DMA) {
1585
1586                 fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1587                                                     dd->unit,
1588                                                     rcd->ctxt,
1589                                                     fd->subctxt);
1590                 if (!fd->pq)
1591                         return -ENOMEM;
1592         }
1593
1594         return 0;
1595 }
1596
1597 /*
1598  * Get ctxt early, so can set affinity prior to memory allocation.
1599  */
1600 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1601 {
1602         int ret;
1603         int i_minor;
1604         unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS;
1605
1606         /* Check to be sure we haven't already initialized this file */
1607         if (ctxt_fp(fp)) {
1608                 ret = -EINVAL;
1609                 goto done;
1610         }
1611
1612         /* for now, if major version is different, bail */
1613         swmajor = uinfo->spu_userversion >> 16;
1614         if (swmajor != QIB_USER_SWMAJOR) {
1615                 ret = -ENODEV;
1616                 goto done;
1617         }
1618
1619         swminor = uinfo->spu_userversion & 0xffff;
1620
1621         if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT)
1622                 alg = uinfo->spu_port_alg;
1623
1624         mutex_lock(&qib_mutex);
1625
1626         if (qib_compatible_subctxts(swmajor, swminor) &&
1627             uinfo->spu_subctxt_cnt) {
1628                 ret = find_shared_ctxt(fp, uinfo);
1629                 if (ret > 0) {
1630                         ret = do_qib_user_sdma_queue_create(fp);
1631                         if (!ret)
1632                                 assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd);
1633                         goto done_ok;
1634                 }
1635         }
1636
1637         i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE;
1638         if (i_minor)
1639                 ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1640         else {
1641                 int unit;
1642                 const unsigned int cpu = cpumask_first(&current->cpus_allowed);
1643                 const unsigned int weight =
1644                         cpumask_weight(&current->cpus_allowed);
1645
1646                 if (weight == 1 && !test_bit(cpu, qib_cpulist))
1647                         if (!find_hca(cpu, &unit) && unit >= 0)
1648                                 if (!find_free_ctxt(unit, fp, uinfo)) {
1649                                         ret = 0;
1650                                         goto done_chk_sdma;
1651                                 }
1652                 ret = get_a_ctxt(fp, uinfo, alg);
1653         }
1654
1655 done_chk_sdma:
1656         if (!ret)
1657                 ret = do_qib_user_sdma_queue_create(fp);
1658 done_ok:
1659         mutex_unlock(&qib_mutex);
1660
1661 done:
1662         return ret;
1663 }
1664
1665
1666 static int qib_do_user_init(struct file *fp,
1667                             const struct qib_user_info *uinfo)
1668 {
1669         int ret;
1670         struct qib_ctxtdata *rcd = ctxt_fp(fp);
1671         struct qib_devdata *dd;
1672         unsigned uctxt;
1673
1674         /* Subctxts don't need to initialize anything since master did it. */
1675         if (subctxt_fp(fp)) {
1676                 ret = wait_event_interruptible(rcd->wait,
1677                         !test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1678                 goto bail;
1679         }
1680
1681         dd = rcd->dd;
1682
1683         /* some ctxts may get extra buffers, calculate that here */
1684         uctxt = rcd->ctxt - dd->first_user_ctxt;
1685         if (uctxt < dd->ctxts_extrabuf) {
1686                 rcd->piocnt = dd->pbufsctxt + 1;
1687                 rcd->pio_base = rcd->piocnt * uctxt;
1688         } else {
1689                 rcd->piocnt = dd->pbufsctxt;
1690                 rcd->pio_base = rcd->piocnt * uctxt +
1691                         dd->ctxts_extrabuf;
1692         }
1693
1694         /*
1695          * All user buffers are 2KB buffers.  If we ever support
1696          * giving 4KB buffers to user processes, this will need some
1697          * work.  Can't use piobufbase directly, because it has
1698          * both 2K and 4K buffer base values.  So check and handle.
1699          */
1700         if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1701                 if (rcd->pio_base >= dd->piobcnt2k) {
1702                         qib_dev_err(dd,
1703                                     "%u:ctxt%u: no 2KB buffers available\n",
1704                                     dd->unit, rcd->ctxt);
1705                         ret = -ENOBUFS;
1706                         goto bail;
1707                 }
1708                 rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1709                 qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1710                             rcd->ctxt, rcd->piocnt);
1711         }
1712
1713         rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1714         qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1715                                TXCHK_CHG_TYPE_USER, rcd);
1716         /*
1717          * try to ensure that processes start up with consistent avail update
1718          * for their own range, at least.   If system very quiet, it might
1719          * have the in-memory copy out of date at startup for this range of
1720          * buffers, when a context gets re-used.  Do after the chg_pioavail
1721          * and before the rest of setup, so it's "almost certain" the dma
1722          * will have occurred (can't 100% guarantee, but should be many
1723          * decimals of 9s, with this ordering), given how much else happens
1724          * after this.
1725          */
1726         dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1727
1728         /*
1729          * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1730          * array for time being.  If rcd->ctxt > chip-supported,
1731          * we need to do extra stuff here to handle by handling overflow
1732          * through ctxt 0, someday
1733          */
1734         ret = qib_create_rcvhdrq(dd, rcd);
1735         if (!ret)
1736                 ret = qib_setup_eagerbufs(rcd);
1737         if (ret)
1738                 goto bail_pio;
1739
1740         rcd->tidcursor = 0; /* start at beginning after open */
1741
1742         /* initialize poll variables... */
1743         rcd->urgent = 0;
1744         rcd->urgent_poll = 0;
1745
1746         /*
1747          * Now enable the ctxt for receive.
1748          * For chips that are set to DMA the tail register to memory
1749          * when they change (and when the update bit transitions from
1750          * 0 to 1.  So for those chips, we turn it off and then back on.
1751          * This will (very briefly) affect any other open ctxts, but the
1752          * duration is very short, and therefore isn't an issue.  We
1753          * explicitly set the in-memory tail copy to 0 beforehand, so we
1754          * don't have to wait to be sure the DMA update has happened
1755          * (chip resets head/tail to 0 on transition to enable).
1756          */
1757         if (rcd->rcvhdrtail_kvaddr)
1758                 qib_clear_rcvhdrtail(rcd);
1759
1760         dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1761                       rcd->ctxt);
1762
1763         /* Notify any waiting slaves */
1764         if (rcd->subctxt_cnt) {
1765                 clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1766                 wake_up(&rcd->wait);
1767         }
1768         return 0;
1769
1770 bail_pio:
1771         qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1772                                TXCHK_CHG_TYPE_KERN, rcd);
1773 bail:
1774         return ret;
1775 }
1776
1777 /**
1778  * unlock_exptid - unlock any expected TID entries context still had in use
1779  * @rcd: ctxt
1780  *
1781  * We don't actually update the chip here, because we do a bulk update
1782  * below, using f_clear_tids.
1783  */
1784 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1785 {
1786         struct qib_devdata *dd = rcd->dd;
1787         int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1788         int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1789
1790         for (i = ctxt_tidbase; i < maxtid; i++) {
1791                 struct page *p = dd->pageshadow[i];
1792                 dma_addr_t phys;
1793
1794                 if (!p)
1795                         continue;
1796
1797                 phys = dd->physshadow[i];
1798                 dd->physshadow[i] = dd->tidinvalid;
1799                 dd->pageshadow[i] = NULL;
1800                 pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1801                                PCI_DMA_FROMDEVICE);
1802                 qib_release_user_pages(&p, 1);
1803                 cnt++;
1804         }
1805 }
1806
1807 static int qib_close(struct inode *in, struct file *fp)
1808 {
1809         int ret = 0;
1810         struct qib_filedata *fd;
1811         struct qib_ctxtdata *rcd;
1812         struct qib_devdata *dd;
1813         unsigned long flags;
1814         unsigned ctxt;
1815         pid_t pid;
1816
1817         mutex_lock(&qib_mutex);
1818
1819         fd = fp->private_data;
1820         fp->private_data = NULL;
1821         rcd = fd->rcd;
1822         if (!rcd) {
1823                 mutex_unlock(&qib_mutex);
1824                 goto bail;
1825         }
1826
1827         dd = rcd->dd;
1828
1829         /* ensure all pio buffer writes in progress are flushed */
1830         qib_flush_wc();
1831
1832         /* drain user sdma queue */
1833         if (fd->pq) {
1834                 qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1835                 qib_user_sdma_queue_destroy(fd->pq);
1836         }
1837
1838         if (fd->rec_cpu_num != -1)
1839                 __clear_bit(fd->rec_cpu_num, qib_cpulist);
1840
1841         if (--rcd->cnt) {
1842                 /*
1843                  * XXX If the master closes the context before the slave(s),
1844                  * revoke the mmap for the eager receive queue so
1845                  * the slave(s) don't wait for receive data forever.
1846                  */
1847                 rcd->active_slaves &= ~(1 << fd->subctxt);
1848                 rcd->subpid[fd->subctxt] = 0;
1849                 mutex_unlock(&qib_mutex);
1850                 goto bail;
1851         }
1852
1853         /* early; no interrupt users after this */
1854         spin_lock_irqsave(&dd->uctxt_lock, flags);
1855         ctxt = rcd->ctxt;
1856         dd->rcd[ctxt] = NULL;
1857         pid = rcd->pid;
1858         rcd->pid = 0;
1859         spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1860
1861         if (rcd->rcvwait_to || rcd->piowait_to ||
1862             rcd->rcvnowait || rcd->pionowait) {
1863                 rcd->rcvwait_to = 0;
1864                 rcd->piowait_to = 0;
1865                 rcd->rcvnowait = 0;
1866                 rcd->pionowait = 0;
1867         }
1868         if (rcd->flag)
1869                 rcd->flag = 0;
1870
1871         if (dd->kregbase) {
1872                 /* atomically clear receive enable ctxt and intr avail. */
1873                 dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1874                                   QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1875
1876                 /* clean up the pkeys for this ctxt user */
1877                 qib_clean_part_key(rcd, dd);
1878                 qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1879                 qib_chg_pioavailkernel(dd, rcd->pio_base,
1880                                        rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1881
1882                 dd->f_clear_tids(dd, rcd);
1883
1884                 if (dd->pageshadow)
1885                         unlock_expected_tids(rcd);
1886                 qib_stats.sps_ctxts--;
1887                 dd->freectxts++;
1888         }
1889
1890         mutex_unlock(&qib_mutex);
1891         qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1892
1893 bail:
1894         kfree(fd);
1895         return ret;
1896 }
1897
1898 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1899 {
1900         struct qib_ctxt_info info;
1901         int ret;
1902         size_t sz;
1903         struct qib_ctxtdata *rcd = ctxt_fp(fp);
1904         struct qib_filedata *fd;
1905
1906         fd = fp->private_data;
1907
1908         info.num_active = qib_count_active_units();
1909         info.unit = rcd->dd->unit;
1910         info.port = rcd->ppd->port;
1911         info.ctxt = rcd->ctxt;
1912         info.subctxt =  subctxt_fp(fp);
1913         /* Number of user ctxts available for this device. */
1914         info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1915         info.num_subctxts = rcd->subctxt_cnt;
1916         info.rec_cpu = fd->rec_cpu_num;
1917         sz = sizeof(info);
1918
1919         if (copy_to_user(uinfo, &info, sz)) {
1920                 ret = -EFAULT;
1921                 goto bail;
1922         }
1923         ret = 0;
1924
1925 bail:
1926         return ret;
1927 }
1928
1929 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1930                                  u32 __user *inflightp)
1931 {
1932         const u32 val = qib_user_sdma_inflight_counter(pq);
1933
1934         if (put_user(val, inflightp))
1935                 return -EFAULT;
1936
1937         return 0;
1938 }
1939
1940 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1941                                  struct qib_user_sdma_queue *pq,
1942                                  u32 __user *completep)
1943 {
1944         u32 val;
1945         int err;
1946
1947         if (!pq)
1948                 return -EINVAL;
1949
1950         err = qib_user_sdma_make_progress(ppd, pq);
1951         if (err < 0)
1952                 return err;
1953
1954         val = qib_user_sdma_complete_counter(pq);
1955         if (put_user(val, completep))
1956                 return -EFAULT;
1957
1958         return 0;
1959 }
1960
1961 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1962 {
1963         int ret = 0;
1964
1965         if (!usable(rcd->ppd)) {
1966                 int i;
1967                 /*
1968                  * if link is down, or otherwise not usable, delay
1969                  * the caller up to 30 seconds, so we don't thrash
1970                  * in trying to get the chip back to ACTIVE, and
1971                  * set flag so they make the call again.
1972                  */
1973                 if (rcd->user_event_mask) {
1974                         /*
1975                          * subctxt_cnt is 0 if not shared, so do base
1976                          * separately, first, then remaining subctxt, if any
1977                          */
1978                         set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1979                                 &rcd->user_event_mask[0]);
1980                         for (i = 1; i < rcd->subctxt_cnt; i++)
1981                                 set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1982                                         &rcd->user_event_mask[i]);
1983                 }
1984                 for (i = 0; !usable(rcd->ppd) && i < 300; i++)
1985                         msleep(100);
1986                 ret = -ENETDOWN;
1987         }
1988         return ret;
1989 }
1990
1991 /*
1992  * Find all user contexts in use, and set the specified bit in their
1993  * event mask.
1994  * See also find_ctxt() for a similar use, that is specific to send buffers.
1995  */
1996 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
1997 {
1998         struct qib_ctxtdata *rcd;
1999         unsigned ctxt;
2000         int ret = 0;
2001         unsigned long flags;
2002
2003         spin_lock_irqsave(&ppd->dd->uctxt_lock, flags);
2004         for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
2005              ctxt++) {
2006                 rcd = ppd->dd->rcd[ctxt];
2007                 if (!rcd)
2008                         continue;
2009                 if (rcd->user_event_mask) {
2010                         int i;
2011                         /*
2012                          * subctxt_cnt is 0 if not shared, so do base
2013                          * separately, first, then remaining subctxt, if any
2014                          */
2015                         set_bit(evtbit, &rcd->user_event_mask[0]);
2016                         for (i = 1; i < rcd->subctxt_cnt; i++)
2017                                 set_bit(evtbit, &rcd->user_event_mask[i]);
2018                 }
2019                 ret = 1;
2020                 break;
2021         }
2022         spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags);
2023
2024         return ret;
2025 }
2026
2027 /*
2028  * clear the event notifier events for this context.
2029  * For the DISARM_BUFS case, we also take action (this obsoletes
2030  * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
2031  * compatibility.
2032  * Other bits don't currently require actions, just atomically clear.
2033  * User process then performs actions appropriate to bit having been
2034  * set, if desired, and checks again in future.
2035  */
2036 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
2037                               unsigned long events)
2038 {
2039         int ret = 0, i;
2040
2041         for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
2042                 if (!test_bit(i, &events))
2043                         continue;
2044                 if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
2045                         (void)qib_disarm_piobufs_ifneeded(rcd);
2046                         ret = disarm_req_delay(rcd);
2047                 } else
2048                         clear_bit(i, &rcd->user_event_mask[subctxt]);
2049         }
2050         return ret;
2051 }
2052
2053 static ssize_t qib_write(struct file *fp, const char __user *data,
2054                          size_t count, loff_t *off)
2055 {
2056         const struct qib_cmd __user *ucmd;
2057         struct qib_ctxtdata *rcd;
2058         const void __user *src;
2059         size_t consumed, copy = 0;
2060         struct qib_cmd cmd;
2061         ssize_t ret = 0;
2062         void *dest;
2063
2064         if (count < sizeof(cmd.type)) {
2065                 ret = -EINVAL;
2066                 goto bail;
2067         }
2068
2069         ucmd = (const struct qib_cmd __user *) data;
2070
2071         if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
2072                 ret = -EFAULT;
2073                 goto bail;
2074         }
2075
2076         consumed = sizeof(cmd.type);
2077
2078         switch (cmd.type) {
2079         case QIB_CMD_ASSIGN_CTXT:
2080         case QIB_CMD_USER_INIT:
2081                 copy = sizeof(cmd.cmd.user_info);
2082                 dest = &cmd.cmd.user_info;
2083                 src = &ucmd->cmd.user_info;
2084                 break;
2085
2086         case QIB_CMD_RECV_CTRL:
2087                 copy = sizeof(cmd.cmd.recv_ctrl);
2088                 dest = &cmd.cmd.recv_ctrl;
2089                 src = &ucmd->cmd.recv_ctrl;
2090                 break;
2091
2092         case QIB_CMD_CTXT_INFO:
2093                 copy = sizeof(cmd.cmd.ctxt_info);
2094                 dest = &cmd.cmd.ctxt_info;
2095                 src = &ucmd->cmd.ctxt_info;
2096                 break;
2097
2098         case QIB_CMD_TID_UPDATE:
2099         case QIB_CMD_TID_FREE:
2100                 copy = sizeof(cmd.cmd.tid_info);
2101                 dest = &cmd.cmd.tid_info;
2102                 src = &ucmd->cmd.tid_info;
2103                 break;
2104
2105         case QIB_CMD_SET_PART_KEY:
2106                 copy = sizeof(cmd.cmd.part_key);
2107                 dest = &cmd.cmd.part_key;
2108                 src = &ucmd->cmd.part_key;
2109                 break;
2110
2111         case QIB_CMD_DISARM_BUFS:
2112         case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2113                 copy = 0;
2114                 src = NULL;
2115                 dest = NULL;
2116                 break;
2117
2118         case QIB_CMD_POLL_TYPE:
2119                 copy = sizeof(cmd.cmd.poll_type);
2120                 dest = &cmd.cmd.poll_type;
2121                 src = &ucmd->cmd.poll_type;
2122                 break;
2123
2124         case QIB_CMD_ARMLAUNCH_CTRL:
2125                 copy = sizeof(cmd.cmd.armlaunch_ctrl);
2126                 dest = &cmd.cmd.armlaunch_ctrl;
2127                 src = &ucmd->cmd.armlaunch_ctrl;
2128                 break;
2129
2130         case QIB_CMD_SDMA_INFLIGHT:
2131                 copy = sizeof(cmd.cmd.sdma_inflight);
2132                 dest = &cmd.cmd.sdma_inflight;
2133                 src = &ucmd->cmd.sdma_inflight;
2134                 break;
2135
2136         case QIB_CMD_SDMA_COMPLETE:
2137                 copy = sizeof(cmd.cmd.sdma_complete);
2138                 dest = &cmd.cmd.sdma_complete;
2139                 src = &ucmd->cmd.sdma_complete;
2140                 break;
2141
2142         case QIB_CMD_ACK_EVENT:
2143                 copy = sizeof(cmd.cmd.event_mask);
2144                 dest = &cmd.cmd.event_mask;
2145                 src = &ucmd->cmd.event_mask;
2146                 break;
2147
2148         default:
2149                 ret = -EINVAL;
2150                 goto bail;
2151         }
2152
2153         if (copy) {
2154                 if ((count - consumed) < copy) {
2155                         ret = -EINVAL;
2156                         goto bail;
2157                 }
2158                 if (copy_from_user(dest, src, copy)) {
2159                         ret = -EFAULT;
2160                         goto bail;
2161                 }
2162                 consumed += copy;
2163         }
2164
2165         rcd = ctxt_fp(fp);
2166         if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2167                 ret = -EINVAL;
2168                 goto bail;
2169         }
2170
2171         switch (cmd.type) {
2172         case QIB_CMD_ASSIGN_CTXT:
2173                 ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2174                 if (ret)
2175                         goto bail;
2176                 break;
2177
2178         case QIB_CMD_USER_INIT:
2179                 ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2180                 if (ret)
2181                         goto bail;
2182                 ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2183                                         cmd.cmd.user_info.spu_base_info,
2184                                         cmd.cmd.user_info.spu_base_info_size);
2185                 break;
2186
2187         case QIB_CMD_RECV_CTRL:
2188                 ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2189                 break;
2190
2191         case QIB_CMD_CTXT_INFO:
2192                 ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2193                                     (unsigned long) cmd.cmd.ctxt_info);
2194                 break;
2195
2196         case QIB_CMD_TID_UPDATE:
2197                 ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2198                 break;
2199
2200         case QIB_CMD_TID_FREE:
2201                 ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2202                 break;
2203
2204         case QIB_CMD_SET_PART_KEY:
2205                 ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2206                 break;
2207
2208         case QIB_CMD_DISARM_BUFS:
2209                 (void)qib_disarm_piobufs_ifneeded(rcd);
2210                 ret = disarm_req_delay(rcd);
2211                 break;
2212
2213         case QIB_CMD_PIOAVAILUPD:
2214                 qib_force_pio_avail_update(rcd->dd);
2215                 break;
2216
2217         case QIB_CMD_POLL_TYPE:
2218                 rcd->poll_type = cmd.cmd.poll_type;
2219                 break;
2220
2221         case QIB_CMD_ARMLAUNCH_CTRL:
2222                 rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2223                 break;
2224
2225         case QIB_CMD_SDMA_INFLIGHT:
2226                 ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2227                                             (u32 __user *) (unsigned long)
2228                                             cmd.cmd.sdma_inflight);
2229                 break;
2230
2231         case QIB_CMD_SDMA_COMPLETE:
2232                 ret = qib_sdma_get_complete(rcd->ppd,
2233                                             user_sdma_queue_fp(fp),
2234                                             (u32 __user *) (unsigned long)
2235                                             cmd.cmd.sdma_complete);
2236                 break;
2237
2238         case QIB_CMD_ACK_EVENT:
2239                 ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2240                                          cmd.cmd.event_mask);
2241                 break;
2242         }
2243
2244         if (ret >= 0)
2245                 ret = consumed;
2246
2247 bail:
2248         return ret;
2249 }
2250
2251 static ssize_t qib_aio_write(struct kiocb *iocb, const struct iovec *iov,
2252                              unsigned long dim, loff_t off)
2253 {
2254         struct qib_filedata *fp = iocb->ki_filp->private_data;
2255         struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2256         struct qib_user_sdma_queue *pq = fp->pq;
2257
2258         if (!dim || !pq)
2259                 return -EINVAL;
2260
2261         return qib_user_sdma_writev(rcd, pq, iov, dim);
2262 }
2263
2264 static struct class *qib_class;
2265 static dev_t qib_dev;
2266
2267 int qib_cdev_init(int minor, const char *name,
2268                   const struct file_operations *fops,
2269                   struct cdev **cdevp, struct device **devp)
2270 {
2271         const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2272         struct cdev *cdev;
2273         struct device *device = NULL;
2274         int ret;
2275
2276         cdev = cdev_alloc();
2277         if (!cdev) {
2278                 pr_err("Could not allocate cdev for minor %d, %s\n",
2279                        minor, name);
2280                 ret = -ENOMEM;
2281                 goto done;
2282         }
2283
2284         cdev->owner = THIS_MODULE;
2285         cdev->ops = fops;
2286         kobject_set_name(&cdev->kobj, name);
2287
2288         ret = cdev_add(cdev, dev, 1);
2289         if (ret < 0) {
2290                 pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2291                        minor, name, -ret);
2292                 goto err_cdev;
2293         }
2294
2295         device = device_create(qib_class, NULL, dev, NULL, "%s", name);
2296         if (!IS_ERR(device))
2297                 goto done;
2298         ret = PTR_ERR(device);
2299         device = NULL;
2300         pr_err("Could not create device for minor %d, %s (err %d)\n",
2301                minor, name, -ret);
2302 err_cdev:
2303         cdev_del(cdev);
2304         cdev = NULL;
2305 done:
2306         *cdevp = cdev;
2307         *devp = device;
2308         return ret;
2309 }
2310
2311 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2312 {
2313         struct device *device = *devp;
2314
2315         if (device) {
2316                 device_unregister(device);
2317                 *devp = NULL;
2318         }
2319
2320         if (*cdevp) {
2321                 cdev_del(*cdevp);
2322                 *cdevp = NULL;
2323         }
2324 }
2325
2326 static struct cdev *wildcard_cdev;
2327 static struct device *wildcard_device;
2328
2329 int __init qib_dev_init(void)
2330 {
2331         int ret;
2332
2333         ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2334         if (ret < 0) {
2335                 pr_err("Could not allocate chrdev region (err %d)\n", -ret);
2336                 goto done;
2337         }
2338
2339         qib_class = class_create(THIS_MODULE, "ipath");
2340         if (IS_ERR(qib_class)) {
2341                 ret = PTR_ERR(qib_class);
2342                 pr_err("Could not create device class (err %d)\n", -ret);
2343                 unregister_chrdev_region(qib_dev, QIB_NMINORS);
2344         }
2345
2346 done:
2347         return ret;
2348 }
2349
2350 void qib_dev_cleanup(void)
2351 {
2352         if (qib_class) {
2353                 class_destroy(qib_class);
2354                 qib_class = NULL;
2355         }
2356
2357         unregister_chrdev_region(qib_dev, QIB_NMINORS);
2358 }
2359
2360 static atomic_t user_count = ATOMIC_INIT(0);
2361
2362 static void qib_user_remove(struct qib_devdata *dd)
2363 {
2364         if (atomic_dec_return(&user_count) == 0)
2365                 qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2366
2367         qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2368 }
2369
2370 static int qib_user_add(struct qib_devdata *dd)
2371 {
2372         char name[10];
2373         int ret;
2374
2375         if (atomic_inc_return(&user_count) == 1) {
2376                 ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2377                                     &wildcard_cdev, &wildcard_device);
2378                 if (ret)
2379                         goto done;
2380         }
2381
2382         snprintf(name, sizeof(name), "ipath%d", dd->unit);
2383         ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2384                             &dd->user_cdev, &dd->user_device);
2385         if (ret)
2386                 qib_user_remove(dd);
2387 done:
2388         return ret;
2389 }
2390
2391 /*
2392  * Create per-unit files in /dev
2393  */
2394 int qib_device_create(struct qib_devdata *dd)
2395 {
2396         int r, ret;
2397
2398         r = qib_user_add(dd);
2399         ret = qib_diag_add(dd);
2400         if (r && !ret)
2401                 ret = r;
2402         return ret;
2403 }
2404
2405 /*
2406  * Remove per-unit files in /dev
2407  * void, core kernel returns no errors for this stuff
2408  */
2409 void qib_device_remove(struct qib_devdata *dd)
2410 {
2411         qib_user_remove(dd);
2412         qib_diag_remove(dd);
2413 }