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[PATCH] V4L: Enables audio DMA setting on cx88 chips, even when dma not in use
[karo-tx-linux.git] / drivers / media / video / cx88 / cx88-tvaudio.c
1 /*
2
3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
4
5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
8
9     -----------------------------------------------------------------------
10
11     Lot of voodoo here.  Even the data sheet doesn't help to
12     understand what is going on here, the documentation for the audio
13     part of the cx2388x chip is *very* bad.
14
15     Some of this comes from party done linux driver sources I got from
16     [undocumented].
17
18     Some comes from the dscaler sources, one of the dscaler driver guy works
19     for Conexant ...
20
21     -----------------------------------------------------------------------
22
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25     the Free Software Foundation; either version 2 of the License, or
26     (at your option) any later version.
27
28     This program is distributed in the hope that it will be useful,
29     but WITHOUT ANY WARRANTY; without even the implied warranty of
30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
31     GNU General Public License for more details.
32
33     You should have received a copy of the GNU General Public License
34     along with this program; if not, write to the Free Software
35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/kthread.h>
56
57 #include "cx88.h"
58
59 static unsigned int audio_debug = 0;
60 module_param(audio_debug, int, 0644);
61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
62
63 #define dprintk(fmt, arg...)    if (audio_debug) \
64         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
65
66 /* ----------------------------------------------------------- */
67
68 static char *aud_ctl_names[64] = {
69         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
70         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
71         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
72         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
73         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
74         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
75         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
76         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
77         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
78         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
79         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
80         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
81         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
82         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
83         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
84         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
85         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
86         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
87         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
88         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
89         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
90         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
91         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
92 };
93
94 struct rlist {
95         u32 reg;
96         u32 val;
97 };
98
99 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
100 {
101         int i;
102
103         for (i = 0; l[i].reg; i++) {
104                 switch (l[i].reg) {
105                 case AUD_PDF_DDS_CNST_BYTE2:
106                 case AUD_PDF_DDS_CNST_BYTE1:
107                 case AUD_PDF_DDS_CNST_BYTE0:
108                 case AUD_QAM_MODE:
109                 case AUD_PHACC_FREQ_8MSB:
110                 case AUD_PHACC_FREQ_8LSB:
111                         cx_writeb(l[i].reg, l[i].val);
112                         break;
113                 default:
114                         cx_write(l[i].reg, l[i].val);
115                         break;
116                 }
117         }
118 }
119
120 static void set_audio_start(struct cx88_core *core, u32 mode)
121 {
122         /* mute */
123         cx_write(AUD_VOL_CTL, (1 << 6));
124
125         /* start programming */
126         cx_write(AUD_INIT, mode);
127         cx_write(AUD_INIT_LD, 0x0001);
128         cx_write(AUD_SOFT_RESET, 0x0001);
129 }
130
131 static void set_audio_finish(struct cx88_core *core, u32 ctl)
132 {
133         u32 volume;
134
135         /* restart dma; This avoids buzz in NICAM and is good in others  */
136         cx88_stop_audio_dma(core);
137         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
138         cx88_start_audio_dma(core);
139
140         if (cx88_boards[core->board].blackbird) {
141                 /* sets sound input from external adc */
142                 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
143                 cx_write(AUD_I2SINPUTCNTL, 4);
144                 cx_write(AUD_BAUDRATE, 1);
145                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
146                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
147                 cx_write(AUD_I2SOUTPUTCNTL, 1);
148                 cx_write(AUD_I2SCNTL, 0);
149                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
150         } else {
151                 ctl |= EN_DAC_ENABLE;
152                 cx_write(AUD_CTL, ctl);
153         }
154
155         /* finish programming */
156         cx_write(AUD_SOFT_RESET, 0x0000);
157
158         /* unmute */
159         volume = cx_sread(SHADOW_AUD_VOL_CTL);
160         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
161 }
162
163 /* ----------------------------------------------------------- */
164
165 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
166                                     u32 mode)
167 {
168         static const struct rlist btsc[] = {
169                 {AUD_AFE_12DB_EN, 0x00000001},
170                 {AUD_OUT1_SEL, 0x00000013},
171                 {AUD_OUT1_SHIFT, 0x00000000},
172                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
173                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
174                 {AUD_DBX_IN_GAIN, 0x00004734},
175                 {AUD_DBX_WBE_GAIN, 0x00004640},
176                 {AUD_DBX_SE_GAIN, 0x00008d31},
177                 {AUD_DCOC_0_SRC, 0x0000001a},
178                 {AUD_IIR1_4_SEL, 0x00000021},
179                 {AUD_DCOC_PASS_IN, 0x00000003},
180                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
181                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
182                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
183                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
184                 {AUD_DN0_FREQ, 0x0000283b},
185                 {AUD_DN2_SRC_SEL, 0x00000008},
186                 {AUD_DN2_FREQ, 0x00003000},
187                 {AUD_DN2_AFC, 0x00000002},
188                 {AUD_DN2_SHFT, 0x00000000},
189                 {AUD_IIR2_2_SEL, 0x00000020},
190                 {AUD_IIR2_2_SHIFT, 0x00000000},
191                 {AUD_IIR2_3_SEL, 0x0000001f},
192                 {AUD_IIR2_3_SHIFT, 0x00000000},
193                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
194                 {AUD_CRDC1_SHIFT, 0x00000000},
195                 {AUD_CORDIC_SHIFT_1, 0x00000007},
196                 {AUD_DCOC_1_SRC, 0x0000001b},
197                 {AUD_DCOC1_SHIFT, 0x00000000},
198                 {AUD_RDSI_SEL, 0x00000008},
199                 {AUD_RDSQ_SEL, 0x00000008},
200                 {AUD_RDSI_SHIFT, 0x00000000},
201                 {AUD_RDSQ_SHIFT, 0x00000000},
202                 {AUD_POLYPH80SCALEFAC, 0x00000003},
203                 { /* end of list */ },
204         };
205         static const struct rlist btsc_sap[] = {
206                 {AUD_AFE_12DB_EN, 0x00000001},
207                 {AUD_DBX_IN_GAIN, 0x00007200},
208                 {AUD_DBX_WBE_GAIN, 0x00006200},
209                 {AUD_DBX_SE_GAIN, 0x00006200},
210                 {AUD_IIR1_1_SEL, 0x00000000},
211                 {AUD_IIR1_3_SEL, 0x00000001},
212                 {AUD_DN1_SRC_SEL, 0x00000007},
213                 {AUD_IIR1_4_SHIFT, 0x00000006},
214                 {AUD_IIR2_1_SHIFT, 0x00000000},
215                 {AUD_IIR2_2_SHIFT, 0x00000000},
216                 {AUD_IIR3_0_SHIFT, 0x00000000},
217                 {AUD_IIR3_1_SHIFT, 0x00000000},
218                 {AUD_IIR3_0_SEL, 0x0000000d},
219                 {AUD_IIR3_1_SEL, 0x0000000e},
220                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
221                 {AUD_DEEMPH1_SHIFT, 0x00000000},
222                 {AUD_DEEMPH1_G0, 0x00004000},
223                 {AUD_DEEMPH1_A0, 0x00000000},
224                 {AUD_DEEMPH1_B0, 0x00000000},
225                 {AUD_DEEMPH1_A1, 0x00000000},
226                 {AUD_DEEMPH1_B1, 0x00000000},
227                 {AUD_OUT0_SEL, 0x0000003f},
228                 {AUD_OUT1_SEL, 0x0000003f},
229                 {AUD_DN1_AFC, 0x00000002},
230                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
231                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
232                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
233                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
234                 {AUD_IIR1_0_SEL, 0x0000001d},
235                 {AUD_IIR1_2_SEL, 0x0000001e},
236                 {AUD_IIR2_1_SEL, 0x00000002},
237                 {AUD_IIR2_2_SEL, 0x00000004},
238                 {AUD_IIR3_2_SEL, 0x0000000f},
239                 {AUD_DCOC2_SHIFT, 0x00000001},
240                 {AUD_IIR3_2_SHIFT, 0x00000001},
241                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
242                 {AUD_CORDIC_SHIFT_1, 0x00000006},
243                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
244                 {AUD_DMD_RA_DDS, 0x00f696e6},
245                 {AUD_IIR2_3_SEL, 0x00000025},
246                 {AUD_IIR1_4_SEL, 0x00000021},
247                 {AUD_DN1_FREQ, 0x0000c965},
248                 {AUD_DCOC_PASS_IN, 0x00000003},
249                 {AUD_DCOC_0_SRC, 0x0000001a},
250                 {AUD_DCOC_1_SRC, 0x0000001b},
251                 {AUD_DCOC1_SHIFT, 0x00000000},
252                 {AUD_RDSI_SEL, 0x00000009},
253                 {AUD_RDSQ_SEL, 0x00000009},
254                 {AUD_RDSI_SHIFT, 0x00000000},
255                 {AUD_RDSQ_SHIFT, 0x00000000},
256                 {AUD_POLYPH80SCALEFAC, 0x00000003},
257                 { /* end of list */ },
258         };
259
260         mode |= EN_FMRADIO_EN_RDS;
261
262         if (sap) {
263                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
264                 set_audio_start(core, SEL_SAP);
265                 set_audio_registers(core, btsc_sap);
266                 set_audio_finish(core, mode);
267         } else {
268                 dprintk("%s (status: known-good)\n", __FUNCTION__);
269                 set_audio_start(core, SEL_BTSC);
270                 set_audio_registers(core, btsc);
271                 set_audio_finish(core, mode);
272         }
273 }
274
275 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
276 {
277         static const struct rlist nicam_l[] = {
278                 {AUD_AFE_12DB_EN, 0x00000001},
279                 {AUD_RATE_ADJ1, 0x00000060},
280                 {AUD_RATE_ADJ2, 0x000000F9},
281                 {AUD_RATE_ADJ3, 0x000001CC},
282                 {AUD_RATE_ADJ4, 0x000002B3},
283                 {AUD_RATE_ADJ5, 0x00000726},
284                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
285                 {AUD_DEEMPHDENOM2_R, 0x00000000},
286                 {AUD_ERRLOGPERIOD_R, 0x00000064},
287                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
288                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
289                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
290                 {AUD_POLYPH80SCALEFAC, 0x00000003},
291                 {AUD_DMD_RA_DDS, 0x00C00000},
292                 {AUD_PLL_INT, 0x0000001E},
293                 {AUD_PLL_DDS, 0x00000000},
294                 {AUD_PLL_FRAC, 0x0000E542},
295                 {AUD_START_TIMER, 0x00000000},
296                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
297                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
298                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
299                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
300                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
301                 {AUD_QAM_MODE, 0x05},
302                 {AUD_PHACC_FREQ_8MSB, 0x34},
303                 {AUD_PHACC_FREQ_8LSB, 0x4C},
304                 {AUD_DEEMPHGAIN_R, 0x00006680},
305                 {AUD_RATE_THRES_DMD, 0x000000C0},
306                 { /* end of list */ },
307         };
308
309         static const struct rlist nicam_bgdki_common[] = {
310                 {AUD_AFE_12DB_EN, 0x00000001},
311                 {AUD_RATE_ADJ1, 0x00000010},
312                 {AUD_RATE_ADJ2, 0x00000040},
313                 {AUD_RATE_ADJ3, 0x00000100},
314                 {AUD_RATE_ADJ4, 0x00000400},
315                 {AUD_RATE_ADJ5, 0x00001000},
316                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
317                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
318                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
319                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
320                 {AUD_POLYPH80SCALEFAC, 0x00000003},
321                 {AUD_DEEMPHGAIN_R, 0x000023c2},
322                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
323                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
324                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
325                 {AUD_DEEMPHDENOM2_R, 0x00000000},
326                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
327                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
328                 {AUD_QAM_MODE, 0x05},
329                 { /* end of list */ },
330         };
331
332         static const struct rlist nicam_i[] = {
333                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
334                 {AUD_PHACC_FREQ_8MSB, 0x3a},
335                 {AUD_PHACC_FREQ_8LSB, 0x93},
336                 { /* end of list */ },
337         };
338
339         static const struct rlist nicam_default[] = {
340                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
341                 {AUD_PHACC_FREQ_8MSB, 0x34},
342                 {AUD_PHACC_FREQ_8LSB, 0x4c},
343                 { /* end of list */ },
344         };
345
346         set_audio_start(core,SEL_NICAM);
347         switch (core->tvaudio) {
348         case WW_L:
349                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
350                 set_audio_registers(core, nicam_l);
351                 break;
352         case WW_I:
353                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
354                 set_audio_registers(core, nicam_bgdki_common);
355                 set_audio_registers(core, nicam_i);
356                 break;
357         default:
358                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
359                 set_audio_registers(core, nicam_bgdki_common);
360                 set_audio_registers(core, nicam_default);
361                 break;
362         };
363
364         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
365         set_audio_finish(core, mode);
366 }
367
368 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
369 {
370         static const struct rlist a2_bgdk_common[] = {
371                 {AUD_ERRLOGPERIOD_R, 0x00000064},
372                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
373                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
374                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
375                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
376                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
377                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
378                 {AUD_QAM_MODE, 0x05},
379                 {AUD_PHACC_FREQ_8MSB, 0x34},
380                 {AUD_PHACC_FREQ_8LSB, 0x4c},
381                 {AUD_RATE_ADJ1, 0x00000100},
382                 {AUD_RATE_ADJ2, 0x00000200},
383                 {AUD_RATE_ADJ3, 0x00000300},
384                 {AUD_RATE_ADJ4, 0x00000400},
385                 {AUD_RATE_ADJ5, 0x00000500},
386                 {AUD_THR_FR, 0x00000000},
387                 {AAGC_HYST, 0x0000001a},
388                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
389                 {AUD_PILOT_BQD_1_K1, 0x00551340},
390                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
391                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
392                 {AUD_PILOT_BQD_1_K4, 0x00400000},
393                 {AUD_PILOT_BQD_2_K0, 0x00040000},
394                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
395                 {AUD_PILOT_BQD_2_K2, 0x00400000},
396                 {AUD_PILOT_BQD_2_K3, 0x00000000},
397                 {AUD_PILOT_BQD_2_K4, 0x00000000},
398                 {AUD_MODE_CHG_TIMER, 0x00000040},
399                 {AUD_AFE_12DB_EN, 0x00000001},
400                 {AUD_CORDIC_SHIFT_0, 0x00000007},
401                 {AUD_CORDIC_SHIFT_1, 0x00000007},
402                 {AUD_DEEMPH0_G0, 0x00000380},
403                 {AUD_DEEMPH1_G0, 0x00000380},
404                 {AUD_DCOC_0_SRC, 0x0000001a},
405                 {AUD_DCOC0_SHIFT, 0x00000000},
406                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
407                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
408                 {AUD_DCOC_PASS_IN, 0x00000003},
409                 {AUD_IIR3_0_SEL, 0x00000021},
410                 {AUD_DN2_AFC, 0x00000002},
411                 {AUD_DCOC_1_SRC, 0x0000001b},
412                 {AUD_DCOC1_SHIFT, 0x00000000},
413                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
414                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
415                 {AUD_IIR3_1_SEL, 0x00000023},
416                 {AUD_RDSI_SEL, 0x00000017},
417                 {AUD_RDSI_SHIFT, 0x00000000},
418                 {AUD_RDSQ_SEL, 0x00000017},
419                 {AUD_RDSQ_SHIFT, 0x00000000},
420                 {AUD_PLL_INT, 0x0000001e},
421                 {AUD_PLL_DDS, 0x00000000},
422                 {AUD_PLL_FRAC, 0x0000e542},
423                 {AUD_POLYPH80SCALEFAC, 0x00000001},
424                 {AUD_START_TIMER, 0x00000000},
425                 { /* end of list */ },
426         };
427
428         static const struct rlist a2_bg[] = {
429                 {AUD_DMD_RA_DDS, 0x002a4f2f},
430                 {AUD_C1_UP_THR, 0x00007000},
431                 {AUD_C1_LO_THR, 0x00005400},
432                 {AUD_C2_UP_THR, 0x00005400},
433                 {AUD_C2_LO_THR, 0x00003000},
434                 { /* end of list */ },
435         };
436
437         static const struct rlist a2_dk[] = {
438                 {AUD_DMD_RA_DDS, 0x002a4f2f},
439                 {AUD_C1_UP_THR, 0x00007000},
440                 {AUD_C1_LO_THR, 0x00005400},
441                 {AUD_C2_UP_THR, 0x00005400},
442                 {AUD_C2_LO_THR, 0x00003000},
443                 {AUD_DN0_FREQ, 0x00003a1c},
444                 {AUD_DN2_FREQ, 0x0000d2e0},
445                 { /* end of list */ },
446         };
447
448         static const struct rlist a1_i[] = {
449                 {AUD_ERRLOGPERIOD_R, 0x00000064},
450                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
451                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
452                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
453                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
454                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
455                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
456                 {AUD_QAM_MODE, 0x05},
457                 {AUD_PHACC_FREQ_8MSB, 0x3a},
458                 {AUD_PHACC_FREQ_8LSB, 0x93},
459                 {AUD_DMD_RA_DDS, 0x002a4f2f},
460                 {AUD_PLL_INT, 0x0000001e},
461                 {AUD_PLL_DDS, 0x00000004},
462                 {AUD_PLL_FRAC, 0x0000e542},
463                 {AUD_RATE_ADJ1, 0x00000100},
464                 {AUD_RATE_ADJ2, 0x00000200},
465                 {AUD_RATE_ADJ3, 0x00000300},
466                 {AUD_RATE_ADJ4, 0x00000400},
467                 {AUD_RATE_ADJ5, 0x00000500},
468                 {AUD_THR_FR, 0x00000000},
469                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
470                 {AUD_PILOT_BQD_1_K1, 0x00551340},
471                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
472                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
473                 {AUD_PILOT_BQD_1_K4, 0x00400000},
474                 {AUD_PILOT_BQD_2_K0, 0x00040000},
475                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
476                 {AUD_PILOT_BQD_2_K2, 0x00400000},
477                 {AUD_PILOT_BQD_2_K3, 0x00000000},
478                 {AUD_PILOT_BQD_2_K4, 0x00000000},
479                 {AUD_MODE_CHG_TIMER, 0x00000060},
480                 {AUD_AFE_12DB_EN, 0x00000001},
481                 {AAGC_HYST, 0x0000000a},
482                 {AUD_CORDIC_SHIFT_0, 0x00000007},
483                 {AUD_CORDIC_SHIFT_1, 0x00000007},
484                 {AUD_C1_UP_THR, 0x00007000},
485                 {AUD_C1_LO_THR, 0x00005400},
486                 {AUD_C2_UP_THR, 0x00005400},
487                 {AUD_C2_LO_THR, 0x00003000},
488                 {AUD_DCOC_0_SRC, 0x0000001a},
489                 {AUD_DCOC0_SHIFT, 0x00000000},
490                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
491                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
492                 {AUD_DCOC_PASS_IN, 0x00000003},
493                 {AUD_IIR3_0_SEL, 0x00000021},
494                 {AUD_DN2_AFC, 0x00000002},
495                 {AUD_DCOC_1_SRC, 0x0000001b},
496                 {AUD_DCOC1_SHIFT, 0x00000000},
497                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
498                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
499                 {AUD_IIR3_1_SEL, 0x00000023},
500                 {AUD_DN0_FREQ, 0x000035a3},
501                 {AUD_DN2_FREQ, 0x000029c7},
502                 {AUD_CRDC0_SRC_SEL, 0x00000511},
503                 {AUD_IIR1_0_SEL, 0x00000001},
504                 {AUD_IIR1_1_SEL, 0x00000000},
505                 {AUD_IIR3_2_SEL, 0x00000003},
506                 {AUD_IIR3_2_SHIFT, 0x00000000},
507                 {AUD_IIR3_0_SEL, 0x00000002},
508                 {AUD_IIR2_0_SEL, 0x00000021},
509                 {AUD_IIR2_0_SHIFT, 0x00000002},
510                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
511                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
512                 {AUD_POLYPH80SCALEFAC, 0x00000001},
513                 {AUD_START_TIMER, 0x00000000},
514                 { /* end of list */ },
515         };
516
517         static const struct rlist am_l[] = {
518                 {AUD_ERRLOGPERIOD_R, 0x00000064},
519                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
520                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
521                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
522                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
523                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
524                 {AUD_QAM_MODE, 0x00},
525                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
526                 {AUD_PHACC_FREQ_8MSB, 0x3a},
527                 {AUD_PHACC_FREQ_8LSB, 0x4a},
528                 {AUD_DEEMPHGAIN_R, 0x00006680},
529                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
530                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
531                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
532                 {AUD_DEEMPHDENOM2_R, 0x00000000},
533                 {AUD_FM_MODE_ENABLE, 0x00000007},
534                 {AUD_POLYPH80SCALEFAC, 0x00000003},
535                 {AUD_AFE_12DB_EN, 0x00000001},
536                 {AAGC_GAIN, 0x00000000},
537                 {AAGC_HYST, 0x00000018},
538                 {AAGC_DEF, 0x00000020},
539                 {AUD_DN0_FREQ, 0x00000000},
540                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
541                 {AUD_DCOC_0_SRC, 0x00000021},
542                 {AUD_IIR1_0_SEL, 0x00000000},
543                 {AUD_IIR1_0_SHIFT, 0x00000007},
544                 {AUD_IIR1_1_SEL, 0x00000002},
545                 {AUD_IIR1_1_SHIFT, 0x00000000},
546                 {AUD_DCOC_1_SRC, 0x00000003},
547                 {AUD_DCOC1_SHIFT, 0x00000000},
548                 {AUD_DCOC_PASS_IN, 0x00000000},
549                 {AUD_IIR1_2_SEL, 0x00000023},
550                 {AUD_IIR1_2_SHIFT, 0x00000000},
551                 {AUD_IIR1_3_SEL, 0x00000004},
552                 {AUD_IIR1_3_SHIFT, 0x00000007},
553                 {AUD_IIR1_4_SEL, 0x00000005},
554                 {AUD_IIR1_4_SHIFT, 0x00000007},
555                 {AUD_IIR3_0_SEL, 0x00000007},
556                 {AUD_IIR3_0_SHIFT, 0x00000000},
557                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
558                 {AUD_DEEMPH0_SHIFT, 0x00000000},
559                 {AUD_DEEMPH0_G0, 0x00007000},
560                 {AUD_DEEMPH0_A0, 0x00000000},
561                 {AUD_DEEMPH0_B0, 0x00000000},
562                 {AUD_DEEMPH0_A1, 0x00000000},
563                 {AUD_DEEMPH0_B1, 0x00000000},
564                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
565                 {AUD_DEEMPH1_SHIFT, 0x00000000},
566                 {AUD_DEEMPH1_G0, 0x00007000},
567                 {AUD_DEEMPH1_A0, 0x00000000},
568                 {AUD_DEEMPH1_B0, 0x00000000},
569                 {AUD_DEEMPH1_A1, 0x00000000},
570                 {AUD_DEEMPH1_B1, 0x00000000},
571                 {AUD_OUT0_SEL, 0x0000003F},
572                 {AUD_OUT1_SEL, 0x0000003F},
573                 {AUD_DMD_RA_DDS, 0x00F5C285},
574                 {AUD_PLL_INT, 0x0000001E},
575                 {AUD_PLL_DDS, 0x00000000},
576                 {AUD_PLL_FRAC, 0x0000E542},
577                 {AUD_RATE_ADJ1, 0x00000100},
578                 {AUD_RATE_ADJ2, 0x00000200},
579                 {AUD_RATE_ADJ3, 0x00000300},
580                 {AUD_RATE_ADJ4, 0x00000400},
581                 {AUD_RATE_ADJ5, 0x00000500},
582                 {AUD_RATE_THRES_DMD, 0x000000C0},
583                 { /* end of list */ },
584         };
585
586         static const struct rlist a2_deemph50[] = {
587                 {AUD_DEEMPH0_G0, 0x00000380},
588                 {AUD_DEEMPH1_G0, 0x00000380},
589                 {AUD_DEEMPHGAIN_R, 0x000011e1},
590                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
591                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
592                 { /* end of list */ },
593         };
594
595         set_audio_start(core, SEL_A2);
596         switch (core->tvaudio) {
597         case WW_BG:
598                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
599                 set_audio_registers(core, a2_bgdk_common);
600                 set_audio_registers(core, a2_bg);
601                 set_audio_registers(core, a2_deemph50);
602                 break;
603         case WW_DK:
604                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
605                 set_audio_registers(core, a2_bgdk_common);
606                 set_audio_registers(core, a2_dk);
607                 set_audio_registers(core, a2_deemph50);
608                 break;
609         case WW_I:
610                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
611                 set_audio_registers(core, a1_i);
612                 set_audio_registers(core, a2_deemph50);
613                 break;
614         case WW_L:
615                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
616                 set_audio_registers(core, am_l);
617                 break;
618         default:
619                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
620                 return;
621                 break;
622         };
623
624         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
625         set_audio_finish(core, mode);
626 }
627
628 static void set_audio_standard_EIAJ(struct cx88_core *core)
629 {
630         static const struct rlist eiaj[] = {
631                 /* TODO: eiaj register settings are not there yet ... */
632
633                 { /* end of list */ },
634         };
635         dprintk("%s (status: unknown)\n", __FUNCTION__);
636
637         set_audio_start(core, SEL_EIAJ);
638         set_audio_registers(core, eiaj);
639         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
640 }
641
642 static void set_audio_standard_FM(struct cx88_core *core,
643                                   enum cx88_deemph_type deemph)
644 {
645         static const struct rlist fm_deemph_50[] = {
646                 {AUD_DEEMPH0_G0, 0x0C45},
647                 {AUD_DEEMPH0_A0, 0x6262},
648                 {AUD_DEEMPH0_B0, 0x1C29},
649                 {AUD_DEEMPH0_A1, 0x3FC66},
650                 {AUD_DEEMPH0_B1, 0x399A},
651
652                 {AUD_DEEMPH1_G0, 0x0D80},
653                 {AUD_DEEMPH1_A0, 0x6262},
654                 {AUD_DEEMPH1_B0, 0x1C29},
655                 {AUD_DEEMPH1_A1, 0x3FC66},
656                 {AUD_DEEMPH1_B1, 0x399A},
657
658                 {AUD_POLYPH80SCALEFAC, 0x0003},
659                 { /* end of list */ },
660         };
661         static const struct rlist fm_deemph_75[] = {
662                 {AUD_DEEMPH0_G0, 0x091B},
663                 {AUD_DEEMPH0_A0, 0x6B68},
664                 {AUD_DEEMPH0_B0, 0x11EC},
665                 {AUD_DEEMPH0_A1, 0x3FC66},
666                 {AUD_DEEMPH0_B1, 0x399A},
667
668                 {AUD_DEEMPH1_G0, 0x0AA0},
669                 {AUD_DEEMPH1_A0, 0x6B68},
670                 {AUD_DEEMPH1_B0, 0x11EC},
671                 {AUD_DEEMPH1_A1, 0x3FC66},
672                 {AUD_DEEMPH1_B1, 0x399A},
673
674                 {AUD_POLYPH80SCALEFAC, 0x0003},
675                 { /* end of list */ },
676         };
677
678         /* It is enough to leave default values? */
679         static const struct rlist fm_no_deemph[] = {
680
681                 {AUD_POLYPH80SCALEFAC, 0x0003},
682                 { /* end of list */ },
683         };
684
685         dprintk("%s (status: unknown)\n", __FUNCTION__);
686         set_audio_start(core, SEL_FMRADIO);
687
688         switch (deemph) {
689         case FM_NO_DEEMPH:
690                 set_audio_registers(core, fm_no_deemph);
691                 break;
692
693         case FM_DEEMPH_50:
694                 set_audio_registers(core, fm_deemph_50);
695                 break;
696
697         case FM_DEEMPH_75:
698                 set_audio_registers(core, fm_deemph_75);
699                 break;
700         }
701
702         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
703 }
704
705 /* ----------------------------------------------------------- */
706
707 int cx88_detect_nicam(struct cx88_core *core)
708 {
709         int i, j = 0;
710
711         dprintk("start nicam autodetect.\n");
712
713         for (i = 0; i < 6; i++) {
714                 /* if bit1=1 then nicam is detected */
715                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
716
717                 if (j == 1) {
718                         dprintk("nicam is detected.\n");
719                         return 1;
720                 }
721
722                 /* wait a little bit for next reading status */
723                 msleep(10);
724         }
725
726         dprintk("nicam is not detected.\n");
727         return 0;
728 }
729
730 void cx88_set_tvaudio(struct cx88_core *core)
731 {
732         switch (core->tvaudio) {
733         case WW_BTSC:
734                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
735                 break;
736         case WW_BG:
737         case WW_DK:
738         case WW_I:
739         case WW_L:
740                 /* prepare all dsp registers */
741                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
742
743                 /* set nicam mode - otherwise
744                    AUD_NICAM_STATUS2 contains wrong values */
745                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
746                 if (0 == cx88_detect_nicam(core)) {
747                         /* fall back to fm / am mono */
748                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
749                         core->use_nicam = 0;
750                 } else {
751                         core->use_nicam = 1;
752                 }
753                 break;
754         case WW_EIAJ:
755                 set_audio_standard_EIAJ(core);
756                 break;
757         case WW_FM:
758                 set_audio_standard_FM(core, FM_NO_DEEMPH);
759                 break;
760         case WW_NONE:
761         default:
762                 printk("%s/0: unknown tv audio mode [%d]\n",
763                        core->name, core->tvaudio);
764                 break;
765         }
766         return;
767 }
768
769 void cx88_newstation(struct cx88_core *core)
770 {
771         core->audiomode_manual = UNSET;
772 }
773
774 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
775 {
776         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
777         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
778         u32 reg, mode, pilot;
779
780         reg = cx_read(AUD_STATUS);
781         mode = reg & 0x03;
782         pilot = (reg >> 2) & 0x03;
783
784         if (core->astat != reg)
785                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
786                         reg, m[mode], p[pilot],
787                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
788         core->astat = reg;
789
790 /* TODO
791        Reading from AUD_STATUS is not enough
792        for auto-detecting sap/dual-fm/nicam.
793        Add some code here later.
794 */
795
796 # if 0
797         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
798             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
799         t->rxsubchans = V4L2_TUNER_SUB_MONO;
800         t->audmode = V4L2_TUNER_MODE_MONO;
801
802         switch (core->tvaudio) {
803         case WW_BTSC:
804                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
805                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
806                 if (1 == pilot) {
807                         /* SAP */
808                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
809                 }
810                 break;
811         case WW_A2_BG:
812         case WW_A2_DK:
813         case WW_A2_M:
814                 if (1 == pilot) {
815                         /* stereo */
816                         t->rxsubchans =
817                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
818                         if (0 == mode)
819                                 t->audmode = V4L2_TUNER_MODE_STEREO;
820                 }
821                 if (2 == pilot) {
822                         /* dual language -- FIXME */
823                         t->rxsubchans =
824                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
825                         t->audmode = V4L2_TUNER_MODE_LANG1;
826                 }
827                 break;
828         case WW_NICAM_BGDKL:
829                 if (0 == mode) {
830                         t->audmode = V4L2_TUNER_MODE_STEREO;
831                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
832                 }
833                 break;
834         case WW_SYSTEM_L_AM:
835                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
836                         t->audmode = V4L2_TUNER_MODE_STEREO;
837                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
838                 }
839                 break;
840         default:
841                 /* nothing */
842                 break;
843         }
844 # endif
845         return;
846 }
847
848 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
849 {
850         u32 ctl = UNSET;
851         u32 mask = UNSET;
852
853         if (manual) {
854                 core->audiomode_manual = mode;
855         } else {
856                 if (UNSET != core->audiomode_manual)
857                         return;
858         }
859         core->audiomode_current = mode;
860
861         switch (core->tvaudio) {
862         case WW_BTSC:
863                 switch (mode) {
864                 case V4L2_TUNER_MODE_MONO:
865                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
866                         break;
867                 case V4L2_TUNER_MODE_LANG1:
868                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
869                         break;
870                 case V4L2_TUNER_MODE_LANG2:
871                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
872                         break;
873                 case V4L2_TUNER_MODE_STEREO:
874                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
875                         break;
876                 }
877                 break;
878         case WW_BG:
879         case WW_DK:
880         case WW_I:
881         case WW_L:
882                 if (1 == core->use_nicam) {
883                         switch (mode) {
884                         case V4L2_TUNER_MODE_MONO:
885                         case V4L2_TUNER_MODE_LANG1:
886                                 set_audio_standard_NICAM(core,
887                                                          EN_NICAM_FORCE_MONO1);
888                                 break;
889                         case V4L2_TUNER_MODE_LANG2:
890                                 set_audio_standard_NICAM(core,
891                                                          EN_NICAM_FORCE_MONO2);
892                                 break;
893                         case V4L2_TUNER_MODE_STEREO:
894                                 set_audio_standard_NICAM(core,
895                                                          EN_NICAM_FORCE_STEREO);
896                                 break;
897                         }
898                 } else {
899                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
900                                 /* fall back to fm / am mono */
901                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
902                         } else {
903                                 /* TODO: Add A2 autodection */
904                                 switch (mode) {
905                                 case V4L2_TUNER_MODE_MONO:
906                                 case V4L2_TUNER_MODE_LANG1:
907                                         set_audio_standard_A2(core,
908                                                               EN_A2_FORCE_MONO1);
909                                         break;
910                                 case V4L2_TUNER_MODE_LANG2:
911                                         set_audio_standard_A2(core,
912                                                               EN_A2_FORCE_MONO2);
913                                         break;
914                                 case V4L2_TUNER_MODE_STEREO:
915                                         set_audio_standard_A2(core,
916                                                               EN_A2_FORCE_STEREO);
917                                         break;
918                                 }
919                         }
920                 }
921                 break;
922         case WW_FM:
923                 switch (mode) {
924                 case V4L2_TUNER_MODE_MONO:
925                         ctl = EN_FMRADIO_FORCE_MONO;
926                         mask = 0x3f;
927                         break;
928                 case V4L2_TUNER_MODE_STEREO:
929                         ctl = EN_FMRADIO_AUTO_STEREO;
930                         mask = 0x3f;
931                         break;
932                 }
933                 break;
934         }
935
936         if (UNSET != ctl) {
937                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
938                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
939                         mask, ctl, cx_read(AUD_STATUS),
940                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
941                 cx_andor(AUD_CTL, mask, ctl);
942         }
943         return;
944 }
945
946 int cx88_audio_thread(void *data)
947 {
948         struct cx88_core *core = data;
949         struct v4l2_tuner t;
950         u32 mode = 0;
951
952         dprintk("cx88: tvaudio thread started\n");
953         for (;;) {
954                 msleep_interruptible(1000);
955                 if (kthread_should_stop())
956                         break;
957
958                 /* just monitor the audio status for now ... */
959                 memset(&t, 0, sizeof(t));
960                 cx88_get_stereo(core, &t);
961
962                 if (UNSET != core->audiomode_manual)
963                         /* manually set, don't do anything. */
964                         continue;
965
966                 /* monitor signal */
967                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
968                         mode = V4L2_TUNER_MODE_STEREO;
969                 else
970                         mode = V4L2_TUNER_MODE_MONO;
971                 if (mode == core->audiomode_current)
972                         continue;
973
974                 /* automatically switch to best available mode */
975                 cx88_set_stereo(core, mode, 0);
976         }
977
978         dprintk("cx88: tvaudio thread exiting\n");
979         return 0;
980 }
981
982 /* ----------------------------------------------------------- */
983
984 EXPORT_SYMBOL(cx88_set_tvaudio);
985 EXPORT_SYMBOL(cx88_newstation);
986 EXPORT_SYMBOL(cx88_set_stereo);
987 EXPORT_SYMBOL(cx88_get_stereo);
988 EXPORT_SYMBOL(cx88_audio_thread);
989
990 /*
991  * Local variables:
992  * c-basic-offset: 8
993  * End:
994  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
995  */