drivers/mtd/nand/fsl_upm.c

   1 /*
   2  * Freescale UPM NAND driver.
   3  *
   4  * Copyright © 2007-2008  MontaVista Software, Inc.
   5  *
   6  * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17 #include <linux/mtd/nand.h>
  18 #include <linux/mtd/nand_ecc.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/mtd/mtd.h>
  21 #include <linux/of_address.h>
  22 #include <linux/of_platform.h>
  23 #include <linux/of_gpio.h>
  24 #include <linux/io.h>
  25 #include <linux/slab.h>
  26 #include <asm/fsl_lbc.h>
  27
  28 #define FSL_UPM_WAIT_RUN_PATTERN  0x1
  29 #define FSL_UPM_WAIT_WRITE_BYTE   0x2
  30 #define FSL_UPM_WAIT_WRITE_BUFFER 0x4
  31
  32 struct fsl_upm_nand {
  33         struct device *dev;
  34         struct nand_chip chip;
  35         int last_ctrl;
  36         struct mtd_partition *parts;
  37         struct fsl_upm upm;
  38         uint8_t upm_addr_offset;
  39         uint8_t upm_cmd_offset;
  40         void __iomem *io_base;
  41         int rnb_gpio[NAND_MAX_CHIPS];
  42         uint32_t mchip_offsets[NAND_MAX_CHIPS];
  43         uint32_t mchip_count;
  44         uint32_t mchip_number;
  45         int chip_delay;
  46         uint32_t wait_flags;
  47 };
  48
  49 static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
  50 {
  51         return container_of(mtd_to_nand(mtdinfo), struct fsl_upm_nand,
  52                             chip);
  53 }
  54
  55 static int fun_chip_ready(struct mtd_info *mtd)
  56 {
  57         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
  58
  59         if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
  60                 return 1;
  61
  62         dev_vdbg(fun->dev, "busy\n");
  63         return 0;
  64 }
  65
  66 static void fun_wait_rnb(struct fsl_upm_nand *fun)
  67 {
  68         if (fun->rnb_gpio[fun->mchip_number] >= 0) {
  69                 struct mtd_info *mtd = nand_to_mtd(&fun->chip);
  70                 int cnt = 1000000;
  71
  72                 while (--cnt && !fun_chip_ready(mtd))
  73                         cpu_relax();
  74                 if (!cnt)
  75                         dev_err(fun->dev, "tired waiting for RNB\n");
  76         } else {
  77                 ndelay(100);
  78         }
  79 }
  80
  81 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  82 {
  83         struct nand_chip *chip = mtd_to_nand(mtd);
  84         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
  85         u32 mar;
  86
  87         if (!(ctrl & fun->last_ctrl)) {
  88                 fsl_upm_end_pattern(&fun->upm);
  89
  90                 if (cmd == NAND_CMD_NONE)
  91                         return;
  92
  93                 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
  94         }
  95
  96         if (ctrl & NAND_CTRL_CHANGE) {
  97                 if (ctrl & NAND_ALE)
  98                         fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
  99                 else if (ctrl & NAND_CLE)
 100                         fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
 101         }
 102
 103         mar = (cmd << (32 - fun->upm.width)) |
 104                 fun->mchip_offsets[fun->mchip_number];
 105         fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
 106
 107         if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
 108                 fun_wait_rnb(fun);
 109 }
 110
 111 static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
 112 {
 113         struct nand_chip *chip = mtd_to_nand(mtd);
 114         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 115
 116         if (mchip_nr == -1) {
 117                 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
 118         } else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
 119                 fun->mchip_number = mchip_nr;
 120                 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
 121                 chip->IO_ADDR_W = chip->IO_ADDR_R;
 122         } else {
 123                 BUG();
 124         }
 125 }
 126
 127 static uint8_t fun_read_byte(struct mtd_info *mtd)
 128 {
 129         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 130
 131         return in_8(fun->chip.IO_ADDR_R);
 132 }
 133
 134 static void fun_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 135 {
 136         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 137         int i;
 138
 139         for (i = 0; i < len; i++)
 140                 buf[i] = in_8(fun->chip.IO_ADDR_R);
 141 }
 142
 143 static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 144 {
 145         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 146         int i;
 147
 148         for (i = 0; i < len; i++) {
 149                 out_8(fun->chip.IO_ADDR_W, buf[i]);
 150                 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
 151                         fun_wait_rnb(fun);
 152         }
 153         if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
 154                 fun_wait_rnb(fun);
 155 }
 156
 157 static int fun_chip_init(struct fsl_upm_nand *fun,
 158                          const struct device_node *upm_np,
 159                          const struct resource *io_res)
 160 {
 161         struct mtd_info *mtd = nand_to_mtd(&fun->chip);
 162         int ret;
 163         struct device_node *flash_np;
 164
 165         fun->chip.IO_ADDR_R = fun->io_base;
 166         fun->chip.IO_ADDR_W = fun->io_base;
 167         fun->chip.cmd_ctrl = fun_cmd_ctrl;
 168         fun->chip.chip_delay = fun->chip_delay;
 169         fun->chip.read_byte = fun_read_byte;
 170         fun->chip.read_buf = fun_read_buf;
 171         fun->chip.write_buf = fun_write_buf;
 172         fun->chip.ecc.mode = NAND_ECC_SOFT;
 173         fun->chip.ecc.algo = NAND_ECC_HAMMING;
 174         if (fun->mchip_count > 1)
 175                 fun->chip.select_chip = fun_select_chip;
 176
 177         if (fun->rnb_gpio[0] >= 0)
 178                 fun->chip.dev_ready = fun_chip_ready;
 179
 180         mtd->dev.parent = fun->dev;
 181
 182         flash_np = of_get_next_child(upm_np, NULL);
 183         if (!flash_np)
 184                 return -ENODEV;
 185
 186         nand_set_flash_node(&fun->chip, flash_np);
 187         mtd->name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start,
 188                               flash_np->name);
 189         if (!mtd->name) {
 190                 ret = -ENOMEM;
 191                 goto err;
 192         }
 193
 194         ret = nand_scan(mtd, fun->mchip_count);
 195         if (ret)
 196                 goto err;
 197
 198         ret = mtd_device_register(mtd, NULL, 0);
 199 err:
 200         of_node_put(flash_np);
 201         if (ret)
 202                 kfree(mtd->name);
 203         return ret;
 204 }
 205
 206 static int fun_probe(struct platform_device *ofdev)
 207 {
 208         struct fsl_upm_nand *fun;
 209         struct resource io_res;
 210         const __be32 *prop;
 211         int rnb_gpio;
 212         int ret;
 213         int size;
 214         int i;
 215
 216         fun = kzalloc(sizeof(*fun), GFP_KERNEL);
 217         if (!fun)
 218                 return -ENOMEM;
 219
 220         ret = of_address_to_resource(ofdev->dev.of_node, 0, &io_res);
 221         if (ret) {
 222                 dev_err(&ofdev->dev, "can't get IO base\n");
 223                 goto err1;
 224         }
 225
 226         ret = fsl_upm_find(io_res.start, &fun->upm);
 227         if (ret) {
 228                 dev_err(&ofdev->dev, "can't find UPM\n");
 229                 goto err1;
 230         }
 231
 232         prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-offset",
 233                                &size);
 234         if (!prop || size != sizeof(uint32_t)) {
 235                 dev_err(&ofdev->dev, "can't get UPM address offset\n");
 236                 ret = -EINVAL;
 237                 goto err1;
 238         }
 239         fun->upm_addr_offset = *prop;
 240
 241         prop = of_get_property(ofdev->dev.of_node, "fsl,upm-cmd-offset", &size);
 242         if (!prop || size != sizeof(uint32_t)) {
 243                 dev_err(&ofdev->dev, "can't get UPM command offset\n");
 244                 ret = -EINVAL;
 245                 goto err1;
 246         }
 247         fun->upm_cmd_offset = *prop;
 248
 249         prop = of_get_property(ofdev->dev.of_node,
 250                                "fsl,upm-addr-line-cs-offsets", &size);
 251         if (prop && (size / sizeof(uint32_t)) > 0) {
 252                 fun->mchip_count = size / sizeof(uint32_t);
 253                 if (fun->mchip_count >= NAND_MAX_CHIPS) {
 254                         dev_err(&ofdev->dev, "too much multiple chips\n");
 255                         goto err1;
 256                 }
 257                 for (i = 0; i < fun->mchip_count; i++)
 258                         fun->mchip_offsets[i] = be32_to_cpu(prop[i]);
 259         } else {
 260                 fun->mchip_count = 1;
 261         }
 262
 263         for (i = 0; i < fun->mchip_count; i++) {
 264                 fun->rnb_gpio[i] = -1;
 265                 rnb_gpio = of_get_gpio(ofdev->dev.of_node, i);
 266                 if (rnb_gpio >= 0) {
 267                         ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
 268                         if (ret) {
 269                                 dev_err(&ofdev->dev,
 270                                         "can't request RNB gpio #%d\n", i);
 271                                 goto err2;
 272                         }
 273                         gpio_direction_input(rnb_gpio);
 274                         fun->rnb_gpio[i] = rnb_gpio;
 275                 } else if (rnb_gpio == -EINVAL) {
 276                         dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
 277                         goto err2;
 278                 }
 279         }
 280
 281         prop = of_get_property(ofdev->dev.of_node, "chip-delay", NULL);
 282         if (prop)
 283                 fun->chip_delay = be32_to_cpup(prop);
 284         else
 285                 fun->chip_delay = 50;
 286
 287         prop = of_get_property(ofdev->dev.of_node, "fsl,upm-wait-flags", &size);
 288         if (prop && size == sizeof(uint32_t))
 289                 fun->wait_flags = be32_to_cpup(prop);
 290         else
 291                 fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
 292                                   FSL_UPM_WAIT_WRITE_BYTE;
 293
 294         fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
 295                                             resource_size(&io_res));
 296         if (!fun->io_base) {
 297                 ret = -ENOMEM;
 298                 goto err2;
 299         }
 300
 301         fun->dev = &ofdev->dev;
 302         fun->last_ctrl = NAND_CLE;
 303
 304         ret = fun_chip_init(fun, ofdev->dev.of_node, &io_res);
 305         if (ret)
 306                 goto err2;
 307
 308         dev_set_drvdata(&ofdev->dev, fun);
 309
 310         return 0;
 311 err2:
 312         for (i = 0; i < fun->mchip_count; i++) {
 313                 if (fun->rnb_gpio[i] < 0)
 314                         break;
 315                 gpio_free(fun->rnb_gpio[i]);
 316         }
 317 err1:
 318         kfree(fun);
 319
 320         return ret;
 321 }
 322
 323 static int fun_remove(struct platform_device *ofdev)
 324 {
 325         struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
 326         struct mtd_info *mtd = nand_to_mtd(&fun->chip);
 327         int i;
 328
 329         nand_release(mtd);
 330         kfree(mtd->name);
 331
 332         for (i = 0; i < fun->mchip_count; i++) {
 333                 if (fun->rnb_gpio[i] < 0)
 334                         break;
 335                 gpio_free(fun->rnb_gpio[i]);
 336         }
 337
 338         kfree(fun);
 339
 340         return 0;
 341 }
 342
 343 static const struct of_device_id of_fun_match[] = {
 344         { .compatible = "fsl,upm-nand" },
 345         {},
 346 };
 347 MODULE_DEVICE_TABLE(of, of_fun_match);
 348
 349 static struct platform_driver of_fun_driver = {
 350         .driver = {
 351                 .name = "fsl,upm-nand",
 352                 .of_match_table = of_fun_match,
 353         },
 354         .probe          = fun_probe,
 355         .remove         = fun_remove,
 356 };
 357
 358 module_platform_driver(of_fun_driver);
 359
 360 MODULE_LICENSE("GPL");
 361 MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
 362 MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
 363                    "LocalBus User-Programmable Machine");