drivers/net/irda/nsc-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      nsc-ircc.c
   4  * Version:       1.0
   5  * Description:   Driver for the NSC PC'108 and PC'338 IrDA chipsets
   6  * Status:        Stable.
   7  * Author:        Dag Brattli <dagb@cs.uit.no>
   8  * Created at:    Sat Nov  7 21:43:15 1998
   9  * Modified at:   Wed Mar  1 11:29:34 2000
  10  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  11  *
  12  *     Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
  13  *     Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
  14  *     Copyright (c) 1998 Actisys Corp., www.actisys.com
  15  *     Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
  16  *     All Rights Reserved
  17  *
  18  *     This program is free software; you can redistribute it and/or
  19  *     modify it under the terms of the GNU General Public License as
  20  *     published by the Free Software Foundation; either version 2 of
  21  *     the License, or (at your option) any later version.
  22  *
  23  *     Neither Dag Brattli nor University of Tromsø admit liability nor
  24  *     provide warranty for any of this software. This material is
  25  *     provided "AS-IS" and at no charge.
  26  *
  27  *     Notice that all functions that needs to access the chip in _any_
  28  *     way, must save BSR register on entry, and restore it on exit.
  29  *     It is _very_ important to follow this policy!
  30  *
  31  *         __u8 bank;
  32  *
  33  *         bank = inb(iobase+BSR);
  34  *
  35  *         do_your_stuff_here();
  36  *
  37  *         outb(bank, iobase+BSR);
  38  *
  39  *    If you find bugs in this file, its very likely that the same bug
  40  *    will also be in w83977af_ir.c since the implementations are quite
  41  *    similar.
  42  *
  43  ********************************************************************/
  44
  45 #include <linux/module.h>
  46 #include <linux/gfp.h>
  47
  48 #include <linux/kernel.h>
  49 #include <linux/types.h>
  50 #include <linux/skbuff.h>
  51 #include <linux/netdevice.h>
  52 #include <linux/ioport.h>
  53 #include <linux/delay.h>
  54 #include <linux/init.h>
  55 #include <linux/interrupt.h>
  56 #include <linux/rtnetlink.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/pnp.h>
  59 #include <linux/platform_device.h>
  60
  61 #include <asm/io.h>
  62 #include <asm/dma.h>
  63 #include <asm/byteorder.h>
  64
  65 #include <net/irda/wrapper.h>
  66 #include <net/irda/irda.h>
  67 #include <net/irda/irda_device.h>
  68
  69 #include "nsc-ircc.h"
  70
  71 #define CHIP_IO_EXTENT 8
  72 #define BROKEN_DONGLE_ID
  73
  74 static char *driver_name = "nsc-ircc";
  75
  76 /* Power Management */
  77 #define NSC_IRCC_DRIVER_NAME                  "nsc-ircc"
  78 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
  79 static int nsc_ircc_resume(struct platform_device *dev);
  80
  81 static struct platform_driver nsc_ircc_driver = {
  82         .suspend        = nsc_ircc_suspend,
  83         .resume         = nsc_ircc_resume,
  84         .driver         = {
  85                 .name   = NSC_IRCC_DRIVER_NAME,
  86         },
  87 };
  88
  89 /* Module parameters */
  90 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  91 static int dongle_id;
  92
  93 /* Use BIOS settions by default, but user may supply module parameters */
  94 static unsigned int io[]  = { ~0, ~0, ~0, ~0, ~0 };
  95 static unsigned int irq[] = {  0,  0,  0,  0,  0 };
  96 static unsigned int dma[] = {  0,  0,  0,  0,  0 };
  97
  98 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
  99 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
 100 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
 101 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
 102 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
 103 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
 104 #ifdef CONFIG_PNP
 105 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
 106 #endif
 107
 108 /* These are the known NSC chips */
 109 static nsc_chip_t chips[] = {
 110 /*  Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
 111         { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
 112           nsc_ircc_probe_108, nsc_ircc_init_108 },
 113         { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
 114           nsc_ircc_probe_338, nsc_ircc_init_338 },
 115         /* Contributed by Steffen Pingel - IBM X40 */
 116         { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
 117           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 118         /* Contributed by Jan Frey - IBM A30/A31 */
 119         { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
 120           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 121         /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
 122         { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
 123           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 124         /* IBM ThinkPads using PC8394T (T43/R52/?) */
 125         { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
 126           nsc_ircc_probe_39x, nsc_ircc_init_39x },
 127         { NULL }
 128 };
 129
 130 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
 131
 132 static char *dongle_types[] = {
 133         "Differential serial interface",
 134         "Differential serial interface",
 135         "Reserved",
 136         "Reserved",
 137         "Sharp RY5HD01",
 138         "Reserved",
 139         "Single-ended serial interface",
 140         "Consumer-IR only",
 141         "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
 142         "IBM31T1100 or Temic TFDS6000/TFDS6500",
 143         "Reserved",
 144         "Reserved",
 145         "HP HSDL-1100/HSDL-2100",
 146         "HP HSDL-1100/HSDL-2100",
 147         "Supports SIR Mode only",
 148         "No dongle connected",
 149 };
 150
 151 /* PNP probing */
 152 static chipio_t pnp_info;
 153 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
 154         { .id = "NSC6001", .driver_data = 0 },
 155         { .id = "HWPC224", .driver_data = 0 },
 156         { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 },
 157         { }
 158 };
 159
 160 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
 161
 162 static struct pnp_driver nsc_ircc_pnp_driver = {
 163 #ifdef CONFIG_PNP
 164         .name = "nsc-ircc",
 165         .id_table = nsc_ircc_pnp_table,
 166         .probe = nsc_ircc_pnp_probe,
 167 #endif
 168 };
 169
 170 /* Some prototypes */
 171 static int  nsc_ircc_open(chipio_t *info);
 172 static int  nsc_ircc_close(struct nsc_ircc_cb *self);
 173 static int  nsc_ircc_setup(chipio_t *info);
 174 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
 175 static int  nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
 176 static int  nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
 177 static netdev_tx_t  nsc_ircc_hard_xmit_sir(struct sk_buff *skb,
 178                                                  struct net_device *dev);
 179 static netdev_tx_t  nsc_ircc_hard_xmit_fir(struct sk_buff *skb,
 180                                                  struct net_device *dev);
 181 static int  nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
 182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
 183 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
 184 static int  nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
 185 static int  nsc_ircc_read_dongle_id (int iobase);
 186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
 187
 188 static int  nsc_ircc_net_open(struct net_device *dev);
 189 static int  nsc_ircc_net_close(struct net_device *dev);
 190 static int  nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 191
 192 /* Globals */
 193 static int pnp_registered;
 194 static int pnp_succeeded;
 195
 196 /*
 197  * Function nsc_ircc_init ()
 198  *
 199  *    Initialize chip. Just try to find out how many chips we are dealing with
 200  *    and where they are
 201  */
 202 static int __init nsc_ircc_init(void)
 203 {
 204         chipio_t info;
 205         nsc_chip_t *chip;
 206         int ret;
 207         int cfg_base;
 208         int cfg, id;
 209         int reg;
 210         int i = 0;
 211
 212         ret = platform_driver_register(&nsc_ircc_driver);
 213         if (ret) {
 214                 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
 215                 return ret;
 216         }
 217
 218         /* Register with PnP subsystem to detect disable ports */
 219         ret = pnp_register_driver(&nsc_ircc_pnp_driver);
 220
 221         if (!ret)
 222                 pnp_registered = 1;
 223
 224         ret = -ENODEV;
 225
 226         /* Probe for all the NSC chipsets we know about */
 227         for (chip = chips; chip->name ; chip++) {
 228                 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__,
 229                            chip->name);
 230
 231                 /* Try all config registers for this chip */
 232                 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
 233                         cfg_base = chip->cfg[cfg];
 234                         if (!cfg_base)
 235                                 continue;
 236
 237                         /* Read index register */
 238                         reg = inb(cfg_base);
 239                         if (reg == 0xff) {
 240                                 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base);
 241                                 continue;
 242                         }
 243
 244                         /* Read chip identification register */
 245                         outb(chip->cid_index, cfg_base);
 246                         id = inb(cfg_base+1);
 247                         if ((id & chip->cid_mask) == chip->cid_value) {
 248                                 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
 249                                            __func__, chip->name, id & ~chip->cid_mask);
 250
 251                                 /*
 252                                  * If we found a correct PnP setting,
 253                                  * we first try it.
 254                                  */
 255                                 if (pnp_succeeded) {
 256                                         memset(&info, 0, sizeof(chipio_t));
 257                                         info.cfg_base = cfg_base;
 258                                         info.fir_base = pnp_info.fir_base;
 259                                         info.dma = pnp_info.dma;
 260                                         info.irq = pnp_info.irq;
 261
 262                                         if (info.fir_base < 0x2000) {
 263                                                 IRDA_MESSAGE("%s, chip->init\n", driver_name);
 264                                                 chip->init(chip, &info);
 265                                         } else
 266                                                 chip->probe(chip, &info);
 267
 268                                         if (nsc_ircc_open(&info) >= 0)
 269                                                 ret = 0;
 270                                 }
 271
 272                                 /*
 273                                  * Opening based on PnP values failed.
 274                                  * Let's fallback to user values, or probe
 275                                  * the chip.
 276                                  */
 277                                 if (ret) {
 278                                         IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
 279                                         memset(&info, 0, sizeof(chipio_t));
 280                                         info.cfg_base = cfg_base;
 281                                         info.fir_base = io[i];
 282                                         info.dma = dma[i];
 283                                         info.irq = irq[i];
 284
 285                                         /*
 286                                          * If the user supplies the base address, then
 287                                          * we init the chip, if not we probe the values
 288                                          * set by the BIOS
 289                                          */
 290                                         if (io[i] < 0x2000) {
 291                                                 chip->init(chip, &info);
 292                                         } else
 293                                                 chip->probe(chip, &info);
 294
 295                                         if (nsc_ircc_open(&info) >= 0)
 296                                                 ret = 0;
 297                                 }
 298                                 i++;
 299                         } else {
 300                                 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id);
 301                         }
 302                 }
 303         }
 304
 305         if (ret) {
 306                 platform_driver_unregister(&nsc_ircc_driver);
 307                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
 308                 pnp_registered = 0;
 309         }
 310
 311         return ret;
 312 }
 313
 314 /*
 315  * Function nsc_ircc_cleanup ()
 316  *
 317  *    Close all configured chips
 318  *
 319  */
 320 static void __exit nsc_ircc_cleanup(void)
 321 {
 322         int i;
 323
 324         for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
 325                 if (dev_self[i])
 326                         nsc_ircc_close(dev_self[i]);
 327         }
 328
 329         platform_driver_unregister(&nsc_ircc_driver);
 330
 331         if (pnp_registered)
 332                 pnp_unregister_driver(&nsc_ircc_pnp_driver);
 333
 334         pnp_registered = 0;
 335 }
 336
 337 static const struct net_device_ops nsc_ircc_sir_ops = {
 338         .ndo_open       = nsc_ircc_net_open,
 339         .ndo_stop       = nsc_ircc_net_close,
 340         .ndo_start_xmit = nsc_ircc_hard_xmit_sir,
 341         .ndo_do_ioctl   = nsc_ircc_net_ioctl,
 342 };
 343
 344 static const struct net_device_ops nsc_ircc_fir_ops = {
 345         .ndo_open       = nsc_ircc_net_open,
 346         .ndo_stop       = nsc_ircc_net_close,
 347         .ndo_start_xmit = nsc_ircc_hard_xmit_fir,
 348         .ndo_do_ioctl   = nsc_ircc_net_ioctl,
 349 };
 350
 351 /*
 352  * Function nsc_ircc_open (iobase, irq)
 353  *
 354  *    Open driver instance
 355  *
 356  */
 357 static int __init nsc_ircc_open(chipio_t *info)
 358 {
 359         struct net_device *dev;
 360         struct nsc_ircc_cb *self;
 361         void *ret;
 362         int err, chip_index;
 363
 364         IRDA_DEBUG(2, "%s()\n", __func__);
 365
 366
 367         for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
 368                 if (!dev_self[chip_index])
 369                         break;
 370         }
 371
 372         if (chip_index == ARRAY_SIZE(dev_self)) {
 373                 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__);
 374                 return -ENOMEM;
 375         }
 376
 377         IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
 378                      info->cfg_base);
 379
 380         if ((nsc_ircc_setup(info)) == -1)
 381                 return -1;
 382
 383         IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
 384
 385         dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
 386         if (dev == NULL) {
 387                 IRDA_ERROR("%s(), can't allocate memory for "
 388                            "control block!\n", __func__);
 389                 return -ENOMEM;
 390         }
 391
 392         self = netdev_priv(dev);
 393         self->netdev = dev;
 394         spin_lock_init(&self->lock);
 395
 396         /* Need to store self somewhere */
 397         dev_self[chip_index] = self;
 398         self->index = chip_index;
 399
 400         /* Initialize IO */
 401         self->io.cfg_base  = info->cfg_base;
 402         self->io.fir_base  = info->fir_base;
 403         self->io.irq       = info->irq;
 404         self->io.fir_ext   = CHIP_IO_EXTENT;
 405         self->io.dma       = info->dma;
 406         self->io.fifo_size = 32;
 407
 408         /* Reserve the ioports that we need */
 409         ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
 410         if (!ret) {
 411                 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
 412                              __func__, self->io.fir_base);
 413                 err = -ENODEV;
 414                 goto out1;
 415         }
 416
 417         /* Initialize QoS for this device */
 418         irda_init_max_qos_capabilies(&self->qos);
 419
 420         /* The only value we must override it the baudrate */
 421         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 422                 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
 423
 424         self->qos.min_turn_time.bits = qos_mtt_bits;
 425         irda_qos_bits_to_value(&self->qos);
 426
 427         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 428         self->rx_buff.truesize = 14384;
 429         self->tx_buff.truesize = 14384;
 430
 431         /* Allocate memory if needed */
 432         self->rx_buff.head =
 433                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
 434                                    &self->rx_buff_dma, GFP_KERNEL | __GFP_ZERO);
 435         if (self->rx_buff.head == NULL) {
 436                 err = -ENOMEM;
 437                 goto out2;
 438
 439         }
 440
 441         self->tx_buff.head =
 442                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
 443                                    &self->tx_buff_dma, GFP_KERNEL | __GFP_ZERO);
 444         if (self->tx_buff.head == NULL) {
 445                 err = -ENOMEM;
 446                 goto out3;
 447         }
 448
 449         self->rx_buff.in_frame = FALSE;
 450         self->rx_buff.state = OUTSIDE_FRAME;
 451         self->tx_buff.data = self->tx_buff.head;
 452         self->rx_buff.data = self->rx_buff.head;
 453
 454         /* Reset Tx queue info */
 455         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 456         self->tx_fifo.tail = self->tx_buff.head;
 457
 458         /* Override the network functions we need to use */
 459         dev->netdev_ops = &nsc_ircc_sir_ops;
 460
 461         err = register_netdev(dev);
 462         if (err) {
 463                 IRDA_ERROR("%s(), register_netdev() failed!\n", __func__);
 464                 goto out4;
 465         }
 466         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
 467
 468         /* Check if user has supplied a valid dongle id or not */
 469         if ((dongle_id <= 0) ||
 470             (dongle_id >= ARRAY_SIZE(dongle_types))) {
 471                 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
 472
 473                 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
 474                              dongle_types[dongle_id]);
 475         } else {
 476                 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
 477                              dongle_types[dongle_id]);
 478         }
 479
 480         self->io.dongle_id = dongle_id;
 481         nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
 482
 483         self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
 484                                                       self->index, NULL, 0);
 485         if (IS_ERR(self->pldev)) {
 486                 err = PTR_ERR(self->pldev);
 487                 goto out5;
 488         }
 489         platform_set_drvdata(self->pldev, self);
 490
 491         return chip_index;
 492
 493  out5:
 494         unregister_netdev(dev);
 495  out4:
 496         dma_free_coherent(NULL, self->tx_buff.truesize,
 497                           self->tx_buff.head, self->tx_buff_dma);
 498  out3:
 499         dma_free_coherent(NULL, self->rx_buff.truesize,
 500                           self->rx_buff.head, self->rx_buff_dma);
 501  out2:
 502         release_region(self->io.fir_base, self->io.fir_ext);
 503  out1:
 504         free_netdev(dev);
 505         dev_self[chip_index] = NULL;
 506         return err;
 507 }
 508
 509 /*
 510  * Function nsc_ircc_close (self)
 511  *
 512  *    Close driver instance
 513  *
 514  */
 515 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
 516 {
 517         int iobase;
 518
 519         IRDA_DEBUG(4, "%s()\n", __func__);
 520
 521         IRDA_ASSERT(self != NULL, return -1;);
 522
 523         iobase = self->io.fir_base;
 524
 525         platform_device_unregister(self->pldev);
 526
 527         /* Remove netdevice */
 528         unregister_netdev(self->netdev);
 529
 530         /* Release the PORT that this driver is using */
 531         IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
 532                    __func__, self->io.fir_base);
 533         release_region(self->io.fir_base, self->io.fir_ext);
 534
 535         if (self->tx_buff.head)
 536                 dma_free_coherent(NULL, self->tx_buff.truesize,
 537                                   self->tx_buff.head, self->tx_buff_dma);
 538
 539         if (self->rx_buff.head)
 540                 dma_free_coherent(NULL, self->rx_buff.truesize,
 541                                   self->rx_buff.head, self->rx_buff_dma);
 542
 543         dev_self[self->index] = NULL;
 544         free_netdev(self->netdev);
 545
 546         return 0;
 547 }
 548
 549 /*
 550  * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
 551  *
 552  *    Initialize the NSC '108 chip
 553  *
 554  */
 555 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
 556 {
 557         int cfg_base = info->cfg_base;
 558         __u8 temp=0;
 559
 560         outb(2, cfg_base);      /* Mode Control Register (MCTL) */
 561         outb(0x00, cfg_base+1); /* Disable device */
 562
 563         /* Base Address and Interrupt Control Register (BAIC) */
 564         outb(CFG_108_BAIC, cfg_base);
 565         switch (info->fir_base) {
 566         case 0x3e8: outb(0x14, cfg_base+1); break;
 567         case 0x2e8: outb(0x15, cfg_base+1); break;
 568         case 0x3f8: outb(0x16, cfg_base+1); break;
 569         case 0x2f8: outb(0x17, cfg_base+1); break;
 570         default: IRDA_ERROR("%s(), invalid base_address", __func__);
 571         }
 572
 573         /* Control Signal Routing Register (CSRT) */
 574         switch (info->irq) {
 575         case 3:  temp = 0x01; break;
 576         case 4:  temp = 0x02; break;
 577         case 5:  temp = 0x03; break;
 578         case 7:  temp = 0x04; break;
 579         case 9:  temp = 0x05; break;
 580         case 11: temp = 0x06; break;
 581         case 15: temp = 0x07; break;
 582         default: IRDA_ERROR("%s(), invalid irq", __func__);
 583         }
 584         outb(CFG_108_CSRT, cfg_base);
 585
 586         switch (info->dma) {
 587         case 0: outb(0x08+temp, cfg_base+1); break;
 588         case 1: outb(0x10+temp, cfg_base+1); break;
 589         case 3: outb(0x18+temp, cfg_base+1); break;
 590         default: IRDA_ERROR("%s(), invalid dma", __func__);
 591         }
 592
 593         outb(CFG_108_MCTL, cfg_base);      /* Mode Control Register (MCTL) */
 594         outb(0x03, cfg_base+1); /* Enable device */
 595
 596         return 0;
 597 }
 598
 599 /*
 600  * Function nsc_ircc_probe_108 (chip, info)
 601  *
 602  *
 603  *
 604  */
 605 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
 606 {
 607         int cfg_base = info->cfg_base;
 608         int reg;
 609
 610         /* Read address and interrupt control register (BAIC) */
 611         outb(CFG_108_BAIC, cfg_base);
 612         reg = inb(cfg_base+1);
 613
 614         switch (reg & 0x03) {
 615         case 0:
 616                 info->fir_base = 0x3e8;
 617                 break;
 618         case 1:
 619                 info->fir_base = 0x2e8;
 620                 break;
 621         case 2:
 622                 info->fir_base = 0x3f8;
 623                 break;
 624         case 3:
 625                 info->fir_base = 0x2f8;
 626                 break;
 627         }
 628         info->sir_base = info->fir_base;
 629         IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__,
 630                    info->fir_base);
 631
 632         /* Read control signals routing register (CSRT) */
 633         outb(CFG_108_CSRT, cfg_base);
 634         reg = inb(cfg_base+1);
 635
 636         switch (reg & 0x07) {
 637         case 0:
 638                 info->irq = -1;
 639                 break;
 640         case 1:
 641                 info->irq = 3;
 642                 break;
 643         case 2:
 644                 info->irq = 4;
 645                 break;
 646         case 3:
 647                 info->irq = 5;
 648                 break;
 649         case 4:
 650                 info->irq = 7;
 651                 break;
 652         case 5:
 653                 info->irq = 9;
 654                 break;
 655         case 6:
 656                 info->irq = 11;
 657                 break;
 658         case 7:
 659                 info->irq = 15;
 660                 break;
 661         }
 662         IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
 663
 664         /* Currently we only read Rx DMA but it will also be used for Tx */
 665         switch ((reg >> 3) & 0x03) {
 666         case 0:
 667                 info->dma = -1;
 668                 break;
 669         case 1:
 670                 info->dma = 0;
 671                 break;
 672         case 2:
 673                 info->dma = 1;
 674                 break;
 675         case 3:
 676                 info->dma = 3;
 677                 break;
 678         }
 679         IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
 680
 681         /* Read mode control register (MCTL) */
 682         outb(CFG_108_MCTL, cfg_base);
 683         reg = inb(cfg_base+1);
 684
 685         info->enabled = reg & 0x01;
 686         info->suspended = !((reg >> 1) & 0x01);
 687
 688         return 0;
 689 }
 690
 691 /*
 692  * Function nsc_ircc_init_338 (chip, info)
 693  *
 694  *    Initialize the NSC '338 chip. Remember that the 87338 needs two
 695  *    consecutive writes to the data registers while CPU interrupts are
 696  *    disabled. The 97338 does not require this, but shouldn't be any
 697  *    harm if we do it anyway.
 698  */
 699 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
 700 {
 701         /* No init yet */
 702
 703         return 0;
 704 }
 705
 706 /*
 707  * Function nsc_ircc_probe_338 (chip, info)
 708  *
 709  *
 710  *
 711  */
 712 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
 713 {
 714         int cfg_base = info->cfg_base;
 715         int reg, com = 0;
 716         int pnp;
 717
 718         /* Read function enable register (FER) */
 719         outb(CFG_338_FER, cfg_base);
 720         reg = inb(cfg_base+1);
 721
 722         info->enabled = (reg >> 2) & 0x01;
 723
 724         /* Check if we are in Legacy or PnP mode */
 725         outb(CFG_338_PNP0, cfg_base);
 726         reg = inb(cfg_base+1);
 727
 728         pnp = (reg >> 3) & 0x01;
 729         if (pnp) {
 730                 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
 731                 outb(0x46, cfg_base);
 732                 reg = (inb(cfg_base+1) & 0xfe) << 2;
 733
 734                 outb(0x47, cfg_base);
 735                 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
 736
 737                 info->fir_base = reg;
 738         } else {
 739                 /* Read function address register (FAR) */
 740                 outb(CFG_338_FAR, cfg_base);
 741                 reg = inb(cfg_base+1);
 742
 743                 switch ((reg >> 4) & 0x03) {
 744                 case 0:
 745                         info->fir_base = 0x3f8;
 746                         break;
 747                 case 1:
 748                         info->fir_base = 0x2f8;
 749                         break;
 750                 case 2:
 751                         com = 3;
 752                         break;
 753                 case 3:
 754                         com = 4;
 755                         break;
 756                 }
 757
 758                 if (com) {
 759                         switch ((reg >> 6) & 0x03) {
 760                         case 0:
 761                                 if (com == 3)
 762                                         info->fir_base = 0x3e8;
 763                                 else
 764                                         info->fir_base = 0x2e8;
 765                                 break;
 766                         case 1:
 767                                 if (com == 3)
 768                                         info->fir_base = 0x338;
 769                                 else
 770                                         info->fir_base = 0x238;
 771                                 break;
 772                         case 2:
 773                                 if (com == 3)
 774                                         info->fir_base = 0x2e8;
 775                                 else
 776                                         info->fir_base = 0x2e0;
 777                                 break;
 778                         case 3:
 779                                 if (com == 3)
 780                                         info->fir_base = 0x220;
 781                                 else
 782                                         info->fir_base = 0x228;
 783                                 break;
 784                         }
 785                 }
 786         }
 787         info->sir_base = info->fir_base;
 788
 789         /* Read PnP register 1 (PNP1) */
 790         outb(CFG_338_PNP1, cfg_base);
 791         reg = inb(cfg_base+1);
 792
 793         info->irq = reg >> 4;
 794
 795         /* Read PnP register 3 (PNP3) */
 796         outb(CFG_338_PNP3, cfg_base);
 797         reg = inb(cfg_base+1);
 798
 799         info->dma = (reg & 0x07) - 1;
 800
 801         /* Read power and test register (PTR) */
 802         outb(CFG_338_PTR, cfg_base);
 803         reg = inb(cfg_base+1);
 804
 805         info->suspended = reg & 0x01;
 806
 807         return 0;
 808 }
 809
 810
 811 /*
 812  * Function nsc_ircc_init_39x (chip, info)
 813  *
 814  *    Now that we know it's a '39x (see probe below), we need to
 815  *    configure it so we can use it.
 816  *
 817  * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
 818  * the configuration of the different functionality (serial, parallel,
 819  * floppy...) are each in a different bank (Logical Device Number).
 820  * The base address, irq and dma configuration registers are common
 821  * to all functionalities (index 0x30 to 0x7F).
 822  * There is only one configuration register specific to the
 823  * serial port, CFG_39X_SPC.
 824  * JeanII
 825  *
 826  * Note : this code was written by Jan Frey <janfrey@web.de>
 827  */
 828 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
 829 {
 830         int cfg_base = info->cfg_base;
 831         int enabled;
 832
 833         /* User is sure about his config... accept it. */
 834         IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
 835                    "io=0x%04x, irq=%d, dma=%d\n",
 836                    __func__, info->fir_base, info->irq, info->dma);
 837
 838         /* Access bank for SP2 */
 839         outb(CFG_39X_LDN, cfg_base);
 840         outb(0x02, cfg_base+1);
 841
 842         /* Configure SP2 */
 843
 844         /* We want to enable the device if not enabled */
 845         outb(CFG_39X_ACT, cfg_base);
 846         enabled = inb(cfg_base+1) & 0x01;
 847
 848         if (!enabled) {
 849                 /* Enable the device */
 850                 outb(CFG_39X_SIOCF1, cfg_base);
 851                 outb(0x01, cfg_base+1);
 852                 /* May want to update info->enabled. Jean II */
 853         }
 854
 855         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 856          * power mode (wake up from sleep mode) (bit 1) */
 857         outb(CFG_39X_SPC, cfg_base);
 858         outb(0x82, cfg_base+1);
 859
 860         return 0;
 861 }
 862
 863 /*
 864  * Function nsc_ircc_probe_39x (chip, info)
 865  *
 866  *    Test if we really have a '39x chip at the given address
 867  *
 868  * Note : this code was written by Jan Frey <janfrey@web.de>
 869  */
 870 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
 871 {
 872         int cfg_base = info->cfg_base;
 873         int reg1, reg2, irq, irqt, dma1, dma2;
 874         int enabled, susp;
 875
 876         IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
 877                    __func__, cfg_base);
 878
 879         /* This function should be executed with irq off to avoid
 880          * another driver messing with the Super I/O bank - Jean II */
 881
 882         /* Access bank for SP2 */
 883         outb(CFG_39X_LDN, cfg_base);
 884         outb(0x02, cfg_base+1);
 885
 886         /* Read infos about SP2 ; store in info struct */
 887         outb(CFG_39X_BASEH, cfg_base);
 888         reg1 = inb(cfg_base+1);
 889         outb(CFG_39X_BASEL, cfg_base);
 890         reg2 = inb(cfg_base+1);
 891         info->fir_base = (reg1 << 8) | reg2;
 892
 893         outb(CFG_39X_IRQNUM, cfg_base);
 894         irq = inb(cfg_base+1);
 895         outb(CFG_39X_IRQSEL, cfg_base);
 896         irqt = inb(cfg_base+1);
 897         info->irq = irq;
 898
 899         outb(CFG_39X_DMA0, cfg_base);
 900         dma1 = inb(cfg_base+1);
 901         outb(CFG_39X_DMA1, cfg_base);
 902         dma2 = inb(cfg_base+1);
 903         info->dma = dma1 -1;
 904
 905         outb(CFG_39X_ACT, cfg_base);
 906         info->enabled = enabled = inb(cfg_base+1) & 0x01;
 907
 908         outb(CFG_39X_SPC, cfg_base);
 909         susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
 910
 911         IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
 912
 913         /* Configure SP2 */
 914
 915         /* We want to enable the device if not enabled */
 916         outb(CFG_39X_ACT, cfg_base);
 917         enabled = inb(cfg_base+1) & 0x01;
 918
 919         if (!enabled) {
 920                 /* Enable the device */
 921                 outb(CFG_39X_SIOCF1, cfg_base);
 922                 outb(0x01, cfg_base+1);
 923                 /* May want to update info->enabled. Jean II */
 924         }
 925
 926         /* Enable UART bank switching (bit 7) ; Sets the chip to normal
 927          * power mode (wake up from sleep mode) (bit 1) */
 928         outb(CFG_39X_SPC, cfg_base);
 929         outb(0x82, cfg_base+1);
 930
 931         return 0;
 932 }
 933
 934 #ifdef CONFIG_PNP
 935 /* PNP probing */
 936 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
 937 {
 938         memset(&pnp_info, 0, sizeof(chipio_t));
 939         pnp_info.irq = -1;
 940         pnp_info.dma = -1;
 941         pnp_succeeded = 1;
 942
 943         if (id->driver_data & NSC_FORCE_DONGLE_TYPE9)
 944                 dongle_id = 0x9;
 945
 946         /* There doesn't seem to be any way of getting the cfg_base.
 947          * On my box, cfg_base is in the PnP descriptor of the
 948          * motherboard. Oh well... Jean II */
 949
 950         if (pnp_port_valid(dev, 0) &&
 951                 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
 952                 pnp_info.fir_base = pnp_port_start(dev, 0);
 953
 954         if (pnp_irq_valid(dev, 0) &&
 955                 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
 956                 pnp_info.irq = pnp_irq(dev, 0);
 957
 958         if (pnp_dma_valid(dev, 0) &&
 959                 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
 960                 pnp_info.dma = pnp_dma(dev, 0);
 961
 962         IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
 963                    __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
 964
 965         if((pnp_info.fir_base == 0) ||
 966            (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
 967                 /* Returning an error will disable the device. Yuck ! */
 968                 //return -EINVAL;
 969                 pnp_succeeded = 0;
 970         }
 971
 972         return 0;
 973 }
 974 #endif
 975
 976 /*
 977  * Function nsc_ircc_setup (info)
 978  *
 979  *    Returns non-negative on success.
 980  *
 981  */
 982 static int nsc_ircc_setup(chipio_t *info)
 983 {
 984         int version;
 985         int iobase = info->fir_base;
 986
 987         /* Read the Module ID */
 988         switch_bank(iobase, BANK3);
 989         version = inb(iobase+MID);
 990
 991         IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
 992                    __func__, driver_name, version);
 993
 994         /* Should be 0x2? */
 995         if (0x20 != (version & 0xf0)) {
 996                 IRDA_ERROR("%s, Wrong chip version %02x\n",
 997                            driver_name, version);
 998                 return -1;
 999         }
1000
1001         /* Switch to advanced mode */
1002         switch_bank(iobase, BANK2);
1003         outb(ECR1_EXT_SL, iobase+ECR1);
1004         switch_bank(iobase, BANK0);
1005
1006         /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
1007         switch_bank(iobase, BANK0);
1008         outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1009
1010         outb(0x03, iobase+LCR);         /* 8 bit word length */
1011         outb(MCR_SIR, iobase+MCR);      /* Start at SIR-mode, also clears LSR*/
1012
1013         /* Set FIFO size to 32 */
1014         switch_bank(iobase, BANK2);
1015         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1016
1017         /* IRCR2: FEND_MD is not set */
1018         switch_bank(iobase, BANK5);
1019         outb(0x02, iobase+4);
1020
1021         /* Make sure that some defaults are OK */
1022         switch_bank(iobase, BANK6);
1023         outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1024         outb(0x0a, iobase+1); /* Set MIR pulse width */
1025         outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1026         outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1027
1028         /* Enable receive interrupts */
1029         switch_bank(iobase, BANK0);
1030         outb(IER_RXHDL_IE, iobase+IER);
1031
1032         return 0;
1033 }
1034
1035 /*
1036  * Function nsc_ircc_read_dongle_id (void)
1037  *
1038  * Try to read dongle indentification. This procedure needs to be executed
1039  * once after power-on/reset. It also needs to be used whenever you suspect
1040  * that the user may have plugged/unplugged the IrDA Dongle.
1041  */
1042 static int nsc_ircc_read_dongle_id (int iobase)
1043 {
1044         int dongle_id;
1045         __u8 bank;
1046
1047         bank = inb(iobase+BSR);
1048
1049         /* Select Bank 7 */
1050         switch_bank(iobase, BANK7);
1051
1052         /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1053         outb(0x00, iobase+7);
1054
1055         /* ID0, 1, and 2 are pulled up/down very slowly */
1056         udelay(50);
1057
1058         /* IRCFG1: read the ID bits */
1059         dongle_id = inb(iobase+4) & 0x0f;
1060
1061 #ifdef BROKEN_DONGLE_ID
1062         if (dongle_id == 0x0a)
1063                 dongle_id = 0x09;
1064 #endif
1065         /* Go back to  bank 0 before returning */
1066         switch_bank(iobase, BANK0);
1067
1068         outb(bank, iobase+BSR);
1069
1070         return dongle_id;
1071 }
1072
1073 /*
1074  * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1075  *
1076  *     This function initializes the dongle for the transceiver that is
1077  *     used. This procedure needs to be executed once after
1078  *     power-on/reset. It also needs to be used whenever you suspect that
1079  *     the dongle is changed.
1080  */
1081 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1082 {
1083         int bank;
1084
1085         /* Save current bank */
1086         bank = inb(iobase+BSR);
1087
1088         /* Select Bank 7 */
1089         switch_bank(iobase, BANK7);
1090
1091         /* IRCFG4: set according to dongle_id */
1092         switch (dongle_id) {
1093         case 0x00: /* same as */
1094         case 0x01: /* Differential serial interface */
1095                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1096                            __func__, dongle_types[dongle_id]);
1097                 break;
1098         case 0x02: /* same as */
1099         case 0x03: /* Reserved */
1100                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1101                            __func__, dongle_types[dongle_id]);
1102                 break;
1103         case 0x04: /* Sharp RY5HD01 */
1104                 break;
1105         case 0x05: /* Reserved, but this is what the Thinkpad reports */
1106                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1107                            __func__, dongle_types[dongle_id]);
1108                 break;
1109         case 0x06: /* Single-ended serial interface */
1110                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1111                            __func__, dongle_types[dongle_id]);
1112                 break;
1113         case 0x07: /* Consumer-IR only */
1114                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1115                            __func__, dongle_types[dongle_id]);
1116                 break;
1117         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1118                 IRDA_DEBUG(0, "%s(), %s\n",
1119                            __func__, dongle_types[dongle_id]);
1120                 break;
1121         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1122                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1123                 break;
1124         case 0x0A: /* same as */
1125         case 0x0B: /* Reserved */
1126                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1127                            __func__, dongle_types[dongle_id]);
1128                 break;
1129         case 0x0C: /* same as */
1130         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1131                 /*
1132                  * Set irsl0 as input, irsl[1-2] as output, and separate
1133                  * inputs are used for SIR and MIR/FIR
1134                  */
1135                 outb(0x48, iobase+7);
1136                 break;
1137         case 0x0E: /* Supports SIR Mode only */
1138                 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1139                 break;
1140         case 0x0F: /* No dongle connected */
1141                 IRDA_DEBUG(0, "%s(), %s\n",
1142                            __func__, dongle_types[dongle_id]);
1143
1144                 switch_bank(iobase, BANK0);
1145                 outb(0x62, iobase+MCR);
1146                 break;
1147         default:
1148                 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1149                            __func__, dongle_id);
1150         }
1151
1152         /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1153         outb(0x00, iobase+4);
1154
1155         /* Restore bank register */
1156         outb(bank, iobase+BSR);
1157
1158 } /* set_up_dongle_interface */
1159
1160 /*
1161  * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1162  *
1163  *    Change speed of the attach dongle
1164  *
1165  */
1166 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1167 {
1168         __u8 bank;
1169
1170         /* Save current bank */
1171         bank = inb(iobase+BSR);
1172
1173         /* Select Bank 7 */
1174         switch_bank(iobase, BANK7);
1175
1176         /* IRCFG1: set according to dongle_id */
1177         switch (dongle_id) {
1178         case 0x00: /* same as */
1179         case 0x01: /* Differential serial interface */
1180                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1181                            __func__, dongle_types[dongle_id]);
1182                 break;
1183         case 0x02: /* same as */
1184         case 0x03: /* Reserved */
1185                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1186                            __func__, dongle_types[dongle_id]);
1187                 break;
1188         case 0x04: /* Sharp RY5HD01 */
1189                 break;
1190         case 0x05: /* Reserved */
1191                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1192                            __func__, dongle_types[dongle_id]);
1193                 break;
1194         case 0x06: /* Single-ended serial interface */
1195                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1196                            __func__, dongle_types[dongle_id]);
1197                 break;
1198         case 0x07: /* Consumer-IR only */
1199                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1200                            __func__, dongle_types[dongle_id]);
1201                 break;
1202         case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1203                 IRDA_DEBUG(0, "%s(), %s\n",
1204                            __func__, dongle_types[dongle_id]);
1205                 outb(0x00, iobase+4);
1206                 if (speed > 115200)
1207                         outb(0x01, iobase+4);
1208                 break;
1209         case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1210                 outb(0x01, iobase+4);
1211
1212                 if (speed == 4000000) {
1213                         /* There was a cli() there, but we now are already
1214                          * under spin_lock_irqsave() - JeanII */
1215                         outb(0x81, iobase+4);
1216                         outb(0x80, iobase+4);
1217                 } else
1218                         outb(0x00, iobase+4);
1219                 break;
1220         case 0x0A: /* same as */
1221         case 0x0B: /* Reserved */
1222                 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1223                            __func__, dongle_types[dongle_id]);
1224                 break;
1225         case 0x0C: /* same as */
1226         case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1227                 break;
1228         case 0x0E: /* Supports SIR Mode only */
1229                 break;
1230         case 0x0F: /* No dongle connected */
1231                 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1232                            __func__, dongle_types[dongle_id]);
1233
1234                 switch_bank(iobase, BANK0);
1235                 outb(0x62, iobase+MCR);
1236                 break;
1237         default:
1238                 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__);
1239         }
1240         /* Restore bank register */
1241         outb(bank, iobase+BSR);
1242 }
1243
1244 /*
1245  * Function nsc_ircc_change_speed (self, baud)
1246  *
1247  *    Change the speed of the device
1248  *
1249  * This function *must* be called with irq off and spin-lock.
1250  */
1251 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1252 {
1253         struct net_device *dev = self->netdev;
1254         __u8 mcr = MCR_SIR;
1255         int iobase;
1256         __u8 bank;
1257         __u8 ier;                  /* Interrupt enable register */
1258
1259         IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed);
1260
1261         IRDA_ASSERT(self != NULL, return 0;);
1262
1263         iobase = self->io.fir_base;
1264
1265         /* Update accounting for new speed */
1266         self->io.speed = speed;
1267
1268         /* Save current bank */
1269         bank = inb(iobase+BSR);
1270
1271         /* Disable interrupts */
1272         switch_bank(iobase, BANK0);
1273         outb(0, iobase+IER);
1274
1275         /* Select Bank 2 */
1276         switch_bank(iobase, BANK2);
1277
1278         outb(0x00, iobase+BGDH);
1279         switch (speed) {
1280         case 9600:   outb(0x0c, iobase+BGDL); break;
1281         case 19200:  outb(0x06, iobase+BGDL); break;
1282         case 38400:  outb(0x03, iobase+BGDL); break;
1283         case 57600:  outb(0x02, iobase+BGDL); break;
1284         case 115200: outb(0x01, iobase+BGDL); break;
1285         case 576000:
1286                 switch_bank(iobase, BANK5);
1287
1288                 /* IRCR2: MDRS is set */
1289                 outb(inb(iobase+4) | 0x04, iobase+4);
1290
1291                 mcr = MCR_MIR;
1292                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__);
1293                 break;
1294         case 1152000:
1295                 mcr = MCR_MIR;
1296                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__);
1297                 break;
1298         case 4000000:
1299                 mcr = MCR_FIR;
1300                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__);
1301                 break;
1302         default:
1303                 mcr = MCR_FIR;
1304                 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1305                            __func__, speed);
1306                 break;
1307         }
1308
1309         /* Set appropriate speed mode */
1310         switch_bank(iobase, BANK0);
1311         outb(mcr | MCR_TX_DFR, iobase+MCR);
1312
1313         /* Give some hits to the transceiver */
1314         nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1315
1316         /* Set FIFO threshold to TX17, RX16 */
1317         switch_bank(iobase, BANK0);
1318         outb(0x00, iobase+FCR);
1319         outb(FCR_FIFO_EN, iobase+FCR);
1320         outb(FCR_RXTH|     /* Set Rx FIFO threshold */
1321              FCR_TXTH|     /* Set Tx FIFO threshold */
1322              FCR_TXSR|     /* Reset Tx FIFO */
1323              FCR_RXSR|     /* Reset Rx FIFO */
1324              FCR_FIFO_EN,  /* Enable FIFOs */
1325              iobase+FCR);
1326
1327         /* Set FIFO size to 32 */
1328         switch_bank(iobase, BANK2);
1329         outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1330
1331         /* Enable some interrupts so we can receive frames */
1332         switch_bank(iobase, BANK0);
1333         if (speed > 115200) {
1334                 /* Install FIR xmit handler */
1335                 dev->netdev_ops = &nsc_ircc_fir_ops;
1336                 ier = IER_SFIF_IE;
1337                 nsc_ircc_dma_receive(self);
1338         } else {
1339                 /* Install SIR xmit handler */
1340                 dev->netdev_ops = &nsc_ircc_sir_ops;
1341                 ier = IER_RXHDL_IE;
1342         }
1343         /* Set our current interrupt mask */
1344         outb(ier, iobase+IER);
1345
1346         /* Restore BSR */
1347         outb(bank, iobase+BSR);
1348
1349         /* Make sure interrupt handlers keep the proper interrupt mask */
1350         return ier;
1351 }
1352
1353 /*
1354  * Function nsc_ircc_hard_xmit (skb, dev)
1355  *
1356  *    Transmit the frame!
1357  *
1358  */
1359 static netdev_tx_t nsc_ircc_hard_xmit_sir(struct sk_buff *skb,
1360                                                 struct net_device *dev)
1361 {
1362         struct nsc_ircc_cb *self;
1363         unsigned long flags;
1364         int iobase;
1365         __s32 speed;
1366         __u8 bank;
1367
1368         self = netdev_priv(dev);
1369
1370         IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
1371
1372         iobase = self->io.fir_base;
1373
1374         netif_stop_queue(dev);
1375
1376         /* Make sure tests *& speed change are atomic */
1377         spin_lock_irqsave(&self->lock, flags);
1378
1379         /* Check if we need to change the speed */
1380         speed = irda_get_next_speed(skb);
1381         if ((speed != self->io.speed) && (speed != -1)) {
1382                 /* Check for empty frame. */
1383                 if (!skb->len) {
1384                         /* If we just sent a frame, we get called before
1385                          * the last bytes get out (because of the SIR FIFO).
1386                          * If this is the case, let interrupt handler change
1387                          * the speed itself... Jean II */
1388                         if (self->io.direction == IO_RECV) {
1389                                 nsc_ircc_change_speed(self, speed);
1390                                 /* TODO : For SIR->SIR, the next packet
1391                                  * may get corrupted - Jean II */
1392                                 netif_wake_queue(dev);
1393                         } else {
1394                                 self->new_speed = speed;
1395                                 /* Queue will be restarted after speed change
1396                                  * to make sure packets gets through the
1397                                  * proper xmit handler - Jean II */
1398                         }
1399                         dev->trans_start = jiffies;
1400                         spin_unlock_irqrestore(&self->lock, flags);
1401                         dev_kfree_skb(skb);
1402                         return NETDEV_TX_OK;
1403                 } else
1404                         self->new_speed = speed;
1405         }
1406
1407         /* Save current bank */
1408         bank = inb(iobase+BSR);
1409
1410         self->tx_buff.data = self->tx_buff.head;
1411
1412         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1413                                            self->tx_buff.truesize);
1414
1415         dev->stats.tx_bytes += self->tx_buff.len;
1416
1417         /* Add interrupt on tx low level (will fire immediately) */
1418         switch_bank(iobase, BANK0);
1419         outb(IER_TXLDL_IE, iobase+IER);
1420
1421         /* Restore bank register */
1422         outb(bank, iobase+BSR);
1423
1424         dev->trans_start = jiffies;
1425         spin_unlock_irqrestore(&self->lock, flags);
1426
1427         dev_kfree_skb(skb);
1428
1429         return NETDEV_TX_OK;
1430 }
1431
1432 static netdev_tx_t nsc_ircc_hard_xmit_fir(struct sk_buff *skb,
1433                                                 struct net_device *dev)
1434 {
1435         struct nsc_ircc_cb *self;
1436         unsigned long flags;
1437         int iobase;
1438         __s32 speed;
1439         __u8 bank;
1440         int mtt, diff;
1441
1442         self = netdev_priv(dev);
1443         iobase = self->io.fir_base;
1444
1445         netif_stop_queue(dev);
1446
1447         /* Make sure tests *& speed change are atomic */
1448         spin_lock_irqsave(&self->lock, flags);
1449
1450         /* Check if we need to change the speed */
1451         speed = irda_get_next_speed(skb);
1452         if ((speed != self->io.speed) && (speed != -1)) {
1453                 /* Check for empty frame. */
1454                 if (!skb->len) {
1455                         /* If we are currently transmitting, defer to
1456                          * interrupt handler. - Jean II */
1457                         if(self->tx_fifo.len == 0) {
1458                                 nsc_ircc_change_speed(self, speed);
1459                                 netif_wake_queue(dev);
1460                         } else {
1461                                 self->new_speed = speed;
1462                                 /* Keep queue stopped :
1463                                  * the speed change operation may change the
1464                                  * xmit handler, and we want to make sure
1465                                  * the next packet get through the proper
1466                                  * Tx path, so block the Tx queue until
1467                                  * the speed change has been done.
1468                                  * Jean II */
1469                         }
1470                         dev->trans_start = jiffies;
1471                         spin_unlock_irqrestore(&self->lock, flags);
1472                         dev_kfree_skb(skb);
1473                         return NETDEV_TX_OK;
1474                 } else {
1475                         /* Change speed after current frame */
1476                         self->new_speed = speed;
1477                 }
1478         }
1479
1480         /* Save current bank */
1481         bank = inb(iobase+BSR);
1482
1483         /* Register and copy this frame to DMA memory */
1484         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1485         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1486         self->tx_fifo.tail += skb->len;
1487
1488         dev->stats.tx_bytes += skb->len;
1489
1490         skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1491                       skb->len);
1492         self->tx_fifo.len++;
1493         self->tx_fifo.free++;
1494
1495         /* Start transmit only if there is currently no transmit going on */
1496         if (self->tx_fifo.len == 1) {
1497                 /* Check if we must wait the min turn time or not */
1498                 mtt = irda_get_mtt(skb);
1499                 if (mtt) {
1500                         /* Check how much time we have used already */
1501                         do_gettimeofday(&self->now);
1502                         diff = self->now.tv_usec - self->stamp.tv_usec;
1503                         if (diff < 0)
1504                                 diff += 1000000;
1505
1506                         /* Check if the mtt is larger than the time we have
1507                          * already used by all the protocol processing
1508                          */
1509                         if (mtt > diff) {
1510                                 mtt -= diff;
1511
1512                                 /*
1513                                  * Use timer if delay larger than 125 us, and
1514                                  * use udelay for smaller values which should
1515                                  * be acceptable
1516                                  */
1517                                 if (mtt > 125) {
1518                                         /* Adjust for timer resolution */
1519                                         mtt = mtt / 125;
1520
1521                                         /* Setup timer */
1522                                         switch_bank(iobase, BANK4);
1523                                         outb(mtt & 0xff, iobase+TMRL);
1524                                         outb((mtt >> 8) & 0x0f, iobase+TMRH);
1525
1526                                         /* Start timer */
1527                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1528                                         self->io.direction = IO_XMIT;
1529
1530                                         /* Enable timer interrupt */
1531                                         switch_bank(iobase, BANK0);
1532                                         outb(IER_TMR_IE, iobase+IER);
1533
1534                                         /* Timer will take care of the rest */
1535                                         goto out;
1536                                 } else
1537                                         udelay(mtt);
1538                         }
1539                 }
1540                 /* Enable DMA interrupt */
1541                 switch_bank(iobase, BANK0);
1542                 outb(IER_DMA_IE, iobase+IER);
1543
1544                 /* Transmit frame */
1545                 nsc_ircc_dma_xmit(self, iobase);
1546         }
1547  out:
1548         /* Not busy transmitting anymore if window is not full,
1549          * and if we don't need to change speed */
1550         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1551                 netif_wake_queue(self->netdev);
1552
1553         /* Restore bank register */
1554         outb(bank, iobase+BSR);
1555
1556         dev->trans_start = jiffies;
1557         spin_unlock_irqrestore(&self->lock, flags);
1558         dev_kfree_skb(skb);
1559
1560         return NETDEV_TX_OK;
1561 }
1562
1563 /*
1564  * Function nsc_ircc_dma_xmit (self, iobase)
1565  *
1566  *    Transmit data using DMA
1567  *
1568  */
1569 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1570 {
1571         int bsr;
1572
1573         /* Save current bank */
1574         bsr = inb(iobase+BSR);
1575
1576         /* Disable DMA */
1577         switch_bank(iobase, BANK0);
1578         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1579
1580         self->io.direction = IO_XMIT;
1581
1582         /* Choose transmit DMA channel  */
1583         switch_bank(iobase, BANK2);
1584         outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1585
1586         irda_setup_dma(self->io.dma,
1587                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1588                         self->tx_buff.head) + self->tx_buff_dma,
1589                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1590                        DMA_TX_MODE);
1591
1592         /* Enable DMA and SIR interaction pulse */
1593         switch_bank(iobase, BANK0);
1594         outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1595
1596         /* Restore bank register */
1597         outb(bsr, iobase+BSR);
1598 }
1599
1600 /*
1601  * Function nsc_ircc_pio_xmit (self, iobase)
1602  *
1603  *    Transmit data using PIO. Returns the number of bytes that actually
1604  *    got transferred
1605  *
1606  */
1607 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1608 {
1609         int actual = 0;
1610         __u8 bank;
1611
1612         IRDA_DEBUG(4, "%s()\n", __func__);
1613
1614         /* Save current bank */
1615         bank = inb(iobase+BSR);
1616
1617         switch_bank(iobase, BANK0);
1618         if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1619                 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1620                            __func__);
1621
1622                 /* FIFO may still be filled to the Tx interrupt threshold */
1623                 fifo_size -= 17;
1624         }
1625
1626         /* Fill FIFO with current frame */
1627         while ((fifo_size-- > 0) && (actual < len)) {
1628                 /* Transmit next byte */
1629                 outb(buf[actual++], iobase+TXD);
1630         }
1631
1632         IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1633                    __func__, fifo_size, actual, len);
1634
1635         /* Restore bank */
1636         outb(bank, iobase+BSR);
1637
1638         return actual;
1639 }
1640
1641 /*
1642  * Function nsc_ircc_dma_xmit_complete (self)
1643  *
1644  *    The transfer of a frame in finished. This function will only be called
1645  *    by the interrupt handler
1646  *
1647  */
1648 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1649 {
1650         int iobase;
1651         __u8 bank;
1652         int ret = TRUE;
1653
1654         IRDA_DEBUG(2, "%s()\n", __func__);
1655
1656         iobase = self->io.fir_base;
1657
1658         /* Save current bank */
1659         bank = inb(iobase+BSR);
1660
1661         /* Disable DMA */
1662         switch_bank(iobase, BANK0);
1663         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1664
1665         /* Check for underrun! */
1666         if (inb(iobase+ASCR) & ASCR_TXUR) {
1667                 self->netdev->stats.tx_errors++;
1668                 self->netdev->stats.tx_fifo_errors++;
1669
1670                 /* Clear bit, by writing 1 into it */
1671                 outb(ASCR_TXUR, iobase+ASCR);
1672         } else {
1673                 self->netdev->stats.tx_packets++;
1674         }
1675
1676         /* Finished with this frame, so prepare for next */
1677         self->tx_fifo.ptr++;
1678         self->tx_fifo.len--;
1679
1680         /* Any frames to be sent back-to-back? */
1681         if (self->tx_fifo.len) {
1682                 nsc_ircc_dma_xmit(self, iobase);
1683
1684                 /* Not finished yet! */
1685                 ret = FALSE;
1686         } else {
1687                 /* Reset Tx FIFO info */
1688                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1689                 self->tx_fifo.tail = self->tx_buff.head;
1690         }
1691
1692         /* Make sure we have room for more frames and
1693          * that we don't need to change speed */
1694         if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1695                 /* Not busy transmitting anymore */
1696                 /* Tell the network layer, that we can accept more frames */
1697                 netif_wake_queue(self->netdev);
1698         }
1699
1700         /* Restore bank */
1701         outb(bank, iobase+BSR);
1702
1703         return ret;
1704 }
1705
1706 /*
1707  * Function nsc_ircc_dma_receive (self)
1708  *
1709  *    Get ready for receiving a frame. The device will initiate a DMA
1710  *    if it starts to receive a frame.
1711  *
1712  */
1713 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1714 {
1715         int iobase;
1716         __u8 bsr;
1717
1718         iobase = self->io.fir_base;
1719
1720         /* Reset Tx FIFO info */
1721         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1722         self->tx_fifo.tail = self->tx_buff.head;
1723
1724         /* Save current bank */
1725         bsr = inb(iobase+BSR);
1726
1727         /* Disable DMA */
1728         switch_bank(iobase, BANK0);
1729         outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1730
1731         /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1732         switch_bank(iobase, BANK2);
1733         outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1734
1735         self->io.direction = IO_RECV;
1736         self->rx_buff.data = self->rx_buff.head;
1737
1738         /* Reset Rx FIFO. This will also flush the ST_FIFO */
1739         switch_bank(iobase, BANK0);
1740         outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1741
1742         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1743         self->st_fifo.tail = self->st_fifo.head = 0;
1744
1745         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1746                        DMA_RX_MODE);
1747
1748         /* Enable DMA */
1749         switch_bank(iobase, BANK0);
1750         outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1751
1752         /* Restore bank register */
1753         outb(bsr, iobase+BSR);
1754
1755         return 0;
1756 }
1757
1758 /*
1759  * Function nsc_ircc_dma_receive_complete (self)
1760  *
1761  *    Finished with receiving frames
1762  *
1763  *
1764  */
1765 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1766 {
1767         struct st_fifo *st_fifo;
1768         struct sk_buff *skb;
1769         __u8 status;
1770         __u8 bank;
1771         int len;
1772
1773         st_fifo = &self->st_fifo;
1774
1775         /* Save current bank */
1776         bank = inb(iobase+BSR);
1777
1778         /* Read all entries in status FIFO */
1779         switch_bank(iobase, BANK5);
1780         while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1781                 /* We must empty the status FIFO no matter what */
1782                 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1783
1784                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1785                         IRDA_DEBUG(0, "%s(), window is full!\n", __func__);
1786                         continue;
1787                 }
1788
1789                 st_fifo->entries[st_fifo->tail].status = status;
1790                 st_fifo->entries[st_fifo->tail].len = len;
1791                 st_fifo->pending_bytes += len;
1792                 st_fifo->tail++;
1793                 st_fifo->len++;
1794         }
1795         /* Try to process all entries in status FIFO */
1796         while (st_fifo->len > 0) {
1797                 /* Get first entry */
1798                 status = st_fifo->entries[st_fifo->head].status;
1799                 len    = st_fifo->entries[st_fifo->head].len;
1800                 st_fifo->pending_bytes -= len;
1801                 st_fifo->head++;
1802                 st_fifo->len--;
1803
1804                 /* Check for errors */
1805                 if (status & FRM_ST_ERR_MSK) {
1806                         if (status & FRM_ST_LOST_FR) {
1807                                 /* Add number of lost frames to stats */
1808                                 self->netdev->stats.rx_errors += len;
1809                         } else {
1810                                 /* Skip frame */
1811                                 self->netdev->stats.rx_errors++;
1812
1813                                 self->rx_buff.data += len;
1814
1815                                 if (status & FRM_ST_MAX_LEN)
1816                                         self->netdev->stats.rx_length_errors++;
1817
1818                                 if (status & FRM_ST_PHY_ERR)
1819                                         self->netdev->stats.rx_frame_errors++;
1820
1821                                 if (status & FRM_ST_BAD_CRC)
1822                                         self->netdev->stats.rx_crc_errors++;
1823                         }
1824                         /* The errors below can be reported in both cases */
1825                         if (status & FRM_ST_OVR1)
1826                                 self->netdev->stats.rx_fifo_errors++;
1827
1828                         if (status & FRM_ST_OVR2)
1829                                 self->netdev->stats.rx_fifo_errors++;
1830                 } else {
1831                         /*
1832                          * First we must make sure that the frame we
1833                          * want to deliver is all in main memory. If we
1834                          * cannot tell, then we check if the Rx FIFO is
1835                          * empty. If not then we will have to take a nap
1836                          * and try again later.
1837                          */
1838                         if (st_fifo->pending_bytes < self->io.fifo_size) {
1839                                 switch_bank(iobase, BANK0);
1840                                 if (inb(iobase+LSR) & LSR_RXDA) {
1841                                         /* Put this entry back in fifo */
1842                                         st_fifo->head--;
1843                                         st_fifo->len++;
1844                                         st_fifo->pending_bytes += len;
1845                                         st_fifo->entries[st_fifo->head].status = status;
1846                                         st_fifo->entries[st_fifo->head].len = len;
1847                                         /*
1848                                          * DMA not finished yet, so try again
1849                                          * later, set timer value, resolution
1850                                          * 125 us
1851                                          */
1852                                         switch_bank(iobase, BANK4);
1853                                         outb(0x02, iobase+TMRL); /* x 125 us */
1854                                         outb(0x00, iobase+TMRH);
1855
1856                                         /* Start timer */
1857                                         outb(IRCR1_TMR_EN, iobase+IRCR1);
1858
1859                                         /* Restore bank register */
1860                                         outb(bank, iobase+BSR);
1861
1862                                         return FALSE; /* I'll be back! */
1863                                 }
1864                         }
1865
1866                         /*
1867                          * Remember the time we received this frame, so we can
1868                          * reduce the min turn time a bit since we will know
1869                          * how much time we have used for protocol processing
1870                          */
1871                         do_gettimeofday(&self->stamp);
1872
1873                         skb = dev_alloc_skb(len+1);
1874                         if (skb == NULL)  {
1875                                 IRDA_WARNING("%s(), memory squeeze, "
1876                                              "dropping frame.\n",
1877                                              __func__);
1878                                 self->netdev->stats.rx_dropped++;
1879
1880                                 /* Restore bank register */
1881                                 outb(bank, iobase+BSR);
1882
1883                                 return FALSE;
1884                         }
1885
1886                         /* Make sure IP header gets aligned */
1887                         skb_reserve(skb, 1);
1888
1889                         /* Copy frame without CRC */
1890                         if (self->io.speed < 4000000) {
1891                                 skb_put(skb, len-2);
1892                                 skb_copy_to_linear_data(skb,
1893                                                         self->rx_buff.data,
1894                                                         len - 2);
1895                         } else {
1896                                 skb_put(skb, len-4);
1897                                 skb_copy_to_linear_data(skb,
1898                                                         self->rx_buff.data,
1899                                                         len - 4);
1900                         }
1901
1902                         /* Move to next frame */
1903                         self->rx_buff.data += len;
1904                         self->netdev->stats.rx_bytes += len;
1905                         self->netdev->stats.rx_packets++;
1906
1907                         skb->dev = self->netdev;
1908                         skb_reset_mac_header(skb);
1909                         skb->protocol = htons(ETH_P_IRDA);
1910                         netif_rx(skb);
1911                 }
1912         }
1913         /* Restore bank register */
1914         outb(bank, iobase+BSR);
1915
1916         return TRUE;
1917 }
1918
1919 /*
1920  * Function nsc_ircc_pio_receive (self)
1921  *
1922  *    Receive all data in receiver FIFO
1923  *
1924  */
1925 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1926 {
1927         __u8 byte;
1928         int iobase;
1929
1930         iobase = self->io.fir_base;
1931
1932         /*  Receive all characters in Rx FIFO */
1933         do {
1934                 byte = inb(iobase+RXD);
1935                 async_unwrap_char(self->netdev, &self->netdev->stats,
1936                                   &self->rx_buff, byte);
1937         } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1938 }
1939
1940 /*
1941  * Function nsc_ircc_sir_interrupt (self, eir)
1942  *
1943  *    Handle SIR interrupt
1944  *
1945  */
1946 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1947 {
1948         int actual;
1949
1950         /* Check if transmit FIFO is low on data */
1951         if (eir & EIR_TXLDL_EV) {
1952                 /* Write data left in transmit buffer */
1953                 actual = nsc_ircc_pio_write(self->io.fir_base,
1954                                            self->tx_buff.data,
1955                                            self->tx_buff.len,
1956                                            self->io.fifo_size);
1957                 self->tx_buff.data += actual;
1958                 self->tx_buff.len  -= actual;
1959
1960                 self->io.direction = IO_XMIT;
1961
1962                 /* Check if finished */
1963                 if (self->tx_buff.len > 0)
1964                         self->ier = IER_TXLDL_IE;
1965                 else {
1966
1967                         self->netdev->stats.tx_packets++;
1968                         netif_wake_queue(self->netdev);
1969                         self->ier = IER_TXEMP_IE;
1970                 }
1971
1972         }
1973         /* Check if transmission has completed */
1974         if (eir & EIR_TXEMP_EV) {
1975                 /* Turn around and get ready to receive some data */
1976                 self->io.direction = IO_RECV;
1977                 self->ier = IER_RXHDL_IE;
1978                 /* Check if we need to change the speed?
1979                  * Need to be after self->io.direction to avoid race with
1980                  * nsc_ircc_hard_xmit_sir() - Jean II */
1981                 if (self->new_speed) {
1982                         IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__);
1983                         self->ier = nsc_ircc_change_speed(self,
1984                                                           self->new_speed);
1985                         self->new_speed = 0;
1986                         netif_wake_queue(self->netdev);
1987
1988                         /* Check if we are going to FIR */
1989                         if (self->io.speed > 115200) {
1990                                 /* No need to do anymore SIR stuff */
1991                                 return;
1992                         }
1993                 }
1994         }
1995
1996         /* Rx FIFO threshold or timeout */
1997         if (eir & EIR_RXHDL_EV) {
1998                 nsc_ircc_pio_receive(self);
1999
2000                 /* Keep receiving */
2001                 self->ier = IER_RXHDL_IE;
2002         }
2003 }
2004
2005 /*
2006  * Function nsc_ircc_fir_interrupt (self, eir)
2007  *
2008  *    Handle MIR/FIR interrupt
2009  *
2010  */
2011 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
2012                                    int eir)
2013 {
2014         __u8 bank;
2015
2016         bank = inb(iobase+BSR);
2017
2018         /* Status FIFO event*/
2019         if (eir & EIR_SFIF_EV) {
2020                 /* Check if DMA has finished */
2021                 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2022                         /* Wait for next status FIFO interrupt */
2023                         self->ier = IER_SFIF_IE;
2024                 } else {
2025                         self->ier = IER_SFIF_IE | IER_TMR_IE;
2026                 }
2027         } else if (eir & EIR_TMR_EV) { /* Timer finished */
2028                 /* Disable timer */
2029                 switch_bank(iobase, BANK4);
2030                 outb(0, iobase+IRCR1);
2031
2032                 /* Clear timer event */
2033                 switch_bank(iobase, BANK0);
2034                 outb(ASCR_CTE, iobase+ASCR);
2035
2036                 /* Check if this is a Tx timer interrupt */
2037                 if (self->io.direction == IO_XMIT) {
2038                         nsc_ircc_dma_xmit(self, iobase);
2039
2040                         /* Interrupt on DMA */
2041                         self->ier = IER_DMA_IE;
2042                 } else {
2043                         /* Check (again) if DMA has finished */
2044                         if (nsc_ircc_dma_receive_complete(self, iobase)) {
2045                                 self->ier = IER_SFIF_IE;
2046                         } else {
2047                                 self->ier = IER_SFIF_IE | IER_TMR_IE;
2048                         }
2049                 }
2050         } else if (eir & EIR_DMA_EV) {
2051                 /* Finished with all transmissions? */
2052                 if (nsc_ircc_dma_xmit_complete(self)) {
2053                         if(self->new_speed != 0) {
2054                                 /* As we stop the Tx queue, the speed change
2055                                  * need to be done when the Tx fifo is
2056                                  * empty. Ask for a Tx done interrupt */
2057                                 self->ier = IER_TXEMP_IE;
2058                         } else {
2059                                 /* Check if there are more frames to be
2060                                  * transmitted */
2061                                 if (irda_device_txqueue_empty(self->netdev)) {
2062                                         /* Prepare for receive */
2063                                         nsc_ircc_dma_receive(self);
2064                                         self->ier = IER_SFIF_IE;
2065                                 } else
2066                                         IRDA_WARNING("%s(), potential "
2067                                                      "Tx queue lockup !\n",
2068                                                      __func__);
2069                         }
2070                 } else {
2071                         /*  Not finished yet, so interrupt on DMA again */
2072                         self->ier = IER_DMA_IE;
2073                 }
2074         } else if (eir & EIR_TXEMP_EV) {
2075                 /* The Tx FIFO has totally drained out, so now we can change
2076                  * the speed... - Jean II */
2077                 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2078                 self->new_speed = 0;
2079                 netif_wake_queue(self->netdev);
2080                 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2081         }
2082
2083         outb(bank, iobase+BSR);
2084 }
2085
2086 /*
2087  * Function nsc_ircc_interrupt (irq, dev_id, regs)
2088  *
2089  *    An interrupt from the chip has arrived. Time to do some work
2090  *
2091  */
2092 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2093 {
2094         struct net_device *dev = dev_id;
2095         struct nsc_ircc_cb *self;
2096         __u8 bsr, eir;
2097         int iobase;
2098
2099         self = netdev_priv(dev);
2100
2101         spin_lock(&self->lock);
2102
2103         iobase = self->io.fir_base;
2104
2105         bsr = inb(iobase+BSR);  /* Save current bank */
2106
2107         switch_bank(iobase, BANK0);
2108         self->ier = inb(iobase+IER);
2109         eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2110
2111         outb(0, iobase+IER); /* Disable interrupts */
2112
2113         if (eir) {
2114                 /* Dispatch interrupt handler for the current speed */
2115                 if (self->io.speed > 115200)
2116                         nsc_ircc_fir_interrupt(self, iobase, eir);
2117                 else
2118                         nsc_ircc_sir_interrupt(self, eir);
2119         }
2120
2121         outb(self->ier, iobase+IER); /* Restore interrupts */
2122         outb(bsr, iobase+BSR);       /* Restore bank register */
2123
2124         spin_unlock(&self->lock);
2125         return IRQ_RETVAL(eir);
2126 }
2127
2128 /*
2129  * Function nsc_ircc_is_receiving (self)
2130  *
2131  *    Return TRUE is we are currently receiving a frame
2132  *
2133  */
2134 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2135 {
2136         unsigned long flags;
2137         int status = FALSE;
2138         int iobase;
2139         __u8 bank;
2140
2141         IRDA_ASSERT(self != NULL, return FALSE;);
2142
2143         spin_lock_irqsave(&self->lock, flags);
2144
2145         if (self->io.speed > 115200) {
2146                 iobase = self->io.fir_base;
2147
2148                 /* Check if rx FIFO is not empty */
2149                 bank = inb(iobase+BSR);
2150                 switch_bank(iobase, BANK2);
2151                 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2152                         /* We are receiving something */
2153                         status =  TRUE;
2154                 }
2155                 outb(bank, iobase+BSR);
2156         } else
2157                 status = (self->rx_buff.state != OUTSIDE_FRAME);
2158
2159         spin_unlock_irqrestore(&self->lock, flags);
2160
2161         return status;
2162 }
2163
2164 /*
2165  * Function nsc_ircc_net_open (dev)
2166  *
2167  *    Start the device
2168  *
2169  */
2170 static int nsc_ircc_net_open(struct net_device *dev)
2171 {
2172         struct nsc_ircc_cb *self;
2173         int iobase;
2174         char hwname[32];
2175         __u8 bank;
2176
2177         IRDA_DEBUG(4, "%s()\n", __func__);
2178
2179         IRDA_ASSERT(dev != NULL, return -1;);
2180         self = netdev_priv(dev);
2181
2182         IRDA_ASSERT(self != NULL, return 0;);
2183
2184         iobase = self->io.fir_base;
2185
2186         if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2187                 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2188                              driver_name, self->io.irq);
2189                 return -EAGAIN;
2190         }
2191         /*
2192          * Always allocate the DMA channel after the IRQ, and clean up on
2193          * failure.
2194          */
2195         if (request_dma(self->io.dma, dev->name)) {
2196                 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2197                              driver_name, self->io.dma);
2198                 free_irq(self->io.irq, dev);
2199                 return -EAGAIN;
2200         }
2201
2202         /* Save current bank */
2203         bank = inb(iobase+BSR);
2204
2205         /* turn on interrupts */
2206         switch_bank(iobase, BANK0);
2207         outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2208
2209         /* Restore bank register */
2210         outb(bank, iobase+BSR);
2211
2212         /* Ready to play! */
2213         netif_start_queue(dev);
2214
2215         /* Give self a hardware name */
2216         sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2217
2218         /*
2219          * Open new IrLAP layer instance, now that everything should be
2220          * initialized properly
2221          */
2222         self->irlap = irlap_open(dev, &self->qos, hwname);
2223
2224         return 0;
2225 }
2226
2227 /*
2228  * Function nsc_ircc_net_close (dev)
2229  *
2230  *    Stop the device
2231  *
2232  */
2233 static int nsc_ircc_net_close(struct net_device *dev)
2234 {
2235         struct nsc_ircc_cb *self;
2236         int iobase;
2237         __u8 bank;
2238
2239         IRDA_DEBUG(4, "%s()\n", __func__);
2240
2241         IRDA_ASSERT(dev != NULL, return -1;);
2242
2243         self = netdev_priv(dev);
2244         IRDA_ASSERT(self != NULL, return 0;);
2245
2246         /* Stop device */
2247         netif_stop_queue(dev);
2248
2249         /* Stop and remove instance of IrLAP */
2250         if (self->irlap)
2251                 irlap_close(self->irlap);
2252         self->irlap = NULL;
2253
2254         iobase = self->io.fir_base;
2255
2256         disable_dma(self->io.dma);
2257
2258         /* Save current bank */
2259         bank = inb(iobase+BSR);
2260
2261         /* Disable interrupts */
2262         switch_bank(iobase, BANK0);
2263         outb(0, iobase+IER);
2264
2265         free_irq(self->io.irq, dev);
2266         free_dma(self->io.dma);
2267
2268         /* Restore bank register */
2269         outb(bank, iobase+BSR);
2270
2271         return 0;
2272 }
2273
2274 /*
2275  * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2276  *
2277  *    Process IOCTL commands for this device
2278  *
2279  */
2280 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2281 {
2282         struct if_irda_req *irq = (struct if_irda_req *) rq;
2283         struct nsc_ircc_cb *self;
2284         unsigned long flags;
2285         int ret = 0;
2286
2287         IRDA_ASSERT(dev != NULL, return -1;);
2288
2289         self = netdev_priv(dev);
2290
2291         IRDA_ASSERT(self != NULL, return -1;);
2292
2293         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd);
2294
2295         switch (cmd) {
2296         case SIOCSBANDWIDTH: /* Set bandwidth */
2297                 if (!capable(CAP_NET_ADMIN)) {
2298                         ret = -EPERM;
2299                         break;
2300                 }
2301                 spin_lock_irqsave(&self->lock, flags);
2302                 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2303                 spin_unlock_irqrestore(&self->lock, flags);
2304                 break;
2305         case SIOCSMEDIABUSY: /* Set media busy */
2306                 if (!capable(CAP_NET_ADMIN)) {
2307                         ret = -EPERM;
2308                         break;
2309                 }
2310                 irda_device_set_media_busy(self->netdev, TRUE);
2311                 break;
2312         case SIOCGRECEIVING: /* Check if we are receiving right now */
2313                 /* This is already protected */
2314                 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2315                 break;
2316         default:
2317                 ret = -EOPNOTSUPP;
2318         }
2319         return ret;
2320 }
2321
2322 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2323 {
2324         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2325         int bank;
2326         unsigned long flags;
2327         int iobase = self->io.fir_base;
2328
2329         if (self->io.suspended)
2330                 return 0;
2331
2332         IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2333
2334         rtnl_lock();
2335         if (netif_running(self->netdev)) {
2336                 netif_device_detach(self->netdev);
2337                 spin_lock_irqsave(&self->lock, flags);
2338                 /* Save current bank */
2339                 bank = inb(iobase+BSR);
2340
2341                 /* Disable interrupts */
2342                 switch_bank(iobase, BANK0);
2343                 outb(0, iobase+IER);
2344
2345                 /* Restore bank register */
2346                 outb(bank, iobase+BSR);
2347
2348                 spin_unlock_irqrestore(&self->lock, flags);
2349                 free_irq(self->io.irq, self->netdev);
2350                 disable_dma(self->io.dma);
2351         }
2352         self->io.suspended = 1;
2353         rtnl_unlock();
2354
2355         return 0;
2356 }
2357
2358 static int nsc_ircc_resume(struct platform_device *dev)
2359 {
2360         struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2361         unsigned long flags;
2362
2363         if (!self->io.suspended)
2364                 return 0;
2365
2366         IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2367
2368         rtnl_lock();
2369         nsc_ircc_setup(&self->io);
2370         nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2371
2372         if (netif_running(self->netdev)) {
2373                 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2374                                 self->netdev->name, self->netdev)) {
2375                         IRDA_WARNING("%s, unable to allocate irq=%d\n",
2376                                      driver_name, self->io.irq);
2377
2378                         /*
2379                          * Don't fail resume process, just kill this
2380                          * network interface
2381                          */
2382                         unregister_netdevice(self->netdev);
2383                 } else {
2384                         spin_lock_irqsave(&self->lock, flags);
2385                         nsc_ircc_change_speed(self, self->io.speed);
2386                         spin_unlock_irqrestore(&self->lock, flags);
2387                         netif_device_attach(self->netdev);
2388                 }
2389
2390         } else {
2391                 spin_lock_irqsave(&self->lock, flags);
2392                 nsc_ircc_change_speed(self, 9600);
2393                 spin_unlock_irqrestore(&self->lock, flags);
2394         }
2395         self->io.suspended = 0;
2396         rtnl_unlock();
2397
2398         return 0;
2399 }
2400
2401 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2402 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2403 MODULE_LICENSE("GPL");
2404
2405
2406 module_param(qos_mtt_bits, int, 0);
2407 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2408 module_param_array(io, int, NULL, 0);
2409 MODULE_PARM_DESC(io, "Base I/O addresses");
2410 module_param_array(irq, int, NULL, 0);
2411 MODULE_PARM_DESC(irq, "IRQ lines");
2412 module_param_array(dma, int, NULL, 0);
2413 MODULE_PARM_DESC(dma, "DMA channels");
2414 module_param(dongle_id, int, 0);
2415 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2416
2417 module_init(nsc_ircc_init);
2418 module_exit(nsc_ircc_cleanup);
2419