drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint64_t ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, ullong, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 240 static int qla2x00_change_queue_type(struct scsi_device *, int);
 241 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 242 static void qla2x00_free_device(scsi_qla_host_t *);
 243 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 244
 245 struct scsi_host_template qla2xxx_driver_template = {
 246         .module                 = THIS_MODULE,
 247         .name                   = QLA2XXX_DRIVER_NAME,
 248         .queuecommand           = qla2xxx_queuecommand,
 249
 250         .eh_abort_handler       = qla2xxx_eh_abort,
 251         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 252         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 253         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 254         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 255
 256         .slave_configure        = qla2xxx_slave_configure,
 257
 258         .slave_alloc            = qla2xxx_slave_alloc,
 259         .slave_destroy          = qla2xxx_slave_destroy,
 260         .scan_finished          = qla2xxx_scan_finished,
 261         .scan_start             = qla2xxx_scan_start,
 262         .change_queue_depth     = qla2x00_change_queue_depth,
 263         .change_queue_type      = qla2x00_change_queue_type,
 264         .this_id                = -1,
 265         .cmd_per_lun            = 3,
 266         .use_clustering         = ENABLE_CLUSTERING,
 267         .sg_tablesize           = SG_ALL,
 268
 269         .max_sectors            = 0xFFFF,
 270         .shost_attrs            = qla2x00_host_attrs,
 271
 272         .supported_mode         = MODE_INITIATOR,
 273 };
 274
 275 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 276 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 277
 278 /* TODO Convert to inlines
 279  *
 280  * Timer routines
 281  */
 282
 283 __inline__ void
 284 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 285 {
 286         init_timer(&vha->timer);
 287         vha->timer.expires = jiffies + interval * HZ;
 288         vha->timer.data = (unsigned long)vha;
 289         vha->timer.function = (void (*)(unsigned long))func;
 290         add_timer(&vha->timer);
 291         vha->timer_active = 1;
 292 }
 293
 294 static inline void
 295 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 296 {
 297         /* Currently used for 82XX only. */
 298         if (vha->device_flags & DFLG_DEV_FAILED) {
 299                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 300                     "Device in a failed state, returning.\n");
 301                 return;
 302         }
 303
 304         mod_timer(&vha->timer, jiffies + interval * HZ);
 305 }
 306
 307 static __inline__ void
 308 qla2x00_stop_timer(scsi_qla_host_t *vha)
 309 {
 310         del_timer_sync(&vha->timer);
 311         vha->timer_active = 0;
 312 }
 313
 314 static int qla2x00_do_dpc(void *data);
 315
 316 static void qla2x00_rst_aen(scsi_qla_host_t *);
 317
 318 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 319         struct req_que **, struct rsp_que **);
 320 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 321 static void qla2x00_mem_free(struct qla_hw_data *);
 322
 323 /* -------------------------------------------------------------------------- */
 324 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 325                                 struct rsp_que *rsp)
 326 {
 327         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 328         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 329                                 GFP_KERNEL);
 330         if (!ha->req_q_map) {
 331                 ql_log(ql_log_fatal, vha, 0x003b,
 332                     "Unable to allocate memory for request queue ptrs.\n");
 333                 goto fail_req_map;
 334         }
 335
 336         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 337                                 GFP_KERNEL);
 338         if (!ha->rsp_q_map) {
 339                 ql_log(ql_log_fatal, vha, 0x003c,
 340                     "Unable to allocate memory for response queue ptrs.\n");
 341                 goto fail_rsp_map;
 342         }
 343         /*
 344          * Make sure we record at least the request and response queue zero in
 345          * case we need to free them if part of the probe fails.
 346          */
 347         ha->rsp_q_map[0] = rsp;
 348         ha->req_q_map[0] = req;
 349         set_bit(0, ha->rsp_qid_map);
 350         set_bit(0, ha->req_qid_map);
 351         return 1;
 352
 353 fail_rsp_map:
 354         kfree(ha->req_q_map);
 355         ha->req_q_map = NULL;
 356 fail_req_map:
 357         return -ENOMEM;
 358 }
 359
 360 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 361 {
 362         if (IS_QLAFX00(ha)) {
 363                 if (req && req->ring_fx00)
 364                         dma_free_coherent(&ha->pdev->dev,
 365                             (req->length_fx00 + 1) * sizeof(request_t),
 366                             req->ring_fx00, req->dma_fx00);
 367         } else if (req && req->ring)
 368                 dma_free_coherent(&ha->pdev->dev,
 369                 (req->length + 1) * sizeof(request_t),
 370                 req->ring, req->dma);
 371
 372         if (req)
 373                 kfree(req->outstanding_cmds);
 374
 375         kfree(req);
 376         req = NULL;
 377 }
 378
 379 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 380 {
 381         if (IS_QLAFX00(ha)) {
 382                 if (rsp && rsp->ring)
 383                         dma_free_coherent(&ha->pdev->dev,
 384                             (rsp->length_fx00 + 1) * sizeof(request_t),
 385                             rsp->ring_fx00, rsp->dma_fx00);
 386         } else if (rsp && rsp->ring) {
 387                 dma_free_coherent(&ha->pdev->dev,
 388                 (rsp->length + 1) * sizeof(response_t),
 389                 rsp->ring, rsp->dma);
 390         }
 391         kfree(rsp);
 392         rsp = NULL;
 393 }
 394
 395 static void qla2x00_free_queues(struct qla_hw_data *ha)
 396 {
 397         struct req_que *req;
 398         struct rsp_que *rsp;
 399         int cnt;
 400
 401         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 402                 req = ha->req_q_map[cnt];
 403                 qla2x00_free_req_que(ha, req);
 404         }
 405         kfree(ha->req_q_map);
 406         ha->req_q_map = NULL;
 407
 408         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 409                 rsp = ha->rsp_q_map[cnt];
 410                 qla2x00_free_rsp_que(ha, rsp);
 411         }
 412         kfree(ha->rsp_q_map);
 413         ha->rsp_q_map = NULL;
 414 }
 415
 416 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 417 {
 418         uint16_t options = 0;
 419         int ques, req, ret;
 420         struct qla_hw_data *ha = vha->hw;
 421
 422         if (!(ha->fw_attributes & BIT_6)) {
 423                 ql_log(ql_log_warn, vha, 0x00d8,
 424                     "Firmware is not multi-queue capable.\n");
 425                 goto fail;
 426         }
 427         if (ql2xmultique_tag) {
 428                 /* create a request queue for IO */
 429                 options |= BIT_7;
 430                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 431                         QLA_DEFAULT_QUE_QOS);
 432                 if (!req) {
 433                         ql_log(ql_log_warn, vha, 0x00e0,
 434                             "Failed to create request queue.\n");
 435                         goto fail;
 436                 }
 437                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 438                 vha->req = ha->req_q_map[req];
 439                 options |= BIT_1;
 440                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 441                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 442                         if (!ret) {
 443                                 ql_log(ql_log_warn, vha, 0x00e8,
 444                                     "Failed to create response queue.\n");
 445                                 goto fail2;
 446                         }
 447                 }
 448                 ha->flags.cpu_affinity_enabled = 1;
 449                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 450                     "CPU affinity mode enalbed, "
 451                     "no. of response queues:%d no. of request queues:%d.\n",
 452                     ha->max_rsp_queues, ha->max_req_queues);
 453                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 454                     "CPU affinity mode enalbed, "
 455                     "no. of response queues:%d no. of request queues:%d.\n",
 456                     ha->max_rsp_queues, ha->max_req_queues);
 457         }
 458         return 0;
 459 fail2:
 460         qla25xx_delete_queues(vha);
 461         destroy_workqueue(ha->wq);
 462         ha->wq = NULL;
 463         vha->req = ha->req_q_map[0];
 464 fail:
 465         ha->mqenable = 0;
 466         kfree(ha->req_q_map);
 467         kfree(ha->rsp_q_map);
 468         ha->max_req_queues = ha->max_rsp_queues = 1;
 469         return 1;
 470 }
 471
 472 static char *
 473 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 474 {
 475         struct qla_hw_data *ha = vha->hw;
 476         static char *pci_bus_modes[] = {
 477                 "33", "66", "100", "133",
 478         };
 479         uint16_t pci_bus;
 480
 481         strcpy(str, "PCI");
 482         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 483         if (pci_bus) {
 484                 strcat(str, "-X (");
 485                 strcat(str, pci_bus_modes[pci_bus]);
 486         } else {
 487                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 488                 strcat(str, " (");
 489                 strcat(str, pci_bus_modes[pci_bus]);
 490         }
 491         strcat(str, " MHz)");
 492
 493         return (str);
 494 }
 495
 496 static char *
 497 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 498 {
 499         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 500         struct qla_hw_data *ha = vha->hw;
 501         uint32_t pci_bus;
 502
 503         if (pci_is_pcie(ha->pdev)) {
 504                 char lwstr[6];
 505                 uint32_t lstat, lspeed, lwidth;
 506
 507                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 508                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 509                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 510
 511                 strcpy(str, "PCIe (");
 512                 switch (lspeed) {
 513                 case 1:
 514                         strcat(str, "2.5GT/s ");
 515                         break;
 516                 case 2:
 517                         strcat(str, "5.0GT/s ");
 518                         break;
 519                 case 3:
 520                         strcat(str, "8.0GT/s ");
 521                         break;
 522                 default:
 523                         strcat(str, "<unknown> ");
 524                         break;
 525                 }
 526                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 527                 strcat(str, lwstr);
 528
 529                 return str;
 530         }
 531
 532         strcpy(str, "PCI");
 533         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 534         if (pci_bus == 0 || pci_bus == 8) {
 535                 strcat(str, " (");
 536                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 537         } else {
 538                 strcat(str, "-X ");
 539                 if (pci_bus & BIT_2)
 540                         strcat(str, "Mode 2");
 541                 else
 542                         strcat(str, "Mode 1");
 543                 strcat(str, " (");
 544                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 545         }
 546         strcat(str, " MHz)");
 547
 548         return str;
 549 }
 550
 551 static char *
 552 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 553 {
 554         char un_str[10];
 555         struct qla_hw_data *ha = vha->hw;
 556
 557         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 558             ha->fw_minor_version, ha->fw_subminor_version);
 559
 560         if (ha->fw_attributes & BIT_9) {
 561                 strcat(str, "FLX");
 562                 return (str);
 563         }
 564
 565         switch (ha->fw_attributes & 0xFF) {
 566         case 0x7:
 567                 strcat(str, "EF");
 568                 break;
 569         case 0x17:
 570                 strcat(str, "TP");
 571                 break;
 572         case 0x37:
 573                 strcat(str, "IP");
 574                 break;
 575         case 0x77:
 576                 strcat(str, "VI");
 577                 break;
 578         default:
 579                 sprintf(un_str, "(%x)", ha->fw_attributes);
 580                 strcat(str, un_str);
 581                 break;
 582         }
 583         if (ha->fw_attributes & 0x100)
 584                 strcat(str, "X");
 585
 586         return (str);
 587 }
 588
 589 static char *
 590 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 591 {
 592         struct qla_hw_data *ha = vha->hw;
 593
 594         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 595             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 596         return str;
 597 }
 598
 599 void
 600 qla2x00_sp_free_dma(void *vha, void *ptr)
 601 {
 602         srb_t *sp = (srb_t *)ptr;
 603         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 604         struct qla_hw_data *ha = sp->fcport->vha->hw;
 605         void *ctx = GET_CMD_CTX_SP(sp);
 606
 607         if (sp->flags & SRB_DMA_VALID) {
 608                 scsi_dma_unmap(cmd);
 609                 sp->flags &= ~SRB_DMA_VALID;
 610         }
 611
 612         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 613                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 614                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 615                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 616         }
 617
 618         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 619                 /* List assured to be having elements */
 620                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 621                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 622         }
 623
 624         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 625                 dma_pool_free(ha->dl_dma_pool, ctx,
 626                     ((struct crc_context *)ctx)->crc_ctx_dma);
 627                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 628         }
 629
 630         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 631                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 632
 633                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 634                         ctx1->fcp_cmnd_dma);
 635                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 636                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 637                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 638                 mempool_free(ctx1, ha->ctx_mempool);
 639                 ctx1 = NULL;
 640         }
 641
 642         CMD_SP(cmd) = NULL;
 643         qla2x00_rel_sp(sp->fcport->vha, sp);
 644 }
 645
 646 static void
 647 qla2x00_sp_compl(void *data, void *ptr, int res)
 648 {
 649         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 650         srb_t *sp = (srb_t *)ptr;
 651         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 652
 653         cmd->result = res;
 654
 655         if (atomic_read(&sp->ref_count) == 0) {
 656                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 657                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 658                     sp, GET_CMD_SP(sp));
 659                 if (ql2xextended_error_logging & ql_dbg_io)
 660                         BUG();
 661                 return;
 662         }
 663         if (!atomic_dec_and_test(&sp->ref_count))
 664                 return;
 665
 666         qla2x00_sp_free_dma(ha, sp);
 667         cmd->scsi_done(cmd);
 668 }
 669
 670 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 671  * does not have the changes necessary to avoid taking host->host_lock.
 672  */
 673 static int
 674 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 675 {
 676         scsi_qla_host_t *vha = shost_priv(host);
 677         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 678         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 679         struct qla_hw_data *ha = vha->hw;
 680         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 681         srb_t *sp;
 682         int rval;
 683
 684         if (ha->flags.eeh_busy) {
 685                 if (ha->flags.pci_channel_io_perm_failure) {
 686                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 687                             "PCI Channel IO permanent failure, exiting "
 688                             "cmd=%p.\n", cmd);
 689                         cmd->result = DID_NO_CONNECT << 16;
 690                 } else {
 691                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 692                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 693                         cmd->result = DID_REQUEUE << 16;
 694                 }
 695                 goto qc24_fail_command;
 696         }
 697
 698         rval = fc_remote_port_chkready(rport);
 699         if (rval) {
 700                 cmd->result = rval;
 701                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 702                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 703                     cmd, rval);
 704                 goto qc24_fail_command;
 705         }
 706
 707         if (!vha->flags.difdix_supported &&
 708                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 709                         ql_dbg(ql_dbg_io, vha, 0x3004,
 710                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 711                             cmd);
 712                         cmd->result = DID_NO_CONNECT << 16;
 713                         goto qc24_fail_command;
 714         }
 715
 716         if (!fcport) {
 717                 cmd->result = DID_NO_CONNECT << 16;
 718                 goto qc24_fail_command;
 719         }
 720
 721         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 722                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 723                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 724                         ql_dbg(ql_dbg_io, vha, 0x3005,
 725                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 726                             atomic_read(&fcport->state),
 727                             atomic_read(&base_vha->loop_state));
 728                         cmd->result = DID_NO_CONNECT << 16;
 729                         goto qc24_fail_command;
 730                 }
 731                 goto qc24_target_busy;
 732         }
 733
 734         /*
 735          * Return target busy if we've received a non-zero retry_delay_timer
 736          * in a FCP_RSP.
 737          */
 738         if (time_after(jiffies, fcport->retry_delay_timestamp))
 739                 fcport->retry_delay_timestamp = 0;
 740         else
 741                 goto qc24_target_busy;
 742
 743         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 744         if (!sp)
 745                 goto qc24_host_busy;
 746
 747         sp->u.scmd.cmd = cmd;
 748         sp->type = SRB_SCSI_CMD;
 749         atomic_set(&sp->ref_count, 1);
 750         CMD_SP(cmd) = (void *)sp;
 751         sp->free = qla2x00_sp_free_dma;
 752         sp->done = qla2x00_sp_compl;
 753
 754         rval = ha->isp_ops->start_scsi(sp);
 755         if (rval != QLA_SUCCESS) {
 756                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 757                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 758                 goto qc24_host_busy_free_sp;
 759         }
 760
 761         return 0;
 762
 763 qc24_host_busy_free_sp:
 764         qla2x00_sp_free_dma(ha, sp);
 765
 766 qc24_host_busy:
 767         return SCSI_MLQUEUE_HOST_BUSY;
 768
 769 qc24_target_busy:
 770         return SCSI_MLQUEUE_TARGET_BUSY;
 771
 772 qc24_fail_command:
 773         cmd->scsi_done(cmd);
 774
 775         return 0;
 776 }
 777
 778 /*
 779  * qla2x00_eh_wait_on_command
 780  *    Waits for the command to be returned by the Firmware for some
 781  *    max time.
 782  *
 783  * Input:
 784  *    cmd = Scsi Command to wait on.
 785  *
 786  * Return:
 787  *    Not Found : 0
 788  *    Found : 1
 789  */
 790 static int
 791 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 792 {
 793 #define ABORT_POLLING_PERIOD    1000
 794 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 795         unsigned long wait_iter = ABORT_WAIT_ITER;
 796         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 797         struct qla_hw_data *ha = vha->hw;
 798         int ret = QLA_SUCCESS;
 799
 800         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 801                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 802                     "Return:eh_wait.\n");
 803                 return ret;
 804         }
 805
 806         while (CMD_SP(cmd) && wait_iter--) {
 807                 msleep(ABORT_POLLING_PERIOD);
 808         }
 809         if (CMD_SP(cmd))
 810                 ret = QLA_FUNCTION_FAILED;
 811
 812         return ret;
 813 }
 814
 815 /*
 816  * qla2x00_wait_for_hba_online
 817  *    Wait till the HBA is online after going through
 818  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 819  *    finally HBA is disabled ie marked offline
 820  *
 821  * Input:
 822  *     ha - pointer to host adapter structure
 823  *
 824  * Note:
 825  *    Does context switching-Release SPIN_LOCK
 826  *    (if any) before calling this routine.
 827  *
 828  * Return:
 829  *    Success (Adapter is online) : 0
 830  *    Failed  (Adapter is offline/disabled) : 1
 831  */
 832 int
 833 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 834 {
 835         int             return_status;
 836         unsigned long   wait_online;
 837         struct qla_hw_data *ha = vha->hw;
 838         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 839
 840         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 841         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 842             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 843             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 844             ha->dpc_active) && time_before(jiffies, wait_online)) {
 845
 846                 msleep(1000);
 847         }
 848         if (base_vha->flags.online)
 849                 return_status = QLA_SUCCESS;
 850         else
 851                 return_status = QLA_FUNCTION_FAILED;
 852
 853         return (return_status);
 854 }
 855
 856 /*
 857  * qla2x00_wait_for_hba_ready
 858  * Wait till the HBA is ready before doing driver unload
 859  *
 860  * Input:
 861  *     ha - pointer to host adapter structure
 862  *
 863  * Note:
 864  *    Does context switching-Release SPIN_LOCK
 865  *    (if any) before calling this routine.
 866  *
 867  */
 868 static void
 869 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 870 {
 871         struct qla_hw_data *ha = vha->hw;
 872
 873         while (((qla2x00_reset_active(vha)) || ha->dpc_active ||
 874             ha->flags.mbox_busy) ||
 875                 test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
 876                 test_bit(FX00_TARGET_SCAN, &vha->dpc_flags))
 877                 msleep(1000);
 878 }
 879
 880 int
 881 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 882 {
 883         int             return_status;
 884         unsigned long   wait_reset;
 885         struct qla_hw_data *ha = vha->hw;
 886         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 887
 888         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 889         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 890             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 891             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 892             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 893
 894                 msleep(1000);
 895
 896                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 897                     ha->flags.chip_reset_done)
 898                         break;
 899         }
 900         if (ha->flags.chip_reset_done)
 901                 return_status = QLA_SUCCESS;
 902         else
 903                 return_status = QLA_FUNCTION_FAILED;
 904
 905         return return_status;
 906 }
 907
 908 static void
 909 sp_get(struct srb *sp)
 910 {
 911         atomic_inc(&sp->ref_count);
 912 }
 913
 914 /**************************************************************************
 915 * qla2xxx_eh_abort
 916 *
 917 * Description:
 918 *    The abort function will abort the specified command.
 919 *
 920 * Input:
 921 *    cmd = Linux SCSI command packet to be aborted.
 922 *
 923 * Returns:
 924 *    Either SUCCESS or FAILED.
 925 *
 926 * Note:
 927 *    Only return FAILED if command not returned by firmware.
 928 **************************************************************************/
 929 static int
 930 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 931 {
 932         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 933         srb_t *sp;
 934         int ret;
 935         unsigned int id;
 936         uint64_t lun;
 937         unsigned long flags;
 938         int rval, wait = 0;
 939         struct qla_hw_data *ha = vha->hw;
 940
 941         if (!CMD_SP(cmd))
 942                 return SUCCESS;
 943
 944         ret = fc_block_scsi_eh(cmd);
 945         if (ret != 0)
 946                 return ret;
 947         ret = SUCCESS;
 948
 949         id = cmd->device->id;
 950         lun = cmd->device->lun;
 951
 952         spin_lock_irqsave(&ha->hardware_lock, flags);
 953         sp = (srb_t *) CMD_SP(cmd);
 954         if (!sp) {
 955                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 956                 return SUCCESS;
 957         }
 958
 959         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 960             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p\n",
 961             vha->host_no, id, lun, sp, cmd);
 962
 963         /* Get a reference to the sp and drop the lock.*/
 964         sp_get(sp);
 965
 966         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 967         rval = ha->isp_ops->abort_command(sp);
 968         if (rval) {
 969                 if (rval == QLA_FUNCTION_PARAMETER_ERROR) {
 970                         /*
 971                          * Decrement the ref_count since we can't find the
 972                          * command
 973                          */
 974                         atomic_dec(&sp->ref_count);
 975                         ret = SUCCESS;
 976                 } else
 977                         ret = FAILED;
 978
 979                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 980                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
 981         } else {
 982                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 983                     "Abort command mbx success cmd=%p.\n", cmd);
 984                 wait = 1;
 985         }
 986
 987         spin_lock_irqsave(&ha->hardware_lock, flags);
 988         /*
 989          * Clear the slot in the oustanding_cmds array if we can't find the
 990          * command to reclaim the resources.
 991          */
 992         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
 993                 vha->req->outstanding_cmds[sp->handle] = NULL;
 994         sp->done(ha, sp, 0);
 995         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 996
 997         /* Did the command return during mailbox execution? */
 998         if (ret == FAILED && !CMD_SP(cmd))
 999                 ret = SUCCESS;
1000
1001         /* Wait for the command to be returned. */
1002         if (wait) {
1003                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1004                         ql_log(ql_log_warn, vha, 0x8006,
1005                             "Abort handler timed out cmd=%p.\n", cmd);
1006                         ret = FAILED;
1007                 }
1008         }
1009
1010         ql_log(ql_log_info, vha, 0x801c,
1011             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1012             vha->host_no, id, lun, wait, ret);
1013
1014         return ret;
1015 }
1016
1017 int
1018 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1019         uint64_t l, enum nexus_wait_type type)
1020 {
1021         int cnt, match, status;
1022         unsigned long flags;
1023         struct qla_hw_data *ha = vha->hw;
1024         struct req_que *req;
1025         srb_t *sp;
1026         struct scsi_cmnd *cmd;
1027
1028         status = QLA_SUCCESS;
1029
1030         spin_lock_irqsave(&ha->hardware_lock, flags);
1031         req = vha->req;
1032         for (cnt = 1; status == QLA_SUCCESS &&
1033                 cnt < req->num_outstanding_cmds; cnt++) {
1034                 sp = req->outstanding_cmds[cnt];
1035                 if (!sp)
1036                         continue;
1037                 if (sp->type != SRB_SCSI_CMD)
1038                         continue;
1039                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1040                         continue;
1041                 match = 0;
1042                 cmd = GET_CMD_SP(sp);
1043                 switch (type) {
1044                 case WAIT_HOST:
1045                         match = 1;
1046                         break;
1047                 case WAIT_TARGET:
1048                         match = cmd->device->id == t;
1049                         break;
1050                 case WAIT_LUN:
1051                         match = (cmd->device->id == t &&
1052                                 cmd->device->lun == l);
1053                         break;
1054                 }
1055                 if (!match)
1056                         continue;
1057
1058                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1059                 status = qla2x00_eh_wait_on_command(cmd);
1060                 spin_lock_irqsave(&ha->hardware_lock, flags);
1061         }
1062         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1063
1064         return status;
1065 }
1066
1067 static char *reset_errors[] = {
1068         "HBA not online",
1069         "HBA not ready",
1070         "Task management failed",
1071         "Waiting for command completions",
1072 };
1073
1074 static int
1075 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1076     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1077 {
1078         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1079         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1080         int err;
1081
1082         if (!fcport) {
1083                 return FAILED;
1084         }
1085
1086         err = fc_block_scsi_eh(cmd);
1087         if (err != 0)
1088                 return err;
1089
1090         ql_log(ql_log_info, vha, 0x8009,
1091             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1092             cmd->device->id, cmd->device->lun, cmd);
1093
1094         err = 0;
1095         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1096                 ql_log(ql_log_warn, vha, 0x800a,
1097                     "Wait for hba online failed for cmd=%p.\n", cmd);
1098                 goto eh_reset_failed;
1099         }
1100         err = 2;
1101         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1102                 != QLA_SUCCESS) {
1103                 ql_log(ql_log_warn, vha, 0x800c,
1104                     "do_reset failed for cmd=%p.\n", cmd);
1105                 goto eh_reset_failed;
1106         }
1107         err = 3;
1108         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1109             cmd->device->lun, type) != QLA_SUCCESS) {
1110                 ql_log(ql_log_warn, vha, 0x800d,
1111                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1112                 goto eh_reset_failed;
1113         }
1114
1115         ql_log(ql_log_info, vha, 0x800e,
1116             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1117             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1118
1119         return SUCCESS;
1120
1121 eh_reset_failed:
1122         ql_log(ql_log_info, vha, 0x800f,
1123             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1124             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1125             cmd);
1126         return FAILED;
1127 }
1128
1129 static int
1130 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1131 {
1132         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1133         struct qla_hw_data *ha = vha->hw;
1134
1135         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1136             ha->isp_ops->lun_reset);
1137 }
1138
1139 static int
1140 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1141 {
1142         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1143         struct qla_hw_data *ha = vha->hw;
1144
1145         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1146             ha->isp_ops->target_reset);
1147 }
1148
1149 /**************************************************************************
1150 * qla2xxx_eh_bus_reset
1151 *
1152 * Description:
1153 *    The bus reset function will reset the bus and abort any executing
1154 *    commands.
1155 *
1156 * Input:
1157 *    cmd = Linux SCSI command packet of the command that cause the
1158 *          bus reset.
1159 *
1160 * Returns:
1161 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1162 *
1163 **************************************************************************/
1164 static int
1165 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1166 {
1167         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1168         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1169         int ret = FAILED;
1170         unsigned int id;
1171         uint64_t lun;
1172
1173         id = cmd->device->id;
1174         lun = cmd->device->lun;
1175
1176         if (!fcport) {
1177                 return ret;
1178         }
1179
1180         ret = fc_block_scsi_eh(cmd);
1181         if (ret != 0)
1182                 return ret;
1183         ret = FAILED;
1184
1185         ql_log(ql_log_info, vha, 0x8012,
1186             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1187
1188         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1189                 ql_log(ql_log_fatal, vha, 0x8013,
1190                     "Wait for hba online failed board disabled.\n");
1191                 goto eh_bus_reset_done;
1192         }
1193
1194         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1195                 ret = SUCCESS;
1196
1197         if (ret == FAILED)
1198                 goto eh_bus_reset_done;
1199
1200         /* Flush outstanding commands. */
1201         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1202             QLA_SUCCESS) {
1203                 ql_log(ql_log_warn, vha, 0x8014,
1204                     "Wait for pending commands failed.\n");
1205                 ret = FAILED;
1206         }
1207
1208 eh_bus_reset_done:
1209         ql_log(ql_log_warn, vha, 0x802b,
1210             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1211             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1212
1213         return ret;
1214 }
1215
1216 /**************************************************************************
1217 * qla2xxx_eh_host_reset
1218 *
1219 * Description:
1220 *    The reset function will reset the Adapter.
1221 *
1222 * Input:
1223 *      cmd = Linux SCSI command packet of the command that cause the
1224 *            adapter reset.
1225 *
1226 * Returns:
1227 *      Either SUCCESS or FAILED.
1228 *
1229 * Note:
1230 **************************************************************************/
1231 static int
1232 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1233 {
1234         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1235         struct qla_hw_data *ha = vha->hw;
1236         int ret = FAILED;
1237         unsigned int id;
1238         uint64_t lun;
1239         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1240
1241         id = cmd->device->id;
1242         lun = cmd->device->lun;
1243
1244         ql_log(ql_log_info, vha, 0x8018,
1245             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1246
1247         /*
1248          * No point in issuing another reset if one is active.  Also do not
1249          * attempt a reset if we are updating flash.
1250          */
1251         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1252                 goto eh_host_reset_lock;
1253
1254         if (vha != base_vha) {
1255                 if (qla2x00_vp_abort_isp(vha))
1256                         goto eh_host_reset_lock;
1257         } else {
1258                 if (IS_P3P_TYPE(vha->hw)) {
1259                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1260                                 /* Ctx reset success */
1261                                 ret = SUCCESS;
1262                                 goto eh_host_reset_lock;
1263                         }
1264                         /* fall thru if ctx reset failed */
1265                 }
1266                 if (ha->wq)
1267                         flush_workqueue(ha->wq);
1268
1269                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1270                 if (ha->isp_ops->abort_isp(base_vha)) {
1271                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1272                         /* failed. schedule dpc to try */
1273                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1274
1275                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1276                                 ql_log(ql_log_warn, vha, 0x802a,
1277                                     "wait for hba online failed.\n");
1278                                 goto eh_host_reset_lock;
1279                         }
1280                 }
1281                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1282         }
1283
1284         /* Waiting for command to be returned to OS.*/
1285         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1286                 QLA_SUCCESS)
1287                 ret = SUCCESS;
1288
1289 eh_host_reset_lock:
1290         ql_log(ql_log_info, vha, 0x8017,
1291             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1292             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1293
1294         return ret;
1295 }
1296
1297 /*
1298 * qla2x00_loop_reset
1299 *      Issue loop reset.
1300 *
1301 * Input:
1302 *      ha = adapter block pointer.
1303 *
1304 * Returns:
1305 *      0 = success
1306 */
1307 int
1308 qla2x00_loop_reset(scsi_qla_host_t *vha)
1309 {
1310         int ret;
1311         struct fc_port *fcport;
1312         struct qla_hw_data *ha = vha->hw;
1313
1314         if (IS_QLAFX00(ha)) {
1315                 return qlafx00_loop_reset(vha);
1316         }
1317
1318         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1319                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1320                         if (fcport->port_type != FCT_TARGET)
1321                                 continue;
1322
1323                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1324                         if (ret != QLA_SUCCESS) {
1325                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1326                                     "Bus Reset failed: Reset=%d "
1327                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1328                         }
1329                 }
1330         }
1331
1332
1333         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1334                 atomic_set(&vha->loop_state, LOOP_DOWN);
1335                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1336                 qla2x00_mark_all_devices_lost(vha, 0);
1337                 ret = qla2x00_full_login_lip(vha);
1338                 if (ret != QLA_SUCCESS) {
1339                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1340                             "full_login_lip=%d.\n", ret);
1341                 }
1342         }
1343
1344         if (ha->flags.enable_lip_reset) {
1345                 ret = qla2x00_lip_reset(vha);
1346                 if (ret != QLA_SUCCESS)
1347                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1348                             "lip_reset failed (%d).\n", ret);
1349         }
1350
1351         /* Issue marker command only when we are going to start the I/O */
1352         vha->marker_needed = 1;
1353
1354         return QLA_SUCCESS;
1355 }
1356
1357 void
1358 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1359 {
1360         int que, cnt;
1361         unsigned long flags;
1362         srb_t *sp;
1363         struct qla_hw_data *ha = vha->hw;
1364         struct req_que *req;
1365
1366         qlt_host_reset_handler(ha);
1367
1368         spin_lock_irqsave(&ha->hardware_lock, flags);
1369         for (que = 0; que < ha->max_req_queues; que++) {
1370                 req = ha->req_q_map[que];
1371                 if (!req)
1372                         continue;
1373                 if (!req->outstanding_cmds)
1374                         continue;
1375                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1376                         sp = req->outstanding_cmds[cnt];
1377                         if (sp) {
1378                                 req->outstanding_cmds[cnt] = NULL;
1379                                 sp->done(vha, sp, res);
1380                         }
1381                 }
1382         }
1383         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1384 }
1385
1386 static int
1387 qla2xxx_slave_alloc(struct scsi_device *sdev)
1388 {
1389         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1390
1391         if (!rport || fc_remote_port_chkready(rport))
1392                 return -ENXIO;
1393
1394         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1395
1396         return 0;
1397 }
1398
1399 static int
1400 qla2xxx_slave_configure(struct scsi_device *sdev)
1401 {
1402         scsi_qla_host_t *vha = shost_priv(sdev->host);
1403         struct req_que *req = vha->req;
1404
1405         if (IS_T10_PI_CAPABLE(vha->hw))
1406                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1407
1408         if (sdev->tagged_supported)
1409                 scsi_activate_tcq(sdev, req->max_q_depth);
1410         else
1411                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1412         return 0;
1413 }
1414
1415 static void
1416 qla2xxx_slave_destroy(struct scsi_device *sdev)
1417 {
1418         sdev->hostdata = NULL;
1419 }
1420
1421 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1422 {
1423         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1424
1425         if (!scsi_track_queue_full(sdev, qdepth))
1426                 return;
1427
1428         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1429             "Queue depth adjusted-down to %d for nexus=%ld:%d:%llu.\n",
1430             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1431 }
1432
1433 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1434 {
1435         fc_port_t *fcport = sdev->hostdata;
1436         struct scsi_qla_host *vha = fcport->vha;
1437         struct req_que *req = NULL;
1438
1439         req = vha->req;
1440         if (!req)
1441                 return;
1442
1443         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1444                 return;
1445
1446         if (sdev->ordered_tags)
1447                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1448         else
1449                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1450
1451         ql_dbg(ql_dbg_io, vha, 0x302a,
1452             "Queue depth adjusted-up to %d for nexus=%ld:%d:%llu.\n",
1453             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1454 }
1455
1456 static int
1457 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1458 {
1459         switch (reason) {
1460         case SCSI_QDEPTH_DEFAULT:
1461                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1462                 break;
1463         case SCSI_QDEPTH_QFULL:
1464                 qla2x00_handle_queue_full(sdev, qdepth);
1465                 break;
1466         case SCSI_QDEPTH_RAMP_UP:
1467                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1468                 break;
1469         default:
1470                 return -EOPNOTSUPP;
1471         }
1472
1473         return sdev->queue_depth;
1474 }
1475
1476 static int
1477 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1478 {
1479         if (sdev->tagged_supported) {
1480                 scsi_set_tag_type(sdev, tag_type);
1481                 if (tag_type)
1482                         scsi_activate_tcq(sdev, sdev->queue_depth);
1483                 else
1484                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1485         } else
1486                 tag_type = 0;
1487
1488         return tag_type;
1489 }
1490
1491 /**
1492  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1493  * @ha: HA context
1494  *
1495  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1496  * supported addressing method.
1497  */
1498 static void
1499 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1500 {
1501         /* Assume a 32bit DMA mask. */
1502         ha->flags.enable_64bit_addressing = 0;
1503
1504         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1505                 /* Any upper-dword bits set? */
1506                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1507                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1508                         /* Ok, a 64bit DMA mask is applicable. */
1509                         ha->flags.enable_64bit_addressing = 1;
1510                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1511                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1512                         return;
1513                 }
1514         }
1515
1516         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1517         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1518 }
1519
1520 static void
1521 qla2x00_enable_intrs(struct qla_hw_data *ha)
1522 {
1523         unsigned long flags = 0;
1524         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1525
1526         spin_lock_irqsave(&ha->hardware_lock, flags);
1527         ha->interrupts_on = 1;
1528         /* enable risc and host interrupts */
1529         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1530         RD_REG_WORD(&reg->ictrl);
1531         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1532
1533 }
1534
1535 static void
1536 qla2x00_disable_intrs(struct qla_hw_data *ha)
1537 {
1538         unsigned long flags = 0;
1539         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1540
1541         spin_lock_irqsave(&ha->hardware_lock, flags);
1542         ha->interrupts_on = 0;
1543         /* disable risc and host interrupts */
1544         WRT_REG_WORD(&reg->ictrl, 0);
1545         RD_REG_WORD(&reg->ictrl);
1546         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1547 }
1548
1549 static void
1550 qla24xx_enable_intrs(struct qla_hw_data *ha)
1551 {
1552         unsigned long flags = 0;
1553         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1554
1555         spin_lock_irqsave(&ha->hardware_lock, flags);
1556         ha->interrupts_on = 1;
1557         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1558         RD_REG_DWORD(&reg->ictrl);
1559         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1560 }
1561
1562 static void
1563 qla24xx_disable_intrs(struct qla_hw_data *ha)
1564 {
1565         unsigned long flags = 0;
1566         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1567
1568         if (IS_NOPOLLING_TYPE(ha))
1569                 return;
1570         spin_lock_irqsave(&ha->hardware_lock, flags);
1571         ha->interrupts_on = 0;
1572         WRT_REG_DWORD(&reg->ictrl, 0);
1573         RD_REG_DWORD(&reg->ictrl);
1574         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1575 }
1576
1577 static int
1578 qla2x00_iospace_config(struct qla_hw_data *ha)
1579 {
1580         resource_size_t pio;
1581         uint16_t msix;
1582         int cpus;
1583
1584         if (pci_request_selected_regions(ha->pdev, ha->bars,
1585             QLA2XXX_DRIVER_NAME)) {
1586                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1587                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1588                     pci_name(ha->pdev));
1589                 goto iospace_error_exit;
1590         }
1591         if (!(ha->bars & 1))
1592                 goto skip_pio;
1593
1594         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1595         pio = pci_resource_start(ha->pdev, 0);
1596         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1597                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1598                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1599                             "Invalid pci I/O region size (%s).\n",
1600                             pci_name(ha->pdev));
1601                         pio = 0;
1602                 }
1603         } else {
1604                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1605                     "Region #0 no a PIO resource (%s).\n",
1606                     pci_name(ha->pdev));
1607                 pio = 0;
1608         }
1609         ha->pio_address = pio;
1610         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1611             "PIO address=%llu.\n",
1612             (unsigned long long)ha->pio_address);
1613
1614 skip_pio:
1615         /* Use MMIO operations for all accesses. */
1616         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1617                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1618                     "Region #1 not an MMIO resource (%s), aborting.\n",
1619                     pci_name(ha->pdev));
1620                 goto iospace_error_exit;
1621         }
1622         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1623                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1624                     "Invalid PCI mem region size (%s), aborting.\n",
1625                     pci_name(ha->pdev));
1626                 goto iospace_error_exit;
1627         }
1628
1629         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1630         if (!ha->iobase) {
1631                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1632                     "Cannot remap MMIO (%s), aborting.\n",
1633                     pci_name(ha->pdev));
1634                 goto iospace_error_exit;
1635         }
1636
1637         /* Determine queue resources */
1638         ha->max_req_queues = ha->max_rsp_queues = 1;
1639         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1640                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1641                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1642                 goto mqiobase_exit;
1643
1644         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1645                         pci_resource_len(ha->pdev, 3));
1646         if (ha->mqiobase) {
1647                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1648                     "MQIO Base=%p.\n", ha->mqiobase);
1649                 /* Read MSIX vector size of the board */
1650                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1651                 ha->msix_count = msix;
1652                 /* Max queues are bounded by available msix vectors */
1653                 /* queue 0 uses two msix vectors */
1654                 if (ql2xmultique_tag) {
1655                         cpus = num_online_cpus();
1656                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1657                                 (cpus + 1) : (ha->msix_count - 1);
1658                         ha->max_req_queues = 2;
1659                 } else if (ql2xmaxqueues > 1) {
1660                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1661                             QLA_MQ_SIZE : ql2xmaxqueues;
1662                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1663                             "QoS mode set, max no of request queues:%d.\n",
1664                             ha->max_req_queues);
1665                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1666                             "QoS mode set, max no of request queues:%d.\n",
1667                             ha->max_req_queues);
1668                 }
1669                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1670                     "MSI-X vector count: %d.\n", msix);
1671         } else
1672                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1673                     "BAR 3 not enabled.\n");
1674
1675 mqiobase_exit:
1676         ha->msix_count = ha->max_rsp_queues + 1;
1677         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1678             "MSIX Count:%d.\n", ha->msix_count);
1679         return (0);
1680
1681 iospace_error_exit:
1682         return (-ENOMEM);
1683 }
1684
1685
1686 static int
1687 qla83xx_iospace_config(struct qla_hw_data *ha)
1688 {
1689         uint16_t msix;
1690         int cpus;
1691
1692         if (pci_request_selected_regions(ha->pdev, ha->bars,
1693             QLA2XXX_DRIVER_NAME)) {
1694                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1695                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1696                     pci_name(ha->pdev));
1697
1698                 goto iospace_error_exit;
1699         }
1700
1701         /* Use MMIO operations for all accesses. */
1702         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1703                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1704                     "Invalid pci I/O region size (%s).\n",
1705                     pci_name(ha->pdev));
1706                 goto iospace_error_exit;
1707         }
1708         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1709                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1710                     "Invalid PCI mem region size (%s), aborting\n",
1711                         pci_name(ha->pdev));
1712                 goto iospace_error_exit;
1713         }
1714
1715         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1716         if (!ha->iobase) {
1717                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1718                     "Cannot remap MMIO (%s), aborting.\n",
1719                     pci_name(ha->pdev));
1720                 goto iospace_error_exit;
1721         }
1722
1723         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1724         /* 83XX 26XX always use MQ type access for queues
1725          * - mbar 2, a.k.a region 4 */
1726         ha->max_req_queues = ha->max_rsp_queues = 1;
1727         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1728                         pci_resource_len(ha->pdev, 4));
1729
1730         if (!ha->mqiobase) {
1731                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1732                     "BAR2/region4 not enabled\n");
1733                 goto mqiobase_exit;
1734         }
1735
1736         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1737                         pci_resource_len(ha->pdev, 2));
1738         if (ha->msixbase) {
1739                 /* Read MSIX vector size of the board */
1740                 pci_read_config_word(ha->pdev,
1741                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1742                 ha->msix_count = msix;
1743                 /* Max queues are bounded by available msix vectors */
1744                 /* queue 0 uses two msix vectors */
1745                 if (ql2xmultique_tag) {
1746                         cpus = num_online_cpus();
1747                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1748                                 (cpus + 1) : (ha->msix_count - 1);
1749                         ha->max_req_queues = 2;
1750                 } else if (ql2xmaxqueues > 1) {
1751                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1752                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1753                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1754                             "QoS mode set, max no of request queues:%d.\n",
1755                             ha->max_req_queues);
1756                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1757                             "QoS mode set, max no of request queues:%d.\n",
1758                             ha->max_req_queues);
1759                 }
1760                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1761                     "MSI-X vector count: %d.\n", msix);
1762         } else
1763                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1764                     "BAR 1 not enabled.\n");
1765
1766 mqiobase_exit:
1767         ha->msix_count = ha->max_rsp_queues + 1;
1768
1769         qlt_83xx_iospace_config(ha);
1770
1771         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1772             "MSIX Count:%d.\n", ha->msix_count);
1773         return 0;
1774
1775 iospace_error_exit:
1776         return -ENOMEM;
1777 }
1778
1779 static struct isp_operations qla2100_isp_ops = {
1780         .pci_config             = qla2100_pci_config,
1781         .reset_chip             = qla2x00_reset_chip,
1782         .chip_diag              = qla2x00_chip_diag,
1783         .config_rings           = qla2x00_config_rings,
1784         .reset_adapter          = qla2x00_reset_adapter,
1785         .nvram_config           = qla2x00_nvram_config,
1786         .update_fw_options      = qla2x00_update_fw_options,
1787         .load_risc              = qla2x00_load_risc,
1788         .pci_info_str           = qla2x00_pci_info_str,
1789         .fw_version_str         = qla2x00_fw_version_str,
1790         .intr_handler           = qla2100_intr_handler,
1791         .enable_intrs           = qla2x00_enable_intrs,
1792         .disable_intrs          = qla2x00_disable_intrs,
1793         .abort_command          = qla2x00_abort_command,
1794         .target_reset           = qla2x00_abort_target,
1795         .lun_reset              = qla2x00_lun_reset,
1796         .fabric_login           = qla2x00_login_fabric,
1797         .fabric_logout          = qla2x00_fabric_logout,
1798         .calc_req_entries       = qla2x00_calc_iocbs_32,
1799         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1800         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1801         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1802         .read_nvram             = qla2x00_read_nvram_data,
1803         .write_nvram            = qla2x00_write_nvram_data,
1804         .fw_dump                = qla2100_fw_dump,
1805         .beacon_on              = NULL,
1806         .beacon_off             = NULL,
1807         .beacon_blink           = NULL,
1808         .read_optrom            = qla2x00_read_optrom_data,
1809         .write_optrom           = qla2x00_write_optrom_data,
1810         .get_flash_version      = qla2x00_get_flash_version,
1811         .start_scsi             = qla2x00_start_scsi,
1812         .abort_isp              = qla2x00_abort_isp,
1813         .iospace_config         = qla2x00_iospace_config,
1814         .initialize_adapter     = qla2x00_initialize_adapter,
1815 };
1816
1817 static struct isp_operations qla2300_isp_ops = {
1818         .pci_config             = qla2300_pci_config,
1819         .reset_chip             = qla2x00_reset_chip,
1820         .chip_diag              = qla2x00_chip_diag,
1821         .config_rings           = qla2x00_config_rings,
1822         .reset_adapter          = qla2x00_reset_adapter,
1823         .nvram_config           = qla2x00_nvram_config,
1824         .update_fw_options      = qla2x00_update_fw_options,
1825         .load_risc              = qla2x00_load_risc,
1826         .pci_info_str           = qla2x00_pci_info_str,
1827         .fw_version_str         = qla2x00_fw_version_str,
1828         .intr_handler           = qla2300_intr_handler,
1829         .enable_intrs           = qla2x00_enable_intrs,
1830         .disable_intrs          = qla2x00_disable_intrs,
1831         .abort_command          = qla2x00_abort_command,
1832         .target_reset           = qla2x00_abort_target,
1833         .lun_reset              = qla2x00_lun_reset,
1834         .fabric_login           = qla2x00_login_fabric,
1835         .fabric_logout          = qla2x00_fabric_logout,
1836         .calc_req_entries       = qla2x00_calc_iocbs_32,
1837         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1838         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1839         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1840         .read_nvram             = qla2x00_read_nvram_data,
1841         .write_nvram            = qla2x00_write_nvram_data,
1842         .fw_dump                = qla2300_fw_dump,
1843         .beacon_on              = qla2x00_beacon_on,
1844         .beacon_off             = qla2x00_beacon_off,
1845         .beacon_blink           = qla2x00_beacon_blink,
1846         .read_optrom            = qla2x00_read_optrom_data,
1847         .write_optrom           = qla2x00_write_optrom_data,
1848         .get_flash_version      = qla2x00_get_flash_version,
1849         .start_scsi             = qla2x00_start_scsi,
1850         .abort_isp              = qla2x00_abort_isp,
1851         .iospace_config         = qla2x00_iospace_config,
1852         .initialize_adapter     = qla2x00_initialize_adapter,
1853 };
1854
1855 static struct isp_operations qla24xx_isp_ops = {
1856         .pci_config             = qla24xx_pci_config,
1857         .reset_chip             = qla24xx_reset_chip,
1858         .chip_diag              = qla24xx_chip_diag,
1859         .config_rings           = qla24xx_config_rings,
1860         .reset_adapter          = qla24xx_reset_adapter,
1861         .nvram_config           = qla24xx_nvram_config,
1862         .update_fw_options      = qla24xx_update_fw_options,
1863         .load_risc              = qla24xx_load_risc,
1864         .pci_info_str           = qla24xx_pci_info_str,
1865         .fw_version_str         = qla24xx_fw_version_str,
1866         .intr_handler           = qla24xx_intr_handler,
1867         .enable_intrs           = qla24xx_enable_intrs,
1868         .disable_intrs          = qla24xx_disable_intrs,
1869         .abort_command          = qla24xx_abort_command,
1870         .target_reset           = qla24xx_abort_target,
1871         .lun_reset              = qla24xx_lun_reset,
1872         .fabric_login           = qla24xx_login_fabric,
1873         .fabric_logout          = qla24xx_fabric_logout,
1874         .calc_req_entries       = NULL,
1875         .build_iocbs            = NULL,
1876         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1877         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1878         .read_nvram             = qla24xx_read_nvram_data,
1879         .write_nvram            = qla24xx_write_nvram_data,
1880         .fw_dump                = qla24xx_fw_dump,
1881         .beacon_on              = qla24xx_beacon_on,
1882         .beacon_off             = qla24xx_beacon_off,
1883         .beacon_blink           = qla24xx_beacon_blink,
1884         .read_optrom            = qla24xx_read_optrom_data,
1885         .write_optrom           = qla24xx_write_optrom_data,
1886         .get_flash_version      = qla24xx_get_flash_version,
1887         .start_scsi             = qla24xx_start_scsi,
1888         .abort_isp              = qla2x00_abort_isp,
1889         .iospace_config         = qla2x00_iospace_config,
1890         .initialize_adapter     = qla2x00_initialize_adapter,
1891 };
1892
1893 static struct isp_operations qla25xx_isp_ops = {
1894         .pci_config             = qla25xx_pci_config,
1895         .reset_chip             = qla24xx_reset_chip,
1896         .chip_diag              = qla24xx_chip_diag,
1897         .config_rings           = qla24xx_config_rings,
1898         .reset_adapter          = qla24xx_reset_adapter,
1899         .nvram_config           = qla24xx_nvram_config,
1900         .update_fw_options      = qla24xx_update_fw_options,
1901         .load_risc              = qla24xx_load_risc,
1902         .pci_info_str           = qla24xx_pci_info_str,
1903         .fw_version_str         = qla24xx_fw_version_str,
1904         .intr_handler           = qla24xx_intr_handler,
1905         .enable_intrs           = qla24xx_enable_intrs,
1906         .disable_intrs          = qla24xx_disable_intrs,
1907         .abort_command          = qla24xx_abort_command,
1908         .target_reset           = qla24xx_abort_target,
1909         .lun_reset              = qla24xx_lun_reset,
1910         .fabric_login           = qla24xx_login_fabric,
1911         .fabric_logout          = qla24xx_fabric_logout,
1912         .calc_req_entries       = NULL,
1913         .build_iocbs            = NULL,
1914         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1915         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1916         .read_nvram             = qla25xx_read_nvram_data,
1917         .write_nvram            = qla25xx_write_nvram_data,
1918         .fw_dump                = qla25xx_fw_dump,
1919         .beacon_on              = qla24xx_beacon_on,
1920         .beacon_off             = qla24xx_beacon_off,
1921         .beacon_blink           = qla24xx_beacon_blink,
1922         .read_optrom            = qla25xx_read_optrom_data,
1923         .write_optrom           = qla24xx_write_optrom_data,
1924         .get_flash_version      = qla24xx_get_flash_version,
1925         .start_scsi             = qla24xx_dif_start_scsi,
1926         .abort_isp              = qla2x00_abort_isp,
1927         .iospace_config         = qla2x00_iospace_config,
1928         .initialize_adapter     = qla2x00_initialize_adapter,
1929 };
1930
1931 static struct isp_operations qla81xx_isp_ops = {
1932         .pci_config             = qla25xx_pci_config,
1933         .reset_chip             = qla24xx_reset_chip,
1934         .chip_diag              = qla24xx_chip_diag,
1935         .config_rings           = qla24xx_config_rings,
1936         .reset_adapter          = qla24xx_reset_adapter,
1937         .nvram_config           = qla81xx_nvram_config,
1938         .update_fw_options      = qla81xx_update_fw_options,
1939         .load_risc              = qla81xx_load_risc,
1940         .pci_info_str           = qla24xx_pci_info_str,
1941         .fw_version_str         = qla24xx_fw_version_str,
1942         .intr_handler           = qla24xx_intr_handler,
1943         .enable_intrs           = qla24xx_enable_intrs,
1944         .disable_intrs          = qla24xx_disable_intrs,
1945         .abort_command          = qla24xx_abort_command,
1946         .target_reset           = qla24xx_abort_target,
1947         .lun_reset              = qla24xx_lun_reset,
1948         .fabric_login           = qla24xx_login_fabric,
1949         .fabric_logout          = qla24xx_fabric_logout,
1950         .calc_req_entries       = NULL,
1951         .build_iocbs            = NULL,
1952         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1953         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1954         .read_nvram             = NULL,
1955         .write_nvram            = NULL,
1956         .fw_dump                = qla81xx_fw_dump,
1957         .beacon_on              = qla24xx_beacon_on,
1958         .beacon_off             = qla24xx_beacon_off,
1959         .beacon_blink           = qla83xx_beacon_blink,
1960         .read_optrom            = qla25xx_read_optrom_data,
1961         .write_optrom           = qla24xx_write_optrom_data,
1962         .get_flash_version      = qla24xx_get_flash_version,
1963         .start_scsi             = qla24xx_dif_start_scsi,
1964         .abort_isp              = qla2x00_abort_isp,
1965         .iospace_config         = qla2x00_iospace_config,
1966         .initialize_adapter     = qla2x00_initialize_adapter,
1967 };
1968
1969 static struct isp_operations qla82xx_isp_ops = {
1970         .pci_config             = qla82xx_pci_config,
1971         .reset_chip             = qla82xx_reset_chip,
1972         .chip_diag              = qla24xx_chip_diag,
1973         .config_rings           = qla82xx_config_rings,
1974         .reset_adapter          = qla24xx_reset_adapter,
1975         .nvram_config           = qla81xx_nvram_config,
1976         .update_fw_options      = qla24xx_update_fw_options,
1977         .load_risc              = qla82xx_load_risc,
1978         .pci_info_str           = qla24xx_pci_info_str,
1979         .fw_version_str         = qla24xx_fw_version_str,
1980         .intr_handler           = qla82xx_intr_handler,
1981         .enable_intrs           = qla82xx_enable_intrs,
1982         .disable_intrs          = qla82xx_disable_intrs,
1983         .abort_command          = qla24xx_abort_command,
1984         .target_reset           = qla24xx_abort_target,
1985         .lun_reset              = qla24xx_lun_reset,
1986         .fabric_login           = qla24xx_login_fabric,
1987         .fabric_logout          = qla24xx_fabric_logout,
1988         .calc_req_entries       = NULL,
1989         .build_iocbs            = NULL,
1990         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1991         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1992         .read_nvram             = qla24xx_read_nvram_data,
1993         .write_nvram            = qla24xx_write_nvram_data,
1994         .fw_dump                = qla82xx_fw_dump,
1995         .beacon_on              = qla82xx_beacon_on,
1996         .beacon_off             = qla82xx_beacon_off,
1997         .beacon_blink           = NULL,
1998         .read_optrom            = qla82xx_read_optrom_data,
1999         .write_optrom           = qla82xx_write_optrom_data,
2000         .get_flash_version      = qla82xx_get_flash_version,
2001         .start_scsi             = qla82xx_start_scsi,
2002         .abort_isp              = qla82xx_abort_isp,
2003         .iospace_config         = qla82xx_iospace_config,
2004         .initialize_adapter     = qla2x00_initialize_adapter,
2005 };
2006
2007 static struct isp_operations qla8044_isp_ops = {
2008         .pci_config             = qla82xx_pci_config,
2009         .reset_chip             = qla82xx_reset_chip,
2010         .chip_diag              = qla24xx_chip_diag,
2011         .config_rings           = qla82xx_config_rings,
2012         .reset_adapter          = qla24xx_reset_adapter,
2013         .nvram_config           = qla81xx_nvram_config,
2014         .update_fw_options      = qla24xx_update_fw_options,
2015         .load_risc              = qla82xx_load_risc,
2016         .pci_info_str           = qla24xx_pci_info_str,
2017         .fw_version_str         = qla24xx_fw_version_str,
2018         .intr_handler           = qla8044_intr_handler,
2019         .enable_intrs           = qla82xx_enable_intrs,
2020         .disable_intrs          = qla82xx_disable_intrs,
2021         .abort_command          = qla24xx_abort_command,
2022         .target_reset           = qla24xx_abort_target,
2023         .lun_reset              = qla24xx_lun_reset,
2024         .fabric_login           = qla24xx_login_fabric,
2025         .fabric_logout          = qla24xx_fabric_logout,
2026         .calc_req_entries       = NULL,
2027         .build_iocbs            = NULL,
2028         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2029         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2030         .read_nvram             = NULL,
2031         .write_nvram            = NULL,
2032         .fw_dump                = qla8044_fw_dump,
2033         .beacon_on              = qla82xx_beacon_on,
2034         .beacon_off             = qla82xx_beacon_off,
2035         .beacon_blink           = NULL,
2036         .read_optrom            = qla8044_read_optrom_data,
2037         .write_optrom           = qla8044_write_optrom_data,
2038         .get_flash_version      = qla82xx_get_flash_version,
2039         .start_scsi             = qla82xx_start_scsi,
2040         .abort_isp              = qla8044_abort_isp,
2041         .iospace_config         = qla82xx_iospace_config,
2042         .initialize_adapter     = qla2x00_initialize_adapter,
2043 };
2044
2045 static struct isp_operations qla83xx_isp_ops = {
2046         .pci_config             = qla25xx_pci_config,
2047         .reset_chip             = qla24xx_reset_chip,
2048         .chip_diag              = qla24xx_chip_diag,
2049         .config_rings           = qla24xx_config_rings,
2050         .reset_adapter          = qla24xx_reset_adapter,
2051         .nvram_config           = qla81xx_nvram_config,
2052         .update_fw_options      = qla81xx_update_fw_options,
2053         .load_risc              = qla81xx_load_risc,
2054         .pci_info_str           = qla24xx_pci_info_str,
2055         .fw_version_str         = qla24xx_fw_version_str,
2056         .intr_handler           = qla24xx_intr_handler,
2057         .enable_intrs           = qla24xx_enable_intrs,
2058         .disable_intrs          = qla24xx_disable_intrs,
2059         .abort_command          = qla24xx_abort_command,
2060         .target_reset           = qla24xx_abort_target,
2061         .lun_reset              = qla24xx_lun_reset,
2062         .fabric_login           = qla24xx_login_fabric,
2063         .fabric_logout          = qla24xx_fabric_logout,
2064         .calc_req_entries       = NULL,
2065         .build_iocbs            = NULL,
2066         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2067         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2068         .read_nvram             = NULL,
2069         .write_nvram            = NULL,
2070         .fw_dump                = qla83xx_fw_dump,
2071         .beacon_on              = qla24xx_beacon_on,
2072         .beacon_off             = qla24xx_beacon_off,
2073         .beacon_blink           = qla83xx_beacon_blink,
2074         .read_optrom            = qla25xx_read_optrom_data,
2075         .write_optrom           = qla24xx_write_optrom_data,
2076         .get_flash_version      = qla24xx_get_flash_version,
2077         .start_scsi             = qla24xx_dif_start_scsi,
2078         .abort_isp              = qla2x00_abort_isp,
2079         .iospace_config         = qla83xx_iospace_config,
2080         .initialize_adapter     = qla2x00_initialize_adapter,
2081 };
2082
2083 static struct isp_operations qlafx00_isp_ops = {
2084         .pci_config             = qlafx00_pci_config,
2085         .reset_chip             = qlafx00_soft_reset,
2086         .chip_diag              = qlafx00_chip_diag,
2087         .config_rings           = qlafx00_config_rings,
2088         .reset_adapter          = qlafx00_soft_reset,
2089         .nvram_config           = NULL,
2090         .update_fw_options      = NULL,
2091         .load_risc              = NULL,
2092         .pci_info_str           = qlafx00_pci_info_str,
2093         .fw_version_str         = qlafx00_fw_version_str,
2094         .intr_handler           = qlafx00_intr_handler,
2095         .enable_intrs           = qlafx00_enable_intrs,
2096         .disable_intrs          = qlafx00_disable_intrs,
2097         .abort_command          = qla24xx_async_abort_command,
2098         .target_reset           = qlafx00_abort_target,
2099         .lun_reset              = qlafx00_lun_reset,
2100         .fabric_login           = NULL,
2101         .fabric_logout          = NULL,
2102         .calc_req_entries       = NULL,
2103         .build_iocbs            = NULL,
2104         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2105         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2106         .read_nvram             = qla24xx_read_nvram_data,
2107         .write_nvram            = qla24xx_write_nvram_data,
2108         .fw_dump                = NULL,
2109         .beacon_on              = qla24xx_beacon_on,
2110         .beacon_off             = qla24xx_beacon_off,
2111         .beacon_blink           = NULL,
2112         .read_optrom            = qla24xx_read_optrom_data,
2113         .write_optrom           = qla24xx_write_optrom_data,
2114         .get_flash_version      = qla24xx_get_flash_version,
2115         .start_scsi             = qlafx00_start_scsi,
2116         .abort_isp              = qlafx00_abort_isp,
2117         .iospace_config         = qlafx00_iospace_config,
2118         .initialize_adapter     = qlafx00_initialize_adapter,
2119 };
2120
2121 static struct isp_operations qla27xx_isp_ops = {
2122         .pci_config             = qla25xx_pci_config,
2123         .reset_chip             = qla24xx_reset_chip,
2124         .chip_diag              = qla24xx_chip_diag,
2125         .config_rings           = qla24xx_config_rings,
2126         .reset_adapter          = qla24xx_reset_adapter,
2127         .nvram_config           = qla81xx_nvram_config,
2128         .update_fw_options      = qla81xx_update_fw_options,
2129         .load_risc              = qla81xx_load_risc,
2130         .pci_info_str           = qla24xx_pci_info_str,
2131         .fw_version_str         = qla24xx_fw_version_str,
2132         .intr_handler           = qla24xx_intr_handler,
2133         .enable_intrs           = qla24xx_enable_intrs,
2134         .disable_intrs          = qla24xx_disable_intrs,
2135         .abort_command          = qla24xx_abort_command,
2136         .target_reset           = qla24xx_abort_target,
2137         .lun_reset              = qla24xx_lun_reset,
2138         .fabric_login           = qla24xx_login_fabric,
2139         .fabric_logout          = qla24xx_fabric_logout,
2140         .calc_req_entries       = NULL,
2141         .build_iocbs            = NULL,
2142         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2143         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2144         .read_nvram             = NULL,
2145         .write_nvram            = NULL,
2146         .fw_dump                = qla27xx_fwdump,
2147         .beacon_on              = qla24xx_beacon_on,
2148         .beacon_off             = qla24xx_beacon_off,
2149         .beacon_blink           = qla83xx_beacon_blink,
2150         .read_optrom            = qla25xx_read_optrom_data,
2151         .write_optrom           = qla24xx_write_optrom_data,
2152         .get_flash_version      = qla24xx_get_flash_version,
2153         .start_scsi             = qla24xx_dif_start_scsi,
2154         .abort_isp              = qla2x00_abort_isp,
2155         .iospace_config         = qla83xx_iospace_config,
2156         .initialize_adapter     = qla2x00_initialize_adapter,
2157 };
2158
2159 static inline void
2160 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2161 {
2162         ha->device_type = DT_EXTENDED_IDS;
2163         switch (ha->pdev->device) {
2164         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2165                 ha->device_type |= DT_ISP2100;
2166                 ha->device_type &= ~DT_EXTENDED_IDS;
2167                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2168                 break;
2169         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2170                 ha->device_type |= DT_ISP2200;
2171                 ha->device_type &= ~DT_EXTENDED_IDS;
2172                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2173                 break;
2174         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2175                 ha->device_type |= DT_ISP2300;
2176                 ha->device_type |= DT_ZIO_SUPPORTED;
2177                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2178                 break;
2179         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2180                 ha->device_type |= DT_ISP2312;
2181                 ha->device_type |= DT_ZIO_SUPPORTED;
2182                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2183                 break;
2184         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2185                 ha->device_type |= DT_ISP2322;
2186                 ha->device_type |= DT_ZIO_SUPPORTED;
2187                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2188                     ha->pdev->subsystem_device == 0x0170)
2189                         ha->device_type |= DT_OEM_001;
2190                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2191                 break;
2192         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2193                 ha->device_type |= DT_ISP6312;
2194                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2195                 break;
2196         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2197                 ha->device_type |= DT_ISP6322;
2198                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2199                 break;
2200         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2201                 ha->device_type |= DT_ISP2422;
2202                 ha->device_type |= DT_ZIO_SUPPORTED;
2203                 ha->device_type |= DT_FWI2;
2204                 ha->device_type |= DT_IIDMA;
2205                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2206                 break;
2207         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2208                 ha->device_type |= DT_ISP2432;
2209                 ha->device_type |= DT_ZIO_SUPPORTED;
2210                 ha->device_type |= DT_FWI2;
2211                 ha->device_type |= DT_IIDMA;
2212                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2213                 break;
2214         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2215                 ha->device_type |= DT_ISP8432;
2216                 ha->device_type |= DT_ZIO_SUPPORTED;
2217                 ha->device_type |= DT_FWI2;
2218                 ha->device_type |= DT_IIDMA;
2219                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2220                 break;
2221         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2222                 ha->device_type |= DT_ISP5422;
2223                 ha->device_type |= DT_FWI2;
2224                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2225                 break;
2226         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2227                 ha->device_type |= DT_ISP5432;
2228                 ha->device_type |= DT_FWI2;
2229                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2230                 break;
2231         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2232                 ha->device_type |= DT_ISP2532;
2233                 ha->device_type |= DT_ZIO_SUPPORTED;
2234                 ha->device_type |= DT_FWI2;
2235                 ha->device_type |= DT_IIDMA;
2236                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2237                 break;
2238         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2239                 ha->device_type |= DT_ISP8001;
2240                 ha->device_type |= DT_ZIO_SUPPORTED;
2241                 ha->device_type |= DT_FWI2;
2242                 ha->device_type |= DT_IIDMA;
2243                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2244                 break;
2245         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2246                 ha->device_type |= DT_ISP8021;
2247                 ha->device_type |= DT_ZIO_SUPPORTED;
2248                 ha->device_type |= DT_FWI2;
2249                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2250                 /* Initialize 82XX ISP flags */
2251                 qla82xx_init_flags(ha);
2252                 break;
2253          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2254                 ha->device_type |= DT_ISP8044;
2255                 ha->device_type |= DT_ZIO_SUPPORTED;
2256                 ha->device_type |= DT_FWI2;
2257                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2258                 /* Initialize 82XX ISP flags */
2259                 qla82xx_init_flags(ha);
2260                 break;
2261         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2262                 ha->device_type |= DT_ISP2031;
2263                 ha->device_type |= DT_ZIO_SUPPORTED;
2264                 ha->device_type |= DT_FWI2;
2265                 ha->device_type |= DT_IIDMA;
2266                 ha->device_type |= DT_T10_PI;
2267                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2268                 break;
2269         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2270                 ha->device_type |= DT_ISP8031;
2271                 ha->device_type |= DT_ZIO_SUPPORTED;
2272                 ha->device_type |= DT_FWI2;
2273                 ha->device_type |= DT_IIDMA;
2274                 ha->device_type |= DT_T10_PI;
2275                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2276                 break;
2277         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2278                 ha->device_type |= DT_ISPFX00;
2279                 break;
2280         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2281                 ha->device_type |= DT_ISP2071;
2282                 ha->device_type |= DT_ZIO_SUPPORTED;
2283                 ha->device_type |= DT_FWI2;
2284                 ha->device_type |= DT_IIDMA;
2285                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2286                 break;
2287         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2288                 ha->device_type |= DT_ISP2271;
2289                 ha->device_type |= DT_ZIO_SUPPORTED;
2290                 ha->device_type |= DT_FWI2;
2291                 ha->device_type |= DT_IIDMA;
2292                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2293                 break;
2294         }
2295
2296         if (IS_QLA82XX(ha))
2297                 ha->port_no = ha->portnum & 1;
2298         else {
2299                 /* Get adapter physical port no from interrupt pin register. */
2300                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2301                 if (IS_QLA27XX(ha))
2302                         ha->port_no--;
2303                 else
2304                         ha->port_no = !(ha->port_no & 1);
2305         }
2306
2307         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2308             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2309             ha->device_type, ha->port_no, ha->fw_srisc_address);
2310 }
2311
2312 static void
2313 qla2xxx_scan_start(struct Scsi_Host *shost)
2314 {
2315         scsi_qla_host_t *vha = shost_priv(shost);
2316
2317         if (vha->hw->flags.running_gold_fw)
2318                 return;
2319
2320         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2321         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2322         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2323         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2324 }
2325
2326 static int
2327 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2328 {
2329         scsi_qla_host_t *vha = shost_priv(shost);
2330
2331         if (!vha->host)
2332                 return 1;
2333         if (time > vha->hw->loop_reset_delay * HZ)
2334                 return 1;
2335
2336         return atomic_read(&vha->loop_state) == LOOP_READY;
2337 }
2338
2339 /*
2340  * PCI driver interface
2341  */
2342 static int
2343 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2344 {
2345         int     ret = -ENODEV;
2346         struct Scsi_Host *host;
2347         scsi_qla_host_t *base_vha = NULL;
2348         struct qla_hw_data *ha;
2349         char pci_info[30];
2350         char fw_str[30], wq_name[30];
2351         struct scsi_host_template *sht;
2352         int bars, mem_only = 0;
2353         uint16_t req_length = 0, rsp_length = 0;
2354         struct req_que *req = NULL;
2355         struct rsp_que *rsp = NULL;
2356         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2357         sht = &qla2xxx_driver_template;
2358         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2359             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2360             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2361             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2362             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2363             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2364             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2365             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2366             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2367             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2368             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2369             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2370             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2371             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2372                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2373                 mem_only = 1;
2374                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2375                     "Mem only adapter.\n");
2376         }
2377         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2378             "Bars=%d.\n", bars);
2379
2380         if (mem_only) {
2381                 if (pci_enable_device_mem(pdev))
2382                         goto probe_out;
2383         } else {
2384                 if (pci_enable_device(pdev))
2385                         goto probe_out;
2386         }
2387
2388         /* This may fail but that's ok */
2389         pci_enable_pcie_error_reporting(pdev);
2390
2391         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2392         if (!ha) {
2393                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2394                     "Unable to allocate memory for ha.\n");
2395                 goto probe_out;
2396         }
2397         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2398             "Memory allocated for ha=%p.\n", ha);
2399         ha->pdev = pdev;
2400         ha->tgt.enable_class_2 = ql2xenableclass2;
2401         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2402         spin_lock_init(&ha->tgt.q_full_lock);
2403
2404         /* Clear our data area */
2405         ha->bars = bars;
2406         ha->mem_only = mem_only;
2407         spin_lock_init(&ha->hardware_lock);
2408         spin_lock_init(&ha->vport_slock);
2409         mutex_init(&ha->selflogin_lock);
2410         mutex_init(&ha->optrom_mutex);
2411
2412         /* Set ISP-type information. */
2413         qla2x00_set_isp_flags(ha);
2414
2415         /* Set EEH reset type to fundamental if required by hba */
2416         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2417             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2418                 pdev->needs_freset = 1;
2419
2420         ha->prev_topology = 0;
2421         ha->init_cb_size = sizeof(init_cb_t);
2422         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2423         ha->optrom_size = OPTROM_SIZE_2300;
2424
2425         /* Assign ISP specific operations. */
2426         if (IS_QLA2100(ha)) {
2427                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2428                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2429                 req_length = REQUEST_ENTRY_CNT_2100;
2430                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2431                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2432                 ha->gid_list_info_size = 4;
2433                 ha->flash_conf_off = ~0;
2434                 ha->flash_data_off = ~0;
2435                 ha->nvram_conf_off = ~0;
2436                 ha->nvram_data_off = ~0;
2437                 ha->isp_ops = &qla2100_isp_ops;
2438         } else if (IS_QLA2200(ha)) {
2439                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2440                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2441                 req_length = REQUEST_ENTRY_CNT_2200;
2442                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2443                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2444                 ha->gid_list_info_size = 4;
2445                 ha->flash_conf_off = ~0;
2446                 ha->flash_data_off = ~0;
2447                 ha->nvram_conf_off = ~0;
2448                 ha->nvram_data_off = ~0;
2449                 ha->isp_ops = &qla2100_isp_ops;
2450         } else if (IS_QLA23XX(ha)) {
2451                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2452                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2453                 req_length = REQUEST_ENTRY_CNT_2200;
2454                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2455                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2456                 ha->gid_list_info_size = 6;
2457                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2458                         ha->optrom_size = OPTROM_SIZE_2322;
2459                 ha->flash_conf_off = ~0;
2460                 ha->flash_data_off = ~0;
2461                 ha->nvram_conf_off = ~0;
2462                 ha->nvram_data_off = ~0;
2463                 ha->isp_ops = &qla2300_isp_ops;
2464         } else if (IS_QLA24XX_TYPE(ha)) {
2465                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2466                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2467                 req_length = REQUEST_ENTRY_CNT_24XX;
2468                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2469                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2470                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2471                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2472                 ha->gid_list_info_size = 8;
2473                 ha->optrom_size = OPTROM_SIZE_24XX;
2474                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2475                 ha->isp_ops = &qla24xx_isp_ops;
2476                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2477                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2478                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2479                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2480         } else if (IS_QLA25XX(ha)) {
2481                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2482                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2483                 req_length = REQUEST_ENTRY_CNT_24XX;
2484                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2485                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2486                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2487                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2488                 ha->gid_list_info_size = 8;
2489                 ha->optrom_size = OPTROM_SIZE_25XX;
2490                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2491                 ha->isp_ops = &qla25xx_isp_ops;
2492                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2493                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2494                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2495                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2496         } else if (IS_QLA81XX(ha)) {
2497                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2498                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2499                 req_length = REQUEST_ENTRY_CNT_24XX;
2500                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2501                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2502                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2503                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2504                 ha->gid_list_info_size = 8;
2505                 ha->optrom_size = OPTROM_SIZE_81XX;
2506                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2507                 ha->isp_ops = &qla81xx_isp_ops;
2508                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2509                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2510                 ha->nvram_conf_off = ~0;
2511                 ha->nvram_data_off = ~0;
2512         } else if (IS_QLA82XX(ha)) {
2513                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2514                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2515                 req_length = REQUEST_ENTRY_CNT_82XX;
2516                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2517                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2518                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2519                 ha->gid_list_info_size = 8;
2520                 ha->optrom_size = OPTROM_SIZE_82XX;
2521                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2522                 ha->isp_ops = &qla82xx_isp_ops;
2523                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2524                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2525                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2526                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2527         } else if (IS_QLA8044(ha)) {
2528                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2529                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2530                 req_length = REQUEST_ENTRY_CNT_82XX;
2531                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2532                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2533                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2534                 ha->gid_list_info_size = 8;
2535                 ha->optrom_size = OPTROM_SIZE_83XX;
2536                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2537                 ha->isp_ops = &qla8044_isp_ops;
2538                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2539                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2540                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2541                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2542         } else if (IS_QLA83XX(ha)) {
2543                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2544                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2545                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2546                 req_length = REQUEST_ENTRY_CNT_83XX;
2547                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2548                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2549                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2550                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2551                 ha->gid_list_info_size = 8;
2552                 ha->optrom_size = OPTROM_SIZE_83XX;
2553                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2554                 ha->isp_ops = &qla83xx_isp_ops;
2555                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2556                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2557                 ha->nvram_conf_off = ~0;
2558                 ha->nvram_data_off = ~0;
2559         }  else if (IS_QLAFX00(ha)) {
2560                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2561                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2562                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2563                 req_length = REQUEST_ENTRY_CNT_FX00;
2564                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2565                 ha->isp_ops = &qlafx00_isp_ops;
2566                 ha->port_down_retry_count = 30; /* default value */
2567                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2568                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2569                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2570                 ha->mr.fw_hbt_en = 1;
2571                 ha->mr.host_info_resend = false;
2572                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2573         } else if (IS_QLA27XX(ha)) {
2574                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2575                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2576                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2577                 req_length = REQUEST_ENTRY_CNT_24XX;
2578                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2579                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2580                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2581                 ha->gid_list_info_size = 8;
2582                 ha->optrom_size = OPTROM_SIZE_83XX;
2583                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2584                 ha->isp_ops = &qla27xx_isp_ops;
2585                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2586                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2587                 ha->nvram_conf_off = ~0;
2588                 ha->nvram_data_off = ~0;
2589         }
2590
2591         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2592             "mbx_count=%d, req_length=%d, "
2593             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2594             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2595             "max_fibre_devices=%d.\n",
2596             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2597             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2598             ha->nvram_npiv_size, ha->max_fibre_devices);
2599         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2600             "isp_ops=%p, flash_conf_off=%d, "
2601             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2602             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2603             ha->nvram_conf_off, ha->nvram_data_off);
2604
2605         /* Configure PCI I/O space */
2606         ret = ha->isp_ops->iospace_config(ha);
2607         if (ret)
2608                 goto iospace_config_failed;
2609
2610         ql_log_pci(ql_log_info, pdev, 0x001d,
2611             "Found an ISP%04X irq %d iobase 0x%p.\n",
2612             pdev->device, pdev->irq, ha->iobase);
2613         mutex_init(&ha->vport_lock);
2614         init_completion(&ha->mbx_cmd_comp);
2615         complete(&ha->mbx_cmd_comp);
2616         init_completion(&ha->mbx_intr_comp);
2617         init_completion(&ha->dcbx_comp);
2618         init_completion(&ha->lb_portup_comp);
2619
2620         set_bit(0, (unsigned long *) ha->vp_idx_map);
2621
2622         qla2x00_config_dma_addressing(ha);
2623         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2624             "64 Bit addressing is %s.\n",
2625             ha->flags.enable_64bit_addressing ? "enable" :
2626             "disable");
2627         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2628         if (ret) {
2629                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2630                     "Failed to allocate memory for adapter, aborting.\n");
2631
2632                 goto probe_hw_failed;
2633         }
2634
2635         req->max_q_depth = MAX_Q_DEPTH;
2636         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2637                 req->max_q_depth = ql2xmaxqdepth;
2638
2639
2640         base_vha = qla2x00_create_host(sht, ha);
2641         if (!base_vha) {
2642                 ret = -ENOMEM;
2643                 qla2x00_mem_free(ha);
2644                 qla2x00_free_req_que(ha, req);
2645                 qla2x00_free_rsp_que(ha, rsp);
2646                 goto probe_hw_failed;
2647         }
2648
2649         pci_set_drvdata(pdev, base_vha);
2650         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2651
2652         host = base_vha->host;
2653         base_vha->req = req;
2654         if (IS_QLA2XXX_MIDTYPE(ha))
2655                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2656         else
2657                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2658                                                 base_vha->vp_idx;
2659
2660         /* Setup fcport template structure. */
2661         ha->mr.fcport.vha = base_vha;
2662         ha->mr.fcport.port_type = FCT_UNKNOWN;
2663         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2664         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2665         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2666         ha->mr.fcport.scan_state = 1;
2667
2668         /* Set the SG table size based on ISP type */
2669         if (!IS_FWI2_CAPABLE(ha)) {
2670                 if (IS_QLA2100(ha))
2671                         host->sg_tablesize = 32;
2672         } else {
2673                 if (!IS_QLA82XX(ha))
2674                         host->sg_tablesize = QLA_SG_ALL;
2675         }
2676         host->max_id = ha->max_fibre_devices;
2677         host->cmd_per_lun = 3;
2678         host->unique_id = host->host_no;
2679         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2680                 host->max_cmd_len = 32;
2681         else
2682                 host->max_cmd_len = MAX_CMDSZ;
2683         host->max_channel = MAX_BUSES - 1;
2684         /* Older HBAs support only 16-bit LUNs */
2685         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2686             ql2xmaxlun > 0xffff)
2687                 host->max_lun = 0xffff;
2688         else
2689                 host->max_lun = ql2xmaxlun;
2690         host->transportt = qla2xxx_transport_template;
2691         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2692
2693         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2694             "max_id=%d this_id=%d "
2695             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2696             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2697             host->this_id, host->cmd_per_lun, host->unique_id,
2698             host->max_cmd_len, host->max_channel, host->max_lun,
2699             host->transportt, sht->vendor_id);
2700
2701 que_init:
2702         /* Alloc arrays of request and response ring ptrs */
2703         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2704                 ql_log(ql_log_fatal, base_vha, 0x003d,
2705                     "Failed to allocate memory for queue pointers..."
2706                     "aborting.\n");
2707                 goto probe_init_failed;
2708         }
2709
2710         qlt_probe_one_stage1(base_vha, ha);
2711
2712         /* Set up the irqs */
2713         ret = qla2x00_request_irqs(ha, rsp);
2714         if (ret)
2715                 goto probe_init_failed;
2716
2717         pci_save_state(pdev);
2718
2719         /* Assign back pointers */
2720         rsp->req = req;
2721         req->rsp = rsp;
2722
2723         if (IS_QLAFX00(ha)) {
2724                 ha->rsp_q_map[0] = rsp;
2725                 ha->req_q_map[0] = req;
2726                 set_bit(0, ha->req_qid_map);
2727                 set_bit(0, ha->rsp_qid_map);
2728         }
2729
2730         /* FWI2-capable only. */
2731         req->req_q_in = &ha->iobase->isp24.req_q_in;
2732         req->req_q_out = &ha->iobase->isp24.req_q_out;
2733         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2734         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2735         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2736                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2737                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2738                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2739                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2740         }
2741
2742         if (IS_QLAFX00(ha)) {
2743                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2744                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2745                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2746                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2747         }
2748
2749         if (IS_P3P_TYPE(ha)) {
2750                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2751                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2752                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2753         }
2754
2755         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2756             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2757             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2758         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2759             "req->req_q_in=%p req->req_q_out=%p "
2760             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2761             req->req_q_in, req->req_q_out,
2762             rsp->rsp_q_in, rsp->rsp_q_out);
2763         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2764             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2765             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2766         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2767             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2768             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2769
2770         if (ha->isp_ops->initialize_adapter(base_vha)) {
2771                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2772                     "Failed to initialize adapter - Adapter flags %x.\n",
2773                     base_vha->device_flags);
2774
2775                 if (IS_QLA82XX(ha)) {
2776                         qla82xx_idc_lock(ha);
2777                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2778                                 QLA8XXX_DEV_FAILED);
2779                         qla82xx_idc_unlock(ha);
2780                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2781                             "HW State: FAILED.\n");
2782                 } else if (IS_QLA8044(ha)) {
2783                         qla8044_idc_lock(ha);
2784                         qla8044_wr_direct(base_vha,
2785                                 QLA8044_CRB_DEV_STATE_INDEX,
2786                                 QLA8XXX_DEV_FAILED);
2787                         qla8044_idc_unlock(ha);
2788                         ql_log(ql_log_fatal, base_vha, 0x0150,
2789                             "HW State: FAILED.\n");
2790                 }
2791
2792                 ret = -ENODEV;
2793                 goto probe_failed;
2794         }
2795
2796         if (IS_QLAFX00(ha))
2797                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2798         else
2799                 host->can_queue = req->num_outstanding_cmds - 10;
2800
2801         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2802             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2803             host->can_queue, base_vha->req,
2804             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2805
2806         if (ha->mqenable) {
2807                 if (qla25xx_setup_mode(base_vha)) {
2808                         ql_log(ql_log_warn, base_vha, 0x00ec,
2809                             "Failed to create queues, falling back to single queue mode.\n");
2810                         goto que_init;
2811                 }
2812         }
2813
2814         if (ha->flags.running_gold_fw)
2815                 goto skip_dpc;
2816
2817         /*
2818          * Startup the kernel thread for this host adapter
2819          */
2820         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2821             "%s_dpc", base_vha->host_str);
2822         if (IS_ERR(ha->dpc_thread)) {
2823                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2824                     "Failed to start DPC thread.\n");
2825                 ret = PTR_ERR(ha->dpc_thread);
2826                 goto probe_failed;
2827         }
2828         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2829             "DPC thread started successfully.\n");
2830
2831         /*
2832          * If we're not coming up in initiator mode, we might sit for
2833          * a while without waking up the dpc thread, which leads to a
2834          * stuck process warning.  So just kick the dpc once here and
2835          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2836          */
2837         qla2xxx_wake_dpc(base_vha);
2838
2839         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2840
2841         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2842                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2843                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2844                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2845
2846                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2847                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2848                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2849                 INIT_WORK(&ha->idc_state_handler,
2850                     qla83xx_idc_state_handler_work);
2851                 INIT_WORK(&ha->nic_core_unrecoverable,
2852                     qla83xx_nic_core_unrecoverable_work);
2853         }
2854
2855 skip_dpc:
2856         list_add_tail(&base_vha->list, &ha->vp_list);
2857         base_vha->host->irq = ha->pdev->irq;
2858
2859         /* Initialized the timer */
2860         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2861         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2862             "Started qla2x00_timer with "
2863             "interval=%d.\n", WATCH_INTERVAL);
2864         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2865             "Detected hba at address=%p.\n",
2866             ha);
2867
2868         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2869                 if (ha->fw_attributes & BIT_4) {
2870                         int prot = 0, guard;
2871                         base_vha->flags.difdix_supported = 1;
2872                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2873                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2874                         if (ql2xenabledif == 1)
2875                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2876                         scsi_host_set_prot(host,
2877                             prot | SHOST_DIF_TYPE1_PROTECTION
2878                             | SHOST_DIF_TYPE2_PROTECTION
2879                             | SHOST_DIF_TYPE3_PROTECTION
2880                             | SHOST_DIX_TYPE1_PROTECTION
2881                             | SHOST_DIX_TYPE2_PROTECTION
2882                             | SHOST_DIX_TYPE3_PROTECTION);
2883
2884                         guard = SHOST_DIX_GUARD_CRC;
2885
2886                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2887                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2888                                 guard |= SHOST_DIX_GUARD_IP;
2889
2890                         scsi_host_set_guard(host, guard);
2891                 } else
2892                         base_vha->flags.difdix_supported = 0;
2893         }
2894
2895         ha->isp_ops->enable_intrs(ha);
2896
2897         if (IS_QLAFX00(ha)) {
2898                 ret = qlafx00_fx_disc(base_vha,
2899                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2900                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2901                     QLA_SG_ALL : 128;
2902         }
2903
2904         ret = scsi_add_host(host, &pdev->dev);
2905         if (ret)
2906                 goto probe_failed;
2907
2908         base_vha->flags.init_done = 1;
2909         base_vha->flags.online = 1;
2910         ha->prev_minidump_failed = 0;
2911
2912         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2913             "Init done and hba is online.\n");
2914
2915         if (qla_ini_mode_enabled(base_vha))
2916                 scsi_scan_host(host);
2917         else
2918                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2919                         "skipping scsi_scan_host() for non-initiator port\n");
2920
2921         qla2x00_alloc_sysfs_attr(base_vha);
2922
2923         if (IS_QLAFX00(ha)) {
2924                 ret = qlafx00_fx_disc(base_vha,
2925                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2926
2927                 /* Register system information */
2928                 ret =  qlafx00_fx_disc(base_vha,
2929                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2930         }
2931
2932         qla2x00_init_host_attr(base_vha);
2933
2934         qla2x00_dfs_setup(base_vha);
2935
2936         ql_log(ql_log_info, base_vha, 0x00fb,
2937             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2938         ql_log(ql_log_info, base_vha, 0x00fc,
2939             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2940             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2941             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2942             base_vha->host_no,
2943             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
2944
2945         qlt_add_target(ha, base_vha);
2946
2947         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2948         return 0;
2949
2950 probe_init_failed:
2951         qla2x00_free_req_que(ha, req);
2952         ha->req_q_map[0] = NULL;
2953         clear_bit(0, ha->req_qid_map);
2954         qla2x00_free_rsp_que(ha, rsp);
2955         ha->rsp_q_map[0] = NULL;
2956         clear_bit(0, ha->rsp_qid_map);
2957         ha->max_req_queues = ha->max_rsp_queues = 0;
2958
2959 probe_failed:
2960         if (base_vha->timer_active)
2961                 qla2x00_stop_timer(base_vha);
2962         base_vha->flags.online = 0;
2963         if (ha->dpc_thread) {
2964                 struct task_struct *t = ha->dpc_thread;
2965
2966                 ha->dpc_thread = NULL;
2967                 kthread_stop(t);
2968         }
2969
2970         qla2x00_free_device(base_vha);
2971
2972         scsi_host_put(base_vha->host);
2973
2974 probe_hw_failed:
2975         qla2x00_clear_drv_active(ha);
2976
2977 iospace_config_failed:
2978         if (IS_P3P_TYPE(ha)) {
2979                 if (!ha->nx_pcibase)
2980                         iounmap((device_reg_t *)ha->nx_pcibase);
2981                 if (!ql2xdbwr)
2982                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2983         } else {
2984                 if (ha->iobase)
2985                         iounmap(ha->iobase);
2986                 if (ha->cregbase)
2987                         iounmap(ha->cregbase);
2988         }
2989         pci_release_selected_regions(ha->pdev, ha->bars);
2990         kfree(ha);
2991         ha = NULL;
2992
2993 probe_out:
2994         pci_disable_device(pdev);
2995         return ret;
2996 }
2997
2998 static void
2999 qla2x00_shutdown(struct pci_dev *pdev)
3000 {
3001         scsi_qla_host_t *vha;
3002         struct qla_hw_data  *ha;
3003
3004         if (!atomic_read(&pdev->enable_cnt))
3005                 return;
3006
3007         vha = pci_get_drvdata(pdev);
3008         ha = vha->hw;
3009
3010         /* Notify ISPFX00 firmware */
3011         if (IS_QLAFX00(ha))
3012                 qlafx00_driver_shutdown(vha, 20);
3013
3014         /* Turn-off FCE trace */
3015         if (ha->flags.fce_enabled) {
3016                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3017                 ha->flags.fce_enabled = 0;
3018         }
3019
3020         /* Turn-off EFT trace */
3021         if (ha->eft)
3022                 qla2x00_disable_eft_trace(vha);
3023
3024         /* Stop currently executing firmware. */
3025         qla2x00_try_to_stop_firmware(vha);
3026
3027         /* Turn adapter off line */
3028         vha->flags.online = 0;
3029
3030         /* turn-off interrupts on the card */
3031         if (ha->interrupts_on) {
3032                 vha->flags.init_done = 0;
3033                 ha->isp_ops->disable_intrs(ha);
3034         }
3035
3036         qla2x00_free_irqs(vha);
3037
3038         qla2x00_free_fw_dump(ha);
3039
3040         pci_disable_pcie_error_reporting(pdev);
3041         pci_disable_device(pdev);
3042 }
3043
3044 /* Deletes all the virtual ports for a given ha */
3045 static void
3046 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3047 {
3048         struct Scsi_Host *scsi_host;
3049         scsi_qla_host_t *vha;
3050         unsigned long flags;
3051
3052         mutex_lock(&ha->vport_lock);
3053         while (ha->cur_vport_count) {
3054                 spin_lock_irqsave(&ha->vport_slock, flags);
3055
3056                 BUG_ON(base_vha->list.next == &ha->vp_list);
3057                 /* This assumes first entry in ha->vp_list is always base vha */
3058                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3059                 scsi_host = scsi_host_get(vha->host);
3060
3061                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3062                 mutex_unlock(&ha->vport_lock);
3063
3064                 fc_vport_terminate(vha->fc_vport);
3065                 scsi_host_put(vha->host);
3066
3067                 mutex_lock(&ha->vport_lock);
3068         }
3069         mutex_unlock(&ha->vport_lock);
3070 }
3071
3072 /* Stops all deferred work threads */
3073 static void
3074 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3075 {
3076         /* Flush the work queue and remove it */
3077         if (ha->wq) {
3078                 flush_workqueue(ha->wq);
3079                 destroy_workqueue(ha->wq);
3080                 ha->wq = NULL;
3081         }
3082
3083         /* Cancel all work and destroy DPC workqueues */
3084         if (ha->dpc_lp_wq) {
3085                 cancel_work_sync(&ha->idc_aen);
3086                 destroy_workqueue(ha->dpc_lp_wq);
3087                 ha->dpc_lp_wq = NULL;
3088         }
3089
3090         if (ha->dpc_hp_wq) {
3091                 cancel_work_sync(&ha->nic_core_reset);
3092                 cancel_work_sync(&ha->idc_state_handler);
3093                 cancel_work_sync(&ha->nic_core_unrecoverable);
3094                 destroy_workqueue(ha->dpc_hp_wq);
3095                 ha->dpc_hp_wq = NULL;
3096         }
3097
3098         /* Kill the kernel thread for this host */
3099         if (ha->dpc_thread) {
3100                 struct task_struct *t = ha->dpc_thread;
3101
3102                 /*
3103                  * qla2xxx_wake_dpc checks for ->dpc_thread
3104                  * so we need to zero it out.
3105                  */
3106                 ha->dpc_thread = NULL;
3107                 kthread_stop(t);
3108         }
3109 }
3110
3111 static void
3112 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3113 {
3114         if (IS_QLA82XX(ha)) {
3115
3116                 iounmap((device_reg_t *)ha->nx_pcibase);
3117                 if (!ql2xdbwr)
3118                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3119         } else {
3120                 if (ha->iobase)
3121                         iounmap(ha->iobase);
3122
3123                 if (ha->cregbase)
3124                         iounmap(ha->cregbase);
3125
3126                 if (ha->mqiobase)
3127                         iounmap(ha->mqiobase);
3128
3129                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3130                         iounmap(ha->msixbase);
3131         }
3132 }
3133
3134 static void
3135 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3136 {
3137         if (IS_QLA8044(ha)) {
3138                 qla8044_idc_lock(ha);
3139                 qla8044_clear_drv_active(ha);
3140                 qla8044_idc_unlock(ha);
3141         } else if (IS_QLA82XX(ha)) {
3142                 qla82xx_idc_lock(ha);
3143                 qla82xx_clear_drv_active(ha);
3144                 qla82xx_idc_unlock(ha);
3145         }
3146 }
3147
3148 static void
3149 qla2x00_remove_one(struct pci_dev *pdev)
3150 {
3151         scsi_qla_host_t *base_vha;
3152         struct qla_hw_data  *ha;
3153
3154         base_vha = pci_get_drvdata(pdev);
3155         ha = base_vha->hw;
3156
3157         /* Indicate device removal to prevent future board_disable and wait
3158          * until any pending board_disable has completed. */
3159         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3160         cancel_work_sync(&ha->board_disable);
3161
3162         /*
3163          * If the PCI device is disabled then there was a PCI-disconnect and
3164          * qla2x00_disable_board_on_pci_error has taken care of most of the
3165          * resources.
3166          */
3167         if (!atomic_read(&pdev->enable_cnt)) {
3168                 scsi_host_put(base_vha->host);
3169                 kfree(ha);
3170                 pci_set_drvdata(pdev, NULL);
3171                 return;
3172         }
3173
3174         qla2x00_wait_for_hba_ready(base_vha);
3175
3176         set_bit(UNLOADING, &base_vha->dpc_flags);
3177
3178         if (IS_QLAFX00(ha))
3179                 qlafx00_driver_shutdown(base_vha, 20);
3180
3181         qla2x00_delete_all_vps(ha, base_vha);
3182
3183         if (IS_QLA8031(ha)) {
3184                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3185                     "Clearing fcoe driver presence.\n");
3186                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3187                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3188                             "Error while clearing DRV-Presence.\n");
3189         }
3190
3191         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3192
3193         qla2x00_dfs_remove(base_vha);
3194
3195         qla84xx_put_chip(base_vha);
3196
3197         /* Laser should be disabled only for ISP2031 */
3198         if (IS_QLA2031(ha))
3199                 qla83xx_disable_laser(base_vha);
3200
3201         /* Disable timer */
3202         if (base_vha->timer_active)
3203                 qla2x00_stop_timer(base_vha);
3204
3205         base_vha->flags.online = 0;
3206
3207         qla2x00_destroy_deferred_work(ha);
3208
3209         qlt_remove_target(ha, base_vha);
3210
3211         qla2x00_free_sysfs_attr(base_vha, true);
3212
3213         fc_remove_host(base_vha->host);
3214
3215         scsi_remove_host(base_vha->host);
3216
3217         qla2x00_free_device(base_vha);
3218
3219         qla2x00_clear_drv_active(ha);
3220
3221         scsi_host_put(base_vha->host);
3222
3223         qla2x00_unmap_iobases(ha);
3224
3225         pci_release_selected_regions(ha->pdev, ha->bars);
3226         kfree(ha);
3227         ha = NULL;
3228
3229         pci_disable_pcie_error_reporting(pdev);
3230
3231         pci_disable_device(pdev);
3232 }
3233
3234 static void
3235 qla2x00_free_device(scsi_qla_host_t *vha)
3236 {
3237         struct qla_hw_data *ha = vha->hw;
3238
3239         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3240
3241         /* Disable timer */
3242         if (vha->timer_active)
3243                 qla2x00_stop_timer(vha);
3244
3245         qla25xx_delete_queues(vha);
3246
3247         if (ha->flags.fce_enabled)
3248                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3249
3250         if (ha->eft)
3251                 qla2x00_disable_eft_trace(vha);
3252
3253         /* Stop currently executing firmware. */
3254         qla2x00_try_to_stop_firmware(vha);
3255
3256         vha->flags.online = 0;
3257
3258         /* turn-off interrupts on the card */
3259         if (ha->interrupts_on) {
3260                 vha->flags.init_done = 0;
3261                 ha->isp_ops->disable_intrs(ha);
3262         }
3263
3264         qla2x00_free_irqs(vha);
3265
3266         qla2x00_free_fcports(vha);
3267
3268         qla2x00_mem_free(ha);
3269
3270         qla82xx_md_free(vha);
3271
3272         qla2x00_free_queues(ha);
3273 }
3274
3275 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3276 {
3277         fc_port_t *fcport, *tfcport;
3278
3279         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3280                 list_del(&fcport->list);
3281                 qla2x00_clear_loop_id(fcport);
3282                 kfree(fcport);
3283                 fcport = NULL;
3284         }
3285 }
3286
3287 static inline void
3288 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3289     int defer)
3290 {
3291         struct fc_rport *rport;
3292         scsi_qla_host_t *base_vha;
3293         unsigned long flags;
3294
3295         if (!fcport->rport)
3296                 return;
3297
3298         rport = fcport->rport;
3299         if (defer) {
3300                 base_vha = pci_get_drvdata(vha->hw->pdev);
3301                 spin_lock_irqsave(vha->host->host_lock, flags);
3302                 fcport->drport = rport;
3303                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3304                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3305                 qla2xxx_wake_dpc(base_vha);
3306         } else {
3307                 fc_remote_port_delete(rport);
3308                 qlt_fc_port_deleted(vha, fcport);
3309         }
3310 }
3311
3312 /*
3313  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3314  *
3315  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3316  *
3317  * Return: None.
3318  *
3319  * Context:
3320  */
3321 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3322     int do_login, int defer)
3323 {
3324         if (IS_QLAFX00(vha->hw)) {
3325                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3326                 qla2x00_schedule_rport_del(vha, fcport, defer);
3327                 return;
3328         }
3329
3330         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3331             vha->vp_idx == fcport->vha->vp_idx) {
3332                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3333                 qla2x00_schedule_rport_del(vha, fcport, defer);
3334         }
3335         /*
3336          * We may need to retry the login, so don't change the state of the
3337          * port but do the retries.
3338          */
3339         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3340                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3341
3342         if (!do_login)
3343                 return;
3344
3345         if (fcport->login_retry == 0) {
3346                 fcport->login_retry = vha->hw->login_retry_count;
3347                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3348
3349                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3350                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3351                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3352         }
3353 }
3354
3355 /*
3356  * qla2x00_mark_all_devices_lost
3357  *      Updates fcport state when device goes offline.
3358  *
3359  * Input:
3360  *      ha = adapter block pointer.
3361  *      fcport = port structure pointer.
3362  *
3363  * Return:
3364  *      None.
3365  *
3366  * Context:
3367  */
3368 void
3369 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3370 {
3371         fc_port_t *fcport;
3372
3373         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3374                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3375                         continue;
3376
3377                 /*
3378                  * No point in marking the device as lost, if the device is
3379                  * already DEAD.
3380                  */
3381                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3382                         continue;
3383                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3384                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3385                         if (defer)
3386                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3387                         else if (vha->vp_idx == fcport->vha->vp_idx)
3388                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3389                 }
3390         }
3391 }
3392
3393 /*
3394 * qla2x00_mem_alloc
3395 *      Allocates adapter memory.
3396 *
3397 * Returns:
3398 *      0  = success.
3399 *      !0  = failure.
3400 */
3401 static int
3402 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3403         struct req_que **req, struct rsp_que **rsp)
3404 {
3405         char    name[16];
3406
3407         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3408                 &ha->init_cb_dma, GFP_KERNEL);
3409         if (!ha->init_cb)
3410                 goto fail;
3411
3412         if (qlt_mem_alloc(ha) < 0)
3413                 goto fail_free_init_cb;
3414
3415         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3416                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3417         if (!ha->gid_list)
3418                 goto fail_free_tgt_mem;
3419
3420         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3421         if (!ha->srb_mempool)
3422                 goto fail_free_gid_list;
3423
3424         if (IS_P3P_TYPE(ha)) {
3425                 /* Allocate cache for CT6 Ctx. */
3426                 if (!ctx_cachep) {
3427                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3428                                 sizeof(struct ct6_dsd), 0,
3429                                 SLAB_HWCACHE_ALIGN, NULL);
3430                         if (!ctx_cachep)
3431                                 goto fail_free_gid_list;
3432                 }
3433                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3434                         ctx_cachep);
3435                 if (!ha->ctx_mempool)
3436                         goto fail_free_srb_mempool;
3437                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3438                     "ctx_cachep=%p ctx_mempool=%p.\n",
3439                     ctx_cachep, ha->ctx_mempool);
3440         }
3441
3442         /* Get memory for cached NVRAM */
3443         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3444         if (!ha->nvram)
3445                 goto fail_free_ctx_mempool;
3446
3447         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3448                 ha->pdev->device);
3449         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3450                 DMA_POOL_SIZE, 8, 0);
3451         if (!ha->s_dma_pool)
3452                 goto fail_free_nvram;
3453
3454         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3455             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3456             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3457
3458         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3459                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3460                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3461                 if (!ha->dl_dma_pool) {
3462                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3463                             "Failed to allocate memory for dl_dma_pool.\n");
3464                         goto fail_s_dma_pool;
3465                 }
3466
3467                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3468                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3469                 if (!ha->fcp_cmnd_dma_pool) {
3470                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3471                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3472                         goto fail_dl_dma_pool;
3473                 }
3474                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3475                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3476                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3477         }
3478
3479         /* Allocate memory for SNS commands */
3480         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3481         /* Get consistent memory allocated for SNS commands */
3482                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3483                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3484                 if (!ha->sns_cmd)
3485                         goto fail_dma_pool;
3486                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3487                     "sns_cmd: %p.\n", ha->sns_cmd);
3488         } else {
3489         /* Get consistent memory allocated for MS IOCB */
3490                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3491                         &ha->ms_iocb_dma);
3492                 if (!ha->ms_iocb)
3493                         goto fail_dma_pool;
3494         /* Get consistent memory allocated for CT SNS commands */
3495                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3496                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3497                 if (!ha->ct_sns)
3498                         goto fail_free_ms_iocb;
3499                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3500                     "ms_iocb=%p ct_sns=%p.\n",
3501                     ha->ms_iocb, ha->ct_sns);
3502         }
3503
3504         /* Allocate memory for request ring */
3505         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3506         if (!*req) {
3507                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3508                     "Failed to allocate memory for req.\n");
3509                 goto fail_req;
3510         }
3511         (*req)->length = req_len;
3512         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3513                 ((*req)->length + 1) * sizeof(request_t),
3514                 &(*req)->dma, GFP_KERNEL);
3515         if (!(*req)->ring) {
3516                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3517                     "Failed to allocate memory for req_ring.\n");
3518                 goto fail_req_ring;
3519         }
3520         /* Allocate memory for response ring */
3521         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3522         if (!*rsp) {
3523                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3524                     "Failed to allocate memory for rsp.\n");
3525                 goto fail_rsp;
3526         }
3527         (*rsp)->hw = ha;
3528         (*rsp)->length = rsp_len;
3529         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3530                 ((*rsp)->length + 1) * sizeof(response_t),
3531                 &(*rsp)->dma, GFP_KERNEL);
3532         if (!(*rsp)->ring) {
3533                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3534                     "Failed to allocate memory for rsp_ring.\n");
3535                 goto fail_rsp_ring;
3536         }
3537         (*req)->rsp = *rsp;
3538         (*rsp)->req = *req;
3539         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3540             "req=%p req->length=%d req->ring=%p rsp=%p "
3541             "rsp->length=%d rsp->ring=%p.\n",
3542             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3543             (*rsp)->ring);
3544         /* Allocate memory for NVRAM data for vports */
3545         if (ha->nvram_npiv_size) {
3546                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3547                     ha->nvram_npiv_size, GFP_KERNEL);
3548                 if (!ha->npiv_info) {
3549                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3550                             "Failed to allocate memory for npiv_info.\n");
3551                         goto fail_npiv_info;
3552                 }
3553         } else
3554                 ha->npiv_info = NULL;
3555
3556         /* Get consistent memory allocated for EX-INIT-CB. */
3557         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3558                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3559                     &ha->ex_init_cb_dma);
3560                 if (!ha->ex_init_cb)
3561                         goto fail_ex_init_cb;
3562                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3563                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3564         }
3565
3566         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3567
3568         /* Get consistent memory allocated for Async Port-Database. */
3569         if (!IS_FWI2_CAPABLE(ha)) {
3570                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3571                         &ha->async_pd_dma);
3572                 if (!ha->async_pd)
3573                         goto fail_async_pd;
3574                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3575                     "async_pd=%p.\n", ha->async_pd);
3576         }
3577
3578         INIT_LIST_HEAD(&ha->vp_list);
3579
3580         /* Allocate memory for our loop_id bitmap */
3581         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3582             GFP_KERNEL);
3583         if (!ha->loop_id_map)
3584                 goto fail_async_pd;
3585         else {
3586                 qla2x00_set_reserved_loop_ids(ha);
3587                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3588                     "loop_id_map=%p.\n", ha->loop_id_map);
3589         }
3590
3591         return 0;
3592
3593 fail_async_pd:
3594         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3595 fail_ex_init_cb:
3596         kfree(ha->npiv_info);
3597 fail_npiv_info:
3598         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3599                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3600         (*rsp)->ring = NULL;
3601         (*rsp)->dma = 0;
3602 fail_rsp_ring:
3603         kfree(*rsp);
3604 fail_rsp:
3605         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3606                 sizeof(request_t), (*req)->ring, (*req)->dma);
3607         (*req)->ring = NULL;
3608         (*req)->dma = 0;
3609 fail_req_ring:
3610         kfree(*req);
3611 fail_req:
3612         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3613                 ha->ct_sns, ha->ct_sns_dma);
3614         ha->ct_sns = NULL;
3615         ha->ct_sns_dma = 0;
3616 fail_free_ms_iocb:
3617         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3618         ha->ms_iocb = NULL;
3619         ha->ms_iocb_dma = 0;
3620 fail_dma_pool:
3621         if (IS_QLA82XX(ha) || ql2xenabledif) {
3622                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3623                 ha->fcp_cmnd_dma_pool = NULL;
3624         }
3625 fail_dl_dma_pool:
3626         if (IS_QLA82XX(ha) || ql2xenabledif) {
3627                 dma_pool_destroy(ha->dl_dma_pool);
3628                 ha->dl_dma_pool = NULL;
3629         }
3630 fail_s_dma_pool:
3631         dma_pool_destroy(ha->s_dma_pool);
3632         ha->s_dma_pool = NULL;
3633 fail_free_nvram:
3634         kfree(ha->nvram);
3635         ha->nvram = NULL;
3636 fail_free_ctx_mempool:
3637         mempool_destroy(ha->ctx_mempool);
3638         ha->ctx_mempool = NULL;
3639 fail_free_srb_mempool:
3640         mempool_destroy(ha->srb_mempool);
3641         ha->srb_mempool = NULL;
3642 fail_free_gid_list:
3643         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3644         ha->gid_list,
3645         ha->gid_list_dma);
3646         ha->gid_list = NULL;
3647         ha->gid_list_dma = 0;
3648 fail_free_tgt_mem:
3649         qlt_mem_free(ha);
3650 fail_free_init_cb:
3651         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3652         ha->init_cb_dma);
3653         ha->init_cb = NULL;
3654         ha->init_cb_dma = 0;
3655 fail:
3656         ql_log(ql_log_fatal, NULL, 0x0030,
3657             "Memory allocation failure.\n");
3658         return -ENOMEM;
3659 }
3660
3661 /*
3662 * qla2x00_free_fw_dump
3663 *       Frees fw dump stuff.
3664 *
3665 * Input:
3666 *       ha = adapter block pointer
3667 */
3668 static void
3669 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3670 {
3671         if (ha->fce)
3672                 dma_free_coherent(&ha->pdev->dev,
3673                     FCE_SIZE, ha->fce, ha->fce_dma);
3674
3675         if (ha->eft)
3676                 dma_free_coherent(&ha->pdev->dev,
3677                     EFT_SIZE, ha->eft, ha->eft_dma);
3678
3679         if (ha->fw_dump)
3680                 vfree(ha->fw_dump);
3681         if (ha->fw_dump_template)
3682                 vfree(ha->fw_dump_template);
3683
3684         ha->fce = NULL;
3685         ha->fce_dma = 0;
3686         ha->eft = NULL;
3687         ha->eft_dma = 0;
3688         ha->fw_dumped = 0;
3689         ha->fw_dump_cap_flags = 0;
3690         ha->fw_dump_reading = 0;
3691         ha->fw_dump = NULL;
3692         ha->fw_dump_len = 0;
3693         ha->fw_dump_template = NULL;
3694         ha->fw_dump_template_len = 0;
3695 }
3696
3697 /*
3698 * qla2x00_mem_free
3699 *      Frees all adapter allocated memory.
3700 *
3701 * Input:
3702 *      ha = adapter block pointer.
3703 */
3704 static void
3705 qla2x00_mem_free(struct qla_hw_data *ha)
3706 {
3707         qla2x00_free_fw_dump(ha);
3708
3709         if (ha->mctp_dump)
3710                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3711                     ha->mctp_dump_dma);
3712
3713         if (ha->srb_mempool)
3714                 mempool_destroy(ha->srb_mempool);
3715
3716         if (ha->dcbx_tlv)
3717                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3718                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3719
3720         if (ha->xgmac_data)
3721                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3722                     ha->xgmac_data, ha->xgmac_data_dma);
3723
3724         if (ha->sns_cmd)
3725                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3726                 ha->sns_cmd, ha->sns_cmd_dma);
3727
3728         if (ha->ct_sns)
3729                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3730                 ha->ct_sns, ha->ct_sns_dma);
3731
3732         if (ha->sfp_data)
3733                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3734
3735         if (ha->ms_iocb)
3736                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3737
3738         if (ha->ex_init_cb)
3739                 dma_pool_free(ha->s_dma_pool,
3740                         ha->ex_init_cb, ha->ex_init_cb_dma);
3741
3742         if (ha->async_pd)
3743                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3744
3745         if (ha->s_dma_pool)
3746                 dma_pool_destroy(ha->s_dma_pool);
3747
3748         if (ha->gid_list)
3749                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3750                 ha->gid_list, ha->gid_list_dma);
3751
3752         if (IS_QLA82XX(ha)) {
3753                 if (!list_empty(&ha->gbl_dsd_list)) {
3754                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3755
3756                         /* clean up allocated prev pool */
3757                         list_for_each_entry_safe(dsd_ptr,
3758                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3759                                 dma_pool_free(ha->dl_dma_pool,
3760                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3761                                 list_del(&dsd_ptr->list);
3762                                 kfree(dsd_ptr);
3763                         }
3764                 }
3765         }
3766
3767         if (ha->dl_dma_pool)
3768                 dma_pool_destroy(ha->dl_dma_pool);
3769
3770         if (ha->fcp_cmnd_dma_pool)
3771                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3772
3773         if (ha->ctx_mempool)
3774                 mempool_destroy(ha->ctx_mempool);
3775
3776         qlt_mem_free(ha);
3777
3778         if (ha->init_cb)
3779                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3780                         ha->init_cb, ha->init_cb_dma);
3781         vfree(ha->optrom_buffer);
3782         kfree(ha->nvram);
3783         kfree(ha->npiv_info);
3784         kfree(ha->swl);
3785         kfree(ha->loop_id_map);
3786
3787         ha->srb_mempool = NULL;
3788         ha->ctx_mempool = NULL;
3789         ha->sns_cmd = NULL;
3790         ha->sns_cmd_dma = 0;
3791         ha->ct_sns = NULL;
3792         ha->ct_sns_dma = 0;
3793         ha->ms_iocb = NULL;
3794         ha->ms_iocb_dma = 0;
3795         ha->init_cb = NULL;
3796         ha->init_cb_dma = 0;
3797         ha->ex_init_cb = NULL;
3798         ha->ex_init_cb_dma = 0;
3799         ha->async_pd = NULL;
3800         ha->async_pd_dma = 0;
3801
3802         ha->s_dma_pool = NULL;
3803         ha->dl_dma_pool = NULL;
3804         ha->fcp_cmnd_dma_pool = NULL;
3805
3806         ha->gid_list = NULL;
3807         ha->gid_list_dma = 0;
3808
3809         ha->tgt.atio_ring = NULL;
3810         ha->tgt.atio_dma = 0;
3811         ha->tgt.tgt_vp_map = NULL;
3812 }
3813
3814 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3815                                                 struct qla_hw_data *ha)
3816 {
3817         struct Scsi_Host *host;
3818         struct scsi_qla_host *vha = NULL;
3819
3820         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3821         if (host == NULL) {
3822                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3823                     "Failed to allocate host from the scsi layer, aborting.\n");
3824                 goto fail;
3825         }
3826
3827         /* Clear our data area */
3828         vha = shost_priv(host);
3829         memset(vha, 0, sizeof(scsi_qla_host_t));
3830
3831         vha->host = host;
3832         vha->host_no = host->host_no;
3833         vha->hw = ha;
3834
3835         INIT_LIST_HEAD(&vha->vp_fcports);
3836         INIT_LIST_HEAD(&vha->work_list);
3837         INIT_LIST_HEAD(&vha->list);
3838
3839         spin_lock_init(&vha->work_lock);
3840
3841         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3842         ql_dbg(ql_dbg_init, vha, 0x0041,
3843             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3844             vha->host, vha->hw, vha,
3845             dev_name(&(ha->pdev->dev)));
3846
3847         return vha;
3848
3849 fail:
3850         return vha;
3851 }
3852
3853 static struct qla_work_evt *
3854 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3855 {
3856         struct qla_work_evt *e;
3857         uint8_t bail;
3858
3859         QLA_VHA_MARK_BUSY(vha, bail);
3860         if (bail)
3861                 return NULL;
3862
3863         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3864         if (!e) {
3865                 QLA_VHA_MARK_NOT_BUSY(vha);
3866                 return NULL;
3867         }
3868
3869         INIT_LIST_HEAD(&e->list);
3870         e->type = type;
3871         e->flags = QLA_EVT_FLAG_FREE;
3872         return e;
3873 }
3874
3875 static int
3876 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3877 {
3878         unsigned long flags;
3879
3880         spin_lock_irqsave(&vha->work_lock, flags);
3881         list_add_tail(&e->list, &vha->work_list);
3882         spin_unlock_irqrestore(&vha->work_lock, flags);
3883         qla2xxx_wake_dpc(vha);
3884
3885         return QLA_SUCCESS;
3886 }
3887
3888 int
3889 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3890     u32 data)
3891 {
3892         struct qla_work_evt *e;
3893
3894         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3895         if (!e)
3896                 return QLA_FUNCTION_FAILED;
3897
3898         e->u.aen.code = code;
3899         e->u.aen.data = data;
3900         return qla2x00_post_work(vha, e);
3901 }
3902
3903 int
3904 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3905 {
3906         struct qla_work_evt *e;
3907
3908         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3909         if (!e)
3910                 return QLA_FUNCTION_FAILED;
3911
3912         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3913         return qla2x00_post_work(vha, e);
3914 }
3915
3916 #define qla2x00_post_async_work(name, type)     \
3917 int qla2x00_post_async_##name##_work(           \
3918     struct scsi_qla_host *vha,                  \
3919     fc_port_t *fcport, uint16_t *data)          \
3920 {                                               \
3921         struct qla_work_evt *e;                 \
3922                                                 \
3923         e = qla2x00_alloc_work(vha, type);      \
3924         if (!e)                                 \
3925                 return QLA_FUNCTION_FAILED;     \
3926                                                 \
3927         e->u.logio.fcport = fcport;             \
3928         if (data) {                             \
3929                 e->u.logio.data[0] = data[0];   \
3930                 e->u.logio.data[1] = data[1];   \
3931         }                                       \
3932         return qla2x00_post_work(vha, e);       \
3933 }
3934
3935 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3936 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3937 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3938 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3939 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3940 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3941
3942 int
3943 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3944 {
3945         struct qla_work_evt *e;
3946
3947         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3948         if (!e)
3949                 return QLA_FUNCTION_FAILED;
3950
3951         e->u.uevent.code = code;
3952         return qla2x00_post_work(vha, e);
3953 }
3954
3955 static void
3956 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3957 {
3958         char event_string[40];
3959         char *envp[] = { event_string, NULL };
3960
3961         switch (code) {
3962         case QLA_UEVENT_CODE_FW_DUMP:
3963                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3964                     vha->host_no);
3965                 break;
3966         default:
3967                 /* do nothing */
3968                 break;
3969         }
3970         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3971 }
3972
3973 int
3974 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3975                         uint32_t *data, int cnt)
3976 {
3977         struct qla_work_evt *e;
3978
3979         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3980         if (!e)
3981                 return QLA_FUNCTION_FAILED;
3982
3983         e->u.aenfx.evtcode = evtcode;
3984         e->u.aenfx.count = cnt;
3985         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3986         return qla2x00_post_work(vha, e);
3987 }
3988
3989 void
3990 qla2x00_do_work(struct scsi_qla_host *vha)
3991 {
3992         struct qla_work_evt *e, *tmp;
3993         unsigned long flags;
3994         LIST_HEAD(work);
3995
3996         spin_lock_irqsave(&vha->work_lock, flags);
3997         list_splice_init(&vha->work_list, &work);
3998         spin_unlock_irqrestore(&vha->work_lock, flags);
3999
4000         list_for_each_entry_safe(e, tmp, &work, list) {
4001                 list_del_init(&e->list);
4002
4003                 switch (e->type) {
4004                 case QLA_EVT_AEN:
4005                         fc_host_post_event(vha->host, fc_get_event_number(),
4006                             e->u.aen.code, e->u.aen.data);
4007                         break;
4008                 case QLA_EVT_IDC_ACK:
4009                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4010                         break;
4011                 case QLA_EVT_ASYNC_LOGIN:
4012                         qla2x00_async_login(vha, e->u.logio.fcport,
4013                             e->u.logio.data);
4014                         break;
4015                 case QLA_EVT_ASYNC_LOGIN_DONE:
4016                         qla2x00_async_login_done(vha, e->u.logio.fcport,
4017                             e->u.logio.data);
4018                         break;
4019                 case QLA_EVT_ASYNC_LOGOUT:
4020                         qla2x00_async_logout(vha, e->u.logio.fcport);
4021                         break;
4022                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4023                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4024                             e->u.logio.data);
4025                         break;
4026                 case QLA_EVT_ASYNC_ADISC:
4027                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4028                             e->u.logio.data);
4029                         break;
4030                 case QLA_EVT_ASYNC_ADISC_DONE:
4031                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4032                             e->u.logio.data);
4033                         break;
4034                 case QLA_EVT_UEVENT:
4035                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4036                         break;
4037                 case QLA_EVT_AENFX:
4038                         qlafx00_process_aen(vha, e);
4039                         break;
4040                 }
4041                 if (e->flags & QLA_EVT_FLAG_FREE)
4042                         kfree(e);
4043
4044                 /* For each work completed decrement vha ref count */
4045                 QLA_VHA_MARK_NOT_BUSY(vha);
4046         }
4047 }
4048
4049 /* Relogins all the fcports of a vport
4050  * Context: dpc thread
4051  */
4052 void qla2x00_relogin(struct scsi_qla_host *vha)
4053 {
4054         fc_port_t       *fcport;
4055         int status;
4056         uint16_t        next_loopid = 0;
4057         struct qla_hw_data *ha = vha->hw;
4058         uint16_t data[2];
4059
4060         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4061         /*
4062          * If the port is not ONLINE then try to login
4063          * to it if we haven't run out of retries.
4064          */
4065                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4066                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4067                         fcport->login_retry--;
4068                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4069                                 if (fcport->flags & FCF_FCP2_DEVICE)
4070                                         ha->isp_ops->fabric_logout(vha,
4071                                                         fcport->loop_id,
4072                                                         fcport->d_id.b.domain,
4073                                                         fcport->d_id.b.area,
4074                                                         fcport->d_id.b.al_pa);
4075
4076                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4077                                         fcport->loop_id = next_loopid =
4078                                             ha->min_external_loopid;
4079                                         status = qla2x00_find_new_loop_id(
4080                                             vha, fcport);
4081                                         if (status != QLA_SUCCESS) {
4082                                                 /* Ran out of IDs to use */
4083                                                 break;
4084                                         }
4085                                 }
4086
4087                                 if (IS_ALOGIO_CAPABLE(ha)) {
4088                                         fcport->flags |= FCF_ASYNC_SENT;
4089                                         data[0] = 0;
4090                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4091                                         status = qla2x00_post_async_login_work(
4092                                             vha, fcport, data);
4093                                         if (status == QLA_SUCCESS)
4094                                                 continue;
4095                                         /* Attempt a retry. */
4096                                         status = 1;
4097                                 } else {
4098                                         status = qla2x00_fabric_login(vha,
4099                                             fcport, &next_loopid);
4100                                         if (status ==  QLA_SUCCESS) {
4101                                                 int status2;
4102                                                 uint8_t opts;
4103
4104                                                 opts = 0;
4105                                                 if (fcport->flags &
4106                                                     FCF_FCP2_DEVICE)
4107                                                         opts |= BIT_1;
4108                                                 status2 =
4109                                                     qla2x00_get_port_database(
4110                                                         vha, fcport, opts);
4111                                                 if (status2 != QLA_SUCCESS)
4112                                                         status = 1;
4113                                         }
4114                                 }
4115                         } else
4116                                 status = qla2x00_local_device_login(vha,
4117                                                                 fcport);
4118
4119                         if (status == QLA_SUCCESS) {
4120                                 fcport->old_loop_id = fcport->loop_id;
4121
4122                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4123                                     "Port login OK: logged in ID 0x%x.\n",
4124                                     fcport->loop_id);
4125
4126                                 qla2x00_update_fcport(vha, fcport);
4127
4128                         } else if (status == 1) {
4129                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4130                                 /* retry the login again */
4131                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4132                                     "Retrying %d login again loop_id 0x%x.\n",
4133                                     fcport->login_retry, fcport->loop_id);
4134                         } else {
4135                                 fcport->login_retry = 0;
4136                         }
4137
4138                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4139                                 qla2x00_clear_loop_id(fcport);
4140                 }
4141                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4142                         break;
4143         }
4144 }
4145
4146 /* Schedule work on any of the dpc-workqueues */
4147 void
4148 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4149 {
4150         struct qla_hw_data *ha = base_vha->hw;
4151
4152         switch (work_code) {
4153         case MBA_IDC_AEN: /* 0x8200 */
4154                 if (ha->dpc_lp_wq)
4155                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4156                 break;
4157
4158         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4159                 if (!ha->flags.nic_core_reset_hdlr_active) {
4160                         if (ha->dpc_hp_wq)
4161                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4162                 } else
4163                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4164                             "NIC Core reset is already active. Skip "
4165                             "scheduling it again.\n");
4166                 break;
4167         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4168                 if (ha->dpc_hp_wq)
4169                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4170                 break;
4171         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4172                 if (ha->dpc_hp_wq)
4173                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4174                 break;
4175         default:
4176                 ql_log(ql_log_warn, base_vha, 0xb05f,
4177                     "Unknown work-code=0x%x.\n", work_code);
4178         }
4179
4180         return;
4181 }
4182
4183 /* Work: Perform NIC Core Unrecoverable state handling */
4184 void
4185 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4186 {
4187         struct qla_hw_data *ha =
4188                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4189         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4190         uint32_t dev_state = 0;
4191
4192         qla83xx_idc_lock(base_vha, 0);
4193         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4194         qla83xx_reset_ownership(base_vha);
4195         if (ha->flags.nic_core_reset_owner) {
4196                 ha->flags.nic_core_reset_owner = 0;
4197                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4198                     QLA8XXX_DEV_FAILED);
4199                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4200                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4201         }
4202         qla83xx_idc_unlock(base_vha, 0);
4203 }
4204
4205 /* Work: Execute IDC state handler */
4206 void
4207 qla83xx_idc_state_handler_work(struct work_struct *work)
4208 {
4209         struct qla_hw_data *ha =
4210                 container_of(work, struct qla_hw_data, idc_state_handler);
4211         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4212         uint32_t dev_state = 0;
4213
4214         qla83xx_idc_lock(base_vha, 0);
4215         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4216         if (dev_state == QLA8XXX_DEV_FAILED ||
4217                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4218                 qla83xx_idc_state_handler(base_vha);
4219         qla83xx_idc_unlock(base_vha, 0);
4220 }
4221
4222 static int
4223 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4224 {
4225         int rval = QLA_SUCCESS;
4226         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4227         uint32_t heart_beat_counter1, heart_beat_counter2;
4228
4229         do {
4230                 if (time_after(jiffies, heart_beat_wait)) {
4231                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4232                             "Nic Core f/w is not alive.\n");
4233                         rval = QLA_FUNCTION_FAILED;
4234                         break;
4235                 }
4236
4237                 qla83xx_idc_lock(base_vha, 0);
4238                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4239                     &heart_beat_counter1);
4240                 qla83xx_idc_unlock(base_vha, 0);
4241                 msleep(100);
4242                 qla83xx_idc_lock(base_vha, 0);
4243                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4244                     &heart_beat_counter2);
4245                 qla83xx_idc_unlock(base_vha, 0);
4246         } while (heart_beat_counter1 == heart_beat_counter2);
4247
4248         return rval;
4249 }
4250
4251 /* Work: Perform NIC Core Reset handling */
4252 void
4253 qla83xx_nic_core_reset_work(struct work_struct *work)
4254 {
4255         struct qla_hw_data *ha =
4256                 container_of(work, struct qla_hw_data, nic_core_reset);
4257         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4258         uint32_t dev_state = 0;
4259
4260         if (IS_QLA2031(ha)) {
4261                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4262                         ql_log(ql_log_warn, base_vha, 0xb081,
4263                             "Failed to dump mctp\n");
4264                 return;
4265         }
4266
4267         if (!ha->flags.nic_core_reset_hdlr_active) {
4268                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4269                         qla83xx_idc_lock(base_vha, 0);
4270                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4271                             &dev_state);
4272                         qla83xx_idc_unlock(base_vha, 0);
4273                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4274                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4275                                     "Nic Core f/w is alive.\n");
4276                                 return;
4277                         }
4278                 }
4279
4280                 ha->flags.nic_core_reset_hdlr_active = 1;
4281                 if (qla83xx_nic_core_reset(base_vha)) {
4282                         /* NIC Core reset failed. */
4283                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4284                             "NIC Core reset failed.\n");
4285                 }
4286                 ha->flags.nic_core_reset_hdlr_active = 0;
4287         }
4288 }
4289
4290 /* Work: Handle 8200 IDC aens */
4291 void
4292 qla83xx_service_idc_aen(struct work_struct *work)
4293 {
4294         struct qla_hw_data *ha =
4295                 container_of(work, struct qla_hw_data, idc_aen);
4296         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4297         uint32_t dev_state, idc_control;
4298
4299         qla83xx_idc_lock(base_vha, 0);
4300         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4301         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4302         qla83xx_idc_unlock(base_vha, 0);
4303         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4304                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4305                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4306                             "Application requested NIC Core Reset.\n");
4307                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4308                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4309                     QLA_SUCCESS) {
4310                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4311                             "Other protocol driver requested NIC Core Reset.\n");
4312                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4313                 }
4314         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4315                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4316                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4317         }
4318 }
4319
4320 static void
4321 qla83xx_wait_logic(void)
4322 {
4323         int i;
4324
4325         /* Yield CPU */
4326         if (!in_interrupt()) {
4327                 /*
4328                  * Wait about 200ms before retrying again.
4329                  * This controls the number of retries for single
4330                  * lock operation.
4331                  */
4332                 msleep(100);
4333                 schedule();
4334         } else {
4335                 for (i = 0; i < 20; i++)
4336                         cpu_relax(); /* This a nop instr on i386 */
4337         }
4338 }
4339
4340 static int
4341 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4342 {
4343         int rval;
4344         uint32_t data;
4345         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4346         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4347         struct qla_hw_data *ha = base_vha->hw;
4348         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4349             "Trying force recovery of the IDC lock.\n");
4350
4351         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4352         if (rval)
4353                 return rval;
4354
4355         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4356                 return QLA_SUCCESS;
4357         } else {
4358                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4359                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4360                     data);
4361                 if (rval)
4362                         return rval;
4363
4364                 msleep(200);
4365
4366                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4367                     &data);
4368                 if (rval)
4369                         return rval;
4370
4371                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4372                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4373                                         ~(idc_lck_rcvry_stage_mask));
4374                         rval = qla83xx_wr_reg(base_vha,
4375                             QLA83XX_IDC_LOCK_RECOVERY, data);
4376                         if (rval)
4377                                 return rval;
4378
4379                         /* Forcefully perform IDC UnLock */
4380                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4381                             &data);
4382                         if (rval)
4383                                 return rval;
4384                         /* Clear lock-id by setting 0xff */
4385                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4386                             0xff);
4387                         if (rval)
4388                                 return rval;
4389                         /* Clear lock-recovery by setting 0x0 */
4390                         rval = qla83xx_wr_reg(base_vha,
4391                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4392                         if (rval)
4393                                 return rval;
4394                 } else
4395                         return QLA_SUCCESS;
4396         }
4397
4398         return rval;
4399 }
4400
4401 static int
4402 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4403 {
4404         int rval = QLA_SUCCESS;
4405         uint32_t o_drv_lockid, n_drv_lockid;
4406         unsigned long lock_recovery_timeout;
4407
4408         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4409 retry_lockid:
4410         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4411         if (rval)
4412                 goto exit;
4413
4414         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4415         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4416                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4417                         return QLA_SUCCESS;
4418                 else
4419                         return QLA_FUNCTION_FAILED;
4420         }
4421
4422         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4423         if (rval)
4424                 goto exit;
4425
4426         if (o_drv_lockid == n_drv_lockid) {
4427                 qla83xx_wait_logic();
4428                 goto retry_lockid;
4429         } else
4430                 return QLA_SUCCESS;
4431
4432 exit:
4433         return rval;
4434 }
4435
4436 void
4437 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4438 {
4439         uint16_t options = (requester_id << 15) | BIT_6;
4440         uint32_t data;
4441         uint32_t lock_owner;
4442         struct qla_hw_data *ha = base_vha->hw;
4443
4444         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4445 retry_lock:
4446         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4447             == QLA_SUCCESS) {
4448                 if (data) {
4449                         /* Setting lock-id to our function-number */
4450                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4451                             ha->portnum);
4452                 } else {
4453                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4454                             &lock_owner);
4455                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4456                             "Failed to acquire IDC lock, acquired by %d, "
4457                             "retrying...\n", lock_owner);
4458
4459                         /* Retry/Perform IDC-Lock recovery */
4460                         if (qla83xx_idc_lock_recovery(base_vha)
4461                             == QLA_SUCCESS) {
4462                                 qla83xx_wait_logic();
4463                                 goto retry_lock;
4464                         } else
4465                                 ql_log(ql_log_warn, base_vha, 0xb075,
4466                                     "IDC Lock recovery FAILED.\n");
4467                 }
4468
4469         }
4470
4471         return;
4472
4473         /* XXX: IDC-lock implementation using access-control mbx */
4474 retry_lock2:
4475         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4476                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4477                     "Failed to acquire IDC lock. retrying...\n");
4478                 /* Retry/Perform IDC-Lock recovery */
4479                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4480                         qla83xx_wait_logic();
4481                         goto retry_lock2;
4482                 } else
4483                         ql_log(ql_log_warn, base_vha, 0xb076,
4484                             "IDC Lock recovery FAILED.\n");
4485         }
4486
4487         return;
4488 }
4489
4490 void
4491 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4492 {
4493         uint16_t options = (requester_id << 15) | BIT_7, retry;
4494         uint32_t data;
4495         struct qla_hw_data *ha = base_vha->hw;
4496
4497         /* IDC-unlock implementation using driver-unlock/lock-id
4498          * remote registers
4499          */
4500         retry = 0;
4501 retry_unlock:
4502         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4503             == QLA_SUCCESS) {
4504                 if (data == ha->portnum) {
4505                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4506                         /* Clearing lock-id by setting 0xff */
4507                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4508                 } else if (retry < 10) {
4509                         /* SV: XXX: IDC unlock retrying needed here? */
4510
4511                         /* Retry for IDC-unlock */
4512                         qla83xx_wait_logic();
4513                         retry++;
4514                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4515                             "Failed to release IDC lock, retyring=%d\n", retry);
4516                         goto retry_unlock;
4517                 }
4518         } else if (retry < 10) {
4519                 /* Retry for IDC-unlock */
4520                 qla83xx_wait_logic();
4521                 retry++;
4522                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4523                     "Failed to read drv-lockid, retyring=%d\n", retry);
4524                 goto retry_unlock;
4525         }
4526
4527         return;
4528
4529         /* XXX: IDC-unlock implementation using access-control mbx */
4530         retry = 0;
4531 retry_unlock2:
4532         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4533                 if (retry < 10) {
4534                         /* Retry for IDC-unlock */
4535                         qla83xx_wait_logic();
4536                         retry++;
4537                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4538                             "Failed to release IDC lock, retyring=%d\n", retry);
4539                         goto retry_unlock2;
4540                 }
4541         }
4542
4543         return;
4544 }
4545
4546 int
4547 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4548 {
4549         int rval = QLA_SUCCESS;
4550         struct qla_hw_data *ha = vha->hw;
4551         uint32_t drv_presence;
4552
4553         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4554         if (rval == QLA_SUCCESS) {
4555                 drv_presence |= (1 << ha->portnum);
4556                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4557                     drv_presence);
4558         }
4559
4560         return rval;
4561 }
4562
4563 int
4564 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4565 {
4566         int rval = QLA_SUCCESS;
4567
4568         qla83xx_idc_lock(vha, 0);
4569         rval = __qla83xx_set_drv_presence(vha);
4570         qla83xx_idc_unlock(vha, 0);
4571
4572         return rval;
4573 }
4574
4575 int
4576 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4577 {
4578         int rval = QLA_SUCCESS;
4579         struct qla_hw_data *ha = vha->hw;
4580         uint32_t drv_presence;
4581
4582         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4583         if (rval == QLA_SUCCESS) {
4584                 drv_presence &= ~(1 << ha->portnum);
4585                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4586                     drv_presence);
4587         }
4588
4589         return rval;
4590 }
4591
4592 int
4593 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4594 {
4595         int rval = QLA_SUCCESS;
4596
4597         qla83xx_idc_lock(vha, 0);
4598         rval = __qla83xx_clear_drv_presence(vha);
4599         qla83xx_idc_unlock(vha, 0);
4600
4601         return rval;
4602 }
4603
4604 static void
4605 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4606 {
4607         struct qla_hw_data *ha = vha->hw;
4608         uint32_t drv_ack, drv_presence;
4609         unsigned long ack_timeout;
4610
4611         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4612         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4613         while (1) {
4614                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4615                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4616                 if ((drv_ack & drv_presence) == drv_presence)
4617                         break;
4618
4619                 if (time_after_eq(jiffies, ack_timeout)) {
4620                         ql_log(ql_log_warn, vha, 0xb067,
4621                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4622                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4623                         /*
4624                          * The function(s) which did not ack in time are forced
4625                          * to withdraw any further participation in the IDC
4626                          * reset.
4627                          */
4628                         if (drv_ack != drv_presence)
4629                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4630                                     drv_ack);
4631                         break;
4632                 }
4633
4634                 qla83xx_idc_unlock(vha, 0);
4635                 msleep(1000);
4636                 qla83xx_idc_lock(vha, 0);
4637         }
4638
4639         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4640         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4641 }
4642
4643 static int
4644 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4645 {
4646         int rval = QLA_SUCCESS;
4647         uint32_t idc_control;
4648
4649         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4650         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4651
4652         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4653         __qla83xx_get_idc_control(vha, &idc_control);
4654         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4655         __qla83xx_set_idc_control(vha, 0);
4656
4657         qla83xx_idc_unlock(vha, 0);
4658         rval = qla83xx_restart_nic_firmware(vha);
4659         qla83xx_idc_lock(vha, 0);
4660
4661         if (rval != QLA_SUCCESS) {
4662                 ql_log(ql_log_fatal, vha, 0xb06a,
4663                     "Failed to restart NIC f/w.\n");
4664                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4665                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4666         } else {
4667                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4668                     "Success in restarting nic f/w.\n");
4669                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4670                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4671         }
4672
4673         return rval;
4674 }
4675
4676 /* Assumes idc_lock always held on entry */
4677 int
4678 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4679 {
4680         struct qla_hw_data *ha = base_vha->hw;
4681         int rval = QLA_SUCCESS;
4682         unsigned long dev_init_timeout;
4683         uint32_t dev_state;
4684
4685         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4686         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4687
4688         while (1) {
4689
4690                 if (time_after_eq(jiffies, dev_init_timeout)) {
4691                         ql_log(ql_log_warn, base_vha, 0xb06e,
4692                             "Initialization TIMEOUT!\n");
4693                         /* Init timeout. Disable further NIC Core
4694                          * communication.
4695                          */
4696                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4697                                 QLA8XXX_DEV_FAILED);
4698                         ql_log(ql_log_info, base_vha, 0xb06f,
4699                             "HW State: FAILED.\n");
4700                 }
4701
4702                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4703                 switch (dev_state) {
4704                 case QLA8XXX_DEV_READY:
4705                         if (ha->flags.nic_core_reset_owner)
4706                                 qla83xx_idc_audit(base_vha,
4707                                     IDC_AUDIT_COMPLETION);
4708                         ha->flags.nic_core_reset_owner = 0;
4709                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4710                             "Reset_owner reset by 0x%x.\n",
4711                             ha->portnum);
4712                         goto exit;
4713                 case QLA8XXX_DEV_COLD:
4714                         if (ha->flags.nic_core_reset_owner)
4715                                 rval = qla83xx_device_bootstrap(base_vha);
4716                         else {
4717                         /* Wait for AEN to change device-state */
4718                                 qla83xx_idc_unlock(base_vha, 0);
4719                                 msleep(1000);
4720                                 qla83xx_idc_lock(base_vha, 0);
4721                         }
4722                         break;
4723                 case QLA8XXX_DEV_INITIALIZING:
4724                         /* Wait for AEN to change device-state */
4725                         qla83xx_idc_unlock(base_vha, 0);
4726                         msleep(1000);
4727                         qla83xx_idc_lock(base_vha, 0);
4728                         break;
4729                 case QLA8XXX_DEV_NEED_RESET:
4730                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4731                                 qla83xx_need_reset_handler(base_vha);
4732                         else {
4733                                 /* Wait for AEN to change device-state */
4734                                 qla83xx_idc_unlock(base_vha, 0);
4735                                 msleep(1000);
4736                                 qla83xx_idc_lock(base_vha, 0);
4737                         }
4738                         /* reset timeout value after need reset handler */
4739                         dev_init_timeout = jiffies +
4740                             (ha->fcoe_dev_init_timeout * HZ);
4741                         break;
4742                 case QLA8XXX_DEV_NEED_QUIESCENT:
4743                         /* XXX: DEBUG for now */
4744                         qla83xx_idc_unlock(base_vha, 0);
4745                         msleep(1000);
4746                         qla83xx_idc_lock(base_vha, 0);
4747                         break;
4748                 case QLA8XXX_DEV_QUIESCENT:
4749                         /* XXX: DEBUG for now */
4750                         if (ha->flags.quiesce_owner)
4751                                 goto exit;
4752
4753                         qla83xx_idc_unlock(base_vha, 0);
4754                         msleep(1000);
4755                         qla83xx_idc_lock(base_vha, 0);
4756                         dev_init_timeout = jiffies +
4757                             (ha->fcoe_dev_init_timeout * HZ);
4758                         break;
4759                 case QLA8XXX_DEV_FAILED:
4760                         if (ha->flags.nic_core_reset_owner)
4761                                 qla83xx_idc_audit(base_vha,
4762                                     IDC_AUDIT_COMPLETION);
4763                         ha->flags.nic_core_reset_owner = 0;
4764                         __qla83xx_clear_drv_presence(base_vha);
4765                         qla83xx_idc_unlock(base_vha, 0);
4766                         qla8xxx_dev_failed_handler(base_vha);
4767                         rval = QLA_FUNCTION_FAILED;
4768                         qla83xx_idc_lock(base_vha, 0);
4769                         goto exit;
4770                 case QLA8XXX_BAD_VALUE:
4771                         qla83xx_idc_unlock(base_vha, 0);
4772                         msleep(1000);
4773                         qla83xx_idc_lock(base_vha, 0);
4774                         break;
4775                 default:
4776                         ql_log(ql_log_warn, base_vha, 0xb071,
4777                             "Unknown Device State: %x.\n", dev_state);
4778                         qla83xx_idc_unlock(base_vha, 0);
4779                         qla8xxx_dev_failed_handler(base_vha);
4780                         rval = QLA_FUNCTION_FAILED;
4781                         qla83xx_idc_lock(base_vha, 0);
4782                         goto exit;
4783                 }
4784         }
4785
4786 exit:
4787         return rval;
4788 }
4789
4790 void
4791 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4792 {
4793         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4794             board_disable);
4795         struct pci_dev *pdev = ha->pdev;
4796         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4797
4798         ql_log(ql_log_warn, base_vha, 0x015b,
4799             "Disabling adapter.\n");
4800
4801         set_bit(UNLOADING, &base_vha->dpc_flags);
4802
4803         qla2x00_delete_all_vps(ha, base_vha);
4804
4805         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4806
4807         qla2x00_dfs_remove(base_vha);
4808
4809         qla84xx_put_chip(base_vha);
4810
4811         if (base_vha->timer_active)
4812                 qla2x00_stop_timer(base_vha);
4813
4814         base_vha->flags.online = 0;
4815
4816         qla2x00_destroy_deferred_work(ha);
4817
4818         /*
4819          * Do not try to stop beacon blink as it will issue a mailbox
4820          * command.
4821          */
4822         qla2x00_free_sysfs_attr(base_vha, false);
4823
4824         fc_remove_host(base_vha->host);
4825
4826         scsi_remove_host(base_vha->host);
4827
4828         base_vha->flags.init_done = 0;
4829         qla25xx_delete_queues(base_vha);
4830         qla2x00_free_irqs(base_vha);
4831         qla2x00_free_fcports(base_vha);
4832         qla2x00_mem_free(ha);
4833         qla82xx_md_free(base_vha);
4834         qla2x00_free_queues(ha);
4835
4836         qla2x00_unmap_iobases(ha);
4837
4838         pci_release_selected_regions(ha->pdev, ha->bars);
4839         pci_disable_pcie_error_reporting(pdev);
4840         pci_disable_device(pdev);
4841
4842         /*
4843          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
4844          */
4845 }
4846
4847 /**************************************************************************
4848 * qla2x00_do_dpc
4849 *   This kernel thread is a task that is schedule by the interrupt handler
4850 *   to perform the background processing for interrupts.
4851 *
4852 * Notes:
4853 * This task always run in the context of a kernel thread.  It
4854 * is kick-off by the driver's detect code and starts up
4855 * up one per adapter. It immediately goes to sleep and waits for
4856 * some fibre event.  When either the interrupt handler or
4857 * the timer routine detects a event it will one of the task
4858 * bits then wake us up.
4859 **************************************************************************/
4860 static int
4861 qla2x00_do_dpc(void *data)
4862 {
4863         int             rval;
4864         scsi_qla_host_t *base_vha;
4865         struct qla_hw_data *ha;
4866
4867         ha = (struct qla_hw_data *)data;
4868         base_vha = pci_get_drvdata(ha->pdev);
4869
4870         set_user_nice(current, MIN_NICE);
4871
4872         set_current_state(TASK_INTERRUPTIBLE);
4873         while (!kthread_should_stop()) {
4874                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4875                     "DPC handler sleeping.\n");
4876
4877                 schedule();
4878
4879                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4880                         goto end_loop;
4881
4882                 if (ha->flags.eeh_busy) {
4883                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4884                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4885                         goto end_loop;
4886                 }
4887
4888                 ha->dpc_active = 1;
4889
4890                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4891                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4892                     base_vha->dpc_flags);
4893
4894                 qla2x00_do_work(base_vha);
4895
4896                 if (IS_P3P_TYPE(ha)) {
4897                         if (IS_QLA8044(ha)) {
4898                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4899                                         &base_vha->dpc_flags)) {
4900                                         qla8044_idc_lock(ha);
4901                                         qla8044_wr_direct(base_vha,
4902                                                 QLA8044_CRB_DEV_STATE_INDEX,
4903                                                 QLA8XXX_DEV_FAILED);
4904                                         qla8044_idc_unlock(ha);
4905                                         ql_log(ql_log_info, base_vha, 0x4004,
4906                                                 "HW State: FAILED.\n");
4907                                         qla8044_device_state_handler(base_vha);
4908                                         continue;
4909                                 }
4910
4911                         } else {
4912                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4913                                         &base_vha->dpc_flags)) {
4914                                         qla82xx_idc_lock(ha);
4915                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4916                                                 QLA8XXX_DEV_FAILED);
4917                                         qla82xx_idc_unlock(ha);
4918                                         ql_log(ql_log_info, base_vha, 0x0151,
4919                                                 "HW State: FAILED.\n");
4920                                         qla82xx_device_state_handler(base_vha);
4921                                         continue;
4922                                 }
4923                         }
4924
4925                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4926                                 &base_vha->dpc_flags)) {
4927
4928                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4929                                     "FCoE context reset scheduled.\n");
4930                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4931                                         &base_vha->dpc_flags))) {
4932                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4933                                                 /* FCoE-ctx reset failed.
4934                                                  * Escalate to chip-reset
4935                                                  */
4936                                                 set_bit(ISP_ABORT_NEEDED,
4937                                                         &base_vha->dpc_flags);
4938                                         }
4939                                         clear_bit(ABORT_ISP_ACTIVE,
4940                                                 &base_vha->dpc_flags);
4941                                 }
4942
4943                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4944                                     "FCoE context reset end.\n");
4945                         }
4946                 } else if (IS_QLAFX00(ha)) {
4947                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4948                                 &base_vha->dpc_flags)) {
4949                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4950                                     "Firmware Reset Recovery\n");
4951                                 if (qlafx00_reset_initialize(base_vha)) {
4952                                         /* Failed. Abort isp later. */
4953                                         if (!test_bit(UNLOADING,
4954                                             &base_vha->dpc_flags)) {
4955                                                 set_bit(ISP_UNRECOVERABLE,
4956                                                     &base_vha->dpc_flags);
4957                                                 ql_dbg(ql_dbg_dpc, base_vha,
4958                                                     0x4021,
4959                                                     "Reset Recovery Failed\n");
4960                                         }
4961                                 }
4962                         }
4963
4964                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4965                                 &base_vha->dpc_flags)) {
4966                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4967                                     "ISPFx00 Target Scan scheduled\n");
4968                                 if (qlafx00_rescan_isp(base_vha)) {
4969                                         if (!test_bit(UNLOADING,
4970                                             &base_vha->dpc_flags))
4971                                                 set_bit(ISP_UNRECOVERABLE,
4972                                                     &base_vha->dpc_flags);
4973                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4974                                             "ISPFx00 Target Scan Failed\n");
4975                                 }
4976                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4977                                     "ISPFx00 Target Scan End\n");
4978                         }
4979                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4980                                 &base_vha->dpc_flags)) {
4981                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4982                                     "ISPFx00 Host Info resend scheduled\n");
4983                                 qlafx00_fx_disc(base_vha,
4984                                     &base_vha->hw->mr.fcport,
4985                                     FXDISC_REG_HOST_INFO);
4986                         }
4987                 }
4988
4989                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4990                                                 &base_vha->dpc_flags)) {
4991
4992                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4993                             "ISP abort scheduled.\n");
4994                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4995                             &base_vha->dpc_flags))) {
4996
4997                                 if (ha->isp_ops->abort_isp(base_vha)) {
4998                                         /* failed. retry later */
4999                                         set_bit(ISP_ABORT_NEEDED,
5000                                             &base_vha->dpc_flags);
5001                                 }
5002                                 clear_bit(ABORT_ISP_ACTIVE,
5003                                                 &base_vha->dpc_flags);
5004                         }
5005
5006                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5007                             "ISP abort end.\n");
5008                 }
5009
5010                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5011                     &base_vha->dpc_flags)) {
5012                         qla2x00_update_fcports(base_vha);
5013                 }
5014
5015                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
5016                         int ret;
5017                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
5018                         if (ret != QLA_SUCCESS)
5019                                 ql_log(ql_log_warn, base_vha, 0x121,
5020                                     "Failed to enable receiving of RSCN "
5021                                     "requests: 0x%x.\n", ret);
5022                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5023                 }
5024
5025                 if (IS_QLAFX00(ha))
5026                         goto loop_resync_check;
5027
5028                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5029                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5030                             "Quiescence mode scheduled.\n");
5031                         if (IS_P3P_TYPE(ha)) {
5032                                 if (IS_QLA82XX(ha))
5033                                         qla82xx_device_state_handler(base_vha);
5034                                 if (IS_QLA8044(ha))
5035                                         qla8044_device_state_handler(base_vha);
5036                                 clear_bit(ISP_QUIESCE_NEEDED,
5037                                     &base_vha->dpc_flags);
5038                                 if (!ha->flags.quiesce_owner) {
5039                                         qla2x00_perform_loop_resync(base_vha);
5040                                         if (IS_QLA82XX(ha)) {
5041                                                 qla82xx_idc_lock(ha);
5042                                                 qla82xx_clear_qsnt_ready(
5043                                                     base_vha);
5044                                                 qla82xx_idc_unlock(ha);
5045                                         } else if (IS_QLA8044(ha)) {
5046                                                 qla8044_idc_lock(ha);
5047                                                 qla8044_clear_qsnt_ready(
5048                                                     base_vha);
5049                                                 qla8044_idc_unlock(ha);
5050                                         }
5051                                 }
5052                         } else {
5053                                 clear_bit(ISP_QUIESCE_NEEDED,
5054                                     &base_vha->dpc_flags);
5055                                 qla2x00_quiesce_io(base_vha);
5056                         }
5057                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5058                             "Quiescence mode end.\n");
5059                 }
5060
5061                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5062                                 &base_vha->dpc_flags) &&
5063                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5064
5065                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5066                             "Reset marker scheduled.\n");
5067                         qla2x00_rst_aen(base_vha);
5068                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5069                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5070                             "Reset marker end.\n");
5071                 }
5072
5073                 /* Retry each device up to login retry count */
5074                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5075                                                 &base_vha->dpc_flags)) &&
5076                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5077                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5078
5079                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5080                             "Relogin scheduled.\n");
5081                         qla2x00_relogin(base_vha);
5082                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5083                             "Relogin end.\n");
5084                 }
5085 loop_resync_check:
5086                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5087                     &base_vha->dpc_flags)) {
5088
5089                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5090                             "Loop resync scheduled.\n");
5091
5092                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5093                             &base_vha->dpc_flags))) {
5094
5095                                 rval = qla2x00_loop_resync(base_vha);
5096
5097                                 clear_bit(LOOP_RESYNC_ACTIVE,
5098                                                 &base_vha->dpc_flags);
5099                         }
5100
5101                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5102                             "Loop resync end.\n");
5103                 }
5104
5105                 if (IS_QLAFX00(ha))
5106                         goto intr_on_check;
5107
5108                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5109                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5110                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5111                         qla2xxx_flash_npiv_conf(base_vha);
5112                 }
5113
5114 intr_on_check:
5115                 if (!ha->interrupts_on)
5116                         ha->isp_ops->enable_intrs(ha);
5117
5118                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5119                                         &base_vha->dpc_flags)) {
5120                         if (ha->beacon_blink_led == 1)
5121                                 ha->isp_ops->beacon_blink(base_vha);
5122                 }
5123
5124                 if (!IS_QLAFX00(ha))
5125                         qla2x00_do_dpc_all_vps(base_vha);
5126
5127                 ha->dpc_active = 0;
5128 end_loop:
5129                 set_current_state(TASK_INTERRUPTIBLE);
5130         } /* End of while(1) */
5131         __set_current_state(TASK_RUNNING);
5132
5133         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5134             "DPC handler exiting.\n");
5135
5136         /*
5137          * Make sure that nobody tries to wake us up again.
5138          */
5139         ha->dpc_active = 0;
5140
5141         /* Cleanup any residual CTX SRBs. */
5142         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5143
5144         return 0;
5145 }
5146
5147 void
5148 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5149 {
5150         struct qla_hw_data *ha = vha->hw;
5151         struct task_struct *t = ha->dpc_thread;
5152
5153         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5154                 wake_up_process(t);
5155 }
5156
5157 /*
5158 *  qla2x00_rst_aen
5159 *      Processes asynchronous reset.
5160 *
5161 * Input:
5162 *      ha  = adapter block pointer.
5163 */
5164 static void
5165 qla2x00_rst_aen(scsi_qla_host_t *vha)
5166 {
5167         if (vha->flags.online && !vha->flags.reset_active &&
5168             !atomic_read(&vha->loop_down_timer) &&
5169             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5170                 do {
5171                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5172
5173                         /*
5174                          * Issue marker command only when we are going to start
5175                          * the I/O.
5176                          */
5177                         vha->marker_needed = 1;
5178                 } while (!atomic_read(&vha->loop_down_timer) &&
5179                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5180         }
5181 }
5182
5183 /**************************************************************************
5184 *   qla2x00_timer
5185 *
5186 * Description:
5187 *   One second timer
5188 *
5189 * Context: Interrupt
5190 ***************************************************************************/
5191 void
5192 qla2x00_timer(scsi_qla_host_t *vha)
5193 {
5194         unsigned long   cpu_flags = 0;
5195         int             start_dpc = 0;
5196         int             index;
5197         srb_t           *sp;
5198         uint16_t        w;
5199         struct qla_hw_data *ha = vha->hw;
5200         struct req_que *req;
5201
5202         if (ha->flags.eeh_busy) {
5203                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5204                     "EEH = %d, restarting timer.\n",
5205                     ha->flags.eeh_busy);
5206                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5207                 return;
5208         }
5209
5210         /*
5211          * Hardware read to raise pending EEH errors during mailbox waits. If
5212          * the read returns -1 then disable the board.
5213          */
5214         if (!pci_channel_offline(ha->pdev)) {
5215                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5216                 qla2x00_check_reg16_for_disconnect(vha, w);
5217         }
5218
5219         /* Make sure qla82xx_watchdog is run only for physical port */
5220         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5221                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5222                         start_dpc++;
5223                 if (IS_QLA82XX(ha))
5224                         qla82xx_watchdog(vha);
5225                 else if (IS_QLA8044(ha))
5226                         qla8044_watchdog(vha);
5227         }
5228
5229         if (!vha->vp_idx && IS_QLAFX00(ha))
5230                 qlafx00_timer_routine(vha);
5231
5232         /* Loop down handler. */
5233         if (atomic_read(&vha->loop_down_timer) > 0 &&
5234             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5235             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5236                 && vha->flags.online) {
5237
5238                 if (atomic_read(&vha->loop_down_timer) ==
5239                     vha->loop_down_abort_time) {
5240
5241                         ql_log(ql_log_info, vha, 0x6008,
5242                             "Loop down - aborting the queues before time expires.\n");
5243
5244                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5245                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5246
5247                         /*
5248                          * Schedule an ISP abort to return any FCP2-device
5249                          * commands.
5250                          */
5251                         /* NPIV - scan physical port only */
5252                         if (!vha->vp_idx) {
5253                                 spin_lock_irqsave(&ha->hardware_lock,
5254                                     cpu_flags);
5255                                 req = ha->req_q_map[0];
5256                                 for (index = 1;
5257                                     index < req->num_outstanding_cmds;
5258                                     index++) {
5259                                         fc_port_t *sfcp;
5260
5261                                         sp = req->outstanding_cmds[index];
5262                                         if (!sp)
5263                                                 continue;
5264                                         if (sp->type != SRB_SCSI_CMD)
5265                                                 continue;
5266                                         sfcp = sp->fcport;
5267                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5268                                                 continue;
5269
5270                                         if (IS_QLA82XX(ha))
5271                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5272                                                         &vha->dpc_flags);
5273                                         else
5274                                                 set_bit(ISP_ABORT_NEEDED,
5275                                                         &vha->dpc_flags);
5276                                         break;
5277                                 }
5278                                 spin_unlock_irqrestore(&ha->hardware_lock,
5279                                                                 cpu_flags);
5280                         }
5281                         start_dpc++;
5282                 }
5283
5284                 /* if the loop has been down for 4 minutes, reinit adapter */
5285                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5286                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5287                                 ql_log(ql_log_warn, vha, 0x6009,
5288                                     "Loop down - aborting ISP.\n");
5289
5290                                 if (IS_QLA82XX(ha))
5291                                         set_bit(FCOE_CTX_RESET_NEEDED,
5292                                                 &vha->dpc_flags);
5293                                 else
5294                                         set_bit(ISP_ABORT_NEEDED,
5295                                                 &vha->dpc_flags);
5296                         }
5297                 }
5298                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5299                     "Loop down - seconds remaining %d.\n",
5300                     atomic_read(&vha->loop_down_timer));
5301         }
5302         /* Check if beacon LED needs to be blinked for physical host only */
5303         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5304                 /* There is no beacon_blink function for ISP82xx */
5305                 if (!IS_P3P_TYPE(ha)) {
5306                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5307                         start_dpc++;
5308                 }
5309         }
5310
5311         /* Process any deferred work. */
5312         if (!list_empty(&vha->work_list))
5313                 start_dpc++;
5314
5315         /* Schedule the DPC routine if needed */
5316         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5317             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5318             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5319             start_dpc ||
5320             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5321             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5322             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5323             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5324             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5325             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5326                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5327                     "isp_abort_needed=%d loop_resync_needed=%d "
5328                     "fcport_update_needed=%d start_dpc=%d "
5329                     "reset_marker_needed=%d",
5330                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5331                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5332                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5333                     start_dpc,
5334                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5335                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5336                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5337                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5338                     "relogin_needed=%d.\n",
5339                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5340                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5341                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5342                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5343                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5344                 qla2xxx_wake_dpc(vha);
5345         }
5346
5347         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5348 }
5349
5350 /* Firmware interface routines. */
5351
5352 #define FW_BLOBS        11
5353 #define FW_ISP21XX      0
5354 #define FW_ISP22XX      1
5355 #define FW_ISP2300      2
5356 #define FW_ISP2322      3
5357 #define FW_ISP24XX      4
5358 #define FW_ISP25XX      5
5359 #define FW_ISP81XX      6
5360 #define FW_ISP82XX      7
5361 #define FW_ISP2031      8
5362 #define FW_ISP8031      9
5363 #define FW_ISP27XX      10
5364
5365 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5366 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5367 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5368 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5369 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5370 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5371 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5372 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5373 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5374 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5375 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5376
5377
5378 static DEFINE_MUTEX(qla_fw_lock);
5379
5380 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5381         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5382         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5383         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5384         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5385         { .name = FW_FILE_ISP24XX, },
5386         { .name = FW_FILE_ISP25XX, },
5387         { .name = FW_FILE_ISP81XX, },
5388         { .name = FW_FILE_ISP82XX, },
5389         { .name = FW_FILE_ISP2031, },
5390         { .name = FW_FILE_ISP8031, },
5391         { .name = FW_FILE_ISP27XX, },
5392 };
5393
5394 struct fw_blob *
5395 qla2x00_request_firmware(scsi_qla_host_t *vha)
5396 {
5397         struct qla_hw_data *ha = vha->hw;
5398         struct fw_blob *blob;
5399
5400         if (IS_QLA2100(ha)) {
5401                 blob = &qla_fw_blobs[FW_ISP21XX];
5402         } else if (IS_QLA2200(ha)) {
5403                 blob = &qla_fw_blobs[FW_ISP22XX];
5404         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5405                 blob = &qla_fw_blobs[FW_ISP2300];
5406         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5407                 blob = &qla_fw_blobs[FW_ISP2322];
5408         } else if (IS_QLA24XX_TYPE(ha)) {
5409                 blob = &qla_fw_blobs[FW_ISP24XX];
5410         } else if (IS_QLA25XX(ha)) {
5411                 blob = &qla_fw_blobs[FW_ISP25XX];
5412         } else if (IS_QLA81XX(ha)) {
5413                 blob = &qla_fw_blobs[FW_ISP81XX];
5414         } else if (IS_QLA82XX(ha)) {
5415                 blob = &qla_fw_blobs[FW_ISP82XX];
5416         } else if (IS_QLA2031(ha)) {
5417                 blob = &qla_fw_blobs[FW_ISP2031];
5418         } else if (IS_QLA8031(ha)) {
5419                 blob = &qla_fw_blobs[FW_ISP8031];
5420         } else if (IS_QLA27XX(ha)) {
5421                 blob = &qla_fw_blobs[FW_ISP27XX];
5422         } else {
5423                 return NULL;
5424         }
5425
5426         mutex_lock(&qla_fw_lock);
5427         if (blob->fw)
5428                 goto out;
5429
5430         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5431                 ql_log(ql_log_warn, vha, 0x0063,
5432                     "Failed to load firmware image (%s).\n", blob->name);
5433                 blob->fw = NULL;
5434                 blob = NULL;
5435                 goto out;
5436         }
5437
5438 out:
5439         mutex_unlock(&qla_fw_lock);
5440         return blob;
5441 }
5442
5443 static void
5444 qla2x00_release_firmware(void)
5445 {
5446         int idx;
5447
5448         mutex_lock(&qla_fw_lock);
5449         for (idx = 0; idx < FW_BLOBS; idx++)
5450                 release_firmware(qla_fw_blobs[idx].fw);
5451         mutex_unlock(&qla_fw_lock);
5452 }
5453
5454 static pci_ers_result_t
5455 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5456 {
5457         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5458         struct qla_hw_data *ha = vha->hw;
5459
5460         ql_dbg(ql_dbg_aer, vha, 0x9000,
5461             "PCI error detected, state %x.\n", state);
5462
5463         switch (state) {
5464         case pci_channel_io_normal:
5465                 ha->flags.eeh_busy = 0;
5466                 return PCI_ERS_RESULT_CAN_RECOVER;
5467         case pci_channel_io_frozen:
5468                 ha->flags.eeh_busy = 1;
5469                 /* For ISP82XX complete any pending mailbox cmd */
5470                 if (IS_QLA82XX(ha)) {
5471                         ha->flags.isp82xx_fw_hung = 1;
5472                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5473                         qla82xx_clear_pending_mbx(vha);
5474                 }
5475                 qla2x00_free_irqs(vha);
5476                 pci_disable_device(pdev);
5477                 /* Return back all IOs */
5478                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5479                 return PCI_ERS_RESULT_NEED_RESET;
5480         case pci_channel_io_perm_failure:
5481                 ha->flags.pci_channel_io_perm_failure = 1;
5482                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5483                 return PCI_ERS_RESULT_DISCONNECT;
5484         }
5485         return PCI_ERS_RESULT_NEED_RESET;
5486 }
5487
5488 static pci_ers_result_t
5489 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5490 {
5491         int risc_paused = 0;
5492         uint32_t stat;
5493         unsigned long flags;
5494         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5495         struct qla_hw_data *ha = base_vha->hw;
5496         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5497         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5498
5499         if (IS_QLA82XX(ha))
5500                 return PCI_ERS_RESULT_RECOVERED;
5501
5502         spin_lock_irqsave(&ha->hardware_lock, flags);
5503         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5504                 stat = RD_REG_DWORD(&reg->hccr);
5505                 if (stat & HCCR_RISC_PAUSE)
5506                         risc_paused = 1;
5507         } else if (IS_QLA23XX(ha)) {
5508                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5509                 if (stat & HSR_RISC_PAUSED)
5510                         risc_paused = 1;
5511         } else if (IS_FWI2_CAPABLE(ha)) {
5512                 stat = RD_REG_DWORD(&reg24->host_status);
5513                 if (stat & HSRX_RISC_PAUSED)
5514                         risc_paused = 1;
5515         }
5516         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5517
5518         if (risc_paused) {
5519                 ql_log(ql_log_info, base_vha, 0x9003,
5520                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5521                 ha->isp_ops->fw_dump(base_vha, 0);
5522
5523                 return PCI_ERS_RESULT_NEED_RESET;
5524         } else
5525                 return PCI_ERS_RESULT_RECOVERED;
5526 }
5527
5528 static uint32_t
5529 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5530 {
5531         uint32_t rval = QLA_FUNCTION_FAILED;
5532         uint32_t drv_active = 0;
5533         struct qla_hw_data *ha = base_vha->hw;
5534         int fn;
5535         struct pci_dev *other_pdev = NULL;
5536
5537         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5538             "Entered %s.\n", __func__);
5539
5540         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5541
5542         if (base_vha->flags.online) {
5543                 /* Abort all outstanding commands,
5544                  * so as to be requeued later */
5545                 qla2x00_abort_isp_cleanup(base_vha);
5546         }
5547
5548
5549         fn = PCI_FUNC(ha->pdev->devfn);
5550         while (fn > 0) {
5551                 fn--;
5552                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5553                     "Finding pci device at function = 0x%x.\n", fn);
5554                 other_pdev =
5555                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5556                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5557                     fn));
5558
5559                 if (!other_pdev)
5560                         continue;
5561                 if (atomic_read(&other_pdev->enable_cnt)) {
5562                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5563                             "Found PCI func available and enable at 0x%x.\n",
5564                             fn);
5565                         pci_dev_put(other_pdev);
5566                         break;
5567                 }
5568                 pci_dev_put(other_pdev);
5569         }
5570
5571         if (!fn) {
5572                 /* Reset owner */
5573                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5574                     "This devfn is reset owner = 0x%x.\n",
5575                     ha->pdev->devfn);
5576                 qla82xx_idc_lock(ha);
5577
5578                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5579                     QLA8XXX_DEV_INITIALIZING);
5580
5581                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5582                     QLA82XX_IDC_VERSION);
5583
5584                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5585                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5586                     "drv_active = 0x%x.\n", drv_active);
5587
5588                 qla82xx_idc_unlock(ha);
5589                 /* Reset if device is not already reset
5590                  * drv_active would be 0 if a reset has already been done
5591                  */
5592                 if (drv_active)
5593                         rval = qla82xx_start_firmware(base_vha);
5594                 else
5595                         rval = QLA_SUCCESS;
5596                 qla82xx_idc_lock(ha);
5597
5598                 if (rval != QLA_SUCCESS) {
5599                         ql_log(ql_log_info, base_vha, 0x900b,
5600                             "HW State: FAILED.\n");
5601                         qla82xx_clear_drv_active(ha);
5602                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5603                             QLA8XXX_DEV_FAILED);
5604                 } else {
5605                         ql_log(ql_log_info, base_vha, 0x900c,
5606                             "HW State: READY.\n");
5607                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5608                             QLA8XXX_DEV_READY);
5609                         qla82xx_idc_unlock(ha);
5610                         ha->flags.isp82xx_fw_hung = 0;
5611                         rval = qla82xx_restart_isp(base_vha);
5612                         qla82xx_idc_lock(ha);
5613                         /* Clear driver state register */
5614                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5615                         qla82xx_set_drv_active(base_vha);
5616                 }
5617                 qla82xx_idc_unlock(ha);
5618         } else {
5619                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5620                     "This devfn is not reset owner = 0x%x.\n",
5621                     ha->pdev->devfn);
5622                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5623                     QLA8XXX_DEV_READY)) {
5624                         ha->flags.isp82xx_fw_hung = 0;
5625                         rval = qla82xx_restart_isp(base_vha);
5626                         qla82xx_idc_lock(ha);
5627                         qla82xx_set_drv_active(base_vha);
5628                         qla82xx_idc_unlock(ha);
5629                 }
5630         }
5631         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5632
5633         return rval;
5634 }
5635
5636 static pci_ers_result_t
5637 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5638 {
5639         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5640         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5641         struct qla_hw_data *ha = base_vha->hw;
5642         struct rsp_que *rsp;
5643         int rc, retries = 10;
5644
5645         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5646             "Slot Reset.\n");
5647
5648         /* Workaround: qla2xxx driver which access hardware earlier
5649          * needs error state to be pci_channel_io_online.
5650          * Otherwise mailbox command timesout.
5651          */
5652         pdev->error_state = pci_channel_io_normal;
5653
5654         pci_restore_state(pdev);
5655
5656         /* pci_restore_state() clears the saved_state flag of the device
5657          * save restored state which resets saved_state flag
5658          */
5659         pci_save_state(pdev);
5660
5661         if (ha->mem_only)
5662                 rc = pci_enable_device_mem(pdev);
5663         else
5664                 rc = pci_enable_device(pdev);
5665
5666         if (rc) {
5667                 ql_log(ql_log_warn, base_vha, 0x9005,
5668                     "Can't re-enable PCI device after reset.\n");
5669                 goto exit_slot_reset;
5670         }
5671
5672         rsp = ha->rsp_q_map[0];
5673         if (qla2x00_request_irqs(ha, rsp))
5674                 goto exit_slot_reset;
5675
5676         if (ha->isp_ops->pci_config(base_vha))
5677                 goto exit_slot_reset;
5678
5679         if (IS_QLA82XX(ha)) {
5680                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5681                         ret = PCI_ERS_RESULT_RECOVERED;
5682                         goto exit_slot_reset;
5683                 } else
5684                         goto exit_slot_reset;
5685         }
5686
5687         while (ha->flags.mbox_busy && retries--)
5688                 msleep(1000);
5689
5690         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5691         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5692                 ret =  PCI_ERS_RESULT_RECOVERED;
5693         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5694
5695
5696 exit_slot_reset:
5697         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5698             "slot_reset return %x.\n", ret);
5699
5700         return ret;
5701 }
5702
5703 static void
5704 qla2xxx_pci_resume(struct pci_dev *pdev)
5705 {
5706         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5707         struct qla_hw_data *ha = base_vha->hw;
5708         int ret;
5709
5710         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5711             "pci_resume.\n");
5712
5713         ret = qla2x00_wait_for_hba_online(base_vha);
5714         if (ret != QLA_SUCCESS) {
5715                 ql_log(ql_log_fatal, base_vha, 0x9002,
5716                     "The device failed to resume I/O from slot/link_reset.\n");
5717         }
5718
5719         pci_cleanup_aer_uncorrect_error_status(pdev);
5720
5721         ha->flags.eeh_busy = 0;
5722 }
5723
5724 static void
5725 qla83xx_disable_laser(scsi_qla_host_t *vha)
5726 {
5727         uint32_t reg, data, fn;
5728         struct qla_hw_data *ha = vha->hw;
5729         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
5730
5731         /* pci func #/port # */
5732         ql_dbg(ql_dbg_init, vha, 0x004b,
5733             "Disabling Laser for hba: %p\n", vha);
5734
5735         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
5736                 (BIT_15|BIT_14|BIT_13|BIT_12));
5737
5738         fn = (fn >> 12);
5739
5740         if (fn & 1)
5741                 reg = PORT_1_2031;
5742         else
5743                 reg = PORT_0_2031;
5744
5745         data = LASER_OFF_2031;
5746
5747         qla83xx_wr_reg(vha, reg, data);
5748 }
5749
5750 static const struct pci_error_handlers qla2xxx_err_handler = {
5751         .error_detected = qla2xxx_pci_error_detected,
5752         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5753         .slot_reset = qla2xxx_pci_slot_reset,
5754         .resume = qla2xxx_pci_resume,
5755 };
5756
5757 static struct pci_device_id qla2xxx_pci_tbl[] = {
5758         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5759         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5760         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5761         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5762         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5763         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5764         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5765         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5766         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5767         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5768         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5769         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5770         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5771         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5772         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5773         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5774         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5775         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5776         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5777         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5778         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5779         { 0 },
5780 };
5781 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5782
5783 static struct pci_driver qla2xxx_pci_driver = {
5784         .name           = QLA2XXX_DRIVER_NAME,
5785         .driver         = {
5786                 .owner          = THIS_MODULE,
5787         },
5788         .id_table       = qla2xxx_pci_tbl,
5789         .probe          = qla2x00_probe_one,
5790         .remove         = qla2x00_remove_one,
5791         .shutdown       = qla2x00_shutdown,
5792         .err_handler    = &qla2xxx_err_handler,
5793 };
5794
5795 static const struct file_operations apidev_fops = {
5796         .owner = THIS_MODULE,
5797         .llseek = noop_llseek,
5798 };
5799
5800 /**
5801  * qla2x00_module_init - Module initialization.
5802  **/
5803 static int __init
5804 qla2x00_module_init(void)
5805 {
5806         int ret = 0;
5807
5808         /* Allocate cache for SRBs. */
5809         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5810             SLAB_HWCACHE_ALIGN, NULL);
5811         if (srb_cachep == NULL) {
5812                 ql_log(ql_log_fatal, NULL, 0x0001,
5813                     "Unable to allocate SRB cache...Failing load!.\n");
5814                 return -ENOMEM;
5815         }
5816
5817         /* Initialize target kmem_cache and mem_pools */
5818         ret = qlt_init();
5819         if (ret < 0) {
5820                 kmem_cache_destroy(srb_cachep);
5821                 return ret;
5822         } else if (ret > 0) {
5823                 /*
5824                  * If initiator mode is explictly disabled by qlt_init(),
5825                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5826                  * performing scsi_scan_target() during LOOP UP event.
5827                  */
5828                 qla2xxx_transport_functions.disable_target_scan = 1;
5829                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5830         }
5831
5832         /* Derive version string. */
5833         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5834         if (ql2xextended_error_logging)
5835                 strcat(qla2x00_version_str, "-debug");
5836
5837         qla2xxx_transport_template =
5838             fc_attach_transport(&qla2xxx_transport_functions);
5839         if (!qla2xxx_transport_template) {
5840                 kmem_cache_destroy(srb_cachep);
5841                 ql_log(ql_log_fatal, NULL, 0x0002,
5842                     "fc_attach_transport failed...Failing load!.\n");
5843                 qlt_exit();
5844                 return -ENODEV;
5845         }
5846
5847         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5848         if (apidev_major < 0) {
5849                 ql_log(ql_log_fatal, NULL, 0x0003,
5850                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5851         }
5852
5853         qla2xxx_transport_vport_template =
5854             fc_attach_transport(&qla2xxx_transport_vport_functions);
5855         if (!qla2xxx_transport_vport_template) {
5856                 kmem_cache_destroy(srb_cachep);
5857                 qlt_exit();
5858                 fc_release_transport(qla2xxx_transport_template);
5859                 ql_log(ql_log_fatal, NULL, 0x0004,
5860                     "fc_attach_transport vport failed...Failing load!.\n");
5861                 return -ENODEV;
5862         }
5863         ql_log(ql_log_info, NULL, 0x0005,
5864             "QLogic Fibre Channel HBA Driver: %s.\n",
5865             qla2x00_version_str);
5866         ret = pci_register_driver(&qla2xxx_pci_driver);
5867         if (ret) {
5868                 kmem_cache_destroy(srb_cachep);
5869                 qlt_exit();
5870                 fc_release_transport(qla2xxx_transport_template);
5871                 fc_release_transport(qla2xxx_transport_vport_template);
5872                 ql_log(ql_log_fatal, NULL, 0x0006,
5873                     "pci_register_driver failed...ret=%d Failing load!.\n",
5874                     ret);
5875         }
5876         return ret;
5877 }
5878
5879 /**
5880  * qla2x00_module_exit - Module cleanup.
5881  **/
5882 static void __exit
5883 qla2x00_module_exit(void)
5884 {
5885         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5886         pci_unregister_driver(&qla2xxx_pci_driver);
5887         qla2x00_release_firmware();
5888         kmem_cache_destroy(srb_cachep);
5889         qlt_exit();
5890         if (ctx_cachep)
5891                 kmem_cache_destroy(ctx_cachep);
5892         fc_release_transport(qla2xxx_transport_template);
5893         fc_release_transport(qla2xxx_transport_vport_template);
5894 }
5895
5896 module_init(qla2x00_module_init);
5897 module_exit(qla2x00_module_exit);
5898
5899 MODULE_AUTHOR("QLogic Corporation");
5900 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5901 MODULE_LICENSE("GPL");
5902 MODULE_VERSION(QLA2XXX_VERSION);
5903 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5904 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5905 MODULE_FIRMWARE(FW_FILE_ISP2300);
5906 MODULE_FIRMWARE(FW_FILE_ISP2322);
5907 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5908 MODULE_FIRMWARE(FW_FILE_ISP25XX);