drivers/staging/comedi/drivers/daqboard2000.c

   1 /*
   2  * comedi/drivers/daqboard2000.c
   3  * hardware driver for IOtech DAQboard/2000
   4  *
   5  * COMEDI - Linux Control and Measurement Device Interface
   6  * Copyright (C) 1999 Anders Blomdell <anders.blomdell@control.lth.se>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18 /*
  19  * Driver: daqboard2000
  20  * Description: IOTech DAQBoard/2000
  21  * Author: Anders Blomdell <anders.blomdell@control.lth.se>
  22  * Status: works
  23  * Updated: Mon, 14 Apr 2008 15:28:52 +0100
  24  * Devices: [IOTech] DAQBoard/2000 (daqboard2000)
  25  *
  26  * Much of the functionality of this driver was determined from reading
  27  * the source code for the Windows driver.
  28  *
  29  * The FPGA on the board requires firmware, which is available from
  30  * http://www.comedi.org in the comedi_nonfree_firmware tarball.
  31  *
  32  * Configuration options: not applicable, uses PCI auto config
  33  */
  34 /*
  35  * This card was obviously never intended to leave the Windows world,
  36  * since it lacked all kind of hardware documentation (except for cable
  37  * pinouts, plug and pray has something to catch up with yet).
  38  *
  39  * With some help from our swedish distributor, we got the Windows sourcecode
  40  * for the card, and here are the findings so far.
  41  *
  42  * 1. A good document that describes the PCI interface chip is 9080db-106.pdf
  43  *    available from http://www.plxtech.com/products/io/pci9080
  44  *
  45  * 2. The initialization done so far is:
  46  *      a. program the FPGA (windows code sans a lot of error messages)
  47  *      b.
  48  *
  49  * 3. Analog out seems to work OK with DAC's disabled, if DAC's are enabled,
  50  *    you have to output values to all enabled DAC's until result appears, I
  51  *    guess that it has something to do with pacer clocks, but the source
  52  *    gives me no clues. I'll keep it simple so far.
  53  *
  54  * 4. Analog in.
  55  *    Each channel in the scanlist seems to be controlled by four
  56  *    control words:
  57  *
  58  *      Word0:
  59  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  60  *        ! | | | ! | | | ! | | | ! | | | !
  61  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  62  *
  63  *      Word1:
  64  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  65  *        ! | | | ! | | | ! | | | ! | | | !
  66  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  67  *         |             |       | | | | |
  68  *         +------+------+       | | | | +-- Digital input (??)
  69  *                |              | | | +---- 10 us settling time
  70  *                |              | | +------ Suspend acquisition (last to scan)
  71  *                |              | +-------- Simultaneous sample and hold
  72  *                |              +---------- Signed data format
  73  *                +------------------------- Correction offset low
  74  *
  75  *      Word2:
  76  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  77  *        ! | | | ! | | | ! | | | ! | | | !
  78  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  79  *         |     | |     | | | | | |     |
  80  *         +-----+ +--+--+ +++ +++ +--+--+
  81  *            |       |     |   |     +----- Expansion channel
  82  *            |       |     |   +----------- Expansion gain
  83  *            |       |     +--------------- Channel (low)
  84  *            |       +--------------------- Correction offset high
  85  *            +----------------------------- Correction gain low
  86  *      Word3:
  87  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  88  *        ! | | | ! | | | ! | | | ! | | | !
  89  *        +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  90  *         |             | | | |   | | | |
  91  *         +------+------+ | | +-+-+ | | +-- Low bank enable
  92  *                |        | |   |   | +---- High bank enable
  93  *                |        | |   |   +------ Hi/low select
  94  *                |        | |   +---------- Gain (1,?,2,4,8,16,32,64)
  95  *                |        | +-------------- differential/single ended
  96  *                |        +---------------- Unipolar
  97  *                +------------------------- Correction gain high
  98  *
  99  * 999. The card seems to have an incredible amount of capabilities, but
 100  *      trying to reverse engineer them from the Windows source is beyond my
 101  *      patience.
 102  *
 103  */
 104
 105 #include <linux/module.h>
 106 #include <linux/delay.h>
 107 #include <linux/interrupt.h>
 108
 109 #include "../comedi_pci.h"
 110
 111 #include "8255.h"
 112
 113 #define DAQBOARD2000_FIRMWARE           "daqboard2000_firmware.bin"
 114
 115 #define DAQBOARD2000_SUBSYSTEM_IDS2     0x0002  /* Daqboard/2000 - 2 Dacs */
 116 #define DAQBOARD2000_SUBSYSTEM_IDS4     0x0004  /* Daqboard/2000 - 4 Dacs */
 117
 118 /* Initialization bits for the Serial EEPROM Control Register */
 119 #define DB2K_SECR_PROG_PIN_HI           0x8001767e
 120 #define DB2K_SECR_PROG_PIN_LO           0x8000767e
 121 #define DB2K_SECR_LOCAL_BUS_HI          0xc000767e
 122 #define DB2K_SECR_LOCAL_BUS_LO          0x8000767e
 123 #define DB2K_SECR_RELOAD_HI             0xa000767e
 124 #define DB2K_SECR_RELOAD_LO             0x8000767e
 125
 126 /* SECR status bits */
 127 #define DAQBOARD2000_EEPROM_PRESENT     0x10000000
 128
 129 /* CPLD status bits */
 130 #define DAQBOARD2000_CPLD_INIT          0x0002
 131 #define DAQBOARD2000_CPLD_DONE          0x0004
 132
 133 static const struct comedi_lrange range_daqboard2000_ai = {
 134         13, {
 135                 BIP_RANGE(10),
 136                 BIP_RANGE(5),
 137                 BIP_RANGE(2.5),
 138                 BIP_RANGE(1.25),
 139                 BIP_RANGE(0.625),
 140                 BIP_RANGE(0.3125),
 141                 BIP_RANGE(0.156),
 142                 UNI_RANGE(10),
 143                 UNI_RANGE(5),
 144                 UNI_RANGE(2.5),
 145                 UNI_RANGE(1.25),
 146                 UNI_RANGE(0.625),
 147                 UNI_RANGE(0.3125)
 148         }
 149 };
 150
 151 /*
 152  * Register Memory Map
 153  */
 154 #define DB2K_REG_ACQ_CONTROL                    0x00            /* u16 (w) */
 155 #define DB2K_REG_ACQ_STATUS                     0x00            /* u16 (r) */
 156 #define DB2K_REG_ACQ_SCAN_LIST_FIFO             0x02            /* u16 */
 157 #define DB2K_REG_ACQ_PACER_CLOCK_DIV_LOW        0x04            /* u32 */
 158 #define DB2K_REG_ACQ_SCAN_COUNTER               0x08            /* u16 */
 159 #define DB2K_REG_ACQ_PACER_CLOCK_DIV_HIGH       0x0a            /* u16 */
 160 #define DB2K_REG_ACQ_TRIGGER_COUNT              0x0c            /* u16 */
 161 #define DB2K_REG_ACQ_RESULTS_FIFO               0x10            /* u16 */
 162 #define DB2K_REG_ACQ_RESULTS_SHADOW             0x14            /* u16 */
 163 #define DB2K_REG_ACQ_ADC_RESULT                 0x18            /* u16 */
 164 #define DB2K_REG_DAC_SCAN_COUNTER               0x1c            /* u16 */
 165 #define DB2K_REG_DAC_CONTROL                    0x20            /* u16 (w) */
 166 #define DB2K_REG_DAC_STATUS                     0x20            /* u16 (r) */
 167 #define DB2K_REG_DAC_FIFO                       0x24            /* s16 */
 168 #define DB2K_REG_DAC_PACER_CLOCK_DIV            0x2a            /* u16 */
 169 #define DB2K_REG_REF_DACS                       0x2c            /* u16 */
 170 #define DB2K_REG_DIO_CONTROL                    0x30            /* u16 */
 171 #define DB2K_REG_P3_HSIO_DATA                   0x32            /* s16 */
 172 #define DB2K_REG_P3_CONTROL                     0x34            /* u16 */
 173 #define DB2K_REG_CAL_EEPROM_CONTROL             0x36            /* u16 */
 174 #define DB2K_REG_DAC_SETTING(x)                 (0x38 + (x) * 2) /* s16 */
 175 #define DB2K_REG_DIO_P2_EXP_IO_8_BIT            0x40            /* s16 */
 176 #define DB2K_REG_COUNTER_TIMER_CONTROL          0x80            /* u16 */
 177 #define DB2K_REG_COUNTER_INPUT(x)               (0x88 + (x) * 2) /* s16 */
 178 #define DB2K_REG_TIMER_DIV(x)                   (0xa0 + (x) * 2) /* u16 */
 179 #define DB2K_REG_DMA_CONTROL                    0xb0            /* u16 */
 180 #define DB2K_REG_TRIG_CONTROL                   0xb2            /* u16 */
 181 #define DB2K_REG_CAL_EEPROM                     0xb8            /* u16 */
 182 #define DB2K_REG_ACQ_DIGITAL_MARK               0xba            /* u16 */
 183 #define DB2K_REG_TRIG_DACS                      0xbc            /* u16 */
 184 #define DB2K_REG_DIO_P2_EXP_IO_16_BIT(x)        (0xc0 + (x) * 2) /* s16 */
 185
 186 /* Scan Sequencer programming */
 187 #define DB2K_ACQ_CONTROL_SEQ_START_SCAN_LIST            0x0011
 188 #define DB2K_ACQ_CONTROL_SEQ_STOP_SCAN_LIST             0x0010
 189
 190 /* Prepare for acquisition */
 191 #define DB2K_ACQ_CONTROL_RESET_SCAN_LIST_FIFO           0x0004
 192 #define DB2K_ACQ_CONTROL_RESET_RESULTS_FIFO             0x0002
 193 #define DB2K_ACQ_CONTROL_RESET_CONFIG_PIPE              0x0001
 194
 195 /* Pacer Clock Control */
 196 #define DB2K_ACQ_CONTROL_ADC_PACER_INTERNAL             0x0030
 197 #define DB2K_ACQ_CONTROL_ADC_PACER_EXTERNAL             0x0032
 198 #define DB2K_ACQ_CONTROL_ADC_PACER_ENABLE               0x0031
 199 #define DB2K_ACQ_CONTROL_ADC_PACER_ENABLE_DAC_PACER     0x0034
 200 #define DB2K_ACQ_CONTROL_ADC_PACER_DISABLE              0x0030
 201 #define DB2K_ACQ_CONTROL_ADC_PACER_NORMAL_MODE          0x0060
 202 #define DB2K_ACQ_CONTROL_ADC_PACER_COMPATIBILITY_MODE   0x0061
 203 #define DB2K_ACQ_CONTROL_ADC_PACER_INTERNAL_OUT_ENABLE  0x0008
 204 #define DB2K_ACQ_CONTROL_ADC_PACER_EXTERNAL_RISING      0x0100
 205
 206 /* Acquisition status bits */
 207 #define DB2K_ACQ_STATUS_RESULTS_FIFO_MORE_1_SAMPLE      0x0001
 208 #define DB2K_ACQ_STATUS_RESULTS_FIFO_HAS_DATA           0x0002
 209 #define DB2K_ACQ_STATUS_RESULTS_FIFO_OVERRUN            0x0004
 210 #define DB2K_ACQ_STATUS_LOGIC_SCANNING                  0x0008
 211 #define DB2K_ACQ_STATUS_CONFIG_PIPE_FULL                0x0010
 212 #define DB2K_ACQ_STATUS_SCAN_LIST_FIFO_EMPTY            0x0020
 213 #define DB2K_ACQ_STATUS_ADC_NOT_READY                   0x0040
 214 #define DB2K_ACQ_STATUS_ARBITRATION_FAILURE             0x0080
 215 #define DB2K_ACQ_STATUS_ADC_PACER_OVERRUN               0x0100
 216 #define DB2K_ACQ_STATUS_DAC_PACER_OVERRUN               0x0200
 217
 218 /* DAC status */
 219 #define DB2K_DAC_STATUS_DAC_FULL                        0x0001
 220 #define DB2K_DAC_STATUS_REF_BUSY                        0x0002
 221 #define DB2K_DAC_STATUS_TRIG_BUSY                       0x0004
 222 #define DB2K_DAC_STATUS_CAL_BUSY                        0x0008
 223 #define DB2K_DAC_STATUS_DAC_BUSY(x)                     (0x0010 << (x))
 224
 225 /* DAC control */
 226 #define DB2K_DAC_CONTROL_ENABLE_BIT                     0x0001
 227 #define DB2K_DAC_CONTROL_DATA_IS_SIGNED                 0x0002
 228 #define DB2K_DAC_CONTROL_RESET_FIFO                     0x0004
 229 #define DB2K_DAC_CONTROL_DAC_DISABLE(x)                 (0x0020 + ((x) << 4))
 230 #define DB2K_DAC_CONTROL_DAC_ENABLE(x)                  (0x0021 + ((x) << 4))
 231 #define DB2K_DAC_CONTROL_PATTERN_DISABLE                0x0060
 232 #define DB2K_DAC_CONTROL_PATTERN_ENABLE                 0x0061
 233
 234 /* Trigger Control */
 235 #define DB2K_TRIG_CONTROL_TYPE_ANALOG                   0x0000
 236 #define DB2K_TRIG_CONTROL_TYPE_TTL                      0x0010
 237 #define DB2K_TRIG_CONTROL_EDGE_HI_LO                    0x0004
 238 #define DB2K_TRIG_CONTROL_EDGE_LO_HI                    0x0000
 239 #define DB2K_TRIG_CONTROL_LEVEL_ABOVE                   0x0000
 240 #define DB2K_TRIG_CONTROL_LEVEL_BELOW                   0x0004
 241 #define DB2K_TRIG_CONTROL_SENSE_LEVEL                   0x0002
 242 #define DB2K_TRIG_CONTROL_SENSE_EDGE                    0x0000
 243 #define DB2K_TRIG_CONTROL_ENABLE                        0x0001
 244 #define DB2K_TRIG_CONTROL_DISABLE                       0x0000
 245
 246 /* Reference Dac Selection */
 247 #define DB2K_REF_DACS_SET                               0x0080
 248 #define DB2K_REF_DACS_SELECT_POS_REF                    0x0100
 249 #define DB2K_REF_DACS_SELECT_NEG_REF                    0x0000
 250
 251 struct daq200_boardtype {
 252         const char *name;
 253         int id;
 254 };
 255
 256 static const struct daq200_boardtype boardtypes[] = {
 257         {"ids2", DAQBOARD2000_SUBSYSTEM_IDS2},
 258         {"ids4", DAQBOARD2000_SUBSYSTEM_IDS4},
 259 };
 260
 261 struct daqboard2000_private {
 262         enum {
 263                 card_daqboard_2000
 264         } card;
 265         void __iomem *plx;
 266 };
 267
 268 static void daqboard2000_write_acq_scan_list_entry(struct comedi_device *dev,
 269                                                    u16 entry)
 270 {
 271         writew(entry & 0x00ff, dev->mmio + DB2K_REG_ACQ_SCAN_LIST_FIFO);
 272         writew((entry >> 8) & 0x00ff,
 273                dev->mmio + DB2K_REG_ACQ_SCAN_LIST_FIFO);
 274 }
 275
 276 static void daqboard2000_setup_sampling(struct comedi_device *dev, int chan,
 277                                         int gain)
 278 {
 279         u16 word0, word1, word2, word3;
 280
 281         /* Channel 0-7 diff, channel 8-23 single ended */
 282         word0 = 0;
 283         word1 = 0x0004;         /* Last scan */
 284         word2 = (chan << 6) & 0x00c0;
 285         switch (chan / 4) {
 286         case 0:
 287                 word3 = 0x0001;
 288                 break;
 289         case 1:
 290                 word3 = 0x0002;
 291                 break;
 292         case 2:
 293                 word3 = 0x0005;
 294                 break;
 295         case 3:
 296                 word3 = 0x0006;
 297                 break;
 298         case 4:
 299                 word3 = 0x0041;
 300                 break;
 301         case 5:
 302                 word3 = 0x0042;
 303                 break;
 304         default:
 305                 word3 = 0;
 306                 break;
 307         }
 308         /* These should be read from EEPROM */
 309         word2 |= 0x0800;        /* offset */
 310         word3 |= 0xc000;        /* gain */
 311         daqboard2000_write_acq_scan_list_entry(dev, word0);
 312         daqboard2000_write_acq_scan_list_entry(dev, word1);
 313         daqboard2000_write_acq_scan_list_entry(dev, word2);
 314         daqboard2000_write_acq_scan_list_entry(dev, word3);
 315 }
 316
 317 static int daqboard2000_ai_status(struct comedi_device *dev,
 318                                   struct comedi_subdevice *s,
 319                                   struct comedi_insn *insn,
 320                                   unsigned long context)
 321 {
 322         unsigned int status;
 323
 324         status = readw(dev->mmio + DB2K_REG_ACQ_STATUS);
 325         if (status & context)
 326                 return 0;
 327         return -EBUSY;
 328 }
 329
 330 static int daqboard2000_ai_insn_read(struct comedi_device *dev,
 331                                      struct comedi_subdevice *s,
 332                                      struct comedi_insn *insn,
 333                                      unsigned int *data)
 334 {
 335         int gain, chan;
 336         int ret;
 337         int i;
 338
 339         writew(DB2K_ACQ_CONTROL_RESET_SCAN_LIST_FIFO |
 340                DB2K_ACQ_CONTROL_RESET_RESULTS_FIFO |
 341                DB2K_ACQ_CONTROL_RESET_CONFIG_PIPE,
 342                dev->mmio + DB2K_REG_ACQ_CONTROL);
 343
 344         /*
 345          * If pacer clock is not set to some high value (> 10 us), we
 346          * risk multiple samples to be put into the result FIFO.
 347          */
 348         /* 1 second, should be long enough */
 349         writel(1000000, dev->mmio + DB2K_REG_ACQ_PACER_CLOCK_DIV_LOW);
 350         writew(0, dev->mmio + DB2K_REG_ACQ_PACER_CLOCK_DIV_HIGH);
 351
 352         gain = CR_RANGE(insn->chanspec);
 353         chan = CR_CHAN(insn->chanspec);
 354
 355         /*
 356          * This doesn't look efficient.  I decided to take the conservative
 357          * approach when I did the insn conversion.  Perhaps it would be
 358          * better to have broken it completely, then someone would have been
 359          * forced to fix it.  --ds
 360          */
 361         for (i = 0; i < insn->n; i++) {
 362                 daqboard2000_setup_sampling(dev, chan, gain);
 363                 /* Enable reading from the scanlist FIFO */
 364                 writew(DB2K_ACQ_CONTROL_SEQ_START_SCAN_LIST,
 365                        dev->mmio + DB2K_REG_ACQ_CONTROL);
 366
 367                 ret = comedi_timeout(dev, s, insn, daqboard2000_ai_status,
 368                                      DB2K_ACQ_STATUS_CONFIG_PIPE_FULL);
 369                 if (ret)
 370                         return ret;
 371
 372                 writew(DB2K_ACQ_CONTROL_ADC_PACER_ENABLE,
 373                        dev->mmio + DB2K_REG_ACQ_CONTROL);
 374
 375                 ret = comedi_timeout(dev, s, insn, daqboard2000_ai_status,
 376                                      DB2K_ACQ_STATUS_LOGIC_SCANNING);
 377                 if (ret)
 378                         return ret;
 379
 380                 ret =
 381                 comedi_timeout(dev, s, insn, daqboard2000_ai_status,
 382                                DB2K_ACQ_STATUS_RESULTS_FIFO_HAS_DATA);
 383                 if (ret)
 384                         return ret;
 385
 386                 data[i] = readw(dev->mmio + DB2K_REG_ACQ_RESULTS_FIFO);
 387                 writew(DB2K_ACQ_CONTROL_ADC_PACER_DISABLE,
 388                        dev->mmio + DB2K_REG_ACQ_CONTROL);
 389                 writew(DB2K_ACQ_CONTROL_SEQ_STOP_SCAN_LIST,
 390                        dev->mmio + DB2K_REG_ACQ_CONTROL);
 391         }
 392
 393         return i;
 394 }
 395
 396 static int daqboard2000_ao_eoc(struct comedi_device *dev,
 397                                struct comedi_subdevice *s,
 398                                struct comedi_insn *insn,
 399                                unsigned long context)
 400 {
 401         unsigned int chan = CR_CHAN(insn->chanspec);
 402         unsigned int status;
 403
 404         status = readw(dev->mmio + DB2K_REG_DAC_STATUS);
 405         if ((status & DB2K_DAC_STATUS_DAC_BUSY(chan)) == 0)
 406                 return 0;
 407         return -EBUSY;
 408 }
 409
 410 static int daqboard2000_ao_insn_write(struct comedi_device *dev,
 411                                       struct comedi_subdevice *s,
 412                                       struct comedi_insn *insn,
 413                                       unsigned int *data)
 414 {
 415         unsigned int chan = CR_CHAN(insn->chanspec);
 416         int i;
 417
 418         for (i = 0; i < insn->n; i++) {
 419                 unsigned int val = data[i];
 420                 int ret;
 421
 422                 writew(val, dev->mmio + DB2K_REG_DAC_SETTING(chan));
 423
 424                 ret = comedi_timeout(dev, s, insn, daqboard2000_ao_eoc, 0);
 425                 if (ret)
 426                         return ret;
 427
 428                 s->readback[chan] = val;
 429         }
 430
 431         return insn->n;
 432 }
 433
 434 static void daqboard2000_reset_local_bus(struct comedi_device *dev)
 435 {
 436         struct daqboard2000_private *devpriv = dev->private;
 437
 438         writel(DB2K_SECR_LOCAL_BUS_HI, devpriv->plx + 0x6c);
 439         mdelay(10);
 440         writel(DB2K_SECR_LOCAL_BUS_LO, devpriv->plx + 0x6c);
 441         mdelay(10);
 442 }
 443
 444 static void daqboard2000_reload_plx(struct comedi_device *dev)
 445 {
 446         struct daqboard2000_private *devpriv = dev->private;
 447
 448         writel(DB2K_SECR_RELOAD_LO, devpriv->plx + 0x6c);
 449         mdelay(10);
 450         writel(DB2K_SECR_RELOAD_HI, devpriv->plx + 0x6c);
 451         mdelay(10);
 452         writel(DB2K_SECR_RELOAD_LO, devpriv->plx + 0x6c);
 453         mdelay(10);
 454 }
 455
 456 static void daqboard2000_pulse_prog_pin(struct comedi_device *dev)
 457 {
 458         struct daqboard2000_private *devpriv = dev->private;
 459
 460         writel(DB2K_SECR_PROG_PIN_HI, devpriv->plx + 0x6c);
 461         mdelay(10);
 462         writel(DB2K_SECR_PROG_PIN_LO, devpriv->plx + 0x6c);
 463         mdelay(10);     /* Not in the original code, but I like symmetry... */
 464 }
 465
 466 static int daqboard2000_poll_cpld(struct comedi_device *dev, int mask)
 467 {
 468         int result = 0;
 469         int i;
 470         int cpld;
 471
 472         /* timeout after 50 tries -> 5ms */
 473         for (i = 0; i < 50; i++) {
 474                 cpld = readw(dev->mmio + 0x1000);
 475                 if ((cpld & mask) == mask) {
 476                         result = 1;
 477                         break;
 478                 }
 479                 usleep_range(100, 1000);
 480         }
 481         udelay(5);
 482         return result;
 483 }
 484
 485 static int daqboard2000_write_cpld(struct comedi_device *dev, int data)
 486 {
 487         int result = 0;
 488
 489         usleep_range(10, 20);
 490         writew(data, dev->mmio + 0x1000);
 491         if ((readw(dev->mmio + 0x1000) & DAQBOARD2000_CPLD_INIT) ==
 492             DAQBOARD2000_CPLD_INIT) {
 493                 result = 1;
 494         }
 495         return result;
 496 }
 497
 498 static int daqboard2000_load_firmware(struct comedi_device *dev,
 499                                       const u8 *cpld_array, size_t len,
 500                                       unsigned long context)
 501 {
 502         struct daqboard2000_private *devpriv = dev->private;
 503         int result = -EIO;
 504         /* Read the serial EEPROM control register */
 505         int secr;
 506         int retry;
 507         size_t i;
 508
 509         /* Check to make sure the serial eeprom is present on the board */
 510         secr = readl(devpriv->plx + 0x6c);
 511         if (!(secr & DAQBOARD2000_EEPROM_PRESENT))
 512                 return -EIO;
 513
 514         for (retry = 0; retry < 3; retry++) {
 515                 daqboard2000_reset_local_bus(dev);
 516                 daqboard2000_reload_plx(dev);
 517                 daqboard2000_pulse_prog_pin(dev);
 518                 if (daqboard2000_poll_cpld(dev, DAQBOARD2000_CPLD_INIT)) {
 519                         for (i = 0; i < len; i++) {
 520                                 if (cpld_array[i] == 0xff &&
 521                                     cpld_array[i + 1] == 0x20)
 522                                         break;
 523                         }
 524                         for (; i < len; i += 2) {
 525                                 int data =
 526                                     (cpld_array[i] << 8) + cpld_array[i + 1];
 527                                 if (!daqboard2000_write_cpld(dev, data))
 528                                         break;
 529                         }
 530                         if (i >= len) {
 531                                 daqboard2000_reset_local_bus(dev);
 532                                 daqboard2000_reload_plx(dev);
 533                                 result = 0;
 534                                 break;
 535                         }
 536                 }
 537         }
 538         return result;
 539 }
 540
 541 static void daqboard2000_adc_stop_dma_transfer(struct comedi_device *dev)
 542 {
 543 }
 544
 545 static void daqboard2000_adc_disarm(struct comedi_device *dev)
 546 {
 547         /* Disable hardware triggers */
 548         udelay(2);
 549         writew(DB2K_TRIG_CONTROL_TYPE_ANALOG | DB2K_TRIG_CONTROL_DISABLE,
 550                dev->mmio + DB2K_REG_TRIG_CONTROL);
 551         udelay(2);
 552         writew(DB2K_TRIG_CONTROL_TYPE_TTL | DB2K_TRIG_CONTROL_DISABLE,
 553                dev->mmio + DB2K_REG_TRIG_CONTROL);
 554
 555         /* Stop the scan list FIFO from loading the configuration pipe */
 556         udelay(2);
 557         writew(DB2K_ACQ_CONTROL_SEQ_STOP_SCAN_LIST,
 558                dev->mmio + DB2K_REG_ACQ_CONTROL);
 559
 560         /* Stop the pacer clock */
 561         udelay(2);
 562         writew(DB2K_ACQ_CONTROL_ADC_PACER_DISABLE,
 563                dev->mmio + DB2K_REG_ACQ_CONTROL);
 564
 565         /* Stop the input dma (abort channel 1) */
 566         daqboard2000_adc_stop_dma_transfer(dev);
 567 }
 568
 569 static void daqboard2000_activate_reference_dacs(struct comedi_device *dev)
 570 {
 571         unsigned int val;
 572         int timeout;
 573
 574         /*  Set the + reference dac value in the FPGA */
 575         writew(DB2K_REF_DACS_SET | DB2K_REF_DACS_SELECT_POS_REF,
 576                dev->mmio + DB2K_REG_REF_DACS);
 577         for (timeout = 0; timeout < 20; timeout++) {
 578                 val = readw(dev->mmio + DB2K_REG_DAC_STATUS);
 579                 if ((val & DB2K_DAC_STATUS_REF_BUSY) == 0)
 580                         break;
 581                 udelay(2);
 582         }
 583
 584         /*  Set the - reference dac value in the FPGA */
 585         writew(DB2K_REF_DACS_SET | DB2K_REF_DACS_SELECT_NEG_REF,
 586                dev->mmio + DB2K_REG_REF_DACS);
 587         for (timeout = 0; timeout < 20; timeout++) {
 588                 val = readw(dev->mmio + DB2K_REG_DAC_STATUS);
 589                 if ((val & DB2K_DAC_STATUS_REF_BUSY) == 0)
 590                         break;
 591                 udelay(2);
 592         }
 593 }
 594
 595 static void daqboard2000_initialize_ctrs(struct comedi_device *dev)
 596 {
 597 }
 598
 599 static void daqboard2000_initialize_tmrs(struct comedi_device *dev)
 600 {
 601 }
 602
 603 static void daqboard2000_dac_disarm(struct comedi_device *dev)
 604 {
 605 }
 606
 607 static void daqboard2000_initialize_adc(struct comedi_device *dev)
 608 {
 609         daqboard2000_adc_disarm(dev);
 610         daqboard2000_activate_reference_dacs(dev);
 611         daqboard2000_initialize_ctrs(dev);
 612         daqboard2000_initialize_tmrs(dev);
 613 }
 614
 615 static void daqboard2000_initialize_dac(struct comedi_device *dev)
 616 {
 617         daqboard2000_dac_disarm(dev);
 618 }
 619
 620 static int daqboard2000_8255_cb(struct comedi_device *dev,
 621                                 int dir, int port, int data,
 622                                 unsigned long iobase)
 623 {
 624         if (dir) {
 625                 writew(data, dev->mmio + iobase + port * 2);
 626                 return 0;
 627         }
 628         return readw(dev->mmio + iobase + port * 2);
 629 }
 630
 631 static const void *daqboard2000_find_boardinfo(struct comedi_device *dev,
 632                                                struct pci_dev *pcidev)
 633 {
 634         const struct daq200_boardtype *board;
 635         int i;
 636
 637         if (pcidev->subsystem_device != PCI_VENDOR_ID_IOTECH)
 638                 return NULL;
 639
 640         for (i = 0; i < ARRAY_SIZE(boardtypes); i++) {
 641                 board = &boardtypes[i];
 642                 if (pcidev->subsystem_device == board->id)
 643                         return board;
 644         }
 645         return NULL;
 646 }
 647
 648 static int daqboard2000_auto_attach(struct comedi_device *dev,
 649                                     unsigned long context_unused)
 650 {
 651         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
 652         const struct daq200_boardtype *board;
 653         struct daqboard2000_private *devpriv;
 654         struct comedi_subdevice *s;
 655         int result;
 656
 657         board = daqboard2000_find_boardinfo(dev, pcidev);
 658         if (!board)
 659                 return -ENODEV;
 660         dev->board_ptr = board;
 661         dev->board_name = board->name;
 662
 663         devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
 664         if (!devpriv)
 665                 return -ENOMEM;
 666
 667         result = comedi_pci_enable(dev);
 668         if (result)
 669                 return result;
 670
 671         devpriv->plx = pci_ioremap_bar(pcidev, 0);
 672         dev->mmio = pci_ioremap_bar(pcidev, 2);
 673         if (!devpriv->plx || !dev->mmio)
 674                 return -ENOMEM;
 675
 676         result = comedi_alloc_subdevices(dev, 3);
 677         if (result)
 678                 return result;
 679
 680         readl(devpriv->plx + 0x6c);
 681
 682         result = comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
 683                                       DAQBOARD2000_FIRMWARE,
 684                                       daqboard2000_load_firmware, 0);
 685         if (result < 0)
 686                 return result;
 687
 688         daqboard2000_initialize_adc(dev);
 689         daqboard2000_initialize_dac(dev);
 690
 691         s = &dev->subdevices[0];
 692         /* ai subdevice */
 693         s->type = COMEDI_SUBD_AI;
 694         s->subdev_flags = SDF_READABLE | SDF_GROUND;
 695         s->n_chan = 24;
 696         s->maxdata = 0xffff;
 697         s->insn_read = daqboard2000_ai_insn_read;
 698         s->range_table = &range_daqboard2000_ai;
 699
 700         s = &dev->subdevices[1];
 701         /* ao subdevice */
 702         s->type = COMEDI_SUBD_AO;
 703         s->subdev_flags = SDF_WRITABLE;
 704         s->n_chan = 2;
 705         s->maxdata = 0xffff;
 706         s->insn_write = daqboard2000_ao_insn_write;
 707         s->range_table = &range_bipolar10;
 708
 709         result = comedi_alloc_subdev_readback(s);
 710         if (result)
 711                 return result;
 712
 713         s = &dev->subdevices[2];
 714         return subdev_8255_init(dev, s, daqboard2000_8255_cb,
 715                                 DB2K_REG_DIO_P2_EXP_IO_8_BIT);
 716 }
 717
 718 static void daqboard2000_detach(struct comedi_device *dev)
 719 {
 720         struct daqboard2000_private *devpriv = dev->private;
 721
 722         if (devpriv && devpriv->plx)
 723                 iounmap(devpriv->plx);
 724         comedi_pci_detach(dev);
 725 }
 726
 727 static struct comedi_driver daqboard2000_driver = {
 728         .driver_name    = "daqboard2000",
 729         .module         = THIS_MODULE,
 730         .auto_attach    = daqboard2000_auto_attach,
 731         .detach         = daqboard2000_detach,
 732 };
 733
 734 static int daqboard2000_pci_probe(struct pci_dev *dev,
 735                                   const struct pci_device_id *id)
 736 {
 737         return comedi_pci_auto_config(dev, &daqboard2000_driver,
 738                                       id->driver_data);
 739 }
 740
 741 static const struct pci_device_id daqboard2000_pci_table[] = {
 742         { PCI_DEVICE(PCI_VENDOR_ID_IOTECH, 0x0409) },
 743         { 0 }
 744 };
 745 MODULE_DEVICE_TABLE(pci, daqboard2000_pci_table);
 746
 747 static struct pci_driver daqboard2000_pci_driver = {
 748         .name           = "daqboard2000",
 749         .id_table       = daqboard2000_pci_table,
 750         .probe          = daqboard2000_pci_probe,
 751         .remove         = comedi_pci_auto_unconfig,
 752 };
 753 module_comedi_pci_driver(daqboard2000_driver, daqboard2000_pci_driver);
 754
 755 MODULE_AUTHOR("Comedi http://www.comedi.org");
 756 MODULE_DESCRIPTION("Comedi low-level driver");
 757 MODULE_LICENSE("GPL");
 758 MODULE_FIRMWARE(DAQBOARD2000_FIRMWARE);