drivers/tty/serial/8250/8250_dma.c

   1 /*
   2  * 8250_dma.c - DMA Engine API support for 8250.c
   3  *
   4  * Copyright (C) 2013 Intel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11 #include <linux/tty.h>
  12 #include <linux/tty_flip.h>
  13 #include <linux/serial_reg.h>
  14 #include <linux/dma-mapping.h>
  15
  16 #include "8250.h"
  17
  18 static void __dma_tx_complete(void *param)
  19 {
  20         struct uart_8250_port   *p = param;
  21         struct uart_8250_dma    *dma = p->dma;
  22         struct circ_buf         *xmit = &p->port.state->xmit;
  23         unsigned long   flags;
  24         int             ret;
  25
  26         dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  27                                 UART_XMIT_SIZE, DMA_TO_DEVICE);
  28
  29         spin_lock_irqsave(&p->port.lock, flags);
  30
  31         dma->tx_running = 0;
  32
  33         xmit->tail += dma->tx_size;
  34         xmit->tail &= UART_XMIT_SIZE - 1;
  35         p->port.icount.tx += dma->tx_size;
  36
  37         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  38                 uart_write_wakeup(&p->port);
  39
  40         ret = serial8250_tx_dma(p);
  41         if (ret) {
  42                 p->ier |= UART_IER_THRI;
  43                 serial_port_out(&p->port, UART_IER, p->ier);
  44         }
  45
  46         spin_unlock_irqrestore(&p->port.lock, flags);
  47 }
  48
  49 static void __dma_rx_complete(void *param)
  50 {
  51         struct uart_8250_port   *p = param;
  52         struct uart_8250_dma    *dma = p->dma;
  53         struct tty_port         *tty_port = &p->port.state->port;
  54         struct dma_tx_state     state;
  55         int                     count;
  56
  57         dma->rx_running = 0;
  58         dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  59
  60         count = dma->rx_size - state.residue;
  61
  62         tty_insert_flip_string(tty_port, dma->rx_buf, count);
  63         p->port.icount.rx += count;
  64
  65         tty_flip_buffer_push(tty_port);
  66 }
  67
  68 int serial8250_tx_dma(struct uart_8250_port *p)
  69 {
  70         struct uart_8250_dma            *dma = p->dma;
  71         struct circ_buf                 *xmit = &p->port.state->xmit;
  72         struct dma_async_tx_descriptor  *desc;
  73         int ret;
  74
  75         if (uart_tx_stopped(&p->port) || dma->tx_running ||
  76             uart_circ_empty(xmit))
  77                 return 0;
  78
  79         dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  80         if (dma->tx_size < p->port.fifosize) {
  81                 ret = -EINVAL;
  82                 goto err;
  83         }
  84
  85         desc = dmaengine_prep_slave_single(dma->txchan,
  86                                            dma->tx_addr + xmit->tail,
  87                                            dma->tx_size, DMA_MEM_TO_DEV,
  88                                            DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  89         if (!desc) {
  90                 ret = -EBUSY;
  91                 goto err;
  92         }
  93
  94         dma->tx_running = 1;
  95         desc->callback = __dma_tx_complete;
  96         desc->callback_param = p;
  97
  98         dma->tx_cookie = dmaengine_submit(desc);
  99
 100         dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
 101                                    UART_XMIT_SIZE, DMA_TO_DEVICE);
 102
 103         dma_async_issue_pending(dma->txchan);
 104         if (dma->tx_err) {
 105                 dma->tx_err = 0;
 106                 if (p->ier & UART_IER_THRI) {
 107                         p->ier &= ~UART_IER_THRI;
 108                         serial_out(p, UART_IER, p->ier);
 109                 }
 110         }
 111         return 0;
 112 err:
 113         dma->tx_err = 1;
 114         return ret;
 115 }
 116
 117 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
 118 {
 119         struct uart_8250_dma            *dma = p->dma;
 120         struct dma_async_tx_descriptor  *desc;
 121
 122         switch (iir & 0x3f) {
 123         case UART_IIR_RLSI:
 124                 /* 8250_core handles errors and break interrupts */
 125                 return -EIO;
 126         case UART_IIR_RX_TIMEOUT:
 127                 /*
 128                  * If RCVR FIFO trigger level was not reached, complete the
 129                  * transfer and let 8250_core copy the remaining data.
 130                  */
 131                 if (dma->rx_running) {
 132                         dmaengine_pause(dma->rxchan);
 133                         __dma_rx_complete(p);
 134                         dmaengine_terminate_all(dma->rxchan);
 135                 }
 136                 return -ETIMEDOUT;
 137         default:
 138                 break;
 139         }
 140
 141         if (dma->rx_running)
 142                 return 0;
 143
 144         desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
 145                                            dma->rx_size, DMA_DEV_TO_MEM,
 146                                            DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 147         if (!desc)
 148                 return -EBUSY;
 149
 150         dma->rx_running = 1;
 151         desc->callback = __dma_rx_complete;
 152         desc->callback_param = p;
 153
 154         dma->rx_cookie = dmaengine_submit(desc);
 155
 156         dma_async_issue_pending(dma->rxchan);
 157
 158         return 0;
 159 }
 160
 161 int serial8250_request_dma(struct uart_8250_port *p)
 162 {
 163         struct uart_8250_dma    *dma = p->dma;
 164         dma_cap_mask_t          mask;
 165
 166         /* Default slave configuration parameters */
 167         dma->rxconf.direction           = DMA_DEV_TO_MEM;
 168         dma->rxconf.src_addr_width      = DMA_SLAVE_BUSWIDTH_1_BYTE;
 169         dma->rxconf.src_addr            = p->port.mapbase + UART_RX;
 170
 171         dma->txconf.direction           = DMA_MEM_TO_DEV;
 172         dma->txconf.dst_addr_width      = DMA_SLAVE_BUSWIDTH_1_BYTE;
 173         dma->txconf.dst_addr            = p->port.mapbase + UART_TX;
 174
 175         dma_cap_zero(mask);
 176         dma_cap_set(DMA_SLAVE, mask);
 177
 178         /* Get a channel for RX */
 179         dma->rxchan = dma_request_slave_channel_compat(mask,
 180                                                        dma->fn, dma->rx_param,
 181                                                        p->port.dev, "rx");
 182         if (!dma->rxchan)
 183                 return -ENODEV;
 184
 185         dmaengine_slave_config(dma->rxchan, &dma->rxconf);
 186
 187         /* Get a channel for TX */
 188         dma->txchan = dma_request_slave_channel_compat(mask,
 189                                                        dma->fn, dma->tx_param,
 190                                                        p->port.dev, "tx");
 191         if (!dma->txchan) {
 192                 dma_release_channel(dma->rxchan);
 193                 return -ENODEV;
 194         }
 195
 196         dmaengine_slave_config(dma->txchan, &dma->txconf);
 197
 198         /* RX buffer */
 199         if (!dma->rx_size)
 200                 dma->rx_size = PAGE_SIZE;
 201
 202         dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
 203                                         &dma->rx_addr, GFP_KERNEL);
 204         if (!dma->rx_buf)
 205                 goto err;
 206
 207         /* TX buffer */
 208         dma->tx_addr = dma_map_single(dma->txchan->device->dev,
 209                                         p->port.state->xmit.buf,
 210                                         UART_XMIT_SIZE,
 211                                         DMA_TO_DEVICE);
 212         if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
 213                 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
 214                                   dma->rx_buf, dma->rx_addr);
 215                 goto err;
 216         }
 217
 218         dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
 219
 220         return 0;
 221 err:
 222         dma_release_channel(dma->rxchan);
 223         dma_release_channel(dma->txchan);
 224
 225         return -ENOMEM;
 226 }
 227 EXPORT_SYMBOL_GPL(serial8250_request_dma);
 228
 229 void serial8250_release_dma(struct uart_8250_port *p)
 230 {
 231         struct uart_8250_dma *dma = p->dma;
 232
 233         if (!dma)
 234                 return;
 235
 236         /* Release RX resources */
 237         dmaengine_terminate_all(dma->rxchan);
 238         dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
 239                           dma->rx_addr);
 240         dma_release_channel(dma->rxchan);
 241         dma->rxchan = NULL;
 242
 243         /* Release TX resources */
 244         dmaengine_terminate_all(dma->txchan);
 245         dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
 246                          UART_XMIT_SIZE, DMA_TO_DEVICE);
 247         dma_release_channel(dma->txchan);
 248         dma->txchan = NULL;
 249         dma->tx_running = 0;
 250
 251         dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
 252 }
 253 EXPORT_SYMBOL_GPL(serial8250_release_dma);