1 #include <linux/module.h>
2 #include <linux/init.h>
3 #include <linux/console.h>
4 #include <linux/platform_device.h>
5 #include <linux/serial_core.h>
6 #include <linux/tty_flip.h>
8 #include <linux/gpio.h>
9 #include <linux/of_irq.h>
10 #include <linux/of_address.h>
11 #include <hwregs/ser_defs.h>
13 #define DRV_NAME "etraxfs-uart"
14 #define UART_NR CONFIG_ETRAX_SERIAL_PORTS
16 #define MODIFY_REG(instance, reg, var) \
18 if (REG_RD_INT(ser, instance, reg) != \
19 REG_TYPE_CONV(int, reg_ser_##reg, var)) \
20 REG_WR(ser, instance, reg, var); \
23 struct uart_cris_port {
24 struct uart_port port;
29 void __iomem *regi_ser;
31 struct gpio_desc *dtr_pin;
32 struct gpio_desc *dsr_pin;
33 struct gpio_desc *ri_pin;
34 struct gpio_desc *cd_pin;
39 static struct uart_driver etraxfs_uart_driver;
40 static struct uart_port *console_port;
41 static int console_baud = 115200;
42 static struct uart_cris_port *etraxfs_uart_ports[UART_NR];
44 static void cris_serial_port_init(struct uart_port *port, int line);
45 static void etraxfs_uart_stop_rx(struct uart_port *port);
46 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port);
48 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
50 cris_console_write(struct console *co, const char *s, unsigned int count)
52 struct uart_cris_port *up;
54 reg_ser_r_stat_din stat;
55 reg_ser_rw_tr_dma_en tr_dma_en, old;
57 up = etraxfs_uart_ports[co->index];
62 /* Switch to manual mode. */
63 tr_dma_en = old = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
64 if (tr_dma_en.en == regk_ser_yes) {
65 tr_dma_en.en = regk_ser_no;
66 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
70 for (i = 0; i < count; i++) {
74 stat = REG_RD(ser, up->regi_ser, r_stat_din);
75 } while (!stat.tr_rdy);
76 REG_WR_INT(ser, up->regi_ser, rw_dout, '\r');
78 /* Wait until transmitter is ready and send. */
80 stat = REG_RD(ser, up->regi_ser, r_stat_din);
81 } while (!stat.tr_rdy);
82 REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]);
86 if (tr_dma_en.en != old.en)
87 REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
91 cris_console_setup(struct console *co, char *options)
93 struct uart_port *port;
99 if (co->index < 0 || co->index >= UART_NR)
101 port = &etraxfs_uart_ports[co->index]->port;
104 co->flags |= CON_CONSDEV;
107 uart_parse_options(options, &baud, &parity, &bits, &flow);
109 cris_serial_port_init(port, co->index);
110 uart_set_options(port, co, baud, parity, bits, flow);
115 static struct console cris_console = {
117 .write = cris_console_write,
118 .device = uart_console_device,
119 .setup = cris_console_setup,
120 .flags = CON_PRINTBUFFER,
122 .data = &etraxfs_uart_driver,
124 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
126 static struct uart_driver etraxfs_uart_driver = {
127 .owner = THIS_MODULE,
128 .driver_name = "serial",
133 #ifdef CONFIG_SERIAL_ETRAXFS_CONSOLE
134 .cons = &cris_console,
135 #endif /* CONFIG_SERIAL_ETRAXFS_CONSOLE */
138 static inline int crisv32_serial_get_rts(struct uart_cris_port *up)
140 void __iomem *regi_ser = up->regi_ser;
142 * Return what the user has controlled rts to or
143 * what the pin is? (if auto_rts is used it differs during tx)
145 reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
147 return !(rstat.rts_n == regk_ser_active);
151 * A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
154 static inline void crisv32_serial_set_rts(struct uart_cris_port *up,
157 void __iomem *regi_ser = up->regi_ser;
160 reg_ser_rw_rec_ctrl rec_ctrl;
162 local_irq_save(flags);
163 rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
166 rec_ctrl.rts_n = regk_ser_active;
168 rec_ctrl.rts_n = regk_ser_inactive;
169 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
170 local_irq_restore(flags);
173 static inline int crisv32_serial_get_cts(struct uart_cris_port *up)
175 void __iomem *regi_ser = up->regi_ser;
176 reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
178 return (rstat.cts_n == regk_ser_active);
182 * Send a single character for XON/XOFF purposes. We do it in this separate
183 * function instead of the alternative support port.x_char, in the ...start_tx
184 * function, so we don't mix up this case with possibly enabling transmission
185 * of queued-up data (in case that's disabled after *receiving* an XOFF or
186 * negative CTS). This function is used for both DMA and non-DMA case; see HW
187 * docs specifically blessing sending characters manually when DMA for
188 * transmission is enabled and running. We may be asked to transmit despite
189 * the transmitter being disabled by a ..._stop_tx call so we need to enable
190 * it temporarily but restore the state afterwards.
192 static void etraxfs_uart_send_xchar(struct uart_port *port, char ch)
194 struct uart_cris_port *up = (struct uart_cris_port *)port;
195 reg_ser_rw_dout dout = { .data = ch };
196 reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
197 reg_ser_r_stat_din rstat;
198 reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
199 void __iomem *regi_ser = up->regi_ser;
203 * Wait for tr_rdy in case a character is already being output. Make
204 * sure we have integrity between the register reads and the writes
205 * below, but don't busy-wait with interrupts off and the port lock
208 spin_lock_irqsave(&port->lock, flags);
210 spin_unlock_irqrestore(&port->lock, flags);
211 spin_lock_irqsave(&port->lock, flags);
212 prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
213 rstat = REG_RD(ser, regi_ser, r_stat_din);
214 } while (!rstat.tr_rdy);
217 * Ack an interrupt if one was just issued for the previous character
218 * that was output. This is required for non-DMA as the interrupt is
219 * used as the only indicator that the transmitter is ready and it
220 * isn't while this x_char is being transmitted.
222 REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
224 /* Enable the transmitter in case it was disabled. */
226 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
229 * Finally, send the blessed character; nothing should stop it now,
230 * except for an xoff-detected state, which we'll handle below.
232 REG_WR(ser, regi_ser, rw_dout, dout);
233 up->port.icount.tx++;
235 /* There might be an xoff state to clear. */
236 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
239 * Clear any xoff state that *may* have been there to
240 * inhibit transmission of the character.
242 if (rstat.xoff_detect) {
243 reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
244 reg_ser_rw_tr_dma_en tr_dma_en;
246 REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
247 tr_dma_en = REG_RD(ser, regi_ser, rw_tr_dma_en);
250 * If we had an xoff state but cleared it, instead sneak in a
251 * disabled state for the transmitter, after the character we
252 * sent. Thus we keep the port disabled, just as if the xoff
253 * state was still in effect (or actually, as if stop_tx had
254 * been called, as we stop DMA too).
256 prev_tr_ctrl.stop = 1;
259 REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
262 /* Restore "previous" enabled/disabled state of the transmitter. */
263 REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
265 spin_unlock_irqrestore(&port->lock, flags);
269 * Do not spin_lock_irqsave or disable interrupts by other means here; it's
270 * already done by the caller.
272 static void etraxfs_uart_start_tx(struct uart_port *port)
274 struct uart_cris_port *up = (struct uart_cris_port *)port;
276 /* we have already done below if a write is ongoing */
277 if (up->write_ongoing)
280 /* Signal that write is ongoing */
281 up->write_ongoing = 1;
283 etraxfs_uart_start_tx_bottom(port);
286 static inline void etraxfs_uart_start_tx_bottom(struct uart_port *port)
288 struct uart_cris_port *up = (struct uart_cris_port *)port;
289 void __iomem *regi_ser = up->regi_ser;
290 reg_ser_rw_tr_ctrl tr_ctrl;
291 reg_ser_rw_intr_mask intr_mask;
293 tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
294 tr_ctrl.stop = regk_ser_no;
295 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
296 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
297 intr_mask.tr_rdy = regk_ser_yes;
298 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
302 * This function handles both the DMA and non-DMA case by ordering the
303 * transmitter to stop of after the current character. We don't need to wait
304 * for any such character to be completely transmitted; we do that where it
305 * matters, like in etraxfs_uart_set_termios. Don't busy-wait here; see
306 * Documentation/serial/driver: this function is called within
307 * spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
308 * There's no documented need to set the txd pin to any particular value;
309 * break setting is controlled solely by etraxfs_uart_break_ctl.
311 static void etraxfs_uart_stop_tx(struct uart_port *port)
313 struct uart_cris_port *up = (struct uart_cris_port *)port;
314 void __iomem *regi_ser = up->regi_ser;
315 reg_ser_rw_tr_ctrl tr_ctrl;
316 reg_ser_rw_intr_mask intr_mask;
317 reg_ser_rw_tr_dma_en tr_dma_en = {0};
318 reg_ser_rw_xoff_clr xoff_clr = {0};
321 * For the non-DMA case, we'd get a tr_rdy interrupt that we're not
322 * interested in as we're not transmitting any characters. For the
323 * DMA case, that interrupt is already turned off, but no reason to
324 * waste code on conditionals here.
326 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
327 intr_mask.tr_rdy = regk_ser_no;
328 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
330 tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
332 REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
335 * Always clear possible hardware xoff-detected state here, no need to
336 * unnecessary consider mctrl settings and when they change. We clear
337 * it here rather than in start_tx: both functions are called as the
338 * effect of XOFF processing, but start_tx is also called when upper
339 * levels tell the driver that there are more characters to send, so
340 * avoid adding code there.
343 REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
346 * Disable transmitter DMA, so that if we're in XON/XOFF, we can send
347 * those single characters without also giving go-ahead for queued up
351 REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
354 * Make sure that write_ongoing is reset when stopping tx.
356 up->write_ongoing = 0;
359 static void etraxfs_uart_stop_rx(struct uart_port *port)
361 struct uart_cris_port *up = (struct uart_cris_port *)port;
362 void __iomem *regi_ser = up->regi_ser;
363 reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
365 rec_ctrl.en = regk_ser_no;
366 REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
369 static unsigned int etraxfs_uart_tx_empty(struct uart_port *port)
371 struct uart_cris_port *up = (struct uart_cris_port *)port;
374 reg_ser_r_stat_din rstat = {0};
376 spin_lock_irqsave(&up->port.lock, flags);
378 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
379 ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
381 spin_unlock_irqrestore(&up->port.lock, flags);
384 static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
386 struct uart_cris_port *up = (struct uart_cris_port *)port;
390 if (crisv32_serial_get_rts(up))
392 /* DTR is active low */
393 if (up->dtr_pin && !gpiod_get_raw_value(up->dtr_pin))
395 /* CD is active low */
396 if (up->cd_pin && !gpiod_get_raw_value(up->cd_pin))
398 /* RI is active low */
399 if (up->ri_pin && !gpiod_get_raw_value(up->ri_pin))
401 /* DSR is active low */
402 if (up->dsr_pin && !gpiod_get_raw_value(up->dsr_pin))
404 if (crisv32_serial_get_cts(up))
409 static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
411 struct uart_cris_port *up = (struct uart_cris_port *)port;
413 crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
414 /* DTR is active low */
416 gpiod_set_raw_value(up->dtr_pin, mctrl & TIOCM_DTR ? 0 : 1);
417 /* RI is active low */
419 gpiod_set_raw_value(up->ri_pin, mctrl & TIOCM_RNG ? 0 : 1);
420 /* CD is active low */
422 gpiod_set_raw_value(up->cd_pin, mctrl & TIOCM_CD ? 0 : 1);
425 static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
427 struct uart_cris_port *up = (struct uart_cris_port *)port;
429 reg_ser_rw_tr_ctrl tr_ctrl;
430 reg_ser_rw_tr_dma_en tr_dma_en;
431 reg_ser_rw_intr_mask intr_mask;
433 spin_lock_irqsave(&up->port.lock, flags);
434 tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
435 tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
436 intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
438 if (break_state != 0) { /* Send break */
440 * We need to disable DMA (if used) or tr_rdy interrupts if no
441 * DMA. No need to make this conditional on use of DMA;
442 * disabling will be a no-op for the other mode.
444 intr_mask.tr_rdy = regk_ser_no;
448 * Stop transmission and set the txd pin to 0 after the
449 * current character. The txd setting will take effect after
450 * any current transmission has completed.
455 /* Re-enable the serial interrupt. */
456 intr_mask.tr_rdy = regk_ser_yes;
461 REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
462 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
463 REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
465 spin_unlock_irqrestore(&up->port.lock, flags);
469 transmit_chars_no_dma(struct uart_cris_port *up)
472 struct circ_buf *xmit = &up->port.state->xmit;
474 void __iomem *regi_ser = up->regi_ser;
475 reg_ser_r_stat_din rstat;
476 reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
478 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
479 /* No more to send, so disable the interrupt. */
480 reg_ser_rw_intr_mask intr_mask;
482 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
483 intr_mask.tr_rdy = 0;
484 intr_mask.tr_empty = 0;
485 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
486 up->write_ongoing = 0;
490 /* If the serport is fast, we send up to max_count bytes before
494 reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
496 REG_WR(ser, regi_ser, rw_dout, dout);
497 REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
498 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
499 up->port.icount.tx++;
500 if (xmit->head == xmit->tail)
502 rstat = REG_RD(ser, regi_ser, r_stat_din);
503 } while ((--max_count > 0) && rstat.tr_rdy);
505 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
506 uart_write_wakeup(&up->port);
509 static void receive_chars_no_dma(struct uart_cris_port *up)
511 reg_ser_rs_stat_din stat_din;
512 reg_ser_r_stat_din rstat;
513 struct tty_port *port;
514 struct uart_icount *icount;
517 reg_ser_rw_ack_intr ack_intr = { 0 };
519 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
520 icount = &up->port.icount;
521 port = &up->port.state->port;
524 stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
528 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
531 if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
532 if (stat_din.data == 0x00 &&
533 stat_din.framing_err) {
534 /* Most likely a break. */
537 } else if (stat_din.par_err) {
540 } else if (stat_din.orun) {
543 } else if (stat_din.framing_err) {
550 * If this becomes important, we probably *could* handle this
551 * gracefully by keeping track of the unhandled character.
553 if (!tty_insert_flip_char(port, stat_din.data, flag))
554 panic("%s: No tty buffer space", __func__);
555 rstat = REG_RD(ser, up->regi_ser, r_stat_din);
556 } while (rstat.dav && (max_count-- > 0));
557 spin_unlock(&up->port.lock);
558 tty_flip_buffer_push(port);
559 spin_lock(&up->port.lock);
563 ser_interrupt(int irq, void *dev_id)
565 struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
566 void __iomem *regi_ser;
569 spin_lock(&up->port.lock);
571 regi_ser = up->regi_ser;
574 reg_ser_r_masked_intr masked_intr;
576 masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
578 * Check what interrupts are active before taking
579 * actions. If DMA is used the interrupt shouldn't
582 if (masked_intr.dav) {
583 receive_chars_no_dma(up);
587 if (masked_intr.tr_rdy) {
588 transmit_chars_no_dma(up);
592 spin_unlock(&up->port.lock);
593 return IRQ_RETVAL(handled);
596 #ifdef CONFIG_CONSOLE_POLL
597 static int etraxfs_uart_get_poll_char(struct uart_port *port)
599 reg_ser_rs_stat_din stat;
600 reg_ser_rw_ack_intr ack_intr = { 0 };
601 struct uart_cris_port *up = (struct uart_cris_port *)port;
604 stat = REG_RD(ser, up->regi_ser, rs_stat_din);
607 /* Ack the data_avail interrupt. */
609 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
614 static void etraxfs_uart_put_poll_char(struct uart_port *port,
617 reg_ser_r_stat_din stat;
618 struct uart_cris_port *up = (struct uart_cris_port *)port;
621 stat = REG_RD(ser, up->regi_ser, r_stat_din);
622 } while (!stat.tr_rdy);
623 REG_WR_INT(ser, up->regi_ser, rw_dout, c);
625 #endif /* CONFIG_CONSOLE_POLL */
627 static int etraxfs_uart_startup(struct uart_port *port)
629 struct uart_cris_port *up = (struct uart_cris_port *)port;
631 reg_ser_rw_intr_mask ser_intr_mask = {0};
633 ser_intr_mask.dav = regk_ser_yes;
635 if (request_irq(etraxfs_uart_ports[port->line]->irq, ser_interrupt,
636 0, DRV_NAME, etraxfs_uart_ports[port->line]))
637 panic("irq ser%d", port->line);
639 spin_lock_irqsave(&up->port.lock, flags);
641 REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
643 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
645 spin_unlock_irqrestore(&up->port.lock, flags);
650 static void etraxfs_uart_shutdown(struct uart_port *port)
652 struct uart_cris_port *up = (struct uart_cris_port *)port;
655 spin_lock_irqsave(&up->port.lock, flags);
657 etraxfs_uart_stop_tx(port);
658 etraxfs_uart_stop_rx(port);
660 free_irq(etraxfs_uart_ports[port->line]->irq,
661 etraxfs_uart_ports[port->line]);
663 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
665 spin_unlock_irqrestore(&up->port.lock, flags);
670 etraxfs_uart_set_termios(struct uart_port *port, struct ktermios *termios,
671 struct ktermios *old)
673 struct uart_cris_port *up = (struct uart_cris_port *)port;
675 reg_ser_rw_xoff xoff;
676 reg_ser_rw_xoff_clr xoff_clr = {0};
677 reg_ser_rw_tr_ctrl tx_ctrl = {0};
678 reg_ser_rw_tr_dma_en tx_dma_en = {0};
679 reg_ser_rw_rec_ctrl rx_ctrl = {0};
680 reg_ser_rw_tr_baud_div tx_baud_div = {0};
681 reg_ser_rw_rec_baud_div rx_baud_div = {0};
685 termios->c_cflag == old->c_cflag &&
686 termios->c_iflag == old->c_iflag)
689 /* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
690 tx_ctrl.base_freq = regk_ser_f29_493;
693 tx_ctrl.auto_rts = regk_ser_no;
695 tx_ctrl.auto_cts = 0;
696 /* Rx: 8 bit, no/even parity. */
697 rx_ctrl.dma_err = regk_ser_stop;
698 rx_ctrl.sampling = regk_ser_majority;
701 rx_ctrl.rts_n = regk_ser_inactive;
703 /* Common for tx and rx: 8N1. */
704 tx_ctrl.data_bits = regk_ser_bits8;
705 rx_ctrl.data_bits = regk_ser_bits8;
706 tx_ctrl.par = regk_ser_even;
707 rx_ctrl.par = regk_ser_even;
708 tx_ctrl.par_en = regk_ser_no;
709 rx_ctrl.par_en = regk_ser_no;
711 tx_ctrl.stop_bits = regk_ser_bits1;
714 * Change baud-rate and write it to the hardware.
716 * baud_clock = base_freq / (divisor*8)
717 * divisor = base_freq / (baud_clock * 8)
718 * base_freq is either:
719 * off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
720 * 20.493MHz is used for standard baudrates
724 * For the console port we keep the original baudrate here. Not very
727 if ((port != console_port) || old)
728 baud = uart_get_baud_rate(port, termios, old, 0,
733 tx_baud_div.div = 29493000 / (8 * baud);
734 /* Rx uses same as tx. */
735 rx_baud_div.div = tx_baud_div.div;
736 rx_ctrl.base_freq = tx_ctrl.base_freq;
738 if ((termios->c_cflag & CSIZE) == CS7) {
739 /* Set 7 bit mode. */
740 tx_ctrl.data_bits = regk_ser_bits7;
741 rx_ctrl.data_bits = regk_ser_bits7;
744 if (termios->c_cflag & CSTOPB) {
745 /* Set 2 stop bit mode. */
746 tx_ctrl.stop_bits = regk_ser_bits2;
749 if (termios->c_cflag & PARENB) {
751 tx_ctrl.par_en = regk_ser_yes;
752 rx_ctrl.par_en = regk_ser_yes;
755 if (termios->c_cflag & CMSPAR) {
756 if (termios->c_cflag & PARODD) {
757 /* Set mark parity if PARODD and CMSPAR. */
758 tx_ctrl.par = regk_ser_mark;
759 rx_ctrl.par = regk_ser_mark;
761 tx_ctrl.par = regk_ser_space;
762 rx_ctrl.par = regk_ser_space;
765 if (termios->c_cflag & PARODD) {
766 /* Set odd parity. */
767 tx_ctrl.par = regk_ser_odd;
768 rx_ctrl.par = regk_ser_odd;
772 if (termios->c_cflag & CRTSCTS) {
773 /* Enable automatic CTS handling. */
774 tx_ctrl.auto_cts = regk_ser_yes;
777 /* Make sure the tx and rx are enabled. */
778 tx_ctrl.en = regk_ser_yes;
779 rx_ctrl.en = regk_ser_yes;
781 spin_lock_irqsave(&port->lock, flags);
784 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
786 /* Actually write the control regs (if modified) to the hardware. */
787 uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
788 MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
789 MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
791 MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
792 MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
795 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
797 xoff = REG_RD(ser, up->regi_ser, rw_xoff);
799 if (up->port.state && up->port.state->port.tty &&
800 (up->port.state->port.tty->termios.c_iflag & IXON)) {
801 xoff.chr = STOP_CHAR(up->port.state->port.tty);
802 xoff.automatic = regk_ser_yes;
804 xoff.automatic = regk_ser_no;
806 MODIFY_REG(up->regi_ser, rw_xoff, xoff);
809 * Make sure we don't start in an automatically shut-off state due to
810 * a previous early exit.
813 REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
815 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl);
816 spin_unlock_irqrestore(&up->port.lock, flags);
820 etraxfs_uart_type(struct uart_port *port)
825 static void etraxfs_uart_release_port(struct uart_port *port)
829 static int etraxfs_uart_request_port(struct uart_port *port)
834 static void etraxfs_uart_config_port(struct uart_port *port, int flags)
836 struct uart_cris_port *up = (struct uart_cris_port *)port;
838 up->port.type = PORT_CRIS;
841 static const struct uart_ops etraxfs_uart_pops = {
842 .tx_empty = etraxfs_uart_tx_empty,
843 .set_mctrl = etraxfs_uart_set_mctrl,
844 .get_mctrl = etraxfs_uart_get_mctrl,
845 .stop_tx = etraxfs_uart_stop_tx,
846 .start_tx = etraxfs_uart_start_tx,
847 .send_xchar = etraxfs_uart_send_xchar,
848 .stop_rx = etraxfs_uart_stop_rx,
849 .break_ctl = etraxfs_uart_break_ctl,
850 .startup = etraxfs_uart_startup,
851 .shutdown = etraxfs_uart_shutdown,
852 .set_termios = etraxfs_uart_set_termios,
853 .type = etraxfs_uart_type,
854 .release_port = etraxfs_uart_release_port,
855 .request_port = etraxfs_uart_request_port,
856 .config_port = etraxfs_uart_config_port,
857 #ifdef CONFIG_CONSOLE_POLL
858 .poll_get_char = etraxfs_uart_get_poll_char,
859 .poll_put_char = etraxfs_uart_put_poll_char,
863 static void cris_serial_port_init(struct uart_port *port, int line)
865 struct uart_cris_port *up = (struct uart_cris_port *)port;
871 spin_lock_init(&port->lock);
872 port->ops = &etraxfs_uart_pops;
874 port->iobase = (unsigned long) up->regi_ser;
875 port->uartclk = 29493000;
878 * We can't fit any more than 255 here (unsigned char), though
879 * actually UART_XMIT_SIZE characters could be pending output.
880 * At time of this writing, the definition of "fifosize" is here the
881 * amount of characters that can be pending output after a start_tx call
882 * until tx_empty returns 1: see serial_core.c:uart_wait_until_sent.
883 * This matters for timeout calculations unfortunately, but keeping
884 * larger amounts at the DMA wouldn't win much so let's just play nice.
886 port->fifosize = 255;
887 port->flags = UPF_BOOT_AUTOCONF;
890 static int etraxfs_uart_probe(struct platform_device *pdev)
892 struct device_node *np = pdev->dev.of_node;
893 struct uart_cris_port *up;
899 dev_id = of_alias_get_id(np, "serial");
903 if (dev_id >= UART_NR)
906 if (etraxfs_uart_ports[dev_id])
909 up = devm_kzalloc(&pdev->dev, sizeof(struct uart_cris_port),
914 up->irq = irq_of_parse_and_map(np, 0);
915 up->regi_ser = of_iomap(np, 0);
916 up->dtr_pin = devm_gpiod_get_optional(&pdev->dev, "dtr");
917 up->dsr_pin = devm_gpiod_get_optional(&pdev->dev, "dsr");
918 up->ri_pin = devm_gpiod_get_optional(&pdev->dev, "ri");
919 up->cd_pin = devm_gpiod_get_optional(&pdev->dev, "cd");
920 up->port.dev = &pdev->dev;
921 cris_serial_port_init(&up->port, dev_id);
923 etraxfs_uart_ports[dev_id] = up;
924 platform_set_drvdata(pdev, &up->port);
925 uart_add_one_port(&etraxfs_uart_driver, &up->port);
930 static int etraxfs_uart_remove(struct platform_device *pdev)
932 struct uart_port *port;
934 port = platform_get_drvdata(pdev);
935 uart_remove_one_port(&etraxfs_uart_driver, port);
936 etraxfs_uart_ports[port->line] = NULL;
941 static const struct of_device_id etraxfs_uart_dt_ids[] = {
942 { .compatible = "axis,etraxfs-uart" },
946 MODULE_DEVICE_TABLE(of, etraxfs_uart_dt_ids);
948 static struct platform_driver etraxfs_uart_platform_driver = {
951 .of_match_table = of_match_ptr(etraxfs_uart_dt_ids),
953 .probe = etraxfs_uart_probe,
954 .remove = etraxfs_uart_remove,
957 static int __init etraxfs_uart_init(void)
961 ret = uart_register_driver(&etraxfs_uart_driver);
965 ret = platform_driver_register(&etraxfs_uart_platform_driver);
967 uart_unregister_driver(&etraxfs_uart_driver);
972 static void __exit etraxfs_uart_exit(void)
974 platform_driver_unregister(&etraxfs_uart_platform_driver);
975 uart_unregister_driver(&etraxfs_uart_driver);
978 module_init(etraxfs_uart_init);
979 module_exit(etraxfs_uart_exit);