drivers/usb/host/ohci-hcd.c

   1 /*
   2  * Open Host Controller Interface (OHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   7  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   8  *
   9  * [ Initialisation is based on Linus'  ]
  10  * [ uhci code and gregs ohci fragments ]
  11  * [ (C) Copyright 1999 Linus Torvalds  ]
  12  * [ (C) Copyright 1999 Gregory P. Smith]
  13  *
  14  *
  15  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  16  * interfaces (though some non-x86 Intel chips use it).  It supports
  17  * smarter hardware than UHCI.  A download link for the spec available
  18  * through the http://www.usb.org website.
  19  *
  20  * This file is licenced under the GPL.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/dmapool.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/debugfs.h>
  42
  43 #include <asm/io.h>
  44 #include <asm/irq.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/byteorder.h>
  47
  48
  49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /* For initializing controller (mask in an HCFS mode too) */
  55 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  56 #define OHCI_INTR_INIT \
  57                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  58                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  59
  60 #ifdef __hppa__
  61 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  62 #define IR_DISABLE
  63 #endif
  64
  65 #ifdef CONFIG_ARCH_OMAP
  66 /* OMAP doesn't support IR (no SMM; not needed) */
  67 #define IR_DISABLE
  68 #endif
  69
  70 /*-------------------------------------------------------------------------*/
  71
  72 static const char       hcd_name [] = "ohci_hcd";
  73
  74 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  75
  76 #include "ohci.h"
  77 #include "pci-quirks.h"
  78
  79 static void ohci_dump(struct ohci_hcd *ohci);
  80 static void ohci_stop(struct usb_hcd *hcd);
  81
  82 #include "ohci-hub.c"
  83 #include "ohci-dbg.c"
  84 #include "ohci-mem.c"
  85 #include "ohci-q.c"
  86
  87
  88 /*
  89  * On architectures with edge-triggered interrupts we must never return
  90  * IRQ_NONE.
  91  */
  92 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  93 #define IRQ_NOTMINE     IRQ_HANDLED
  94 #else
  95 #define IRQ_NOTMINE     IRQ_NONE
  96 #endif
  97
  98
  99 /* Some boards misreport power switching/overcurrent */
 100 static bool distrust_firmware = 1;
 101 module_param (distrust_firmware, bool, 0);
 102 MODULE_PARM_DESC (distrust_firmware,
 103         "true to distrust firmware power/overcurrent setup");
 104
 105 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 106 static bool no_handshake = 0;
 107 module_param (no_handshake, bool, 0);
 108 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 109
 110 /*-------------------------------------------------------------------------*/
 111
 112 static int number_of_tds(struct urb *urb)
 113 {
 114         int                     len, i, num, this_sg_len;
 115         struct scatterlist      *sg;
 116
 117         len = urb->transfer_buffer_length;
 118         i = urb->num_mapped_sgs;
 119
 120         if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 121                 num = 0;
 122                 sg = urb->sg;
 123                 for (;;) {
 124                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 125                         num += DIV_ROUND_UP(this_sg_len, 4096);
 126                         len -= this_sg_len;
 127                         if (--i <= 0 || len <= 0)
 128                                 break;
 129                         sg = sg_next(sg);
 130                 }
 131
 132         } else {                        /* Non-SG transfer */
 133                 /* one TD for every 4096 Bytes (could be up to 8K) */
 134                 num = DIV_ROUND_UP(len, 4096);
 135         }
 136         return num;
 137 }
 138
 139 /*
 140  * queue up an urb for anything except the root hub
 141  */
 142 static int ohci_urb_enqueue (
 143         struct usb_hcd  *hcd,
 144         struct urb      *urb,
 145         gfp_t           mem_flags
 146 ) {
 147         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 148         struct ed       *ed;
 149         urb_priv_t      *urb_priv;
 150         unsigned int    pipe = urb->pipe;
 151         int             i, size = 0;
 152         unsigned long   flags;
 153         int             retval = 0;
 154
 155         /* every endpoint has a ed, locate and maybe (re)initialize it */
 156         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 157                 return -ENOMEM;
 158
 159         /* for the private part of the URB we need the number of TDs (size) */
 160         switch (ed->type) {
 161                 case PIPE_CONTROL:
 162                         /* td_submit_urb() doesn't yet handle these */
 163                         if (urb->transfer_buffer_length > 4096)
 164                                 return -EMSGSIZE;
 165
 166                         /* 1 TD for setup, 1 for ACK, plus ... */
 167                         size = 2;
 168                         /* FALLTHROUGH */
 169                 // case PIPE_INTERRUPT:
 170                 // case PIPE_BULK:
 171                 default:
 172                         size += number_of_tds(urb);
 173                         /* maybe a zero-length packet to wrap it up */
 174                         if (size == 0)
 175                                 size++;
 176                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 177                                 && (urb->transfer_buffer_length
 178                                         % usb_maxpacket (urb->dev, pipe,
 179                                                 usb_pipeout (pipe))) == 0)
 180                                 size++;
 181                         break;
 182                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 183                         size = urb->number_of_packets;
 184                         break;
 185         }
 186
 187         /* allocate the private part of the URB */
 188         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 189                         mem_flags);
 190         if (!urb_priv)
 191                 return -ENOMEM;
 192         INIT_LIST_HEAD (&urb_priv->pending);
 193         urb_priv->length = size;
 194         urb_priv->ed = ed;
 195
 196         /* allocate the TDs (deferring hash chain updates) */
 197         for (i = 0; i < size; i++) {
 198                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 199                 if (!urb_priv->td [i]) {
 200                         urb_priv->length = i;
 201                         urb_free_priv (ohci, urb_priv);
 202                         return -ENOMEM;
 203                 }
 204         }
 205
 206         spin_lock_irqsave (&ohci->lock, flags);
 207
 208         /* don't submit to a dead HC */
 209         if (!HCD_HW_ACCESSIBLE(hcd)) {
 210                 retval = -ENODEV;
 211                 goto fail;
 212         }
 213         if (ohci->rh_state != OHCI_RH_RUNNING) {
 214                 retval = -ENODEV;
 215                 goto fail;
 216         }
 217         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 218         if (retval)
 219                 goto fail;
 220
 221         /* schedule the ed if needed */
 222         if (ed->state == ED_IDLE) {
 223                 retval = ed_schedule (ohci, ed);
 224                 if (retval < 0) {
 225                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 226                         goto fail;
 227                 }
 228                 if (ed->type == PIPE_ISOCHRONOUS) {
 229                         u16     frame = ohci_frame_no(ohci);
 230
 231                         /* delay a few frames before the first TD */
 232                         frame += max_t (u16, 8, ed->interval);
 233                         frame &= ~(ed->interval - 1);
 234                         frame |= ed->branch;
 235                         urb->start_frame = frame;
 236                         ed->last_iso = frame + ed->interval * (size - 1);
 237                 }
 238         } else if (ed->type == PIPE_ISOCHRONOUS) {
 239                 u16     next = ohci_frame_no(ohci) + 1;
 240                 u16     frame = ed->last_iso + ed->interval;
 241                 u16     length = ed->interval * (size - 1);
 242
 243                 /* Behind the scheduling threshold? */
 244                 if (unlikely(tick_before(frame, next))) {
 245
 246                         /* URB_ISO_ASAP: Round up to the first available slot */
 247                         if (urb->transfer_flags & URB_ISO_ASAP) {
 248                                 frame += (next - frame + ed->interval - 1) &
 249                                                 -ed->interval;
 250
 251                         /*
 252                          * Not ASAP: Use the next slot in the stream,
 253                          * no matter what.
 254                          */
 255                         } else {
 256                                 /*
 257                                  * Some OHCI hardware doesn't handle late TDs
 258                                  * correctly.  After retiring them it proceeds
 259                                  * to the next ED instead of the next TD.
 260                                  * Therefore we have to omit the late TDs
 261                                  * entirely.
 262                                  */
 263                                 urb_priv->td_cnt = DIV_ROUND_UP(
 264                                                 (u16) (next - frame),
 265                                                 ed->interval);
 266                                 if (urb_priv->td_cnt >= urb_priv->length) {
 267                                         ++urb_priv->td_cnt;     /* Mark it */
 268                                         ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 269                                                         urb, frame, length,
 270                                                         next);
 271                                 }
 272                         }
 273                 }
 274                 urb->start_frame = frame;
 275                 ed->last_iso = frame + length;
 276         }
 277
 278         /* fill the TDs and link them to the ed; and
 279          * enable that part of the schedule, if needed
 280          * and update count of queued periodic urbs
 281          */
 282         urb->hcpriv = urb_priv;
 283         td_submit_urb (ohci, urb);
 284
 285 fail:
 286         if (retval)
 287                 urb_free_priv (ohci, urb_priv);
 288         spin_unlock_irqrestore (&ohci->lock, flags);
 289         return retval;
 290 }
 291
 292 /*
 293  * decouple the URB from the HC queues (TDs, urb_priv).
 294  * reporting is always done
 295  * asynchronously, and we might be dealing with an urb that's
 296  * partially transferred, or an ED with other urbs being unlinked.
 297  */
 298 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 299 {
 300         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 301         unsigned long           flags;
 302         int                     rc;
 303         urb_priv_t              *urb_priv;
 304
 305         spin_lock_irqsave (&ohci->lock, flags);
 306         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 307         if (rc == 0) {
 308
 309                 /* Unless an IRQ completed the unlink while it was being
 310                  * handed to us, flag it for unlink and giveback, and force
 311                  * some upcoming INTR_SF to call finish_unlinks()
 312                  */
 313                 urb_priv = urb->hcpriv;
 314                 if (urb_priv->ed->state == ED_OPER)
 315                         start_ed_unlink(ohci, urb_priv->ed);
 316
 317                 if (ohci->rh_state != OHCI_RH_RUNNING) {
 318                         /* With HC dead, we can clean up right away */
 319                         finish_unlinks(ohci, 0);
 320                 }
 321         }
 322         spin_unlock_irqrestore (&ohci->lock, flags);
 323         return rc;
 324 }
 325
 326 /*-------------------------------------------------------------------------*/
 327
 328 /* frees config/altsetting state for endpoints,
 329  * including ED memory, dummy TD, and bulk/intr data toggle
 330  */
 331
 332 static void
 333 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 334 {
 335         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 336         unsigned long           flags;
 337         struct ed               *ed = ep->hcpriv;
 338         unsigned                limit = 1000;
 339
 340         /* ASSERT:  any requests/urbs are being unlinked */
 341         /* ASSERT:  nobody can be submitting urbs for this any more */
 342
 343         if (!ed)
 344                 return;
 345
 346 rescan:
 347         spin_lock_irqsave (&ohci->lock, flags);
 348
 349         if (ohci->rh_state != OHCI_RH_RUNNING) {
 350 sanitize:
 351                 ed->state = ED_IDLE;
 352                 finish_unlinks (ohci, 0);
 353         }
 354
 355         switch (ed->state) {
 356         case ED_UNLINK:         /* wait for hw to finish? */
 357                 /* major IRQ delivery trouble loses INTR_SF too... */
 358                 if (limit-- == 0) {
 359                         ohci_warn(ohci, "ED unlink timeout\n");
 360                         goto sanitize;
 361                 }
 362                 spin_unlock_irqrestore (&ohci->lock, flags);
 363                 schedule_timeout_uninterruptible(1);
 364                 goto rescan;
 365         case ED_IDLE:           /* fully unlinked */
 366                 if (list_empty (&ed->td_list)) {
 367                         td_free (ohci, ed->dummy);
 368                         ed_free (ohci, ed);
 369                         break;
 370                 }
 371                 /* else FALL THROUGH */
 372         default:
 373                 /* caller was supposed to have unlinked any requests;
 374                  * that's not our job.  can't recover; must leak ed.
 375                  */
 376                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 377                         ed, ep->desc.bEndpointAddress, ed->state,
 378                         list_empty (&ed->td_list) ? "" : " (has tds)");
 379                 td_free (ohci, ed->dummy);
 380                 break;
 381         }
 382         ep->hcpriv = NULL;
 383         spin_unlock_irqrestore (&ohci->lock, flags);
 384 }
 385
 386 static int ohci_get_frame (struct usb_hcd *hcd)
 387 {
 388         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 389
 390         return ohci_frame_no(ohci);
 391 }
 392
 393 static void ohci_usb_reset (struct ohci_hcd *ohci)
 394 {
 395         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 396         ohci->hc_control &= OHCI_CTRL_RWC;
 397         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 398         ohci->rh_state = OHCI_RH_HALTED;
 399 }
 400
 401 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 402  * other cases where the next software may expect clean state from the
 403  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 404  */
 405 static void
 406 ohci_shutdown (struct usb_hcd *hcd)
 407 {
 408         struct ohci_hcd *ohci;
 409
 410         ohci = hcd_to_ohci (hcd);
 411         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 412
 413         /* Software reset, after which the controller goes into SUSPEND */
 414         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 415         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 416         udelay(10);
 417
 418         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 419 }
 420
 421 /*-------------------------------------------------------------------------*
 422  * HC functions
 423  *-------------------------------------------------------------------------*/
 424
 425 /* init memory, and kick BIOS/SMM off */
 426
 427 static int ohci_init (struct ohci_hcd *ohci)
 428 {
 429         int ret;
 430         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 431
 432         /* Accept arbitrarily long scatter-gather lists */
 433         hcd->self.sg_tablesize = ~0;
 434
 435         if (distrust_firmware)
 436                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 437
 438         ohci->rh_state = OHCI_RH_HALTED;
 439         ohci->regs = hcd->regs;
 440
 441         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 442          * was never needed for most non-PCI systems ... remove the code?
 443          */
 444
 445 #ifndef IR_DISABLE
 446         /* SMM owns the HC?  not for long! */
 447         if (!no_handshake && ohci_readl (ohci,
 448                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 449                 u32 temp;
 450
 451                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 452
 453                 /* this timeout is arbitrary.  we make it long, so systems
 454                  * depending on usb keyboards may be usable even if the
 455                  * BIOS/SMM code seems pretty broken.
 456                  */
 457                 temp = 500;     /* arbitrary: five seconds */
 458
 459                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 460                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 461                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 462                         msleep (10);
 463                         if (--temp == 0) {
 464                                 ohci_err (ohci, "USB HC takeover failed!"
 465                                         "  (BIOS/SMM bug)\n");
 466                                 return -EBUSY;
 467                         }
 468                 }
 469                 ohci_usb_reset (ohci);
 470         }
 471 #endif
 472
 473         /* Disable HC interrupts */
 474         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 475
 476         /* flush the writes, and save key bits like RWC */
 477         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 478                 ohci->hc_control |= OHCI_CTRL_RWC;
 479
 480         /* Read the number of ports unless overridden */
 481         if (ohci->num_ports == 0)
 482                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 483
 484         if (ohci->hcca)
 485                 return 0;
 486
 487         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 488                         sizeof(*ohci->hcca), &ohci->hcca_dma, GFP_KERNEL);
 489         if (!ohci->hcca)
 490                 return -ENOMEM;
 491
 492         if ((ret = ohci_mem_init (ohci)) < 0)
 493                 ohci_stop (hcd);
 494         else {
 495                 create_debug_files (ohci);
 496         }
 497
 498         return ret;
 499 }
 500
 501 /*-------------------------------------------------------------------------*/
 502
 503 /* Start an OHCI controller, set the BUS operational
 504  * resets USB and controller
 505  * enable interrupts
 506  */
 507 static int ohci_run (struct ohci_hcd *ohci)
 508 {
 509         u32                     mask, val;
 510         int                     first = ohci->fminterval == 0;
 511         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 512
 513         ohci->rh_state = OHCI_RH_HALTED;
 514
 515         /* boot firmware should have set this up (5.1.1.3.1) */
 516         if (first) {
 517
 518                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 519                 ohci->fminterval = val & 0x3fff;
 520                 if (ohci->fminterval != FI)
 521                         ohci_dbg (ohci, "fminterval delta %d\n",
 522                                 ohci->fminterval - FI);
 523                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 524                 /* also: power/overcurrent flags in roothub.a */
 525         }
 526
 527         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 528          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 529          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 530          * If the bus glue detected wakeup capability then it should
 531          * already be enabled; if so we'll just enable it again.
 532          */
 533         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 534                 device_set_wakeup_capable(hcd->self.controller, 1);
 535
 536         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 537         case OHCI_USB_OPER:
 538                 val = 0;
 539                 break;
 540         case OHCI_USB_SUSPEND:
 541         case OHCI_USB_RESUME:
 542                 ohci->hc_control &= OHCI_CTRL_RWC;
 543                 ohci->hc_control |= OHCI_USB_RESUME;
 544                 val = 10 /* msec wait */;
 545                 break;
 546         // case OHCI_USB_RESET:
 547         default:
 548                 ohci->hc_control &= OHCI_CTRL_RWC;
 549                 ohci->hc_control |= OHCI_USB_RESET;
 550                 val = 50 /* msec wait */;
 551                 break;
 552         }
 553         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 554         // flush the writes
 555         (void) ohci_readl (ohci, &ohci->regs->control);
 556         msleep(val);
 557
 558         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 559
 560         /* 2msec timelimit here means no irqs/preempt */
 561         spin_lock_irq (&ohci->lock);
 562
 563 retry:
 564         /* HC Reset requires max 10 us delay */
 565         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 566         val = 30;       /* ... allow extra time */
 567         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 568                 if (--val == 0) {
 569                         spin_unlock_irq (&ohci->lock);
 570                         ohci_err (ohci, "USB HC reset timed out!\n");
 571                         return -1;
 572                 }
 573                 udelay (1);
 574         }
 575
 576         /* now we're in the SUSPEND state ... must go OPERATIONAL
 577          * within 2msec else HC enters RESUME
 578          *
 579          * ... but some hardware won't init fmInterval "by the book"
 580          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 581          * this if we write fmInterval after we're OPERATIONAL.
 582          * Unclear about ALi, ServerWorks, and others ... this could
 583          * easily be a longstanding bug in chip init on Linux.
 584          */
 585         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 586                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 587                 // flush those writes
 588                 (void) ohci_readl (ohci, &ohci->regs->control);
 589         }
 590
 591         /* Tell the controller where the control and bulk lists are
 592          * The lists are empty now. */
 593         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 594         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 595
 596         /* a reset clears this */
 597         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 598
 599         periodic_reinit (ohci);
 600
 601         /* some OHCI implementations are finicky about how they init.
 602          * bogus values here mean not even enumeration could work.
 603          */
 604         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 605                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 606                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 607                         ohci->flags |= OHCI_QUIRK_INITRESET;
 608                         ohci_dbg (ohci, "enabling initreset quirk\n");
 609                         goto retry;
 610                 }
 611                 spin_unlock_irq (&ohci->lock);
 612                 ohci_err (ohci, "init err (%08x %04x)\n",
 613                         ohci_readl (ohci, &ohci->regs->fminterval),
 614                         ohci_readl (ohci, &ohci->regs->periodicstart));
 615                 return -EOVERFLOW;
 616         }
 617
 618         /* use rhsc irqs after khubd is fully initialized */
 619         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 620         hcd->uses_new_polling = 1;
 621
 622         /* start controller operations */
 623         ohci->hc_control &= OHCI_CTRL_RWC;
 624         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 625         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 626         ohci->rh_state = OHCI_RH_RUNNING;
 627
 628         /* wake on ConnectStatusChange, matching external hubs */
 629         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 630
 631         /* Choose the interrupts we care about now, others later on demand */
 632         mask = OHCI_INTR_INIT;
 633         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 634         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 635
 636         /* handle root hub init quirks ... */
 637         val = roothub_a (ohci);
 638         val &= ~(RH_A_PSM | RH_A_OCPM);
 639         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 640                 /* NSC 87560 and maybe others */
 641                 val |= RH_A_NOCP;
 642                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 643                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 644         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 645                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 646                 /* hub power always on; required for AMD-756 and some
 647                  * Mac platforms.  ganged overcurrent reporting, if any.
 648                  */
 649                 val |= RH_A_NPS;
 650                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 651         }
 652         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 653         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 654                                                 &ohci->regs->roothub.b);
 655         // flush those writes
 656         (void) ohci_readl (ohci, &ohci->regs->control);
 657
 658         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 659         spin_unlock_irq (&ohci->lock);
 660
 661         // POTPGT delay is bits 24-31, in 2 ms units.
 662         mdelay ((val >> 23) & 0x1fe);
 663
 664         ohci_dump(ohci);
 665
 666         return 0;
 667 }
 668
 669 /* ohci_setup routine for generic controller initialization */
 670
 671 int ohci_setup(struct usb_hcd *hcd)
 672 {
 673         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 674
 675         ohci_hcd_init(ohci);
 676
 677         return ohci_init(ohci);
 678 }
 679 EXPORT_SYMBOL_GPL(ohci_setup);
 680
 681 /* ohci_start routine for generic controller start of all OHCI bus glue */
 682 static int ohci_start(struct usb_hcd *hcd)
 683 {
 684         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 685         int     ret;
 686
 687         ret = ohci_run(ohci);
 688         if (ret < 0) {
 689                 ohci_err(ohci, "can't start\n");
 690                 ohci_stop(hcd);
 691         }
 692         return ret;
 693 }
 694
 695 /*-------------------------------------------------------------------------*/
 696
 697 /* an interrupt happens */
 698
 699 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 700 {
 701         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 702         struct ohci_regs __iomem *regs = ohci->regs;
 703         int                     ints;
 704
 705         /* Read interrupt status (and flush pending writes).  We ignore the
 706          * optimization of checking the LSB of hcca->done_head; it doesn't
 707          * work on all systems (edge triggering for OHCI can be a factor).
 708          */
 709         ints = ohci_readl(ohci, &regs->intrstatus);
 710
 711         /* Check for an all 1's result which is a typical consequence
 712          * of dead, unclocked, or unplugged (CardBus...) devices
 713          */
 714         if (ints == ~(u32)0) {
 715                 ohci->rh_state = OHCI_RH_HALTED;
 716                 ohci_dbg (ohci, "device removed!\n");
 717                 usb_hc_died(hcd);
 718                 return IRQ_HANDLED;
 719         }
 720
 721         /* We only care about interrupts that are enabled */
 722         ints &= ohci_readl(ohci, &regs->intrenable);
 723
 724         /* interrupt for some other device? */
 725         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 726                 return IRQ_NOTMINE;
 727
 728         if (ints & OHCI_INTR_UE) {
 729                 // e.g. due to PCI Master/Target Abort
 730                 if (quirk_nec(ohci)) {
 731                         /* Workaround for a silicon bug in some NEC chips used
 732                          * in Apple's PowerBooks. Adapted from Darwin code.
 733                          */
 734                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 735
 736                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 737
 738                         schedule_work (&ohci->nec_work);
 739                 } else {
 740                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 741                         ohci->rh_state = OHCI_RH_HALTED;
 742                         usb_hc_died(hcd);
 743                 }
 744
 745                 ohci_dump(ohci);
 746                 ohci_usb_reset (ohci);
 747         }
 748
 749         if (ints & OHCI_INTR_RHSC) {
 750                 ohci_dbg(ohci, "rhsc\n");
 751                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 752                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 753                                 &regs->intrstatus);
 754
 755                 /* NOTE: Vendors didn't always make the same implementation
 756                  * choices for RHSC.  Many followed the spec; RHSC triggers
 757                  * on an edge, like setting and maybe clearing a port status
 758                  * change bit.  With others it's level-triggered, active
 759                  * until khubd clears all the port status change bits.  We'll
 760                  * always disable it here and rely on polling until khubd
 761                  * re-enables it.
 762                  */
 763                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 764                 usb_hcd_poll_rh_status(hcd);
 765         }
 766
 767         /* For connect and disconnect events, we expect the controller
 768          * to turn on RHSC along with RD.  But for remote wakeup events
 769          * this might not happen.
 770          */
 771         else if (ints & OHCI_INTR_RD) {
 772                 ohci_dbg(ohci, "resume detect\n");
 773                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 774                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 775                 if (ohci->autostop) {
 776                         spin_lock (&ohci->lock);
 777                         ohci_rh_resume (ohci);
 778                         spin_unlock (&ohci->lock);
 779                 } else
 780                         usb_hcd_resume_root_hub(hcd);
 781         }
 782
 783         if (ints & OHCI_INTR_WDH) {
 784                 spin_lock (&ohci->lock);
 785                 dl_done_list (ohci);
 786                 spin_unlock (&ohci->lock);
 787         }
 788
 789         /* could track INTR_SO to reduce available PCI/... bandwidth */
 790
 791         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 792          * when there's still unlinking to be done (next frame).
 793          */
 794         spin_lock (&ohci->lock);
 795         if (ohci->ed_rm_list)
 796                 finish_unlinks (ohci, ohci_frame_no(ohci));
 797         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 798                         && ohci->rh_state == OHCI_RH_RUNNING)
 799                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 800         spin_unlock (&ohci->lock);
 801
 802         if (ohci->rh_state == OHCI_RH_RUNNING) {
 803                 ohci_writel (ohci, ints, &regs->intrstatus);
 804                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 805                 // flush those writes
 806                 (void) ohci_readl (ohci, &ohci->regs->control);
 807         }
 808
 809         return IRQ_HANDLED;
 810 }
 811
 812 /*-------------------------------------------------------------------------*/
 813
 814 static void ohci_stop (struct usb_hcd *hcd)
 815 {
 816         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 817
 818         ohci_dump(ohci);
 819
 820         if (quirk_nec(ohci))
 821                 flush_work(&ohci->nec_work);
 822
 823         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 824         ohci_usb_reset(ohci);
 825         free_irq(hcd->irq, hcd);
 826         hcd->irq = 0;
 827
 828         if (quirk_amdiso(ohci))
 829                 usb_amd_dev_put();
 830
 831         remove_debug_files (ohci);
 832         ohci_mem_cleanup (ohci);
 833         if (ohci->hcca) {
 834                 dma_free_coherent (hcd->self.controller,
 835                                 sizeof *ohci->hcca,
 836                                 ohci->hcca, ohci->hcca_dma);
 837                 ohci->hcca = NULL;
 838                 ohci->hcca_dma = 0;
 839         }
 840 }
 841
 842 /*-------------------------------------------------------------------------*/
 843
 844 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 845
 846 /* must not be called from interrupt context */
 847 int ohci_restart(struct ohci_hcd *ohci)
 848 {
 849         int temp;
 850         int i;
 851         struct urb_priv *priv;
 852
 853         ohci_init(ohci);
 854         spin_lock_irq(&ohci->lock);
 855         ohci->rh_state = OHCI_RH_HALTED;
 856
 857         /* Recycle any "live" eds/tds (and urbs). */
 858         if (!list_empty (&ohci->pending))
 859                 ohci_dbg(ohci, "abort schedule...\n");
 860         list_for_each_entry (priv, &ohci->pending, pending) {
 861                 struct urb      *urb = priv->td[0]->urb;
 862                 struct ed       *ed = priv->ed;
 863
 864                 switch (ed->state) {
 865                 case ED_OPER:
 866                         ed->state = ED_UNLINK;
 867                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 868                         ed_deschedule (ohci, ed);
 869
 870                         ed->ed_next = ohci->ed_rm_list;
 871                         ed->ed_prev = NULL;
 872                         ohci->ed_rm_list = ed;
 873                         /* FALLTHROUGH */
 874                 case ED_UNLINK:
 875                         break;
 876                 default:
 877                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 878                                         ed, ed->state);
 879                 }
 880
 881                 if (!urb->unlinked)
 882                         urb->unlinked = -ESHUTDOWN;
 883         }
 884         finish_unlinks (ohci, 0);
 885         spin_unlock_irq(&ohci->lock);
 886
 887         /* paranoia, in case that didn't work: */
 888
 889         /* empty the interrupt branches */
 890         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 891         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 892
 893         /* no EDs to remove */
 894         ohci->ed_rm_list = NULL;
 895
 896         /* empty control and bulk lists */
 897         ohci->ed_controltail = NULL;
 898         ohci->ed_bulktail    = NULL;
 899
 900         if ((temp = ohci_run (ohci)) < 0) {
 901                 ohci_err (ohci, "can't restart, %d\n", temp);
 902                 return temp;
 903         }
 904         ohci_dbg(ohci, "restart complete\n");
 905         return 0;
 906 }
 907 EXPORT_SYMBOL_GPL(ohci_restart);
 908
 909 #endif
 910
 911 #ifdef CONFIG_PM
 912
 913 int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 914 {
 915         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 916         unsigned long   flags;
 917         int             rc = 0;
 918
 919         /* Disable irq emission and mark HW unaccessible. Use
 920          * the spinlock to properly synchronize with possible pending
 921          * RH suspend or resume activity.
 922          */
 923         spin_lock_irqsave (&ohci->lock, flags);
 924         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 925         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
 926
 927         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 928         spin_unlock_irqrestore (&ohci->lock, flags);
 929
 930         synchronize_irq(hcd->irq);
 931
 932         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
 933                 ohci_resume(hcd, false);
 934                 rc = -EBUSY;
 935         }
 936         return rc;
 937 }
 938 EXPORT_SYMBOL_GPL(ohci_suspend);
 939
 940
 941 int ohci_resume(struct usb_hcd *hcd, bool hibernated)
 942 {
 943         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 944         int                     port;
 945         bool                    need_reinit = false;
 946
 947         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 948
 949         /* Make sure resume from hibernation re-enumerates everything */
 950         if (hibernated)
 951                 ohci_usb_reset(ohci);
 952
 953         /* See if the controller is already running or has been reset */
 954         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
 955         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
 956                 need_reinit = true;
 957         } else {
 958                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 959                 case OHCI_USB_OPER:
 960                 case OHCI_USB_RESET:
 961                         need_reinit = true;
 962                 }
 963         }
 964
 965         /* If needed, reinitialize and suspend the root hub */
 966         if (need_reinit) {
 967                 spin_lock_irq(&ohci->lock);
 968                 ohci_rh_resume(ohci);
 969                 ohci_rh_suspend(ohci, 0);
 970                 spin_unlock_irq(&ohci->lock);
 971         }
 972
 973         /* Normally just turn on port power and enable interrupts */
 974         else {
 975                 ohci_dbg(ohci, "powerup ports\n");
 976                 for (port = 0; port < ohci->num_ports; port++)
 977                         ohci_writel(ohci, RH_PS_PPS,
 978                                         &ohci->regs->roothub.portstatus[port]);
 979
 980                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
 981                 ohci_readl(ohci, &ohci->regs->intrenable);
 982                 msleep(20);
 983         }
 984
 985         usb_hcd_resume_root_hub(hcd);
 986
 987         return 0;
 988 }
 989 EXPORT_SYMBOL_GPL(ohci_resume);
 990
 991 #endif
 992
 993 /*-------------------------------------------------------------------------*/
 994
 995 /*
 996  * Generic structure: This gets copied for platform drivers so that
 997  * individual entries can be overridden as needed.
 998  */
 999
1000 static const struct hc_driver ohci_hc_driver = {
1001         .description =          hcd_name,
1002         .product_desc =         "OHCI Host Controller",
1003         .hcd_priv_size =        sizeof(struct ohci_hcd),
1004
1005         /*
1006          * generic hardware linkage
1007         */
1008         .irq =                  ohci_irq,
1009         .flags =                HCD_MEMORY | HCD_USB11,
1010
1011         /*
1012         * basic lifecycle operations
1013         */
1014         .reset =                ohci_setup,
1015         .start =                ohci_start,
1016         .stop =                 ohci_stop,
1017         .shutdown =             ohci_shutdown,
1018
1019         /*
1020          * managing i/o requests and associated device resources
1021         */
1022         .urb_enqueue =          ohci_urb_enqueue,
1023         .urb_dequeue =          ohci_urb_dequeue,
1024         .endpoint_disable =     ohci_endpoint_disable,
1025
1026         /*
1027         * scheduling support
1028         */
1029         .get_frame_number =     ohci_get_frame,
1030
1031         /*
1032         * root hub support
1033         */
1034         .hub_status_data =      ohci_hub_status_data,
1035         .hub_control =          ohci_hub_control,
1036 #ifdef CONFIG_PM
1037         .bus_suspend =          ohci_bus_suspend,
1038         .bus_resume =           ohci_bus_resume,
1039 #endif
1040         .start_port_reset =     ohci_start_port_reset,
1041 };
1042
1043 void ohci_init_driver(struct hc_driver *drv,
1044                 const struct ohci_driver_overrides *over)
1045 {
1046         /* Copy the generic table to drv and then apply the overrides */
1047         *drv = ohci_hc_driver;
1048
1049         if (over) {
1050                 drv->product_desc = over->product_desc;
1051                 drv->hcd_priv_size += over->extra_priv_size;
1052                 if (over->reset)
1053                         drv->reset = over->reset;
1054         }
1055 }
1056 EXPORT_SYMBOL_GPL(ohci_init_driver);
1057
1058 /*-------------------------------------------------------------------------*/
1059
1060 MODULE_AUTHOR (DRIVER_AUTHOR);
1061 MODULE_DESCRIPTION(DRIVER_DESC);
1062 MODULE_LICENSE ("GPL");
1063
1064 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1065 #include "ohci-sa1111.c"
1066 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1067 #endif
1068
1069 #ifdef CONFIG_USB_OHCI_HCD_DAVINCI
1070 #include "ohci-da8xx.c"
1071 #define DAVINCI_PLATFORM_DRIVER ohci_hcd_da8xx_driver
1072 #endif
1073
1074 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1075 #include "ohci-ppc-of.c"
1076 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1077 #endif
1078
1079 #ifdef CONFIG_PPC_PS3
1080 #include "ohci-ps3.c"
1081 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1082 #endif
1083
1084 #ifdef CONFIG_MFD_SM501
1085 #include "ohci-sm501.c"
1086 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1087 #endif
1088
1089 #ifdef CONFIG_MFD_TC6393XB
1090 #include "ohci-tmio.c"
1091 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1092 #endif
1093
1094 #ifdef CONFIG_MACH_JZ4740
1095 #include "ohci-jz4740.c"
1096 #define PLATFORM_DRIVER ohci_hcd_jz4740_driver
1097 #endif
1098
1099 #ifdef CONFIG_USB_OCTEON_OHCI
1100 #include "ohci-octeon.c"
1101 #define PLATFORM_DRIVER         ohci_octeon_driver
1102 #endif
1103
1104 #ifdef CONFIG_TILE_USB
1105 #include "ohci-tilegx.c"
1106 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1107 #endif
1108
1109 static int __init ohci_hcd_mod_init(void)
1110 {
1111         int retval = 0;
1112
1113         if (usb_disabled())
1114                 return -ENODEV;
1115
1116         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1117         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1118                 sizeof (struct ed), sizeof (struct td));
1119         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1120
1121         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1122         if (!ohci_debug_root) {
1123                 retval = -ENOENT;
1124                 goto error_debug;
1125         }
1126
1127 #ifdef PS3_SYSTEM_BUS_DRIVER
1128         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1129         if (retval < 0)
1130                 goto error_ps3;
1131 #endif
1132
1133 #ifdef PLATFORM_DRIVER
1134         retval = platform_driver_register(&PLATFORM_DRIVER);
1135         if (retval < 0)
1136                 goto error_platform;
1137 #endif
1138
1139 #ifdef OF_PLATFORM_DRIVER
1140         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1141         if (retval < 0)
1142                 goto error_of_platform;
1143 #endif
1144
1145 #ifdef SA1111_DRIVER
1146         retval = sa1111_driver_register(&SA1111_DRIVER);
1147         if (retval < 0)
1148                 goto error_sa1111;
1149 #endif
1150
1151 #ifdef SM501_OHCI_DRIVER
1152         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1153         if (retval < 0)
1154                 goto error_sm501;
1155 #endif
1156
1157 #ifdef TMIO_OHCI_DRIVER
1158         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1159         if (retval < 0)
1160                 goto error_tmio;
1161 #endif
1162
1163 #ifdef DAVINCI_PLATFORM_DRIVER
1164         retval = platform_driver_register(&DAVINCI_PLATFORM_DRIVER);
1165         if (retval < 0)
1166                 goto error_davinci;
1167 #endif
1168
1169         return retval;
1170
1171         /* Error path */
1172 #ifdef DAVINCI_PLATFORM_DRIVER
1173         platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1174  error_davinci:
1175 #endif
1176 #ifdef TMIO_OHCI_DRIVER
1177         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1178  error_tmio:
1179 #endif
1180 #ifdef SM501_OHCI_DRIVER
1181         platform_driver_unregister(&SM501_OHCI_DRIVER);
1182  error_sm501:
1183 #endif
1184 #ifdef SA1111_DRIVER
1185         sa1111_driver_unregister(&SA1111_DRIVER);
1186  error_sa1111:
1187 #endif
1188 #ifdef OF_PLATFORM_DRIVER
1189         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1190  error_of_platform:
1191 #endif
1192 #ifdef PLATFORM_DRIVER
1193         platform_driver_unregister(&PLATFORM_DRIVER);
1194  error_platform:
1195 #endif
1196 #ifdef PS3_SYSTEM_BUS_DRIVER
1197         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1198  error_ps3:
1199 #endif
1200         debugfs_remove(ohci_debug_root);
1201         ohci_debug_root = NULL;
1202  error_debug:
1203
1204         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1205         return retval;
1206 }
1207 module_init(ohci_hcd_mod_init);
1208
1209 static void __exit ohci_hcd_mod_exit(void)
1210 {
1211 #ifdef DAVINCI_PLATFORM_DRIVER
1212         platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1213 #endif
1214 #ifdef TMIO_OHCI_DRIVER
1215         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1216 #endif
1217 #ifdef SM501_OHCI_DRIVER
1218         platform_driver_unregister(&SM501_OHCI_DRIVER);
1219 #endif
1220 #ifdef SA1111_DRIVER
1221         sa1111_driver_unregister(&SA1111_DRIVER);
1222 #endif
1223 #ifdef OF_PLATFORM_DRIVER
1224         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1225 #endif
1226 #ifdef PLATFORM_DRIVER
1227         platform_driver_unregister(&PLATFORM_DRIVER);
1228 #endif
1229 #ifdef PS3_SYSTEM_BUS_DRIVER
1230         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1231 #endif
1232         debugfs_remove(ohci_debug_root);
1233         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1234 }
1235 module_exit(ohci_hcd_mod_exit);
1236