drivers/usb/host/ohci-hcd.c

   1 /*
   2  * Open Host Controller Interface (OHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   7  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   8  *
   9  * [ Initialisation is based on Linus'  ]
  10  * [ uhci code and gregs ohci fragments ]
  11  * [ (C) Copyright 1999 Linus Torvalds  ]
  12  * [ (C) Copyright 1999 Gregory P. Smith]
  13  *
  14  *
  15  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  16  * interfaces (though some non-x86 Intel chips use it).  It supports
  17  * smarter hardware than UHCI.  A download link for the spec available
  18  * through the http://www.usb.org website.
  19  *
  20  * This file is licenced under the GPL.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/dmapool.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/debugfs.h>
  42
  43 #include <asm/io.h>
  44 #include <asm/irq.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/byteorder.h>
  47
  48
  49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /* For initializing controller (mask in an HCFS mode too) */
  55 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  56 #define OHCI_INTR_INIT \
  57                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  58                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  59
  60 #ifdef __hppa__
  61 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  62 #define IR_DISABLE
  63 #endif
  64
  65 #ifdef CONFIG_ARCH_OMAP
  66 /* OMAP doesn't support IR (no SMM; not needed) */
  67 #define IR_DISABLE
  68 #endif
  69
  70 /*-------------------------------------------------------------------------*/
  71
  72 static const char       hcd_name [] = "ohci_hcd";
  73
  74 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  75 #define IO_WATCHDOG_DELAY       msecs_to_jiffies(250)
  76
  77 #include "ohci.h"
  78 #include "pci-quirks.h"
  79
  80 static void ohci_dump(struct ohci_hcd *ohci);
  81 static void ohci_stop(struct usb_hcd *hcd);
  82 static void io_watchdog_func(unsigned long _ohci);
  83
  84 #include "ohci-hub.c"
  85 #include "ohci-dbg.c"
  86 #include "ohci-mem.c"
  87 #include "ohci-q.c"
  88
  89
  90 /*
  91  * On architectures with edge-triggered interrupts we must never return
  92  * IRQ_NONE.
  93  */
  94 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  95 #define IRQ_NOTMINE     IRQ_HANDLED
  96 #else
  97 #define IRQ_NOTMINE     IRQ_NONE
  98 #endif
  99
 100
 101 /* Some boards misreport power switching/overcurrent */
 102 static bool distrust_firmware = 1;
 103 module_param (distrust_firmware, bool, 0);
 104 MODULE_PARM_DESC (distrust_firmware,
 105         "true to distrust firmware power/overcurrent setup");
 106
 107 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 108 static bool no_handshake = 0;
 109 module_param (no_handshake, bool, 0);
 110 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 111
 112 /*-------------------------------------------------------------------------*/
 113
 114 static int number_of_tds(struct urb *urb)
 115 {
 116         int                     len, i, num, this_sg_len;
 117         struct scatterlist      *sg;
 118
 119         len = urb->transfer_buffer_length;
 120         i = urb->num_mapped_sgs;
 121
 122         if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 123                 num = 0;
 124                 sg = urb->sg;
 125                 for (;;) {
 126                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 127                         num += DIV_ROUND_UP(this_sg_len, 4096);
 128                         len -= this_sg_len;
 129                         if (--i <= 0 || len <= 0)
 130                                 break;
 131                         sg = sg_next(sg);
 132                 }
 133
 134         } else {                        /* Non-SG transfer */
 135                 /* one TD for every 4096 Bytes (could be up to 8K) */
 136                 num = DIV_ROUND_UP(len, 4096);
 137         }
 138         return num;
 139 }
 140
 141 /*
 142  * queue up an urb for anything except the root hub
 143  */
 144 static int ohci_urb_enqueue (
 145         struct usb_hcd  *hcd,
 146         struct urb      *urb,
 147         gfp_t           mem_flags
 148 ) {
 149         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 150         struct ed       *ed;
 151         urb_priv_t      *urb_priv;
 152         unsigned int    pipe = urb->pipe;
 153         int             i, size = 0;
 154         unsigned long   flags;
 155         int             retval = 0;
 156
 157         /* every endpoint has a ed, locate and maybe (re)initialize it */
 158         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 159                 return -ENOMEM;
 160
 161         /* for the private part of the URB we need the number of TDs (size) */
 162         switch (ed->type) {
 163                 case PIPE_CONTROL:
 164                         /* td_submit_urb() doesn't yet handle these */
 165                         if (urb->transfer_buffer_length > 4096)
 166                                 return -EMSGSIZE;
 167
 168                         /* 1 TD for setup, 1 for ACK, plus ... */
 169                         size = 2;
 170                         /* FALLTHROUGH */
 171                 // case PIPE_INTERRUPT:
 172                 // case PIPE_BULK:
 173                 default:
 174                         size += number_of_tds(urb);
 175                         /* maybe a zero-length packet to wrap it up */
 176                         if (size == 0)
 177                                 size++;
 178                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 179                                 && (urb->transfer_buffer_length
 180                                         % usb_maxpacket (urb->dev, pipe,
 181                                                 usb_pipeout (pipe))) == 0)
 182                                 size++;
 183                         break;
 184                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 185                         size = urb->number_of_packets;
 186                         break;
 187         }
 188
 189         /* allocate the private part of the URB */
 190         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 191                         mem_flags);
 192         if (!urb_priv)
 193                 return -ENOMEM;
 194         INIT_LIST_HEAD (&urb_priv->pending);
 195         urb_priv->length = size;
 196         urb_priv->ed = ed;
 197
 198         /* allocate the TDs (deferring hash chain updates) */
 199         for (i = 0; i < size; i++) {
 200                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 201                 if (!urb_priv->td [i]) {
 202                         urb_priv->length = i;
 203                         urb_free_priv (ohci, urb_priv);
 204                         return -ENOMEM;
 205                 }
 206         }
 207
 208         spin_lock_irqsave (&ohci->lock, flags);
 209
 210         /* don't submit to a dead HC */
 211         if (!HCD_HW_ACCESSIBLE(hcd)) {
 212                 retval = -ENODEV;
 213                 goto fail;
 214         }
 215         if (ohci->rh_state != OHCI_RH_RUNNING) {
 216                 retval = -ENODEV;
 217                 goto fail;
 218         }
 219         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 220         if (retval)
 221                 goto fail;
 222
 223         /* schedule the ed if needed */
 224         if (ed->state == ED_IDLE) {
 225                 retval = ed_schedule (ohci, ed);
 226                 if (retval < 0) {
 227                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 228                         goto fail;
 229                 }
 230
 231                 /* Start up the I/O watchdog timer, if it's not running */
 232                 if (!timer_pending(&ohci->io_watchdog) &&
 233                                 list_empty(&ohci->eds_in_use))
 234                         mod_timer(&ohci->io_watchdog,
 235                                         jiffies + IO_WATCHDOG_DELAY);
 236                 list_add(&ed->in_use_list, &ohci->eds_in_use);
 237
 238                 if (ed->type == PIPE_ISOCHRONOUS) {
 239                         u16     frame = ohci_frame_no(ohci);
 240
 241                         /* delay a few frames before the first TD */
 242                         frame += max_t (u16, 8, ed->interval);
 243                         frame &= ~(ed->interval - 1);
 244                         frame |= ed->branch;
 245                         urb->start_frame = frame;
 246                         ed->last_iso = frame + ed->interval * (size - 1);
 247                 }
 248         } else if (ed->type == PIPE_ISOCHRONOUS) {
 249                 u16     next = ohci_frame_no(ohci) + 1;
 250                 u16     frame = ed->last_iso + ed->interval;
 251                 u16     length = ed->interval * (size - 1);
 252
 253                 /* Behind the scheduling threshold? */
 254                 if (unlikely(tick_before(frame, next))) {
 255
 256                         /* URB_ISO_ASAP: Round up to the first available slot */
 257                         if (urb->transfer_flags & URB_ISO_ASAP) {
 258                                 frame += (next - frame + ed->interval - 1) &
 259                                                 -ed->interval;
 260
 261                         /*
 262                          * Not ASAP: Use the next slot in the stream,
 263                          * no matter what.
 264                          */
 265                         } else {
 266                                 /*
 267                                  * Some OHCI hardware doesn't handle late TDs
 268                                  * correctly.  After retiring them it proceeds
 269                                  * to the next ED instead of the next TD.
 270                                  * Therefore we have to omit the late TDs
 271                                  * entirely.
 272                                  */
 273                                 urb_priv->td_cnt = DIV_ROUND_UP(
 274                                                 (u16) (next - frame),
 275                                                 ed->interval);
 276                                 if (urb_priv->td_cnt >= urb_priv->length) {
 277                                         ++urb_priv->td_cnt;     /* Mark it */
 278                                         ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 279                                                         urb, frame, length,
 280                                                         next);
 281                                 }
 282                         }
 283                 }
 284                 urb->start_frame = frame;
 285                 ed->last_iso = frame + length;
 286         }
 287
 288         /* fill the TDs and link them to the ed; and
 289          * enable that part of the schedule, if needed
 290          * and update count of queued periodic urbs
 291          */
 292         urb->hcpriv = urb_priv;
 293         td_submit_urb (ohci, urb);
 294
 295 fail:
 296         if (retval)
 297                 urb_free_priv (ohci, urb_priv);
 298         spin_unlock_irqrestore (&ohci->lock, flags);
 299         return retval;
 300 }
 301
 302 /*
 303  * decouple the URB from the HC queues (TDs, urb_priv).
 304  * reporting is always done
 305  * asynchronously, and we might be dealing with an urb that's
 306  * partially transferred, or an ED with other urbs being unlinked.
 307  */
 308 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 309 {
 310         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 311         unsigned long           flags;
 312         int                     rc;
 313         urb_priv_t              *urb_priv;
 314
 315         spin_lock_irqsave (&ohci->lock, flags);
 316         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 317         if (rc == 0) {
 318
 319                 /* Unless an IRQ completed the unlink while it was being
 320                  * handed to us, flag it for unlink and giveback, and force
 321                  * some upcoming INTR_SF to call finish_unlinks()
 322                  */
 323                 urb_priv = urb->hcpriv;
 324                 if (urb_priv->ed->state == ED_OPER)
 325                         start_ed_unlink(ohci, urb_priv->ed);
 326
 327                 if (ohci->rh_state != OHCI_RH_RUNNING) {
 328                         /* With HC dead, we can clean up right away */
 329                         ohci_work(ohci);
 330                 }
 331         }
 332         spin_unlock_irqrestore (&ohci->lock, flags);
 333         return rc;
 334 }
 335
 336 /*-------------------------------------------------------------------------*/
 337
 338 /* frees config/altsetting state for endpoints,
 339  * including ED memory, dummy TD, and bulk/intr data toggle
 340  */
 341
 342 static void
 343 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 344 {
 345         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 346         unsigned long           flags;
 347         struct ed               *ed = ep->hcpriv;
 348         unsigned                limit = 1000;
 349
 350         /* ASSERT:  any requests/urbs are being unlinked */
 351         /* ASSERT:  nobody can be submitting urbs for this any more */
 352
 353         if (!ed)
 354                 return;
 355
 356 rescan:
 357         spin_lock_irqsave (&ohci->lock, flags);
 358
 359         if (ohci->rh_state != OHCI_RH_RUNNING) {
 360 sanitize:
 361                 ed->state = ED_IDLE;
 362                 ohci_work(ohci);
 363         }
 364
 365         switch (ed->state) {
 366         case ED_UNLINK:         /* wait for hw to finish? */
 367                 /* major IRQ delivery trouble loses INTR_SF too... */
 368                 if (limit-- == 0) {
 369                         ohci_warn(ohci, "ED unlink timeout\n");
 370                         goto sanitize;
 371                 }
 372                 spin_unlock_irqrestore (&ohci->lock, flags);
 373                 schedule_timeout_uninterruptible(1);
 374                 goto rescan;
 375         case ED_IDLE:           /* fully unlinked */
 376                 if (list_empty (&ed->td_list)) {
 377                         td_free (ohci, ed->dummy);
 378                         ed_free (ohci, ed);
 379                         break;
 380                 }
 381                 /* else FALL THROUGH */
 382         default:
 383                 /* caller was supposed to have unlinked any requests;
 384                  * that's not our job.  can't recover; must leak ed.
 385                  */
 386                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 387                         ed, ep->desc.bEndpointAddress, ed->state,
 388                         list_empty (&ed->td_list) ? "" : " (has tds)");
 389                 td_free (ohci, ed->dummy);
 390                 break;
 391         }
 392         ep->hcpriv = NULL;
 393         spin_unlock_irqrestore (&ohci->lock, flags);
 394 }
 395
 396 static int ohci_get_frame (struct usb_hcd *hcd)
 397 {
 398         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 399
 400         return ohci_frame_no(ohci);
 401 }
 402
 403 static void ohci_usb_reset (struct ohci_hcd *ohci)
 404 {
 405         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 406         ohci->hc_control &= OHCI_CTRL_RWC;
 407         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 408         ohci->rh_state = OHCI_RH_HALTED;
 409 }
 410
 411 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 412  * other cases where the next software may expect clean state from the
 413  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 414  */
 415 static void
 416 ohci_shutdown (struct usb_hcd *hcd)
 417 {
 418         struct ohci_hcd *ohci;
 419
 420         ohci = hcd_to_ohci (hcd);
 421         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 422
 423         /* Software reset, after which the controller goes into SUSPEND */
 424         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 425         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 426         udelay(10);
 427
 428         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 429         ohci->rh_state = OHCI_RH_HALTED;
 430 }
 431
 432 /*-------------------------------------------------------------------------*
 433  * HC functions
 434  *-------------------------------------------------------------------------*/
 435
 436 /* init memory, and kick BIOS/SMM off */
 437
 438 static int ohci_init (struct ohci_hcd *ohci)
 439 {
 440         int ret;
 441         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 442
 443         /* Accept arbitrarily long scatter-gather lists */
 444         hcd->self.sg_tablesize = ~0;
 445
 446         if (distrust_firmware)
 447                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 448
 449         ohci->rh_state = OHCI_RH_HALTED;
 450         ohci->regs = hcd->regs;
 451
 452         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 453          * was never needed for most non-PCI systems ... remove the code?
 454          */
 455
 456 #ifndef IR_DISABLE
 457         /* SMM owns the HC?  not for long! */
 458         if (!no_handshake && ohci_readl (ohci,
 459                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 460                 u32 temp;
 461
 462                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 463
 464                 /* this timeout is arbitrary.  we make it long, so systems
 465                  * depending on usb keyboards may be usable even if the
 466                  * BIOS/SMM code seems pretty broken.
 467                  */
 468                 temp = 500;     /* arbitrary: five seconds */
 469
 470                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 471                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 472                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 473                         msleep (10);
 474                         if (--temp == 0) {
 475                                 ohci_err (ohci, "USB HC takeover failed!"
 476                                         "  (BIOS/SMM bug)\n");
 477                                 return -EBUSY;
 478                         }
 479                 }
 480                 ohci_usb_reset (ohci);
 481         }
 482 #endif
 483
 484         /* Disable HC interrupts */
 485         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 486
 487         /* flush the writes, and save key bits like RWC */
 488         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 489                 ohci->hc_control |= OHCI_CTRL_RWC;
 490
 491         /* Read the number of ports unless overridden */
 492         if (ohci->num_ports == 0)
 493                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 494
 495         if (ohci->hcca)
 496                 return 0;
 497
 498         setup_timer(&ohci->io_watchdog, io_watchdog_func,
 499                         (unsigned long) ohci);
 500         set_timer_slack(&ohci->io_watchdog, msecs_to_jiffies(20));
 501
 502         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 503                         sizeof(*ohci->hcca), &ohci->hcca_dma, GFP_KERNEL);
 504         if (!ohci->hcca)
 505                 return -ENOMEM;
 506
 507         if ((ret = ohci_mem_init (ohci)) < 0)
 508                 ohci_stop (hcd);
 509         else {
 510                 create_debug_files (ohci);
 511         }
 512
 513         return ret;
 514 }
 515
 516 /*-------------------------------------------------------------------------*/
 517
 518 /* Start an OHCI controller, set the BUS operational
 519  * resets USB and controller
 520  * enable interrupts
 521  */
 522 static int ohci_run (struct ohci_hcd *ohci)
 523 {
 524         u32                     mask, val;
 525         int                     first = ohci->fminterval == 0;
 526         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 527
 528         ohci->rh_state = OHCI_RH_HALTED;
 529
 530         /* boot firmware should have set this up (5.1.1.3.1) */
 531         if (first) {
 532
 533                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 534                 ohci->fminterval = val & 0x3fff;
 535                 if (ohci->fminterval != FI)
 536                         ohci_dbg (ohci, "fminterval delta %d\n",
 537                                 ohci->fminterval - FI);
 538                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 539                 /* also: power/overcurrent flags in roothub.a */
 540         }
 541
 542         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 543          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 544          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 545          * If the bus glue detected wakeup capability then it should
 546          * already be enabled; if so we'll just enable it again.
 547          */
 548         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 549                 device_set_wakeup_capable(hcd->self.controller, 1);
 550
 551         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 552         case OHCI_USB_OPER:
 553                 val = 0;
 554                 break;
 555         case OHCI_USB_SUSPEND:
 556         case OHCI_USB_RESUME:
 557                 ohci->hc_control &= OHCI_CTRL_RWC;
 558                 ohci->hc_control |= OHCI_USB_RESUME;
 559                 val = 10 /* msec wait */;
 560                 break;
 561         // case OHCI_USB_RESET:
 562         default:
 563                 ohci->hc_control &= OHCI_CTRL_RWC;
 564                 ohci->hc_control |= OHCI_USB_RESET;
 565                 val = 50 /* msec wait */;
 566                 break;
 567         }
 568         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 569         // flush the writes
 570         (void) ohci_readl (ohci, &ohci->regs->control);
 571         msleep(val);
 572
 573         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 574
 575         /* 2msec timelimit here means no irqs/preempt */
 576         spin_lock_irq (&ohci->lock);
 577
 578 retry:
 579         /* HC Reset requires max 10 us delay */
 580         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 581         val = 30;       /* ... allow extra time */
 582         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 583                 if (--val == 0) {
 584                         spin_unlock_irq (&ohci->lock);
 585                         ohci_err (ohci, "USB HC reset timed out!\n");
 586                         return -1;
 587                 }
 588                 udelay (1);
 589         }
 590
 591         /* now we're in the SUSPEND state ... must go OPERATIONAL
 592          * within 2msec else HC enters RESUME
 593          *
 594          * ... but some hardware won't init fmInterval "by the book"
 595          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 596          * this if we write fmInterval after we're OPERATIONAL.
 597          * Unclear about ALi, ServerWorks, and others ... this could
 598          * easily be a longstanding bug in chip init on Linux.
 599          */
 600         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 601                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 602                 // flush those writes
 603                 (void) ohci_readl (ohci, &ohci->regs->control);
 604         }
 605
 606         /* Tell the controller where the control and bulk lists are
 607          * The lists are empty now. */
 608         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 609         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 610
 611         /* a reset clears this */
 612         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 613
 614         periodic_reinit (ohci);
 615
 616         /* some OHCI implementations are finicky about how they init.
 617          * bogus values here mean not even enumeration could work.
 618          */
 619         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 620                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 621                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 622                         ohci->flags |= OHCI_QUIRK_INITRESET;
 623                         ohci_dbg (ohci, "enabling initreset quirk\n");
 624                         goto retry;
 625                 }
 626                 spin_unlock_irq (&ohci->lock);
 627                 ohci_err (ohci, "init err (%08x %04x)\n",
 628                         ohci_readl (ohci, &ohci->regs->fminterval),
 629                         ohci_readl (ohci, &ohci->regs->periodicstart));
 630                 return -EOVERFLOW;
 631         }
 632
 633         /* use rhsc irqs after khubd is fully initialized */
 634         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 635         hcd->uses_new_polling = 1;
 636
 637         /* start controller operations */
 638         ohci->hc_control &= OHCI_CTRL_RWC;
 639         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 640         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 641         ohci->rh_state = OHCI_RH_RUNNING;
 642
 643         /* wake on ConnectStatusChange, matching external hubs */
 644         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 645
 646         /* Choose the interrupts we care about now, others later on demand */
 647         mask = OHCI_INTR_INIT;
 648         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 649         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 650
 651         /* handle root hub init quirks ... */
 652         val = roothub_a (ohci);
 653         val &= ~(RH_A_PSM | RH_A_OCPM);
 654         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 655                 /* NSC 87560 and maybe others */
 656                 val |= RH_A_NOCP;
 657                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 658                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 659         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 660                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 661                 /* hub power always on; required for AMD-756 and some
 662                  * Mac platforms.  ganged overcurrent reporting, if any.
 663                  */
 664                 val |= RH_A_NPS;
 665                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 666         }
 667         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 668         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 669                                                 &ohci->regs->roothub.b);
 670         // flush those writes
 671         (void) ohci_readl (ohci, &ohci->regs->control);
 672
 673         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 674         spin_unlock_irq (&ohci->lock);
 675
 676         // POTPGT delay is bits 24-31, in 2 ms units.
 677         mdelay ((val >> 23) & 0x1fe);
 678
 679         ohci_dump(ohci);
 680
 681         return 0;
 682 }
 683
 684 /* ohci_setup routine for generic controller initialization */
 685
 686 int ohci_setup(struct usb_hcd *hcd)
 687 {
 688         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 689
 690         ohci_hcd_init(ohci);
 691
 692         return ohci_init(ohci);
 693 }
 694 EXPORT_SYMBOL_GPL(ohci_setup);
 695
 696 /* ohci_start routine for generic controller start of all OHCI bus glue */
 697 static int ohci_start(struct usb_hcd *hcd)
 698 {
 699         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 700         int     ret;
 701
 702         ret = ohci_run(ohci);
 703         if (ret < 0) {
 704                 ohci_err(ohci, "can't start\n");
 705                 ohci_stop(hcd);
 706         }
 707         return ret;
 708 }
 709
 710 /*-------------------------------------------------------------------------*/
 711
 712 /*
 713  * Some OHCI controllers are known to lose track of completed TDs.  They
 714  * don't add the TDs to the hardware done queue, which means we never see
 715  * them as being completed.
 716  *
 717  * This watchdog routine checks for such problems.  Without some way to
 718  * tell when those TDs have completed, we would never take their EDs off
 719  * the unlink list.  As a result, URBs could never be dequeued and
 720  * endpoints could never be released.
 721  */
 722 static void io_watchdog_func(unsigned long _ohci)
 723 {
 724         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 725         bool            takeback_all_pending = false;
 726         u32             status;
 727         u32             head;
 728         struct ed       *ed;
 729         struct td       *td, *td_start, *td_next;
 730         unsigned long   flags;
 731
 732         spin_lock_irqsave(&ohci->lock, flags);
 733
 734         /*
 735          * One way to lose track of completed TDs is if the controller
 736          * never writes back the done queue head.  If it hasn't been
 737          * written back since the last time this function ran and if it
 738          * was non-empty at that time, something is badly wrong with the
 739          * hardware.
 740          */
 741         status = ohci_readl(ohci, &ohci->regs->intrstatus);
 742         if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 743                 if (ohci->prev_donehead) {
 744                         ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 745                         usb_hc_died(ohci_to_hcd(ohci));
 746                         ohci_dump(ohci);
 747                         ohci_shutdown(ohci_to_hcd(ohci));
 748                         goto done;
 749                 } else {
 750                         /* No write back because the done queue was empty */
 751                         takeback_all_pending = true;
 752                 }
 753         }
 754
 755         /* Check every ED which might have pending TDs */
 756         list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 757                 if (ed->pending_td) {
 758                         if (takeback_all_pending ||
 759                                         OKAY_TO_TAKEBACK(ohci, ed)) {
 760                                 unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 761
 762                                 ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 763                                                 0x007f & tmp,
 764                                                 (0x000f & (tmp >> 7)) +
 765                                                         ((tmp & ED_IN) >> 5));
 766                                 add_to_done_list(ohci, ed->pending_td);
 767                         }
 768                 }
 769
 770                 /* Starting from the latest pending TD, */
 771                 td = ed->pending_td;
 772
 773                 /* or the last TD on the done list, */
 774                 if (!td) {
 775                         list_for_each_entry(td_next, &ed->td_list, td_list) {
 776                                 if (!td_next->next_dl_td)
 777                                         break;
 778                                 td = td_next;
 779                         }
 780                 }
 781
 782                 /* find the last TD processed by the controller. */
 783                 head = hc32_to_cpu(ohci, ACCESS_ONCE(ed->hwHeadP)) & TD_MASK;
 784                 td_start = td;
 785                 td_next = list_prepare_entry(td, &ed->td_list, td_list);
 786                 list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 787                         if (head == (u32) td_next->td_dma)
 788                                 break;
 789                         td = td_next;   /* head pointer has passed this TD */
 790                 }
 791                 if (td != td_start) {
 792                         /*
 793                          * In case a WDH cycle is in progress, we will wait
 794                          * for the next two cycles to complete before assuming
 795                          * this TD will never get on the done queue.
 796                          */
 797                         ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 798                         ed->pending_td = td;
 799                 }
 800         }
 801
 802         ohci_work(ohci);
 803
 804         if (ohci->rh_state == OHCI_RH_RUNNING) {
 805                 if (!list_empty(&ohci->eds_in_use)) {
 806                         ohci->prev_wdh_cnt = ohci->wdh_cnt;
 807                         ohci->prev_donehead = ohci_readl(ohci,
 808                                         &ohci->regs->donehead);
 809                         mod_timer(&ohci->io_watchdog,
 810                                         jiffies + IO_WATCHDOG_DELAY);
 811                 }
 812         }
 813
 814  done:
 815         spin_unlock_irqrestore(&ohci->lock, flags);
 816 }
 817
 818 /* an interrupt happens */
 819
 820 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 821 {
 822         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 823         struct ohci_regs __iomem *regs = ohci->regs;
 824         int                     ints;
 825
 826         /* Read interrupt status (and flush pending writes).  We ignore the
 827          * optimization of checking the LSB of hcca->done_head; it doesn't
 828          * work on all systems (edge triggering for OHCI can be a factor).
 829          */
 830         ints = ohci_readl(ohci, &regs->intrstatus);
 831
 832         /* Check for an all 1's result which is a typical consequence
 833          * of dead, unclocked, or unplugged (CardBus...) devices
 834          */
 835         if (ints == ~(u32)0) {
 836                 ohci->rh_state = OHCI_RH_HALTED;
 837                 ohci_dbg (ohci, "device removed!\n");
 838                 usb_hc_died(hcd);
 839                 return IRQ_HANDLED;
 840         }
 841
 842         /* We only care about interrupts that are enabled */
 843         ints &= ohci_readl(ohci, &regs->intrenable);
 844
 845         /* interrupt for some other device? */
 846         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 847                 return IRQ_NOTMINE;
 848
 849         if (ints & OHCI_INTR_UE) {
 850                 // e.g. due to PCI Master/Target Abort
 851                 if (quirk_nec(ohci)) {
 852                         /* Workaround for a silicon bug in some NEC chips used
 853                          * in Apple's PowerBooks. Adapted from Darwin code.
 854                          */
 855                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 856
 857                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 858
 859                         schedule_work (&ohci->nec_work);
 860                 } else {
 861                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 862                         ohci->rh_state = OHCI_RH_HALTED;
 863                         usb_hc_died(hcd);
 864                 }
 865
 866                 ohci_dump(ohci);
 867                 ohci_usb_reset (ohci);
 868         }
 869
 870         if (ints & OHCI_INTR_RHSC) {
 871                 ohci_dbg(ohci, "rhsc\n");
 872                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 873                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 874                                 &regs->intrstatus);
 875
 876                 /* NOTE: Vendors didn't always make the same implementation
 877                  * choices for RHSC.  Many followed the spec; RHSC triggers
 878                  * on an edge, like setting and maybe clearing a port status
 879                  * change bit.  With others it's level-triggered, active
 880                  * until khubd clears all the port status change bits.  We'll
 881                  * always disable it here and rely on polling until khubd
 882                  * re-enables it.
 883                  */
 884                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 885                 usb_hcd_poll_rh_status(hcd);
 886         }
 887
 888         /* For connect and disconnect events, we expect the controller
 889          * to turn on RHSC along with RD.  But for remote wakeup events
 890          * this might not happen.
 891          */
 892         else if (ints & OHCI_INTR_RD) {
 893                 ohci_dbg(ohci, "resume detect\n");
 894                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 895                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 896                 if (ohci->autostop) {
 897                         spin_lock (&ohci->lock);
 898                         ohci_rh_resume (ohci);
 899                         spin_unlock (&ohci->lock);
 900                 } else
 901                         usb_hcd_resume_root_hub(hcd);
 902         }
 903
 904         spin_lock(&ohci->lock);
 905         if (ints & OHCI_INTR_WDH)
 906                 update_done_list(ohci);
 907
 908         /* could track INTR_SO to reduce available PCI/... bandwidth */
 909
 910         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 911          * when there's still unlinking to be done (next frame).
 912          */
 913         ohci_work(ohci);
 914         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 915                         && ohci->rh_state == OHCI_RH_RUNNING)
 916                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 917
 918         if (ohci->rh_state == OHCI_RH_RUNNING) {
 919                 ohci_writel (ohci, ints, &regs->intrstatus);
 920                 if (ints & OHCI_INTR_WDH)
 921                         ++ohci->wdh_cnt;
 922
 923                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 924                 // flush those writes
 925                 (void) ohci_readl (ohci, &ohci->regs->control);
 926         }
 927         spin_unlock(&ohci->lock);
 928
 929         return IRQ_HANDLED;
 930 }
 931
 932 /*-------------------------------------------------------------------------*/
 933
 934 static void ohci_stop (struct usb_hcd *hcd)
 935 {
 936         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 937
 938         ohci_dump(ohci);
 939
 940         if (quirk_nec(ohci))
 941                 flush_work(&ohci->nec_work);
 942         del_timer_sync(&ohci->io_watchdog);
 943
 944         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 945         ohci_usb_reset(ohci);
 946         free_irq(hcd->irq, hcd);
 947         hcd->irq = 0;
 948
 949         if (quirk_amdiso(ohci))
 950                 usb_amd_dev_put();
 951
 952         remove_debug_files (ohci);
 953         ohci_mem_cleanup (ohci);
 954         if (ohci->hcca) {
 955                 dma_free_coherent (hcd->self.controller,
 956                                 sizeof *ohci->hcca,
 957                                 ohci->hcca, ohci->hcca_dma);
 958                 ohci->hcca = NULL;
 959                 ohci->hcca_dma = 0;
 960         }
 961 }
 962
 963 /*-------------------------------------------------------------------------*/
 964
 965 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 966
 967 /* must not be called from interrupt context */
 968 int ohci_restart(struct ohci_hcd *ohci)
 969 {
 970         int temp;
 971         int i;
 972         struct urb_priv *priv;
 973
 974         ohci_init(ohci);
 975         spin_lock_irq(&ohci->lock);
 976         ohci->rh_state = OHCI_RH_HALTED;
 977
 978         /* Recycle any "live" eds/tds (and urbs). */
 979         if (!list_empty (&ohci->pending))
 980                 ohci_dbg(ohci, "abort schedule...\n");
 981         list_for_each_entry (priv, &ohci->pending, pending) {
 982                 struct urb      *urb = priv->td[0]->urb;
 983                 struct ed       *ed = priv->ed;
 984
 985                 switch (ed->state) {
 986                 case ED_OPER:
 987                         ed->state = ED_UNLINK;
 988                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 989                         ed_deschedule (ohci, ed);
 990
 991                         ed->ed_next = ohci->ed_rm_list;
 992                         ed->ed_prev = NULL;
 993                         ohci->ed_rm_list = ed;
 994                         /* FALLTHROUGH */
 995                 case ED_UNLINK:
 996                         break;
 997                 default:
 998                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 999                                         ed, ed->state);
1000                 }
1001
1002                 if (!urb->unlinked)
1003                         urb->unlinked = -ESHUTDOWN;
1004         }
1005         ohci_work(ohci);
1006         spin_unlock_irq(&ohci->lock);
1007
1008         /* paranoia, in case that didn't work: */
1009
1010         /* empty the interrupt branches */
1011         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1012         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1013
1014         /* no EDs to remove */
1015         ohci->ed_rm_list = NULL;
1016
1017         /* empty control and bulk lists */
1018         ohci->ed_controltail = NULL;
1019         ohci->ed_bulktail    = NULL;
1020
1021         if ((temp = ohci_run (ohci)) < 0) {
1022                 ohci_err (ohci, "can't restart, %d\n", temp);
1023                 return temp;
1024         }
1025         ohci_dbg(ohci, "restart complete\n");
1026         return 0;
1027 }
1028 EXPORT_SYMBOL_GPL(ohci_restart);
1029
1030 #endif
1031
1032 #ifdef CONFIG_PM
1033
1034 int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1035 {
1036         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1037         unsigned long   flags;
1038         int             rc = 0;
1039
1040         /* Disable irq emission and mark HW unaccessible. Use
1041          * the spinlock to properly synchronize with possible pending
1042          * RH suspend or resume activity.
1043          */
1044         spin_lock_irqsave (&ohci->lock, flags);
1045         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1046         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1047
1048         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1049         spin_unlock_irqrestore (&ohci->lock, flags);
1050
1051         synchronize_irq(hcd->irq);
1052
1053         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1054                 ohci_resume(hcd, false);
1055                 rc = -EBUSY;
1056         }
1057         return rc;
1058 }
1059 EXPORT_SYMBOL_GPL(ohci_suspend);
1060
1061
1062 int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1063 {
1064         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1065         int                     port;
1066         bool                    need_reinit = false;
1067
1068         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1069
1070         /* Make sure resume from hibernation re-enumerates everything */
1071         if (hibernated)
1072                 ohci_usb_reset(ohci);
1073
1074         /* See if the controller is already running or has been reset */
1075         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1076         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1077                 need_reinit = true;
1078         } else {
1079                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1080                 case OHCI_USB_OPER:
1081                 case OHCI_USB_RESET:
1082                         need_reinit = true;
1083                 }
1084         }
1085
1086         /* If needed, reinitialize and suspend the root hub */
1087         if (need_reinit) {
1088                 spin_lock_irq(&ohci->lock);
1089                 ohci_rh_resume(ohci);
1090                 ohci_rh_suspend(ohci, 0);
1091                 spin_unlock_irq(&ohci->lock);
1092         }
1093
1094         /* Normally just turn on port power and enable interrupts */
1095         else {
1096                 ohci_dbg(ohci, "powerup ports\n");
1097                 for (port = 0; port < ohci->num_ports; port++)
1098                         ohci_writel(ohci, RH_PS_PPS,
1099                                         &ohci->regs->roothub.portstatus[port]);
1100
1101                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1102                 ohci_readl(ohci, &ohci->regs->intrenable);
1103                 msleep(20);
1104         }
1105
1106         usb_hcd_resume_root_hub(hcd);
1107
1108         return 0;
1109 }
1110 EXPORT_SYMBOL_GPL(ohci_resume);
1111
1112 #endif
1113
1114 /*-------------------------------------------------------------------------*/
1115
1116 /*
1117  * Generic structure: This gets copied for platform drivers so that
1118  * individual entries can be overridden as needed.
1119  */
1120
1121 static const struct hc_driver ohci_hc_driver = {
1122         .description =          hcd_name,
1123         .product_desc =         "OHCI Host Controller",
1124         .hcd_priv_size =        sizeof(struct ohci_hcd),
1125
1126         /*
1127          * generic hardware linkage
1128         */
1129         .irq =                  ohci_irq,
1130         .flags =                HCD_MEMORY | HCD_USB11,
1131
1132         /*
1133         * basic lifecycle operations
1134         */
1135         .reset =                ohci_setup,
1136         .start =                ohci_start,
1137         .stop =                 ohci_stop,
1138         .shutdown =             ohci_shutdown,
1139
1140         /*
1141          * managing i/o requests and associated device resources
1142         */
1143         .urb_enqueue =          ohci_urb_enqueue,
1144         .urb_dequeue =          ohci_urb_dequeue,
1145         .endpoint_disable =     ohci_endpoint_disable,
1146
1147         /*
1148         * scheduling support
1149         */
1150         .get_frame_number =     ohci_get_frame,
1151
1152         /*
1153         * root hub support
1154         */
1155         .hub_status_data =      ohci_hub_status_data,
1156         .hub_control =          ohci_hub_control,
1157 #ifdef CONFIG_PM
1158         .bus_suspend =          ohci_bus_suspend,
1159         .bus_resume =           ohci_bus_resume,
1160 #endif
1161         .start_port_reset =     ohci_start_port_reset,
1162 };
1163
1164 void ohci_init_driver(struct hc_driver *drv,
1165                 const struct ohci_driver_overrides *over)
1166 {
1167         /* Copy the generic table to drv and then apply the overrides */
1168         *drv = ohci_hc_driver;
1169
1170         if (over) {
1171                 drv->product_desc = over->product_desc;
1172                 drv->hcd_priv_size += over->extra_priv_size;
1173                 if (over->reset)
1174                         drv->reset = over->reset;
1175         }
1176 }
1177 EXPORT_SYMBOL_GPL(ohci_init_driver);
1178
1179 /*-------------------------------------------------------------------------*/
1180
1181 MODULE_AUTHOR (DRIVER_AUTHOR);
1182 MODULE_DESCRIPTION(DRIVER_DESC);
1183 MODULE_LICENSE ("GPL");
1184
1185 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1186 #include "ohci-sa1111.c"
1187 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1188 #endif
1189
1190 #ifdef CONFIG_USB_OHCI_HCD_DAVINCI
1191 #include "ohci-da8xx.c"
1192 #define DAVINCI_PLATFORM_DRIVER ohci_hcd_da8xx_driver
1193 #endif
1194
1195 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1196 #include "ohci-ppc-of.c"
1197 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1198 #endif
1199
1200 #ifdef CONFIG_PPC_PS3
1201 #include "ohci-ps3.c"
1202 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1203 #endif
1204
1205 #ifdef CONFIG_MFD_SM501
1206 #include "ohci-sm501.c"
1207 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1208 #endif
1209
1210 #ifdef CONFIG_MFD_TC6393XB
1211 #include "ohci-tmio.c"
1212 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1213 #endif
1214
1215 #ifdef CONFIG_MACH_JZ4740
1216 #include "ohci-jz4740.c"
1217 #define PLATFORM_DRIVER ohci_hcd_jz4740_driver
1218 #endif
1219
1220 #ifdef CONFIG_USB_OCTEON_OHCI
1221 #include "ohci-octeon.c"
1222 #define PLATFORM_DRIVER         ohci_octeon_driver
1223 #endif
1224
1225 #ifdef CONFIG_TILE_USB
1226 #include "ohci-tilegx.c"
1227 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1228 #endif
1229
1230 static int __init ohci_hcd_mod_init(void)
1231 {
1232         int retval = 0;
1233
1234         if (usb_disabled())
1235                 return -ENODEV;
1236
1237         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1238         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1239                 sizeof (struct ed), sizeof (struct td));
1240         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1241
1242         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1243         if (!ohci_debug_root) {
1244                 retval = -ENOENT;
1245                 goto error_debug;
1246         }
1247
1248 #ifdef PS3_SYSTEM_BUS_DRIVER
1249         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1250         if (retval < 0)
1251                 goto error_ps3;
1252 #endif
1253
1254 #ifdef PLATFORM_DRIVER
1255         retval = platform_driver_register(&PLATFORM_DRIVER);
1256         if (retval < 0)
1257                 goto error_platform;
1258 #endif
1259
1260 #ifdef OF_PLATFORM_DRIVER
1261         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1262         if (retval < 0)
1263                 goto error_of_platform;
1264 #endif
1265
1266 #ifdef SA1111_DRIVER
1267         retval = sa1111_driver_register(&SA1111_DRIVER);
1268         if (retval < 0)
1269                 goto error_sa1111;
1270 #endif
1271
1272 #ifdef SM501_OHCI_DRIVER
1273         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1274         if (retval < 0)
1275                 goto error_sm501;
1276 #endif
1277
1278 #ifdef TMIO_OHCI_DRIVER
1279         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1280         if (retval < 0)
1281                 goto error_tmio;
1282 #endif
1283
1284 #ifdef DAVINCI_PLATFORM_DRIVER
1285         retval = platform_driver_register(&DAVINCI_PLATFORM_DRIVER);
1286         if (retval < 0)
1287                 goto error_davinci;
1288 #endif
1289
1290         return retval;
1291
1292         /* Error path */
1293 #ifdef DAVINCI_PLATFORM_DRIVER
1294         platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1295  error_davinci:
1296 #endif
1297 #ifdef TMIO_OHCI_DRIVER
1298         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1299  error_tmio:
1300 #endif
1301 #ifdef SM501_OHCI_DRIVER
1302         platform_driver_unregister(&SM501_OHCI_DRIVER);
1303  error_sm501:
1304 #endif
1305 #ifdef SA1111_DRIVER
1306         sa1111_driver_unregister(&SA1111_DRIVER);
1307  error_sa1111:
1308 #endif
1309 #ifdef OF_PLATFORM_DRIVER
1310         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1311  error_of_platform:
1312 #endif
1313 #ifdef PLATFORM_DRIVER
1314         platform_driver_unregister(&PLATFORM_DRIVER);
1315  error_platform:
1316 #endif
1317 #ifdef PS3_SYSTEM_BUS_DRIVER
1318         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1319  error_ps3:
1320 #endif
1321         debugfs_remove(ohci_debug_root);
1322         ohci_debug_root = NULL;
1323  error_debug:
1324
1325         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1326         return retval;
1327 }
1328 module_init(ohci_hcd_mod_init);
1329
1330 static void __exit ohci_hcd_mod_exit(void)
1331 {
1332 #ifdef DAVINCI_PLATFORM_DRIVER
1333         platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
1334 #endif
1335 #ifdef TMIO_OHCI_DRIVER
1336         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1337 #endif
1338 #ifdef SM501_OHCI_DRIVER
1339         platform_driver_unregister(&SM501_OHCI_DRIVER);
1340 #endif
1341 #ifdef SA1111_DRIVER
1342         sa1111_driver_unregister(&SA1111_DRIVER);
1343 #endif
1344 #ifdef OF_PLATFORM_DRIVER
1345         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1346 #endif
1347 #ifdef PLATFORM_DRIVER
1348         platform_driver_unregister(&PLATFORM_DRIVER);
1349 #endif
1350 #ifdef PS3_SYSTEM_BUS_DRIVER
1351         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1352 #endif
1353         debugfs_remove(ohci_debug_root);
1354         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1355 }
1356 module_exit(ohci_hcd_mod_exit);
1357