sound/pci/hda/hda_intel.c

   1 /*
   2  *
   3  *  hda_intel.c - Implementation of primary alsa driver code base
   4  *                for Intel HD Audio.
   5  *
   6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   7  *
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the Free
  13  *  Software Foundation; either version 2 of the License, or (at your option)
  14  *  any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but WITHOUT
  17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  *  more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along with
  22  *  this program; if not, write to the Free Software Foundation, Inc., 59
  23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  *
  25  *  CONTACTS:
  26  *
  27  *  Matt Jared          matt.jared@intel.com
  28  *  Andy Kopp           andy.kopp@intel.com
  29  *  Dan Kogan           dan.d.kogan@intel.com
  30  *
  31  *  CHANGES:
  32  *
  33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
  34  *
  35  */
  36
  37 #include <linux/delay.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/pci.h>
  46 #include <linux/mutex.h>
  47 #include <linux/io.h>
  48 #include <linux/pm_runtime.h>
  49 #include <linux/clocksource.h>
  50 #include <linux/time.h>
  51 #include <linux/completion.h>
  52
  53 #ifdef CONFIG_X86
  54 /* for snoop control */
  55 #include <asm/pgtable.h>
  56 #include <asm/cacheflush.h>
  57 #endif
  58 #include <sound/core.h>
  59 #include <sound/initval.h>
  60 #include <linux/vgaarb.h>
  61 #include <linux/vga_switcheroo.h>
  62 #include <linux/firmware.h>
  63 #include "hda_codec.h"
  64 #include "hda_controller.h"
  65 #include "hda_intel.h"
  66
  67 /* position fix mode */
  68 enum {
  69         POS_FIX_AUTO,
  70         POS_FIX_LPIB,
  71         POS_FIX_POSBUF,
  72         POS_FIX_VIACOMBO,
  73         POS_FIX_COMBO,
  74 };
  75
  76 /* Defines for ATI HD Audio support in SB450 south bridge */
  77 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
  78 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02
  79
  80 /* Defines for Nvidia HDA support */
  81 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
  82 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
  83 #define NVIDIA_HDA_ISTRM_COH          0x4d
  84 #define NVIDIA_HDA_OSTRM_COH          0x4c
  85 #define NVIDIA_HDA_ENABLE_COHBIT      0x01
  86
  87 /* Defines for Intel SCH HDA snoop control */
  88 #define INTEL_SCH_HDA_DEVC      0x78
  89 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
  90
  91 /* Define IN stream 0 FIFO size offset in VIA controller */
  92 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
  93 /* Define VIA HD Audio Device ID*/
  94 #define VIA_HDAC_DEVICE_ID              0x3288
  95
  96 /* max number of SDs */
  97 /* ICH, ATI and VIA have 4 playback and 4 capture */
  98 #define ICH6_NUM_CAPTURE        4
  99 #define ICH6_NUM_PLAYBACK       4
 100
 101 /* ULI has 6 playback and 5 capture */
 102 #define ULI_NUM_CAPTURE         5
 103 #define ULI_NUM_PLAYBACK        6
 104
 105 /* ATI HDMI may have up to 8 playbacks and 0 capture */
 106 #define ATIHDMI_NUM_CAPTURE     0
 107 #define ATIHDMI_NUM_PLAYBACK    8
 108
 109 /* TERA has 4 playback and 3 capture */
 110 #define TERA_NUM_CAPTURE        3
 111 #define TERA_NUM_PLAYBACK       4
 112
 113
 114 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
 115 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
 116 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
 117 static char *model[SNDRV_CARDS];
 118 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 119 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 120 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
 121 static int probe_only[SNDRV_CARDS];
 122 static int jackpoll_ms[SNDRV_CARDS];
 123 static bool single_cmd;
 124 static int enable_msi = -1;
 125 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 126 static char *patch[SNDRV_CARDS];
 127 #endif
 128 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 129 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
 130                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
 131 #endif
 132
 133 module_param_array(index, int, NULL, 0444);
 134 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
 135 module_param_array(id, charp, NULL, 0444);
 136 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
 137 module_param_array(enable, bool, NULL, 0444);
 138 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
 139 module_param_array(model, charp, NULL, 0444);
 140 MODULE_PARM_DESC(model, "Use the given board model.");
 141 module_param_array(position_fix, int, NULL, 0444);
 142 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
 143                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
 144 module_param_array(bdl_pos_adj, int, NULL, 0644);
 145 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
 146 module_param_array(probe_mask, int, NULL, 0444);
 147 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
 148 module_param_array(probe_only, int, NULL, 0444);
 149 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
 150 module_param_array(jackpoll_ms, int, NULL, 0444);
 151 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
 152 module_param(single_cmd, bool, 0444);
 153 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
 154                  "(for debugging only).");
 155 module_param(enable_msi, bint, 0444);
 156 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
 157 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 158 module_param_array(patch, charp, NULL, 0444);
 159 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
 160 #endif
 161 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 162 module_param_array(beep_mode, bool, NULL, 0444);
 163 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
 164                             "(0=off, 1=on) (default=1).");
 165 #endif
 166
 167 #ifdef CONFIG_PM
 168 static int param_set_xint(const char *val, const struct kernel_param *kp);
 169 static struct kernel_param_ops param_ops_xint = {
 170         .set = param_set_xint,
 171         .get = param_get_int,
 172 };
 173 #define param_check_xint param_check_int
 174
 175 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
 176 module_param(power_save, xint, 0644);
 177 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
 178                  "(in second, 0 = disable).");
 179
 180 /* reset the HD-audio controller in power save mode.
 181  * this may give more power-saving, but will take longer time to
 182  * wake up.
 183  */
 184 static bool power_save_controller = 1;
 185 module_param(power_save_controller, bool, 0644);
 186 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 187 #else
 188 #define power_save      0
 189 #endif /* CONFIG_PM */
 190
 191 static int align_buffer_size = -1;
 192 module_param(align_buffer_size, bint, 0644);
 193 MODULE_PARM_DESC(align_buffer_size,
 194                 "Force buffer and period sizes to be multiple of 128 bytes.");
 195
 196 #ifdef CONFIG_X86
 197 static int hda_snoop = -1;
 198 module_param_named(snoop, hda_snoop, bint, 0444);
 199 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
 200 #else
 201 #define hda_snoop               true
 202 #endif
 203
 204
 205 MODULE_LICENSE("GPL");
 206 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 207                          "{Intel, ICH6M},"
 208                          "{Intel, ICH7},"
 209                          "{Intel, ESB2},"
 210                          "{Intel, ICH8},"
 211                          "{Intel, ICH9},"
 212                          "{Intel, ICH10},"
 213                          "{Intel, PCH},"
 214                          "{Intel, CPT},"
 215                          "{Intel, PPT},"
 216                          "{Intel, LPT},"
 217                          "{Intel, LPT_LP},"
 218                          "{Intel, WPT_LP},"
 219                          "{Intel, SPT},"
 220                          "{Intel, SPT_LP},"
 221                          "{Intel, HPT},"
 222                          "{Intel, PBG},"
 223                          "{Intel, SCH},"
 224                          "{ATI, SB450},"
 225                          "{ATI, SB600},"
 226                          "{ATI, RS600},"
 227                          "{ATI, RS690},"
 228                          "{ATI, RS780},"
 229                          "{ATI, R600},"
 230                          "{ATI, RV630},"
 231                          "{ATI, RV610},"
 232                          "{ATI, RV670},"
 233                          "{ATI, RV635},"
 234                          "{ATI, RV620},"
 235                          "{ATI, RV770},"
 236                          "{VIA, VT8251},"
 237                          "{VIA, VT8237A},"
 238                          "{SiS, SIS966},"
 239                          "{ULI, M5461}}");
 240 MODULE_DESCRIPTION("Intel HDA driver");
 241
 242 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
 243 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
 244 #define SUPPORT_VGA_SWITCHEROO
 245 #endif
 246 #endif
 247
 248
 249 /*
 250  */
 251
 252 /* driver types */
 253 enum {
 254         AZX_DRIVER_ICH,
 255         AZX_DRIVER_PCH,
 256         AZX_DRIVER_SCH,
 257         AZX_DRIVER_HDMI,
 258         AZX_DRIVER_ATI,
 259         AZX_DRIVER_ATIHDMI,
 260         AZX_DRIVER_ATIHDMI_NS,
 261         AZX_DRIVER_VIA,
 262         AZX_DRIVER_SIS,
 263         AZX_DRIVER_ULI,
 264         AZX_DRIVER_NVIDIA,
 265         AZX_DRIVER_TERA,
 266         AZX_DRIVER_CTX,
 267         AZX_DRIVER_CTHDA,
 268         AZX_DRIVER_CMEDIA,
 269         AZX_DRIVER_GENERIC,
 270         AZX_NUM_DRIVERS, /* keep this as last entry */
 271 };
 272
 273 #define azx_get_snoop_type(chip) \
 274         (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
 275 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
 276
 277 /* quirks for old Intel chipsets */
 278 #define AZX_DCAPS_INTEL_ICH \
 279         (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
 280
 281 /* quirks for Intel PCH */
 282 #define AZX_DCAPS_INTEL_PCH_NOPM \
 283         (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
 284          AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
 285
 286 #define AZX_DCAPS_INTEL_PCH \
 287         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
 288
 289 #define AZX_DCAPS_INTEL_HASWELL \
 290         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
 291          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
 292          AZX_DCAPS_SNOOP_TYPE(SCH))
 293
 294 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
 295 #define AZX_DCAPS_INTEL_BROADWELL \
 296         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
 297          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
 298          AZX_DCAPS_SNOOP_TYPE(SCH))
 299
 300 #define AZX_DCAPS_INTEL_BRASWELL \
 301         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
 302
 303 #define AZX_DCAPS_INTEL_SKYLAKE \
 304         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
 305          AZX_DCAPS_I915_POWERWELL)
 306
 307 /* quirks for ATI SB / AMD Hudson */
 308 #define AZX_DCAPS_PRESET_ATI_SB \
 309         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
 310          AZX_DCAPS_SNOOP_TYPE(ATI))
 311
 312 /* quirks for ATI/AMD HDMI */
 313 #define AZX_DCAPS_PRESET_ATI_HDMI \
 314         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
 315          AZX_DCAPS_NO_MSI64)
 316
 317 /* quirks for ATI HDMI with snoop off */
 318 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
 319         (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
 320
 321 /* quirks for Nvidia */
 322 #define AZX_DCAPS_PRESET_NVIDIA \
 323         (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
 324          AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
 325          AZX_DCAPS_SNOOP_TYPE(NVIDIA))
 326
 327 #define AZX_DCAPS_PRESET_CTHDA \
 328         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
 329          AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
 330
 331 /*
 332  * VGA-switcher support
 333  */
 334 #ifdef SUPPORT_VGA_SWITCHEROO
 335 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
 336 #else
 337 #define use_vga_switcheroo(chip)        0
 338 #endif
 339
 340 static char *driver_short_names[] = {
 341         [AZX_DRIVER_ICH] = "HDA Intel",
 342         [AZX_DRIVER_PCH] = "HDA Intel PCH",
 343         [AZX_DRIVER_SCH] = "HDA Intel MID",
 344         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
 345         [AZX_DRIVER_ATI] = "HDA ATI SB",
 346         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
 347         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
 348         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
 349         [AZX_DRIVER_SIS] = "HDA SIS966",
 350         [AZX_DRIVER_ULI] = "HDA ULI M5461",
 351         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
 352         [AZX_DRIVER_TERA] = "HDA Teradici",
 353         [AZX_DRIVER_CTX] = "HDA Creative",
 354         [AZX_DRIVER_CTHDA] = "HDA Creative",
 355         [AZX_DRIVER_CMEDIA] = "HDA C-Media",
 356         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
 357 };
 358
 359 #ifdef CONFIG_X86
 360 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
 361 {
 362         int pages;
 363
 364         if (azx_snoop(chip))
 365                 return;
 366         if (!dmab || !dmab->area || !dmab->bytes)
 367                 return;
 368
 369 #ifdef CONFIG_SND_DMA_SGBUF
 370         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
 371                 struct snd_sg_buf *sgbuf = dmab->private_data;
 372                 if (chip->driver_type == AZX_DRIVER_CMEDIA)
 373                         return; /* deal with only CORB/RIRB buffers */
 374                 if (on)
 375                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
 376                 else
 377                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
 378                 return;
 379         }
 380 #endif
 381
 382         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
 383         if (on)
 384                 set_memory_wc((unsigned long)dmab->area, pages);
 385         else
 386                 set_memory_wb((unsigned long)dmab->area, pages);
 387 }
 388
 389 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 390                                  bool on)
 391 {
 392         __mark_pages_wc(chip, buf, on);
 393 }
 394 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 395                                    struct snd_pcm_substream *substream, bool on)
 396 {
 397         if (azx_dev->wc_marked != on) {
 398                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
 399                 azx_dev->wc_marked = on;
 400         }
 401 }
 402 #else
 403 /* NOP for other archs */
 404 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 405                                  bool on)
 406 {
 407 }
 408 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 409                                    struct snd_pcm_substream *substream, bool on)
 410 {
 411 }
 412 #endif
 413
 414 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 415
 416 /*
 417  * initialize the PCI registers
 418  */
 419 /* update bits in a PCI register byte */
 420 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
 421                             unsigned char mask, unsigned char val)
 422 {
 423         unsigned char data;
 424
 425         pci_read_config_byte(pci, reg, &data);
 426         data &= ~mask;
 427         data |= (val & mask);
 428         pci_write_config_byte(pci, reg, data);
 429 }
 430
 431 static void azx_init_pci(struct azx *chip)
 432 {
 433         int snoop_type = azx_get_snoop_type(chip);
 434
 435         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
 436          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
 437          * Ensuring these bits are 0 clears playback static on some HD Audio
 438          * codecs.
 439          * The PCI register TCSEL is defined in the Intel manuals.
 440          */
 441         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
 442                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
 443                 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
 444         }
 445
 446         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
 447          * we need to enable snoop.
 448          */
 449         if (snoop_type == AZX_SNOOP_TYPE_ATI) {
 450                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
 451                         azx_snoop(chip));
 452                 update_pci_byte(chip->pci,
 453                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
 454                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
 455         }
 456
 457         /* For NVIDIA HDA, enable snoop */
 458         if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
 459                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
 460                         azx_snoop(chip));
 461                 update_pci_byte(chip->pci,
 462                                 NVIDIA_HDA_TRANSREG_ADDR,
 463                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
 464                 update_pci_byte(chip->pci,
 465                                 NVIDIA_HDA_ISTRM_COH,
 466                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 467                 update_pci_byte(chip->pci,
 468                                 NVIDIA_HDA_OSTRM_COH,
 469                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 470         }
 471
 472         /* Enable SCH/PCH snoop if needed */
 473         if (snoop_type == AZX_SNOOP_TYPE_SCH) {
 474                 unsigned short snoop;
 475                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 476                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
 477                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
 478                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
 479                         if (!azx_snoop(chip))
 480                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
 481                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
 482                         pci_read_config_word(chip->pci,
 483                                 INTEL_SCH_HDA_DEVC, &snoop);
 484                 }
 485                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
 486                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
 487                         "Disabled" : "Enabled");
 488         }
 489 }
 490
 491 /* calculate runtime delay from LPIB */
 492 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
 493                                    unsigned int pos)
 494 {
 495         struct snd_pcm_substream *substream = azx_dev->core.substream;
 496         int stream = substream->stream;
 497         unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
 498         int delay;
 499
 500         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
 501                 delay = pos - lpib_pos;
 502         else
 503                 delay = lpib_pos - pos;
 504         if (delay < 0) {
 505                 if (delay >= azx_dev->core.delay_negative_threshold)
 506                         delay = 0;
 507                 else
 508                         delay += azx_dev->core.bufsize;
 509         }
 510
 511         if (delay >= azx_dev->core.period_bytes) {
 512                 dev_info(chip->card->dev,
 513                          "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
 514                          delay, azx_dev->core.period_bytes);
 515                 delay = 0;
 516                 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
 517                 chip->get_delay[stream] = NULL;
 518         }
 519
 520         return bytes_to_frames(substream->runtime, delay);
 521 }
 522
 523 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
 524
 525 /* called from IRQ */
 526 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
 527 {
 528         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 529         int ok;
 530
 531         ok = azx_position_ok(chip, azx_dev);
 532         if (ok == 1) {
 533                 azx_dev->irq_pending = 0;
 534                 return ok;
 535         } else if (ok == 0) {
 536                 /* bogus IRQ, process it later */
 537                 azx_dev->irq_pending = 1;
 538                 schedule_work(&hda->irq_pending_work);
 539         }
 540         return 0;
 541 }
 542
 543 /* Enable/disable i915 display power for the link */
 544 static int azx_intel_link_power(struct azx *chip, bool enable)
 545 {
 546         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 547
 548         return hda_display_power(hda, enable);
 549 }
 550
 551 /*
 552  * Check whether the current DMA position is acceptable for updating
 553  * periods.  Returns non-zero if it's OK.
 554  *
 555  * Many HD-audio controllers appear pretty inaccurate about
 556  * the update-IRQ timing.  The IRQ is issued before actually the
 557  * data is processed.  So, we need to process it afterwords in a
 558  * workqueue.
 559  */
 560 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 561 {
 562         struct snd_pcm_substream *substream = azx_dev->core.substream;
 563         int stream = substream->stream;
 564         u32 wallclk;
 565         unsigned int pos;
 566
 567         wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
 568         if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
 569                 return -1;      /* bogus (too early) interrupt */
 570
 571         if (chip->get_position[stream])
 572                 pos = chip->get_position[stream](chip, azx_dev);
 573         else { /* use the position buffer as default */
 574                 pos = azx_get_pos_posbuf(chip, azx_dev);
 575                 if (!pos || pos == (u32)-1) {
 576                         dev_info(chip->card->dev,
 577                                  "Invalid position buffer, using LPIB read method instead.\n");
 578                         chip->get_position[stream] = azx_get_pos_lpib;
 579                         if (chip->get_position[0] == azx_get_pos_lpib &&
 580                             chip->get_position[1] == azx_get_pos_lpib)
 581                                 azx_bus(chip)->use_posbuf = false;
 582                         pos = azx_get_pos_lpib(chip, azx_dev);
 583                         chip->get_delay[stream] = NULL;
 584                 } else {
 585                         chip->get_position[stream] = azx_get_pos_posbuf;
 586                         if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
 587                                 chip->get_delay[stream] = azx_get_delay_from_lpib;
 588                 }
 589         }
 590
 591         if (pos >= azx_dev->core.bufsize)
 592                 pos = 0;
 593
 594         if (WARN_ONCE(!azx_dev->core.period_bytes,
 595                       "hda-intel: zero azx_dev->period_bytes"))
 596                 return -1; /* this shouldn't happen! */
 597         if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 &&
 598             pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2)
 599                 /* NG - it's below the first next period boundary */
 600                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
 601         azx_dev->core.start_wallclk += wallclk;
 602         return 1; /* OK, it's fine */
 603 }
 604
 605 /*
 606  * The work for pending PCM period updates.
 607  */
 608 static void azx_irq_pending_work(struct work_struct *work)
 609 {
 610         struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
 611         struct azx *chip = &hda->chip;
 612         struct hdac_bus *bus = azx_bus(chip);
 613         struct hdac_stream *s;
 614         int pending, ok;
 615
 616         if (!hda->irq_pending_warned) {
 617                 dev_info(chip->card->dev,
 618                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
 619                          chip->card->number);
 620                 hda->irq_pending_warned = 1;
 621         }
 622
 623         for (;;) {
 624                 pending = 0;
 625                 spin_lock_irq(&bus->reg_lock);
 626                 list_for_each_entry(s, &bus->stream_list, list) {
 627                         struct azx_dev *azx_dev = stream_to_azx_dev(s);
 628                         if (!azx_dev->irq_pending ||
 629                             !s->substream ||
 630                             !s->running)
 631                                 continue;
 632                         ok = azx_position_ok(chip, azx_dev);
 633                         if (ok > 0) {
 634                                 azx_dev->irq_pending = 0;
 635                                 spin_unlock(&bus->reg_lock);
 636                                 snd_pcm_period_elapsed(s->substream);
 637                                 spin_lock(&bus->reg_lock);
 638                         } else if (ok < 0) {
 639                                 pending = 0;    /* too early */
 640                         } else
 641                                 pending++;
 642                 }
 643                 spin_unlock_irq(&bus->reg_lock);
 644                 if (!pending)
 645                         return;
 646                 msleep(1);
 647         }
 648 }
 649
 650 /* clear irq_pending flags and assure no on-going workq */
 651 static void azx_clear_irq_pending(struct azx *chip)
 652 {
 653         struct hdac_bus *bus = azx_bus(chip);
 654         struct hdac_stream *s;
 655
 656         spin_lock_irq(&bus->reg_lock);
 657         list_for_each_entry(s, &bus->stream_list, list) {
 658                 struct azx_dev *azx_dev = stream_to_azx_dev(s);
 659                 azx_dev->irq_pending = 0;
 660         }
 661         spin_unlock_irq(&bus->reg_lock);
 662 }
 663
 664 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
 665 {
 666         struct hdac_bus *bus = azx_bus(chip);
 667
 668         if (request_irq(chip->pci->irq, azx_interrupt,
 669                         chip->msi ? 0 : IRQF_SHARED,
 670                         KBUILD_MODNAME, chip)) {
 671                 dev_err(chip->card->dev,
 672                         "unable to grab IRQ %d, disabling device\n",
 673                         chip->pci->irq);
 674                 if (do_disconnect)
 675                         snd_card_disconnect(chip->card);
 676                 return -1;
 677         }
 678         bus->irq = chip->pci->irq;
 679         pci_intx(chip->pci, !chip->msi);
 680         return 0;
 681 }
 682
 683 /* get the current DMA position with correction on VIA chips */
 684 static unsigned int azx_via_get_position(struct azx *chip,
 685                                          struct azx_dev *azx_dev)
 686 {
 687         unsigned int link_pos, mini_pos, bound_pos;
 688         unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
 689         unsigned int fifo_size;
 690
 691         link_pos = snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
 692         if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 693                 /* Playback, no problem using link position */
 694                 return link_pos;
 695         }
 696
 697         /* Capture */
 698         /* For new chipset,
 699          * use mod to get the DMA position just like old chipset
 700          */
 701         mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
 702         mod_dma_pos %= azx_dev->core.period_bytes;
 703
 704         /* azx_dev->fifo_size can't get FIFO size of in stream.
 705          * Get from base address + offset.
 706          */
 707         fifo_size = readw(azx_bus(chip)->remap_addr +
 708                           VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
 709
 710         if (azx_dev->insufficient) {
 711                 /* Link position never gather than FIFO size */
 712                 if (link_pos <= fifo_size)
 713                         return 0;
 714
 715                 azx_dev->insufficient = 0;
 716         }
 717
 718         if (link_pos <= fifo_size)
 719                 mini_pos = azx_dev->core.bufsize + link_pos - fifo_size;
 720         else
 721                 mini_pos = link_pos - fifo_size;
 722
 723         /* Find nearest previous boudary */
 724         mod_mini_pos = mini_pos % azx_dev->core.period_bytes;
 725         mod_link_pos = link_pos % azx_dev->core.period_bytes;
 726         if (mod_link_pos >= fifo_size)
 727                 bound_pos = link_pos - mod_link_pos;
 728         else if (mod_dma_pos >= mod_mini_pos)
 729                 bound_pos = mini_pos - mod_mini_pos;
 730         else {
 731                 bound_pos = mini_pos - mod_mini_pos + azx_dev->core.period_bytes;
 732                 if (bound_pos >= azx_dev->core.bufsize)
 733                         bound_pos = 0;
 734         }
 735
 736         /* Calculate real DMA position we want */
 737         return bound_pos + mod_dma_pos;
 738 }
 739
 740 #ifdef CONFIG_PM
 741 static DEFINE_MUTEX(card_list_lock);
 742 static LIST_HEAD(card_list);
 743
 744 static void azx_add_card_list(struct azx *chip)
 745 {
 746         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 747         mutex_lock(&card_list_lock);
 748         list_add(&hda->list, &card_list);
 749         mutex_unlock(&card_list_lock);
 750 }
 751
 752 static void azx_del_card_list(struct azx *chip)
 753 {
 754         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 755         mutex_lock(&card_list_lock);
 756         list_del_init(&hda->list);
 757         mutex_unlock(&card_list_lock);
 758 }
 759
 760 /* trigger power-save check at writing parameter */
 761 static int param_set_xint(const char *val, const struct kernel_param *kp)
 762 {
 763         struct hda_intel *hda;
 764         struct azx *chip;
 765         int prev = power_save;
 766         int ret = param_set_int(val, kp);
 767
 768         if (ret || prev == power_save)
 769                 return ret;
 770
 771         mutex_lock(&card_list_lock);
 772         list_for_each_entry(hda, &card_list, list) {
 773                 chip = &hda->chip;
 774                 if (!hda->probe_continued || chip->disabled)
 775                         continue;
 776                 snd_hda_set_power_save(&chip->bus, power_save * 1000);
 777         }
 778         mutex_unlock(&card_list_lock);
 779         return 0;
 780 }
 781 #else
 782 #define azx_add_card_list(chip) /* NOP */
 783 #define azx_del_card_list(chip) /* NOP */
 784 #endif /* CONFIG_PM */
 785
 786 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
 787 /*
 788  * power management
 789  */
 790 static int azx_suspend(struct device *dev)
 791 {
 792         struct snd_card *card = dev_get_drvdata(dev);
 793         struct azx *chip;
 794         struct hda_intel *hda;
 795         struct hdac_bus *bus;
 796
 797         if (!card)
 798                 return 0;
 799
 800         chip = card->private_data;
 801         hda = container_of(chip, struct hda_intel, chip);
 802         if (chip->disabled || hda->init_failed)
 803                 return 0;
 804
 805         bus = azx_bus(chip);
 806         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 807         azx_clear_irq_pending(chip);
 808         azx_stop_chip(chip);
 809         azx_enter_link_reset(chip);
 810         if (bus->irq >= 0) {
 811                 free_irq(bus->irq, chip);
 812                 bus->irq = -1;
 813         }
 814
 815         if (chip->msi)
 816                 pci_disable_msi(chip->pci);
 817         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
 818                 && hda->need_i915_power)
 819                 hda_display_power(hda, false);
 820         return 0;
 821 }
 822
 823 static int azx_resume(struct device *dev)
 824 {
 825         struct pci_dev *pci = to_pci_dev(dev);
 826         struct snd_card *card = dev_get_drvdata(dev);
 827         struct azx *chip;
 828         struct hda_intel *hda;
 829
 830         if (!card)
 831                 return 0;
 832
 833         chip = card->private_data;
 834         hda = container_of(chip, struct hda_intel, chip);
 835         if (chip->disabled || hda->init_failed)
 836                 return 0;
 837
 838         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
 839                 && hda->need_i915_power) {
 840                 hda_display_power(hda, true);
 841                 haswell_set_bclk(hda);
 842         }
 843         if (chip->msi)
 844                 if (pci_enable_msi(pci) < 0)
 845                         chip->msi = 0;
 846         if (azx_acquire_irq(chip, 1) < 0)
 847                 return -EIO;
 848         azx_init_pci(chip);
 849
 850         azx_init_chip(chip, true);
 851
 852         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 853         return 0;
 854 }
 855 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
 856
 857 #ifdef CONFIG_PM
 858 static int azx_runtime_suspend(struct device *dev)
 859 {
 860         struct snd_card *card = dev_get_drvdata(dev);
 861         struct azx *chip;
 862         struct hda_intel *hda;
 863
 864         if (!card)
 865                 return 0;
 866
 867         chip = card->private_data;
 868         hda = container_of(chip, struct hda_intel, chip);
 869         if (chip->disabled || hda->init_failed)
 870                 return 0;
 871
 872         if (!azx_has_pm_runtime(chip))
 873                 return 0;
 874
 875         /* enable controller wake up event */
 876         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 877                   STATESTS_INT_MASK);
 878
 879         azx_stop_chip(chip);
 880         azx_enter_link_reset(chip);
 881         azx_clear_irq_pending(chip);
 882         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
 883                 && hda->need_i915_power)
 884                 hda_display_power(hda, false);
 885
 886         return 0;
 887 }
 888
 889 static int azx_runtime_resume(struct device *dev)
 890 {
 891         struct snd_card *card = dev_get_drvdata(dev);
 892         struct azx *chip;
 893         struct hda_intel *hda;
 894         struct hda_codec *codec;
 895         int status;
 896
 897         if (!card)
 898                 return 0;
 899
 900         chip = card->private_data;
 901         hda = container_of(chip, struct hda_intel, chip);
 902         if (chip->disabled || hda->init_failed)
 903                 return 0;
 904
 905         if (!azx_has_pm_runtime(chip))
 906                 return 0;
 907
 908         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
 909                 && hda->need_i915_power) {
 910                 hda_display_power(hda, true);
 911                 haswell_set_bclk(hda);
 912         }
 913
 914         /* Read STATESTS before controller reset */
 915         status = azx_readw(chip, STATESTS);
 916
 917         azx_init_pci(chip);
 918         azx_init_chip(chip, true);
 919
 920         if (status) {
 921                 list_for_each_codec(codec, &chip->bus)
 922                         if (status & (1 << codec->addr))
 923                                 schedule_delayed_work(&codec->jackpoll_work,
 924                                                       codec->jackpoll_interval);
 925         }
 926
 927         /* disable controller Wake Up event*/
 928         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 929                         ~STATESTS_INT_MASK);
 930
 931         return 0;
 932 }
 933
 934 static int azx_runtime_idle(struct device *dev)
 935 {
 936         struct snd_card *card = dev_get_drvdata(dev);
 937         struct azx *chip;
 938         struct hda_intel *hda;
 939
 940         if (!card)
 941                 return 0;
 942
 943         chip = card->private_data;
 944         hda = container_of(chip, struct hda_intel, chip);
 945         if (chip->disabled || hda->init_failed)
 946                 return 0;
 947
 948         if (!power_save_controller || !azx_has_pm_runtime(chip) ||
 949             azx_bus(chip)->codec_powered)
 950                 return -EBUSY;
 951
 952         return 0;
 953 }
 954
 955 static const struct dev_pm_ops azx_pm = {
 956         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
 957         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
 958 };
 959
 960 #define AZX_PM_OPS      &azx_pm
 961 #else
 962 #define AZX_PM_OPS      NULL
 963 #endif /* CONFIG_PM */
 964
 965
 966 static int azx_probe_continue(struct azx *chip);
 967
 968 #ifdef SUPPORT_VGA_SWITCHEROO
 969 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
 970
 971 static void azx_vs_set_state(struct pci_dev *pci,
 972                              enum vga_switcheroo_state state)
 973 {
 974         struct snd_card *card = pci_get_drvdata(pci);
 975         struct azx *chip = card->private_data;
 976         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
 977         bool disabled;
 978
 979         wait_for_completion(&hda->probe_wait);
 980         if (hda->init_failed)
 981                 return;
 982
 983         disabled = (state == VGA_SWITCHEROO_OFF);
 984         if (chip->disabled == disabled)
 985                 return;
 986
 987         if (!hda->probe_continued) {
 988                 chip->disabled = disabled;
 989                 if (!disabled) {
 990                         dev_info(chip->card->dev,
 991                                  "Start delayed initialization\n");
 992                         if (azx_probe_continue(chip) < 0) {
 993                                 dev_err(chip->card->dev, "initialization error\n");
 994                                 hda->init_failed = true;
 995                         }
 996                 }
 997         } else {
 998                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
 999                          disabled ? "Disabling" : "Enabling");
1000                 if (disabled) {
1001                         pm_runtime_put_sync_suspend(card->dev);
1002                         azx_suspend(card->dev);
1003                         /* when we get suspended by vga switcheroo we end up in D3cold,
1004                          * however we have no ACPI handle, so pci/acpi can't put us there,
1005                          * put ourselves there */
1006                         pci->current_state = PCI_D3cold;
1007                         chip->disabled = true;
1008                         if (snd_hda_lock_devices(&chip->bus))
1009                                 dev_warn(chip->card->dev,
1010                                          "Cannot lock devices!\n");
1011                 } else {
1012                         snd_hda_unlock_devices(&chip->bus);
1013                         pm_runtime_get_noresume(card->dev);
1014                         chip->disabled = false;
1015                         azx_resume(card->dev);
1016                 }
1017         }
1018 }
1019
1020 static bool azx_vs_can_switch(struct pci_dev *pci)
1021 {
1022         struct snd_card *card = pci_get_drvdata(pci);
1023         struct azx *chip = card->private_data;
1024         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1025
1026         wait_for_completion(&hda->probe_wait);
1027         if (hda->init_failed)
1028                 return false;
1029         if (chip->disabled || !hda->probe_continued)
1030                 return true;
1031         if (snd_hda_lock_devices(&chip->bus))
1032                 return false;
1033         snd_hda_unlock_devices(&chip->bus);
1034         return true;
1035 }
1036
1037 static void init_vga_switcheroo(struct azx *chip)
1038 {
1039         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1040         struct pci_dev *p = get_bound_vga(chip->pci);
1041         if (p) {
1042                 dev_info(chip->card->dev,
1043                          "Handle VGA-switcheroo audio client\n");
1044                 hda->use_vga_switcheroo = 1;
1045                 pci_dev_put(p);
1046         }
1047 }
1048
1049 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1050         .set_gpu_state = azx_vs_set_state,
1051         .can_switch = azx_vs_can_switch,
1052 };
1053
1054 static int register_vga_switcheroo(struct azx *chip)
1055 {
1056         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1057         int err;
1058
1059         if (!hda->use_vga_switcheroo)
1060                 return 0;
1061         /* FIXME: currently only handling DIS controller
1062          * is there any machine with two switchable HDMI audio controllers?
1063          */
1064         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1065                                                     VGA_SWITCHEROO_DIS,
1066                                                     hda->probe_continued);
1067         if (err < 0)
1068                 return err;
1069         hda->vga_switcheroo_registered = 1;
1070
1071         /* register as an optimus hdmi audio power domain */
1072         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1073                                                          &hda->hdmi_pm_domain);
1074         return 0;
1075 }
1076 #else
1077 #define init_vga_switcheroo(chip)               /* NOP */
1078 #define register_vga_switcheroo(chip)           0
1079 #define check_hdmi_disabled(pci)        false
1080 #endif /* SUPPORT_VGA_SWITCHER */
1081
1082 /*
1083  * destructor
1084  */
1085 static int azx_free(struct azx *chip)
1086 {
1087         struct pci_dev *pci = chip->pci;
1088         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1089         struct hdac_bus *bus = azx_bus(chip);
1090
1091         if (azx_has_pm_runtime(chip) && chip->running)
1092                 pm_runtime_get_noresume(&pci->dev);
1093
1094         azx_del_card_list(chip);
1095
1096         hda->init_failed = 1; /* to be sure */
1097         complete_all(&hda->probe_wait);
1098
1099         if (use_vga_switcheroo(hda)) {
1100                 if (chip->disabled && hda->probe_continued)
1101                         snd_hda_unlock_devices(&chip->bus);
1102                 if (hda->vga_switcheroo_registered)
1103                         vga_switcheroo_unregister_client(chip->pci);
1104         }
1105
1106         if (bus->chip_init) {
1107                 azx_clear_irq_pending(chip);
1108                 azx_stop_all_streams(chip);
1109                 azx_stop_chip(chip);
1110         }
1111
1112         if (bus->irq >= 0)
1113                 free_irq(bus->irq, (void*)chip);
1114         if (chip->msi)
1115                 pci_disable_msi(chip->pci);
1116         iounmap(bus->remap_addr);
1117
1118         azx_free_stream_pages(chip);
1119         azx_free_streams(chip);
1120         snd_hdac_bus_exit(bus);
1121
1122         if (chip->region_requested)
1123                 pci_release_regions(chip->pci);
1124
1125         pci_disable_device(chip->pci);
1126 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1127         release_firmware(chip->fw);
1128 #endif
1129         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1130                 if (hda->need_i915_power)
1131                         hda_display_power(hda, false);
1132                 hda_i915_exit(hda);
1133         }
1134         kfree(hda);
1135
1136         return 0;
1137 }
1138
1139 static int azx_dev_disconnect(struct snd_device *device)
1140 {
1141         struct azx *chip = device->device_data;
1142
1143         chip->bus.shutdown = 1;
1144         return 0;
1145 }
1146
1147 static int azx_dev_free(struct snd_device *device)
1148 {
1149         return azx_free(device->device_data);
1150 }
1151
1152 #ifdef SUPPORT_VGA_SWITCHEROO
1153 /*
1154  * Check of disabled HDMI controller by vga-switcheroo
1155  */
1156 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1157 {
1158         struct pci_dev *p;
1159
1160         /* check only discrete GPU */
1161         switch (pci->vendor) {
1162         case PCI_VENDOR_ID_ATI:
1163         case PCI_VENDOR_ID_AMD:
1164         case PCI_VENDOR_ID_NVIDIA:
1165                 if (pci->devfn == 1) {
1166                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1167                                                         pci->bus->number, 0);
1168                         if (p) {
1169                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1170                                         return p;
1171                                 pci_dev_put(p);
1172                         }
1173                 }
1174                 break;
1175         }
1176         return NULL;
1177 }
1178
1179 static bool check_hdmi_disabled(struct pci_dev *pci)
1180 {
1181         bool vga_inactive = false;
1182         struct pci_dev *p = get_bound_vga(pci);
1183
1184         if (p) {
1185                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1186                         vga_inactive = true;
1187                 pci_dev_put(p);
1188         }
1189         return vga_inactive;
1190 }
1191 #endif /* SUPPORT_VGA_SWITCHEROO */
1192
1193 /*
1194  * white/black-listing for position_fix
1195  */
1196 static struct snd_pci_quirk position_fix_list[] = {
1197         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1198         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1199         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1200         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1201         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1202         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1203         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1204         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1205         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1206         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1207         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1208         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1209         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1210         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1211         {}
1212 };
1213
1214 static int check_position_fix(struct azx *chip, int fix)
1215 {
1216         const struct snd_pci_quirk *q;
1217
1218         switch (fix) {
1219         case POS_FIX_AUTO:
1220         case POS_FIX_LPIB:
1221         case POS_FIX_POSBUF:
1222         case POS_FIX_VIACOMBO:
1223         case POS_FIX_COMBO:
1224                 return fix;
1225         }
1226
1227         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1228         if (q) {
1229                 dev_info(chip->card->dev,
1230                          "position_fix set to %d for device %04x:%04x\n",
1231                          q->value, q->subvendor, q->subdevice);
1232                 return q->value;
1233         }
1234
1235         /* Check VIA/ATI HD Audio Controller exist */
1236         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1237                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1238                 return POS_FIX_VIACOMBO;
1239         }
1240         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1241                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1242                 return POS_FIX_LPIB;
1243         }
1244         return POS_FIX_AUTO;
1245 }
1246
1247 static void assign_position_fix(struct azx *chip, int fix)
1248 {
1249         static azx_get_pos_callback_t callbacks[] = {
1250                 [POS_FIX_AUTO] = NULL,
1251                 [POS_FIX_LPIB] = azx_get_pos_lpib,
1252                 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1253                 [POS_FIX_VIACOMBO] = azx_via_get_position,
1254                 [POS_FIX_COMBO] = azx_get_pos_lpib,
1255         };
1256
1257         chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1258
1259         /* combo mode uses LPIB only for playback */
1260         if (fix == POS_FIX_COMBO)
1261                 chip->get_position[1] = NULL;
1262
1263         if (fix == POS_FIX_POSBUF &&
1264             (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1265                 chip->get_delay[0] = chip->get_delay[1] =
1266                         azx_get_delay_from_lpib;
1267         }
1268
1269 }
1270
1271 /*
1272  * black-lists for probe_mask
1273  */
1274 static struct snd_pci_quirk probe_mask_list[] = {
1275         /* Thinkpad often breaks the controller communication when accessing
1276          * to the non-working (or non-existing) modem codec slot.
1277          */
1278         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1279         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1280         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1281         /* broken BIOS */
1282         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1283         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1284         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1285         /* forced codec slots */
1286         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1287         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1288         /* WinFast VP200 H (Teradici) user reported broken communication */
1289         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1290         {}
1291 };
1292
1293 #define AZX_FORCE_CODEC_MASK    0x100
1294
1295 static void check_probe_mask(struct azx *chip, int dev)
1296 {
1297         const struct snd_pci_quirk *q;
1298
1299         chip->codec_probe_mask = probe_mask[dev];
1300         if (chip->codec_probe_mask == -1) {
1301                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1302                 if (q) {
1303                         dev_info(chip->card->dev,
1304                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1305                                  q->value, q->subvendor, q->subdevice);
1306                         chip->codec_probe_mask = q->value;
1307                 }
1308         }
1309
1310         /* check forced option */
1311         if (chip->codec_probe_mask != -1 &&
1312             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1313                 azx_bus(chip)->codec_mask = chip->codec_probe_mask & 0xff;
1314                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1315                          (int)azx_bus(chip)->codec_mask);
1316         }
1317 }
1318
1319 /*
1320  * white/black-list for enable_msi
1321  */
1322 static struct snd_pci_quirk msi_black_list[] = {
1323         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1324         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1325         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1326         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1327         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1328         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1329         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1330         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1331         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1332         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1333         {}
1334 };
1335
1336 static void check_msi(struct azx *chip)
1337 {
1338         const struct snd_pci_quirk *q;
1339
1340         if (enable_msi >= 0) {
1341                 chip->msi = !!enable_msi;
1342                 return;
1343         }
1344         chip->msi = 1;  /* enable MSI as default */
1345         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1346         if (q) {
1347                 dev_info(chip->card->dev,
1348                          "msi for device %04x:%04x set to %d\n",
1349                          q->subvendor, q->subdevice, q->value);
1350                 chip->msi = q->value;
1351                 return;
1352         }
1353
1354         /* NVidia chipsets seem to cause troubles with MSI */
1355         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1356                 dev_info(chip->card->dev, "Disabling MSI\n");
1357                 chip->msi = 0;
1358         }
1359 }
1360
1361 /* check the snoop mode availability */
1362 static void azx_check_snoop_available(struct azx *chip)
1363 {
1364         int snoop = hda_snoop;
1365
1366         if (snoop >= 0) {
1367                 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1368                          snoop ? "snoop" : "non-snoop");
1369                 chip->snoop = snoop;
1370                 return;
1371         }
1372
1373         snoop = true;
1374         if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1375             chip->driver_type == AZX_DRIVER_VIA) {
1376                 /* force to non-snoop mode for a new VIA controller
1377                  * when BIOS is set
1378                  */
1379                 u8 val;
1380                 pci_read_config_byte(chip->pci, 0x42, &val);
1381                 if (!(val & 0x80) && chip->pci->revision == 0x30)
1382                         snoop = false;
1383         }
1384
1385         if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1386                 snoop = false;
1387
1388         chip->snoop = snoop;
1389         if (!snoop)
1390                 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1391 }
1392
1393 static void azx_probe_work(struct work_struct *work)
1394 {
1395         struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1396         azx_probe_continue(&hda->chip);
1397 }
1398
1399 /*
1400  * constructor
1401  */
1402 static const struct hdac_io_ops pci_hda_io_ops;
1403 static const struct hda_controller_ops pci_hda_ops;
1404
1405 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1406                       int dev, unsigned int driver_caps,
1407                       struct azx **rchip)
1408 {
1409         static struct snd_device_ops ops = {
1410                 .dev_disconnect = azx_dev_disconnect,
1411                 .dev_free = azx_dev_free,
1412         };
1413         struct hda_intel *hda;
1414         struct azx *chip;
1415         int err;
1416
1417         *rchip = NULL;
1418
1419         err = pci_enable_device(pci);
1420         if (err < 0)
1421                 return err;
1422
1423         hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1424         if (!hda) {
1425                 pci_disable_device(pci);
1426                 return -ENOMEM;
1427         }
1428
1429         chip = &hda->chip;
1430         mutex_init(&chip->open_mutex);
1431         chip->card = card;
1432         chip->pci = pci;
1433         chip->ops = &pci_hda_ops;
1434         chip->driver_caps = driver_caps;
1435         chip->driver_type = driver_caps & 0xff;
1436         check_msi(chip);
1437         chip->dev_index = dev;
1438         chip->jackpoll_ms = jackpoll_ms;
1439         INIT_LIST_HEAD(&chip->pcm_list);
1440         INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1441         INIT_LIST_HEAD(&hda->list);
1442         init_vga_switcheroo(chip);
1443         init_completion(&hda->probe_wait);
1444
1445         assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1446
1447         check_probe_mask(chip, dev);
1448
1449         chip->single_cmd = single_cmd;
1450         azx_check_snoop_available(chip);
1451
1452         if (bdl_pos_adj[dev] < 0) {
1453                 switch (chip->driver_type) {
1454                 case AZX_DRIVER_ICH:
1455                 case AZX_DRIVER_PCH:
1456                         bdl_pos_adj[dev] = 1;
1457                         break;
1458                 default:
1459                         bdl_pos_adj[dev] = 32;
1460                         break;
1461                 }
1462         }
1463         chip->bdl_pos_adj = bdl_pos_adj;
1464
1465         err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
1466         if (err < 0) {
1467                 kfree(hda);
1468                 pci_disable_device(pci);
1469                 return err;
1470         }
1471
1472         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1473         if (err < 0) {
1474                 dev_err(card->dev, "Error creating device [card]!\n");
1475                 azx_free(chip);
1476                 return err;
1477         }
1478
1479         /* continue probing in work context as may trigger request module */
1480         INIT_WORK(&hda->probe_work, azx_probe_work);
1481
1482         *rchip = chip;
1483
1484         return 0;
1485 }
1486
1487 static int azx_first_init(struct azx *chip)
1488 {
1489         int dev = chip->dev_index;
1490         struct pci_dev *pci = chip->pci;
1491         struct snd_card *card = chip->card;
1492         struct hdac_bus *bus = azx_bus(chip);
1493         int err;
1494         unsigned short gcap;
1495         unsigned int dma_bits = 64;
1496
1497 #if BITS_PER_LONG != 64
1498         /* Fix up base address on ULI M5461 */
1499         if (chip->driver_type == AZX_DRIVER_ULI) {
1500                 u16 tmp3;
1501                 pci_read_config_word(pci, 0x40, &tmp3);
1502                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1503                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1504         }
1505 #endif
1506
1507         err = pci_request_regions(pci, "ICH HD audio");
1508         if (err < 0)
1509                 return err;
1510         chip->region_requested = 1;
1511
1512         bus->addr = pci_resource_start(pci, 0);
1513         bus->remap_addr = pci_ioremap_bar(pci, 0);
1514         if (bus->remap_addr == NULL) {
1515                 dev_err(card->dev, "ioremap error\n");
1516                 return -ENXIO;
1517         }
1518
1519         if (chip->msi) {
1520                 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1521                         dev_dbg(card->dev, "Disabling 64bit MSI\n");
1522                         pci->no_64bit_msi = true;
1523                 }
1524                 if (pci_enable_msi(pci) < 0)
1525                         chip->msi = 0;
1526         }
1527
1528         if (azx_acquire_irq(chip, 0) < 0)
1529                 return -EBUSY;
1530
1531         pci_set_master(pci);
1532         synchronize_irq(bus->irq);
1533
1534         gcap = azx_readw(chip, GCAP);
1535         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1536
1537         /* AMD devices support 40 or 48bit DMA, take the safe one */
1538         if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1539                 dma_bits = 40;
1540
1541         /* disable SB600 64bit support for safety */
1542         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1543                 struct pci_dev *p_smbus;
1544                 dma_bits = 40;
1545                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1546                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1547                                          NULL);
1548                 if (p_smbus) {
1549                         if (p_smbus->revision < 0x30)
1550                                 gcap &= ~AZX_GCAP_64OK;
1551                         pci_dev_put(p_smbus);
1552                 }
1553         }
1554
1555         /* disable 64bit DMA address on some devices */
1556         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1557                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1558                 gcap &= ~AZX_GCAP_64OK;
1559         }
1560
1561         /* disable buffer size rounding to 128-byte multiples if supported */
1562         if (align_buffer_size >= 0)
1563                 chip->align_buffer_size = !!align_buffer_size;
1564         else {
1565                 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1566                         chip->align_buffer_size = 0;
1567                 else
1568                         chip->align_buffer_size = 1;
1569         }
1570
1571         /* allow 64bit DMA address if supported by H/W */
1572         if (!(gcap & AZX_GCAP_64OK))
1573                 dma_bits = 32;
1574         if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1575                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1576         } else {
1577                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1578                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1579         }
1580
1581         /* read number of streams from GCAP register instead of using
1582          * hardcoded value
1583          */
1584         chip->capture_streams = (gcap >> 8) & 0x0f;
1585         chip->playback_streams = (gcap >> 12) & 0x0f;
1586         if (!chip->playback_streams && !chip->capture_streams) {
1587                 /* gcap didn't give any info, switching to old method */
1588
1589                 switch (chip->driver_type) {
1590                 case AZX_DRIVER_ULI:
1591                         chip->playback_streams = ULI_NUM_PLAYBACK;
1592                         chip->capture_streams = ULI_NUM_CAPTURE;
1593                         break;
1594                 case AZX_DRIVER_ATIHDMI:
1595                 case AZX_DRIVER_ATIHDMI_NS:
1596                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1597                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1598                         break;
1599                 case AZX_DRIVER_GENERIC:
1600                 default:
1601                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1602                         chip->capture_streams = ICH6_NUM_CAPTURE;
1603                         break;
1604                 }
1605         }
1606         chip->capture_index_offset = 0;
1607         chip->playback_index_offset = chip->capture_streams;
1608         chip->num_streams = chip->playback_streams + chip->capture_streams;
1609
1610         /* initialize streams */
1611         err = azx_init_streams(chip);
1612         if (err < 0)
1613                 return err;
1614
1615         err = azx_alloc_stream_pages(chip);
1616         if (err < 0)
1617                 return err;
1618
1619         /* initialize chip */
1620         azx_init_pci(chip);
1621
1622         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1623                 struct hda_intel *hda;
1624
1625                 hda = container_of(chip, struct hda_intel, chip);
1626                 haswell_set_bclk(hda);
1627         }
1628
1629         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1630
1631         /* codec detection */
1632         if (!azx_bus(chip)->codec_mask) {
1633                 dev_err(card->dev, "no codecs found!\n");
1634                 return -ENODEV;
1635         }
1636
1637         strcpy(card->driver, "HDA-Intel");
1638         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1639                 sizeof(card->shortname));
1640         snprintf(card->longname, sizeof(card->longname),
1641                  "%s at 0x%lx irq %i",
1642                  card->shortname, bus->addr, bus->irq);
1643
1644         return 0;
1645 }
1646
1647 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1648 /* callback from request_firmware_nowait() */
1649 static void azx_firmware_cb(const struct firmware *fw, void *context)
1650 {
1651         struct snd_card *card = context;
1652         struct azx *chip = card->private_data;
1653         struct pci_dev *pci = chip->pci;
1654
1655         if (!fw) {
1656                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1657                 goto error;
1658         }
1659
1660         chip->fw = fw;
1661         if (!chip->disabled) {
1662                 /* continue probing */
1663                 if (azx_probe_continue(chip))
1664                         goto error;
1665         }
1666         return; /* OK */
1667
1668  error:
1669         snd_card_free(card);
1670         pci_set_drvdata(pci, NULL);
1671 }
1672 #endif
1673
1674 /*
1675  * HDA controller ops.
1676  */
1677
1678 /* PCI register access. */
1679 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1680 {
1681         writel(value, addr);
1682 }
1683
1684 static u32 pci_azx_readl(u32 __iomem *addr)
1685 {
1686         return readl(addr);
1687 }
1688
1689 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1690 {
1691         writew(value, addr);
1692 }
1693
1694 static u16 pci_azx_readw(u16 __iomem *addr)
1695 {
1696         return readw(addr);
1697 }
1698
1699 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1700 {
1701         writeb(value, addr);
1702 }
1703
1704 static u8 pci_azx_readb(u8 __iomem *addr)
1705 {
1706         return readb(addr);
1707 }
1708
1709 static int disable_msi_reset_irq(struct azx *chip)
1710 {
1711         struct hdac_bus *bus = azx_bus(chip);
1712         int err;
1713
1714         free_irq(bus->irq, chip);
1715         bus->irq = -1;
1716         pci_disable_msi(chip->pci);
1717         chip->msi = 0;
1718         err = azx_acquire_irq(chip, 1);
1719         if (err < 0)
1720                 return err;
1721
1722         return 0;
1723 }
1724
1725 /* DMA page allocation helpers.  */
1726 static int dma_alloc_pages(struct hdac_bus *bus,
1727                            int type,
1728                            size_t size,
1729                            struct snd_dma_buffer *buf)
1730 {
1731         struct azx *chip = bus_to_azx(bus);
1732         int err;
1733
1734         err = snd_dma_alloc_pages(type,
1735                                   bus->dev,
1736                                   size, buf);
1737         if (err < 0)
1738                 return err;
1739         mark_pages_wc(chip, buf, true);
1740         return 0;
1741 }
1742
1743 static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
1744 {
1745         struct azx *chip = bus_to_azx(bus);
1746
1747         mark_pages_wc(chip, buf, false);
1748         snd_dma_free_pages(buf);
1749 }
1750
1751 static int substream_alloc_pages(struct azx *chip,
1752                                  struct snd_pcm_substream *substream,
1753                                  size_t size)
1754 {
1755         struct azx_dev *azx_dev = get_azx_dev(substream);
1756         int ret;
1757
1758         mark_runtime_wc(chip, azx_dev, substream, false);
1759         ret = snd_pcm_lib_malloc_pages(substream, size);
1760         if (ret < 0)
1761                 return ret;
1762         mark_runtime_wc(chip, azx_dev, substream, true);
1763         return 0;
1764 }
1765
1766 static int substream_free_pages(struct azx *chip,
1767                                 struct snd_pcm_substream *substream)
1768 {
1769         struct azx_dev *azx_dev = get_azx_dev(substream);
1770         mark_runtime_wc(chip, azx_dev, substream, false);
1771         return snd_pcm_lib_free_pages(substream);
1772 }
1773
1774 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1775                              struct vm_area_struct *area)
1776 {
1777 #ifdef CONFIG_X86
1778         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1779         struct azx *chip = apcm->chip;
1780         if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1781                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1782 #endif
1783 }
1784
1785 static const struct hdac_io_ops pci_hda_io_ops = {
1786         .reg_writel = pci_azx_writel,
1787         .reg_readl = pci_azx_readl,
1788         .reg_writew = pci_azx_writew,
1789         .reg_readw = pci_azx_readw,
1790         .reg_writeb = pci_azx_writeb,
1791         .reg_readb = pci_azx_readb,
1792         .dma_alloc_pages = dma_alloc_pages,
1793         .dma_free_pages = dma_free_pages,
1794 };
1795
1796 static const struct hda_controller_ops pci_hda_ops = {
1797         .disable_msi_reset_irq = disable_msi_reset_irq,
1798         .substream_alloc_pages = substream_alloc_pages,
1799         .substream_free_pages = substream_free_pages,
1800         .pcm_mmap_prepare = pcm_mmap_prepare,
1801         .position_check = azx_position_check,
1802         .link_power = azx_intel_link_power,
1803 };
1804
1805 static int azx_probe(struct pci_dev *pci,
1806                      const struct pci_device_id *pci_id)
1807 {
1808         static int dev;
1809         struct snd_card *card;
1810         struct hda_intel *hda;
1811         struct azx *chip;
1812         bool schedule_probe;
1813         int err;
1814
1815         if (dev >= SNDRV_CARDS)
1816                 return -ENODEV;
1817         if (!enable[dev]) {
1818                 dev++;
1819                 return -ENOENT;
1820         }
1821
1822         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1823                            0, &card);
1824         if (err < 0) {
1825                 dev_err(&pci->dev, "Error creating card!\n");
1826                 return err;
1827         }
1828
1829         err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
1830         if (err < 0)
1831                 goto out_free;
1832         card->private_data = chip;
1833         hda = container_of(chip, struct hda_intel, chip);
1834
1835         pci_set_drvdata(pci, card);
1836
1837         err = register_vga_switcheroo(chip);
1838         if (err < 0) {
1839                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1840                 goto out_free;
1841         }
1842
1843         if (check_hdmi_disabled(pci)) {
1844                 dev_info(card->dev, "VGA controller is disabled\n");
1845                 dev_info(card->dev, "Delaying initialization\n");
1846                 chip->disabled = true;
1847         }
1848
1849         schedule_probe = !chip->disabled;
1850
1851 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1852         if (patch[dev] && *patch[dev]) {
1853                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1854                          patch[dev]);
1855                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1856                                               &pci->dev, GFP_KERNEL, card,
1857                                               azx_firmware_cb);
1858                 if (err < 0)
1859                         goto out_free;
1860                 schedule_probe = false; /* continued in azx_firmware_cb() */
1861         }
1862 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1863
1864 #ifndef CONFIG_SND_HDA_I915
1865         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1866                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1867 #endif
1868
1869         if (schedule_probe)
1870                 schedule_work(&hda->probe_work);
1871
1872         dev++;
1873         if (chip->disabled)
1874                 complete_all(&hda->probe_wait);
1875         return 0;
1876
1877 out_free:
1878         snd_card_free(card);
1879         return err;
1880 }
1881
1882 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1883 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1884         [AZX_DRIVER_NVIDIA] = 8,
1885         [AZX_DRIVER_TERA] = 1,
1886 };
1887
1888 static int azx_probe_continue(struct azx *chip)
1889 {
1890         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1891         struct pci_dev *pci = chip->pci;
1892         int dev = chip->dev_index;
1893         int err;
1894
1895         hda->probe_continued = 1;
1896
1897         /* Request display power well for the HDA controller or codec. For
1898          * Haswell/Broadwell, both the display HDA controller and codec need
1899          * this power. For other platforms, like Baytrail/Braswell, only the
1900          * display codec needs the power and it can be released after probe.
1901          */
1902         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1903                 /* Assume the controller needs the power by default */
1904                 hda->need_i915_power = 1;
1905
1906 #ifdef CONFIG_SND_HDA_I915
1907                 err = hda_i915_init(hda);
1908                 if (err < 0)
1909                         goto i915_power_fail;
1910
1911                 err = hda_display_power(hda, true);
1912                 if (err < 0) {
1913                         dev_err(chip->card->dev,
1914                                 "Cannot turn on display power on i915\n");
1915                         goto i915_power_fail;
1916                 }
1917 #endif
1918         }
1919
1920         err = azx_first_init(chip);
1921         if (err < 0)
1922                 goto out_free;
1923
1924 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1925         chip->beep_mode = beep_mode[dev];
1926 #endif
1927
1928         /* create codec instances */
1929         err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
1930         if (err < 0)
1931                 goto out_free;
1932
1933 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1934         if (chip->fw) {
1935                 err = snd_hda_load_patch(&chip->bus, chip->fw->size,
1936                                          chip->fw->data);
1937                 if (err < 0)
1938                         goto out_free;
1939 #ifndef CONFIG_PM
1940                 release_firmware(chip->fw); /* no longer needed */
1941                 chip->fw = NULL;
1942 #endif
1943         }
1944 #endif
1945         if ((probe_only[dev] & 1) == 0) {
1946                 err = azx_codec_configure(chip);
1947                 if (err < 0)
1948                         goto out_free;
1949         }
1950
1951         err = snd_card_register(chip->card);
1952         if (err < 0)
1953                 goto out_free;
1954
1955         chip->running = 1;
1956         azx_add_card_list(chip);
1957         snd_hda_set_power_save(&chip->bus, power_save * 1000);
1958         if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
1959                 pm_runtime_put_noidle(&pci->dev);
1960
1961 out_free:
1962         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
1963                 && !hda->need_i915_power)
1964                 hda_display_power(hda, false);
1965
1966 i915_power_fail:
1967         if (err < 0)
1968                 hda->init_failed = 1;
1969         complete_all(&hda->probe_wait);
1970         return err;
1971 }
1972
1973 static void azx_remove(struct pci_dev *pci)
1974 {
1975         struct snd_card *card = pci_get_drvdata(pci);
1976
1977         if (card)
1978                 snd_card_free(card);
1979 }
1980
1981 static void azx_shutdown(struct pci_dev *pci)
1982 {
1983         struct snd_card *card = pci_get_drvdata(pci);
1984         struct azx *chip;
1985
1986         if (!card)
1987                 return;
1988         chip = card->private_data;
1989         if (chip && chip->running)
1990                 azx_stop_chip(chip);
1991 }
1992
1993 /* PCI IDs */
1994 static const struct pci_device_id azx_ids[] = {
1995         /* CPT */
1996         { PCI_DEVICE(0x8086, 0x1c20),
1997           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1998         /* PBG */
1999         { PCI_DEVICE(0x8086, 0x1d20),
2000           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2001         /* Panther Point */
2002         { PCI_DEVICE(0x8086, 0x1e20),
2003           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2004         /* Lynx Point */
2005         { PCI_DEVICE(0x8086, 0x8c20),
2006           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2007         /* 9 Series */
2008         { PCI_DEVICE(0x8086, 0x8ca0),
2009           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2010         /* Wellsburg */
2011         { PCI_DEVICE(0x8086, 0x8d20),
2012           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2013         { PCI_DEVICE(0x8086, 0x8d21),
2014           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2015         /* Lynx Point-LP */
2016         { PCI_DEVICE(0x8086, 0x9c20),
2017           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2018         /* Lynx Point-LP */
2019         { PCI_DEVICE(0x8086, 0x9c21),
2020           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2021         /* Wildcat Point-LP */
2022         { PCI_DEVICE(0x8086, 0x9ca0),
2023           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2024         /* Sunrise Point */
2025         { PCI_DEVICE(0x8086, 0xa170),
2026           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2027         /* Sunrise Point-LP */
2028         { PCI_DEVICE(0x8086, 0x9d70),
2029           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2030         /* Haswell */
2031         { PCI_DEVICE(0x8086, 0x0a0c),
2032           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2033         { PCI_DEVICE(0x8086, 0x0c0c),
2034           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2035         { PCI_DEVICE(0x8086, 0x0d0c),
2036           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2037         /* Broadwell */
2038         { PCI_DEVICE(0x8086, 0x160c),
2039           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2040         /* 5 Series/3400 */
2041         { PCI_DEVICE(0x8086, 0x3b56),
2042           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2043         /* Poulsbo */
2044         { PCI_DEVICE(0x8086, 0x811b),
2045           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2046         /* Oaktrail */
2047         { PCI_DEVICE(0x8086, 0x080a),
2048           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2049         /* BayTrail */
2050         { PCI_DEVICE(0x8086, 0x0f04),
2051           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2052         /* Braswell */
2053         { PCI_DEVICE(0x8086, 0x2284),
2054           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2055         /* ICH6 */
2056         { PCI_DEVICE(0x8086, 0x2668),
2057           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2058         /* ICH7 */
2059         { PCI_DEVICE(0x8086, 0x27d8),
2060           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2061         /* ESB2 */
2062         { PCI_DEVICE(0x8086, 0x269a),
2063           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2064         /* ICH8 */
2065         { PCI_DEVICE(0x8086, 0x284b),
2066           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2067         /* ICH9 */
2068         { PCI_DEVICE(0x8086, 0x293e),
2069           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2070         /* ICH9 */
2071         { PCI_DEVICE(0x8086, 0x293f),
2072           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2073         /* ICH10 */
2074         { PCI_DEVICE(0x8086, 0x3a3e),
2075           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2076         /* ICH10 */
2077         { PCI_DEVICE(0x8086, 0x3a6e),
2078           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2079         /* Generic Intel */
2080         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2081           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2082           .class_mask = 0xffffff,
2083           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2084         /* ATI SB 450/600/700/800/900 */
2085         { PCI_DEVICE(0x1002, 0x437b),
2086           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2087         { PCI_DEVICE(0x1002, 0x4383),
2088           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2089         /* AMD Hudson */
2090         { PCI_DEVICE(0x1022, 0x780d),
2091           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2092         /* ATI HDMI */
2093         { PCI_DEVICE(0x1002, 0x793b),
2094           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2095         { PCI_DEVICE(0x1002, 0x7919),
2096           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2097         { PCI_DEVICE(0x1002, 0x960f),
2098           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099         { PCI_DEVICE(0x1002, 0x970f),
2100           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2101         { PCI_DEVICE(0x1002, 0xaa00),
2102           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2103         { PCI_DEVICE(0x1002, 0xaa08),
2104           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2105         { PCI_DEVICE(0x1002, 0xaa10),
2106           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2107         { PCI_DEVICE(0x1002, 0xaa18),
2108           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2109         { PCI_DEVICE(0x1002, 0xaa20),
2110           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2111         { PCI_DEVICE(0x1002, 0xaa28),
2112           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2113         { PCI_DEVICE(0x1002, 0xaa30),
2114           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2115         { PCI_DEVICE(0x1002, 0xaa38),
2116           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2117         { PCI_DEVICE(0x1002, 0xaa40),
2118           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2119         { PCI_DEVICE(0x1002, 0xaa48),
2120           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2121         { PCI_DEVICE(0x1002, 0xaa50),
2122           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2123         { PCI_DEVICE(0x1002, 0xaa58),
2124           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2125         { PCI_DEVICE(0x1002, 0xaa60),
2126           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2127         { PCI_DEVICE(0x1002, 0xaa68),
2128           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2129         { PCI_DEVICE(0x1002, 0xaa80),
2130           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2131         { PCI_DEVICE(0x1002, 0xaa88),
2132           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2133         { PCI_DEVICE(0x1002, 0xaa90),
2134           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2135         { PCI_DEVICE(0x1002, 0xaa98),
2136           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2137         { PCI_DEVICE(0x1002, 0x9902),
2138           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2139         { PCI_DEVICE(0x1002, 0xaaa0),
2140           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2141         { PCI_DEVICE(0x1002, 0xaaa8),
2142           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2143         { PCI_DEVICE(0x1002, 0xaab0),
2144           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2145         /* VIA VT8251/VT8237A */
2146         { PCI_DEVICE(0x1106, 0x3288),
2147           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2148         /* VIA GFX VT7122/VX900 */
2149         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2150         /* VIA GFX VT6122/VX11 */
2151         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2152         /* SIS966 */
2153         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2154         /* ULI M5461 */
2155         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2156         /* NVIDIA MCP */
2157         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2158           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2159           .class_mask = 0xffffff,
2160           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2161         /* Teradici */
2162         { PCI_DEVICE(0x6549, 0x1200),
2163           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2164         { PCI_DEVICE(0x6549, 0x2200),
2165           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2166         /* Creative X-Fi (CA0110-IBG) */
2167         /* CTHDA chips */
2168         { PCI_DEVICE(0x1102, 0x0010),
2169           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2170         { PCI_DEVICE(0x1102, 0x0012),
2171           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2172 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2173         /* the following entry conflicts with snd-ctxfi driver,
2174          * as ctxfi driver mutates from HD-audio to native mode with
2175          * a special command sequence.
2176          */
2177         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2178           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2179           .class_mask = 0xffffff,
2180           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2181           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2182 #else
2183         /* this entry seems still valid -- i.e. without emu20kx chip */
2184         { PCI_DEVICE(0x1102, 0x0009),
2185           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2186           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2187 #endif
2188         /* CM8888 */
2189         { PCI_DEVICE(0x13f6, 0x5011),
2190           .driver_data = AZX_DRIVER_CMEDIA |
2191           AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2192         /* Vortex86MX */
2193         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2194         /* VMware HDAudio */
2195         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2196         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2197         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2198           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2199           .class_mask = 0xffffff,
2200           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2201         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2202           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2203           .class_mask = 0xffffff,
2204           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2205         { 0, }
2206 };
2207 MODULE_DEVICE_TABLE(pci, azx_ids);
2208
2209 /* pci_driver definition */
2210 static struct pci_driver azx_driver = {
2211         .name = KBUILD_MODNAME,
2212         .id_table = azx_ids,
2213         .probe = azx_probe,
2214         .remove = azx_remove,
2215         .shutdown = azx_shutdown,
2216         .driver = {
2217                 .pm = AZX_PM_OPS,
2218         },
2219 };
2220
2221 module_pci_driver(azx_driver);