sound/pci/rme9652/rme9652.c

   1 /*
   2  *   ALSA driver for RME Digi9652 audio interfaces
   3  *
   4  *      Copyright (c) 1999 IEM - Winfried Ritsch
   5  *      Copyright (c) 1999-2001  Paul Davis
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <linux/delay.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/pci.h>
  27 #include <linux/module.h>
  28 #include <linux/io.h>
  29
  30 #include <sound/core.h>
  31 #include <sound/control.h>
  32 #include <sound/pcm.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #include <sound/initval.h>
  36
  37 #include <asm/current.h>
  38
  39 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  40 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  41 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  42 static bool precise_ptr[SNDRV_CARDS];                   /* Enable precise pointer */
  43
  44 module_param_array(index, int, NULL, 0444);
  45 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  46 module_param_array(id, charp, NULL, 0444);
  47 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  48 module_param_array(enable, bool, NULL, 0444);
  49 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  50 module_param_array(precise_ptr, bool, NULL, 0444);
  51 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  52 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  53 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  54 MODULE_LICENSE("GPL");
  55 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
  56                 "{RME,Hammerfall-Light}}");
  57
  58 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  59    capture, one for playback. Both the ADAT and S/PDIF channels appear
  60    to the host CPU in the same block of memory. There is no functional
  61    difference between them in terms of access.
  62
  63    The Hammerfall Light is identical to the Hammerfall, except that it
  64    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  65 */
  66
  67 #define RME9652_NCHANNELS       26
  68 #define RME9636_NCHANNELS       18
  69
  70 /* Preferred sync source choices - used by "sync_pref" control switch */
  71
  72 #define RME9652_SYNC_FROM_SPDIF 0
  73 #define RME9652_SYNC_FROM_ADAT1 1
  74 #define RME9652_SYNC_FROM_ADAT2 2
  75 #define RME9652_SYNC_FROM_ADAT3 3
  76
  77 /* Possible sources of S/PDIF input */
  78
  79 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  80 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  81 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  82
  83 /* ------------- Status-Register bits --------------------- */
  84
  85 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  86 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  87 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  88 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  89 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  90 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  91                                         /* bits 6-15 encode h/w buffer pointer position */
  92 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  93 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  94 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  95 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  96 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
  97 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
  98 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
  99 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
 100 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
 101 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
 102 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
 103 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
 104 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
 105
 106 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
 107 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
 108 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
 109 #define rme9652_decode_spdif_rate(x) ((x)>>22)
 110
 111 /* Bit 6..15 : h/w buffer pointer */
 112
 113 #define RME9652_buf_pos   0x000FFC0
 114
 115 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 116    Rev G EEPROMS and Rev 1.5 cards or later.
 117 */
 118
 119 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 120
 121 /* amount of io space we remap for register access. i'm not sure we
 122    even need this much, but 1K is nice round number :)
 123 */
 124
 125 #define RME9652_IO_EXTENT     1024
 126
 127 #define RME9652_init_buffer       0
 128 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 129 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 130 #define RME9652_control_register  64
 131 #define RME9652_irq_clear         96
 132 #define RME9652_time_code         100   /* useful if used with alesis adat */
 133 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 134
 135 /* Read-only registers */
 136
 137 /* Writing to any of the register locations writes to the status
 138    register. We'll use the first location as our point of access.
 139 */
 140
 141 #define RME9652_status_register    0
 142
 143 /* --------- Control-Register Bits ---------------- */
 144
 145
 146 #define RME9652_start_bit          (1<<0)       /* start record/play */
 147                                                 /* bits 1-3 encode buffersize/latency */
 148 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 149 #define RME9652_IE                 (1<<5)       /* Interrupt Enable */
 150 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 151 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 152 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 153 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 154 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 155 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 156 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 157 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 158 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 159 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 160 #define RME9652_SyncPref_ADAT2     (1<<16)
 161 #define RME9652_SyncPref_ADAT3     (1<<17)
 162 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 163 #define RME9652_SPDIF_SELECT       (1<<19)
 164 #define RME9652_SPDIF_CLOCK        (1<<20)
 165 #define RME9652_SPDIF_WRITE        (1<<21)
 166 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 167
 168 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 169
 170 #define RME9652_latency            0x0e
 171 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 172 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 173 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 174 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 175 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 176 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 177
 178 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 179 #define RME9652_SyncPref_ADAT1     0
 180 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 181
 182 /* the size of a substream (1 mono data stream) */
 183
 184 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 185 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 186
 187 /* the size of the area we need to allocate for DMA transfers. the
 188    size is the same regardless of the number of channels - the
 189    9636 still uses the same memory area.
 190
 191    Note that we allocate 1 more channel than is apparently needed
 192    because the h/w seems to write 1 byte beyond the end of the last
 193    page. Sigh.
 194 */
 195
 196 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 197 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 198
 199 struct snd_rme9652 {
 200         int dev;
 201
 202         spinlock_t lock;
 203         int irq;
 204         unsigned long port;
 205         void __iomem *iobase;
 206
 207         int precise_ptr;
 208
 209         u32 control_register;   /* cached value */
 210         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 211
 212         u32 creg_spdif;
 213         u32 creg_spdif_stream;
 214
 215         char *card_name;                /* hammerfall or hammerfall light names */
 216
 217         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 218         size_t prev_hw_offset;          /* previous hw offset */
 219         size_t max_jitter;              /* maximum jitter in frames for
 220                                            hw pointer */
 221         size_t period_bytes;            /* guess what this is */
 222
 223         unsigned char ds_channels;
 224         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 225
 226         struct snd_dma_buffer playback_dma_buf;
 227         struct snd_dma_buffer capture_dma_buf;
 228
 229         unsigned char *capture_buffer;  /* suitably aligned address */
 230         unsigned char *playback_buffer; /* suitably aligned address */
 231
 232         pid_t capture_pid;
 233         pid_t playback_pid;
 234
 235         struct snd_pcm_substream *capture_substream;
 236         struct snd_pcm_substream *playback_substream;
 237         int running;
 238
 239         int passthru;                   /* non-zero if doing pass-thru */
 240         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 241
 242         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 243         int last_adat_sample_rate;      /* ... induced rate changes            */
 244
 245         char *channel_map;
 246
 247         struct snd_card *card;
 248         struct snd_pcm *pcm;
 249         struct pci_dev *pci;
 250         struct snd_kcontrol *spdif_ctl;
 251
 252 };
 253
 254 /* These tables map the ALSA channels 1..N to the channels that we
 255    need to use in order to find the relevant channel buffer. RME
 256    refer to this kind of mapping as between "the ADAT channel and
 257    the DMA channel." We index it using the logical audio channel,
 258    and the value is the DMA channel (i.e. channel buffer number)
 259    where the data for that channel can be read/written from/to.
 260 */
 261
 262 static char channel_map_9652_ss[26] = {
 263         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 264         18, 19, 20, 21, 22, 23, 24, 25
 265 };
 266
 267 static char channel_map_9636_ss[26] = {
 268         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 269         /* channels 16 and 17 are S/PDIF */
 270         24, 25,
 271         /* channels 18-25 don't exist */
 272         -1, -1, -1, -1, -1, -1, -1, -1
 273 };
 274
 275 static char channel_map_9652_ds[26] = {
 276         /* ADAT channels are remapped */
 277         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 278         /* channels 12 and 13 are S/PDIF */
 279         24, 25,
 280         /* others don't exist */
 281         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 282 };
 283
 284 static char channel_map_9636_ds[26] = {
 285         /* ADAT channels are remapped */
 286         1, 3, 5, 7, 9, 11, 13, 15,
 287         /* channels 8 and 9 are S/PDIF */
 288         24, 25,
 289         /* others don't exist */
 290         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 291 };
 292
 293 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 294 {
 295         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 296         dmab->dev.dev = snd_dma_pci_data(pci);
 297         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 298                                 size, dmab) < 0)
 299                 return -ENOMEM;
 300         return 0;
 301 }
 302
 303 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 304 {
 305         if (dmab->area)
 306                 snd_dma_free_pages(dmab);
 307 }
 308
 309
 310 static const struct pci_device_id snd_rme9652_ids[] = {
 311         {
 312                 .vendor    = 0x10ee,
 313                 .device    = 0x3fc4,
 314                 .subvendor = PCI_ANY_ID,
 315                 .subdevice = PCI_ANY_ID,
 316         },      /* RME Digi9652 */
 317         { 0, },
 318 };
 319
 320 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 321
 322 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
 323 {
 324         writel(val, rme9652->iobase + reg);
 325 }
 326
 327 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
 328 {
 329         return readl(rme9652->iobase + reg);
 330 }
 331
 332 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
 333 {
 334         unsigned long flags;
 335         int ret = 1;
 336
 337         spin_lock_irqsave(&rme9652->lock, flags);
 338         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 339             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 340                 ret = 0;
 341         }
 342         spin_unlock_irqrestore(&rme9652->lock, flags);
 343         return ret;
 344 }
 345
 346 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
 347 {
 348         if (rme9652_running_double_speed(rme9652)) {
 349                 return (rme9652_read(rme9652, RME9652_status_register) &
 350                         RME9652_fs48) ? 96000 : 88200;
 351         } else {
 352                 return (rme9652_read(rme9652, RME9652_status_register) &
 353                         RME9652_fs48) ? 48000 : 44100;
 354         }
 355 }
 356
 357 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
 358 {
 359         unsigned int i;
 360
 361         i = rme9652->control_register & RME9652_latency;
 362         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 363         rme9652->hw_offsetmask =
 364                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 365         rme9652->max_jitter = 80;
 366 }
 367
 368 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
 369 {
 370         int status;
 371         unsigned int offset, frag;
 372         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 373         snd_pcm_sframes_t delta;
 374
 375         status = rme9652_read(rme9652, RME9652_status_register);
 376         if (!rme9652->precise_ptr)
 377                 return (status & RME9652_buffer_id) ? period_size : 0;
 378         offset = status & RME9652_buf_pos;
 379
 380         /* The hardware may give a backward movement for up to 80 frames
 381            Martin Kirst <martin.kirst@freenet.de> knows the details.
 382         */
 383
 384         delta = rme9652->prev_hw_offset - offset;
 385         delta &= 0xffff;
 386         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 387                 offset = rme9652->prev_hw_offset;
 388         else
 389                 rme9652->prev_hw_offset = offset;
 390         offset &= rme9652->hw_offsetmask;
 391         offset /= 4;
 392         frag = status & RME9652_buffer_id;
 393
 394         if (offset < period_size) {
 395                 if (offset > rme9652->max_jitter) {
 396                         if (frag)
 397                                 dev_err(rme9652->card->dev,
 398                                         "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
 399                                         status, offset);
 400                 } else if (!frag)
 401                         return 0;
 402                 offset -= rme9652->max_jitter;
 403                 if ((int)offset < 0)
 404                         offset += period_size * 2;
 405         } else {
 406                 if (offset > period_size + rme9652->max_jitter) {
 407                         if (!frag)
 408                                 dev_err(rme9652->card->dev,
 409                                         "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
 410                                         status, offset);
 411                 } else if (frag)
 412                         return period_size;
 413                 offset -= rme9652->max_jitter;
 414         }
 415
 416         return offset;
 417 }
 418
 419 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
 420 {
 421         int i;
 422
 423         /* reset the FIFO pointer to zero. We do this by writing to 8
 424            registers, each of which is a 32bit wide register, and set
 425            them all to zero. Note that s->iobase is a pointer to
 426            int32, not pointer to char.
 427         */
 428
 429         for (i = 0; i < 8; i++) {
 430                 rme9652_write(rme9652, i * 4, 0);
 431                 udelay(10);
 432         }
 433         rme9652->prev_hw_offset = 0;
 434 }
 435
 436 static inline void rme9652_start(struct snd_rme9652 *s)
 437 {
 438         s->control_register |= (RME9652_IE | RME9652_start_bit);
 439         rme9652_write(s, RME9652_control_register, s->control_register);
 440 }
 441
 442 static inline void rme9652_stop(struct snd_rme9652 *s)
 443 {
 444         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 445         rme9652_write(s, RME9652_control_register, s->control_register);
 446 }
 447
 448 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
 449                                           unsigned int frames)
 450 {
 451         int restart = 0;
 452         int n;
 453
 454         spin_lock_irq(&s->lock);
 455
 456         if ((restart = s->running)) {
 457                 rme9652_stop(s);
 458         }
 459
 460         frames >>= 7;
 461         n = 0;
 462         while (frames) {
 463                 n++;
 464                 frames >>= 1;
 465         }
 466
 467         s->control_register &= ~RME9652_latency;
 468         s->control_register |= rme9652_encode_latency(n);
 469
 470         rme9652_write(s, RME9652_control_register, s->control_register);
 471
 472         rme9652_compute_period_size(s);
 473
 474         if (restart)
 475                 rme9652_start(s);
 476
 477         spin_unlock_irq(&s->lock);
 478
 479         return 0;
 480 }
 481
 482 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
 483 {
 484         int restart;
 485         int reject_if_open = 0;
 486         int xrate;
 487
 488         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 489                 return -EBUSY;
 490         }
 491
 492         /* Changing from a "single speed" to a "double speed" rate is
 493            not allowed if any substreams are open. This is because
 494            such a change causes a shift in the location of
 495            the DMA buffers and a reduction in the number of available
 496            buffers.
 497
 498            Note that a similar but essentially insoluble problem
 499            exists for externally-driven rate changes. All we can do
 500            is to flag rate changes in the read/write routines.
 501          */
 502
 503         spin_lock_irq(&rme9652->lock);
 504         xrate = rme9652_adat_sample_rate(rme9652);
 505
 506         switch (rate) {
 507         case 44100:
 508                 if (xrate > 48000) {
 509                         reject_if_open = 1;
 510                 }
 511                 rate = 0;
 512                 break;
 513         case 48000:
 514                 if (xrate > 48000) {
 515                         reject_if_open = 1;
 516                 }
 517                 rate = RME9652_freq;
 518                 break;
 519         case 88200:
 520                 if (xrate < 48000) {
 521                         reject_if_open = 1;
 522                 }
 523                 rate = RME9652_DS;
 524                 break;
 525         case 96000:
 526                 if (xrate < 48000) {
 527                         reject_if_open = 1;
 528                 }
 529                 rate = RME9652_DS | RME9652_freq;
 530                 break;
 531         default:
 532                 spin_unlock_irq(&rme9652->lock);
 533                 return -EINVAL;
 534         }
 535
 536         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 537                 spin_unlock_irq(&rme9652->lock);
 538                 return -EBUSY;
 539         }
 540
 541         if ((restart = rme9652->running)) {
 542                 rme9652_stop(rme9652);
 543         }
 544         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 545         rme9652->control_register |= rate;
 546         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 547
 548         if (restart) {
 549                 rme9652_start(rme9652);
 550         }
 551
 552         if (rate & RME9652_DS) {
 553                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 554                         rme9652->channel_map = channel_map_9652_ds;
 555                 } else {
 556                         rme9652->channel_map = channel_map_9636_ds;
 557                 }
 558         } else {
 559                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 560                         rme9652->channel_map = channel_map_9652_ss;
 561                 } else {
 562                         rme9652->channel_map = channel_map_9636_ss;
 563                 }
 564         }
 565
 566         spin_unlock_irq(&rme9652->lock);
 567         return 0;
 568 }
 569
 570 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
 571 {
 572         int i;
 573
 574         rme9652->passthru = 0;
 575
 576         if (channel < 0) {
 577
 578                 /* set thru for all channels */
 579
 580                 if (enable) {
 581                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 582                                 rme9652->thru_bits |= (1 << i);
 583                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 584                         }
 585                 } else {
 586                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 587                                 rme9652->thru_bits &= ~(1 << i);
 588                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 589                         }
 590                 }
 591
 592         } else {
 593                 int mapped_channel;
 594
 595                 mapped_channel = rme9652->channel_map[channel];
 596
 597                 if (enable) {
 598                         rme9652->thru_bits |= (1 << mapped_channel);
 599                 } else {
 600                         rme9652->thru_bits &= ~(1 << mapped_channel);
 601                 }
 602
 603                 rme9652_write(rme9652,
 604                                RME9652_thru_base + mapped_channel * 4,
 605                                enable ? 1 : 0);
 606         }
 607 }
 608
 609 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
 610 {
 611         if (onoff) {
 612                 rme9652_set_thru(rme9652, -1, 1);
 613
 614                 /* we don't want interrupts, so do a
 615                    custom version of rme9652_start().
 616                 */
 617
 618                 rme9652->control_register =
 619                         RME9652_inp_0 |
 620                         rme9652_encode_latency(7) |
 621                         RME9652_start_bit;
 622
 623                 rme9652_reset_hw_pointer(rme9652);
 624
 625                 rme9652_write(rme9652, RME9652_control_register,
 626                               rme9652->control_register);
 627                 rme9652->passthru = 1;
 628         } else {
 629                 rme9652_set_thru(rme9652, -1, 0);
 630                 rme9652_stop(rme9652);
 631                 rme9652->passthru = 0;
 632         }
 633
 634         return 0;
 635 }
 636
 637 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
 638 {
 639         if (onoff)
 640                 rme9652->control_register |= mask;
 641         else
 642                 rme9652->control_register &= ~mask;
 643
 644         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 645 }
 646
 647 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
 648 {
 649         long mask;
 650         long i;
 651
 652         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 653                 if (val & mask)
 654                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 655                 else
 656                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 657
 658                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 659                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 660         }
 661 }
 662
 663 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
 664 {
 665         long mask;
 666         long val;
 667         long i;
 668
 669         val = 0;
 670
 671         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 672                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 673                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 674                         val |= mask;
 675                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 676         }
 677
 678         return val;
 679 }
 680
 681 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
 682 {
 683         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 684         rme9652_spdif_write_byte (rme9652, 0x20);
 685         rme9652_spdif_write_byte (rme9652, address);
 686         rme9652_spdif_write_byte (rme9652, data);
 687         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 688 }
 689
 690
 691 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
 692 {
 693         int ret;
 694
 695         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 696         rme9652_spdif_write_byte (rme9652, 0x20);
 697         rme9652_spdif_write_byte (rme9652, address);
 698         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 699         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 700
 701         rme9652_spdif_write_byte (rme9652, 0x21);
 702         ret = rme9652_spdif_read_byte (rme9652);
 703         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 704
 705         return ret;
 706 }
 707
 708 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
 709 {
 710         /* XXX what unsets this ? */
 711
 712         rme9652->control_register |= RME9652_SPDIF_RESET;
 713
 714         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 715         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 716         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 717 }
 718
 719 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
 720 {
 721         unsigned int rate_bits;
 722
 723         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 724                 return -1;      /* error condition */
 725         }
 726
 727         if (s->hw_rev == 15) {
 728
 729                 int x, y, ret;
 730
 731                 x = rme9652_spdif_read_codec (s, 30);
 732
 733                 if (x != 0)
 734                         y = 48000 * 64 / x;
 735                 else
 736                         y = 0;
 737
 738                 if      (y > 30400 && y < 33600)  ret = 32000;
 739                 else if (y > 41900 && y < 46000)  ret = 44100;
 740                 else if (y > 46000 && y < 50400)  ret = 48000;
 741                 else if (y > 60800 && y < 67200)  ret = 64000;
 742                 else if (y > 83700 && y < 92000)  ret = 88200;
 743                 else if (y > 92000 && y < 100000) ret = 96000;
 744                 else                              ret = 0;
 745                 return ret;
 746         }
 747
 748         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 749
 750         switch (rme9652_decode_spdif_rate(rate_bits)) {
 751         case 0x7:
 752                 return 32000;
 753                 break;
 754
 755         case 0x6:
 756                 return 44100;
 757                 break;
 758
 759         case 0x5:
 760                 return 48000;
 761                 break;
 762
 763         case 0x4:
 764                 return 88200;
 765                 break;
 766
 767         case 0x3:
 768                 return 96000;
 769                 break;
 770
 771         case 0x0:
 772                 return 64000;
 773                 break;
 774
 775         default:
 776                 dev_err(s->card->dev,
 777                         "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 778                            s->card_name, rate_bits);
 779                 return 0;
 780                 break;
 781         }
 782 }
 783
 784 /*-----------------------------------------------------------------------------
 785   Control Interface
 786   ----------------------------------------------------------------------------*/
 787
 788 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
 789 {
 790         u32 val = 0;
 791         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 792         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 793         if (val & RME9652_PRO)
 794                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 795         else
 796                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 797         return val;
 798 }
 799
 800 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
 801 {
 802         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 803                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 804         if (val & RME9652_PRO)
 805                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 806         else
 807                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 808 }
 809
 810 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 811 {
 812         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 813         uinfo->count = 1;
 814         return 0;
 815 }
 816
 817 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 818 {
 819         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 820
 821         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 822         return 0;
 823 }
 824
 825 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 826 {
 827         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 828         int change;
 829         u32 val;
 830
 831         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 832         spin_lock_irq(&rme9652->lock);
 833         change = val != rme9652->creg_spdif;
 834         rme9652->creg_spdif = val;
 835         spin_unlock_irq(&rme9652->lock);
 836         return change;
 837 }
 838
 839 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 840 {
 841         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 842         uinfo->count = 1;
 843         return 0;
 844 }
 845
 846 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 847 {
 848         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 849
 850         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 851         return 0;
 852 }
 853
 854 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 855 {
 856         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 857         int change;
 858         u32 val;
 859
 860         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 861         spin_lock_irq(&rme9652->lock);
 862         change = val != rme9652->creg_spdif_stream;
 863         rme9652->creg_spdif_stream = val;
 864         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 865         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 866         spin_unlock_irq(&rme9652->lock);
 867         return change;
 868 }
 869
 870 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 871 {
 872         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 873         uinfo->count = 1;
 874         return 0;
 875 }
 876
 877 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 878 {
 879         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 880         return 0;
 881 }
 882
 883 #define RME9652_ADAT1_IN(xname, xindex) \
 884 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 885   .info = snd_rme9652_info_adat1_in, \
 886   .get = snd_rme9652_get_adat1_in, \
 887   .put = snd_rme9652_put_adat1_in }
 888
 889 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
 890 {
 891         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 892                 return 1;
 893         return 0;
 894 }
 895
 896 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
 897 {
 898         int restart = 0;
 899
 900         if (internal) {
 901                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 902         } else {
 903                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 904         }
 905
 906         /* XXX do we actually need to stop the card when we do this ? */
 907
 908         if ((restart = rme9652->running)) {
 909                 rme9652_stop(rme9652);
 910         }
 911
 912         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 913
 914         if (restart) {
 915                 rme9652_start(rme9652);
 916         }
 917
 918         return 0;
 919 }
 920
 921 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 922 {
 923         static const char * const texts[2] = {"ADAT1", "Internal"};
 924
 925         return snd_ctl_enum_info(uinfo, 1, 2, texts);
 926 }
 927
 928 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 929 {
 930         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 931
 932         spin_lock_irq(&rme9652->lock);
 933         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 934         spin_unlock_irq(&rme9652->lock);
 935         return 0;
 936 }
 937
 938 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 939 {
 940         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 941         int change;
 942         unsigned int val;
 943
 944         if (!snd_rme9652_use_is_exclusive(rme9652))
 945                 return -EBUSY;
 946         val = ucontrol->value.enumerated.item[0] % 2;
 947         spin_lock_irq(&rme9652->lock);
 948         change = val != rme9652_adat1_in(rme9652);
 949         if (change)
 950                 rme9652_set_adat1_input(rme9652, val);
 951         spin_unlock_irq(&rme9652->lock);
 952         return change;
 953 }
 954
 955 #define RME9652_SPDIF_IN(xname, xindex) \
 956 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 957   .info = snd_rme9652_info_spdif_in, \
 958   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 959
 960 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
 961 {
 962         return rme9652_decode_spdif_in(rme9652->control_register &
 963                                        RME9652_inp);
 964 }
 965
 966 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
 967 {
 968         int restart = 0;
 969
 970         rme9652->control_register &= ~RME9652_inp;
 971         rme9652->control_register |= rme9652_encode_spdif_in(in);
 972
 973         if ((restart = rme9652->running)) {
 974                 rme9652_stop(rme9652);
 975         }
 976
 977         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 978
 979         if (restart) {
 980                 rme9652_start(rme9652);
 981         }
 982
 983         return 0;
 984 }
 985
 986 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 987 {
 988         static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
 989
 990         return snd_ctl_enum_info(uinfo, 1, 3, texts);
 991 }
 992
 993 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 994 {
 995         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 996
 997         spin_lock_irq(&rme9652->lock);
 998         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
 999         spin_unlock_irq(&rme9652->lock);
1000         return 0;
1001 }
1002
1003 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1004 {
1005         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1006         int change;
1007         unsigned int val;
1008
1009         if (!snd_rme9652_use_is_exclusive(rme9652))
1010                 return -EBUSY;
1011         val = ucontrol->value.enumerated.item[0] % 3;
1012         spin_lock_irq(&rme9652->lock);
1013         change = val != rme9652_spdif_in(rme9652);
1014         if (change)
1015                 rme9652_set_spdif_input(rme9652, val);
1016         spin_unlock_irq(&rme9652->lock);
1017         return change;
1018 }
1019
1020 #define RME9652_SPDIF_OUT(xname, xindex) \
1021 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1022   .info = snd_rme9652_info_spdif_out, \
1023   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1024
1025 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1026 {
1027         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1028 }
1029
1030 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1031 {
1032         int restart = 0;
1033
1034         if (out) {
1035                 rme9652->control_register |= RME9652_opt_out;
1036         } else {
1037                 rme9652->control_register &= ~RME9652_opt_out;
1038         }
1039
1040         if ((restart = rme9652->running)) {
1041                 rme9652_stop(rme9652);
1042         }
1043
1044         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1045
1046         if (restart) {
1047                 rme9652_start(rme9652);
1048         }
1049
1050         return 0;
1051 }
1052
1053 #define snd_rme9652_info_spdif_out      snd_ctl_boolean_mono_info
1054
1055 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1056 {
1057         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1058
1059         spin_lock_irq(&rme9652->lock);
1060         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1061         spin_unlock_irq(&rme9652->lock);
1062         return 0;
1063 }
1064
1065 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1066 {
1067         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1068         int change;
1069         unsigned int val;
1070
1071         if (!snd_rme9652_use_is_exclusive(rme9652))
1072                 return -EBUSY;
1073         val = ucontrol->value.integer.value[0] & 1;
1074         spin_lock_irq(&rme9652->lock);
1075         change = (int)val != rme9652_spdif_out(rme9652);
1076         rme9652_set_spdif_output(rme9652, val);
1077         spin_unlock_irq(&rme9652->lock);
1078         return change;
1079 }
1080
1081 #define RME9652_SYNC_MODE(xname, xindex) \
1082 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1083   .info = snd_rme9652_info_sync_mode, \
1084   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1085
1086 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1087 {
1088         if (rme9652->control_register & RME9652_wsel) {
1089                 return 2;
1090         } else if (rme9652->control_register & RME9652_Master) {
1091                 return 1;
1092         } else {
1093                 return 0;
1094         }
1095 }
1096
1097 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1098 {
1099         int restart = 0;
1100
1101         switch (mode) {
1102         case 0:
1103                 rme9652->control_register &=
1104                     ~(RME9652_Master | RME9652_wsel);
1105                 break;
1106         case 1:
1107                 rme9652->control_register =
1108                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1109                 break;
1110         case 2:
1111                 rme9652->control_register |=
1112                     (RME9652_Master | RME9652_wsel);
1113                 break;
1114         }
1115
1116         if ((restart = rme9652->running)) {
1117                 rme9652_stop(rme9652);
1118         }
1119
1120         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1121
1122         if (restart) {
1123                 rme9652_start(rme9652);
1124         }
1125
1126         return 0;
1127 }
1128
1129 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1130 {
1131         static const char * const texts[3] = {
1132                 "AutoSync", "Master", "Word Clock"
1133         };
1134
1135         return snd_ctl_enum_info(uinfo, 1, 3, texts);
1136 }
1137
1138 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1139 {
1140         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1141
1142         spin_lock_irq(&rme9652->lock);
1143         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1144         spin_unlock_irq(&rme9652->lock);
1145         return 0;
1146 }
1147
1148 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1149 {
1150         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1151         int change;
1152         unsigned int val;
1153
1154         val = ucontrol->value.enumerated.item[0] % 3;
1155         spin_lock_irq(&rme9652->lock);
1156         change = (int)val != rme9652_sync_mode(rme9652);
1157         rme9652_set_sync_mode(rme9652, val);
1158         spin_unlock_irq(&rme9652->lock);
1159         return change;
1160 }
1161
1162 #define RME9652_SYNC_PREF(xname, xindex) \
1163 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1164   .info = snd_rme9652_info_sync_pref, \
1165   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1166
1167 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1168 {
1169         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1170         case RME9652_SyncPref_ADAT1:
1171                 return RME9652_SYNC_FROM_ADAT1;
1172         case RME9652_SyncPref_ADAT2:
1173                 return RME9652_SYNC_FROM_ADAT2;
1174         case RME9652_SyncPref_ADAT3:
1175                 return RME9652_SYNC_FROM_ADAT3;
1176         case RME9652_SyncPref_SPDIF:
1177                 return RME9652_SYNC_FROM_SPDIF;
1178         }
1179         /* Not reachable */
1180         return 0;
1181 }
1182
1183 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1184 {
1185         int restart;
1186
1187         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1188         switch (pref) {
1189         case RME9652_SYNC_FROM_ADAT1:
1190                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1191                 break;
1192         case RME9652_SYNC_FROM_ADAT2:
1193                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1194                 break;
1195         case RME9652_SYNC_FROM_ADAT3:
1196                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1197                 break;
1198         case RME9652_SYNC_FROM_SPDIF:
1199                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1200                 break;
1201         }
1202
1203         if ((restart = rme9652->running)) {
1204                 rme9652_stop(rme9652);
1205         }
1206
1207         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1208
1209         if (restart) {
1210                 rme9652_start(rme9652);
1211         }
1212
1213         return 0;
1214 }
1215
1216 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1217 {
1218         static const char * const texts[4] = {
1219                 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1220         };
1221         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1222
1223         return snd_ctl_enum_info(uinfo, 1,
1224                                  rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1225                                  texts);
1226 }
1227
1228 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1229 {
1230         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1231
1232         spin_lock_irq(&rme9652->lock);
1233         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1234         spin_unlock_irq(&rme9652->lock);
1235         return 0;
1236 }
1237
1238 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1239 {
1240         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1241         int change, max;
1242         unsigned int val;
1243
1244         if (!snd_rme9652_use_is_exclusive(rme9652))
1245                 return -EBUSY;
1246         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1247         val = ucontrol->value.enumerated.item[0] % max;
1248         spin_lock_irq(&rme9652->lock);
1249         change = (int)val != rme9652_sync_pref(rme9652);
1250         rme9652_set_sync_pref(rme9652, val);
1251         spin_unlock_irq(&rme9652->lock);
1252         return change;
1253 }
1254
1255 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1256 {
1257         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1258         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1259         uinfo->count = rme9652->ss_channels;
1260         uinfo->value.integer.min = 0;
1261         uinfo->value.integer.max = 1;
1262         return 0;
1263 }
1264
1265 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1266 {
1267         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1268         unsigned int k;
1269         u32 thru_bits = rme9652->thru_bits;
1270
1271         for (k = 0; k < rme9652->ss_channels; ++k) {
1272                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1273         }
1274         return 0;
1275 }
1276
1277 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1278 {
1279         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1280         int change;
1281         unsigned int chn;
1282         u32 thru_bits = 0;
1283
1284         if (!snd_rme9652_use_is_exclusive(rme9652))
1285                 return -EBUSY;
1286
1287         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1288                 if (ucontrol->value.integer.value[chn])
1289                         thru_bits |= 1 << chn;
1290         }
1291
1292         spin_lock_irq(&rme9652->lock);
1293         change = thru_bits ^ rme9652->thru_bits;
1294         if (change) {
1295                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1296                         if (!(change & (1 << chn)))
1297                                 continue;
1298                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1299                 }
1300         }
1301         spin_unlock_irq(&rme9652->lock);
1302         return !!change;
1303 }
1304
1305 #define RME9652_PASSTHRU(xname, xindex) \
1306 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1307   .info = snd_rme9652_info_passthru, \
1308   .put = snd_rme9652_put_passthru, \
1309   .get = snd_rme9652_get_passthru }
1310
1311 #define snd_rme9652_info_passthru       snd_ctl_boolean_mono_info
1312
1313 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1314 {
1315         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1316
1317         spin_lock_irq(&rme9652->lock);
1318         ucontrol->value.integer.value[0] = rme9652->passthru;
1319         spin_unlock_irq(&rme9652->lock);
1320         return 0;
1321 }
1322
1323 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1324 {
1325         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1326         int change;
1327         unsigned int val;
1328         int err = 0;
1329
1330         if (!snd_rme9652_use_is_exclusive(rme9652))
1331                 return -EBUSY;
1332
1333         val = ucontrol->value.integer.value[0] & 1;
1334         spin_lock_irq(&rme9652->lock);
1335         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1336         if (change)
1337                 err = rme9652_set_passthru(rme9652, val);
1338         spin_unlock_irq(&rme9652->lock);
1339         return err ? err : change;
1340 }
1341
1342 /* Read-only switches */
1343
1344 #define RME9652_SPDIF_RATE(xname, xindex) \
1345 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1346   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1347   .info = snd_rme9652_info_spdif_rate, \
1348   .get = snd_rme9652_get_spdif_rate }
1349
1350 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1351 {
1352         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1353         uinfo->count = 1;
1354         uinfo->value.integer.min = 0;
1355         uinfo->value.integer.max = 96000;
1356         return 0;
1357 }
1358
1359 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1360 {
1361         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1362
1363         spin_lock_irq(&rme9652->lock);
1364         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1365         spin_unlock_irq(&rme9652->lock);
1366         return 0;
1367 }
1368
1369 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1370 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1371   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1372   .info = snd_rme9652_info_adat_sync, \
1373   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1374
1375 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1376 {
1377         static const char * const texts[4] = {
1378                 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1379         };
1380
1381         return snd_ctl_enum_info(uinfo, 1, 4, texts);
1382 }
1383
1384 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1385 {
1386         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1387         unsigned int mask1, mask2, val;
1388
1389         switch (kcontrol->private_value) {
1390         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1391         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1392         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1393         default: return -EINVAL;
1394         }
1395         val = rme9652_read(rme9652, RME9652_status_register);
1396         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1397         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1398         return 0;
1399 }
1400
1401 #define RME9652_TC_VALID(xname, xindex) \
1402 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1403   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1404   .info = snd_rme9652_info_tc_valid, \
1405   .get = snd_rme9652_get_tc_valid }
1406
1407 #define snd_rme9652_info_tc_valid       snd_ctl_boolean_mono_info
1408
1409 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1410 {
1411         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1412
1413         ucontrol->value.integer.value[0] =
1414                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1415         return 0;
1416 }
1417
1418 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1419
1420 /* FIXME: this routine needs a port to the new control API --jk */
1421
1422 static int snd_rme9652_get_tc_value(void *private_data,
1423                                     snd_kswitch_t *kswitch,
1424                                     snd_switch_t *uswitch)
1425 {
1426         struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1427         u32 value;
1428         int i;
1429
1430         uswitch->type = SNDRV_SW_TYPE_DWORD;
1431
1432         if ((rme9652_read(s, RME9652_status_register) &
1433              RME9652_tc_valid) == 0) {
1434                 uswitch->value.data32[0] = 0;
1435                 return 0;
1436         }
1437
1438         /* timecode request */
1439
1440         rme9652_write(s, RME9652_time_code, 0);
1441
1442         /* XXX bug alert: loop-based timing !!!! */
1443
1444         for (i = 0; i < 50; i++) {
1445                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1446                         break;
1447         }
1448
1449         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1450                 return -EIO;
1451         }
1452
1453         value = 0;
1454
1455         for (i = 0; i < 32; i++) {
1456                 value >>= 1;
1457
1458                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1459                         value |= 0x80000000;
1460         }
1461
1462         if (value > 2 * 60 * 48000) {
1463                 value -= 2 * 60 * 48000;
1464         } else {
1465                 value = 0;
1466         }
1467
1468         uswitch->value.data32[0] = value;
1469
1470         return 0;
1471 }
1472
1473 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1474
1475 static struct snd_kcontrol_new snd_rme9652_controls[] = {
1476 {
1477         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1478         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1479         .info =         snd_rme9652_control_spdif_info,
1480         .get =          snd_rme9652_control_spdif_get,
1481         .put =          snd_rme9652_control_spdif_put,
1482 },
1483 {
1484         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1485         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1486         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1487         .info =         snd_rme9652_control_spdif_stream_info,
1488         .get =          snd_rme9652_control_spdif_stream_get,
1489         .put =          snd_rme9652_control_spdif_stream_put,
1490 },
1491 {
1492         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1493         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1494         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1495         .info =         snd_rme9652_control_spdif_mask_info,
1496         .get =          snd_rme9652_control_spdif_mask_get,
1497         .private_value = IEC958_AES0_NONAUDIO |
1498                         IEC958_AES0_PROFESSIONAL |
1499                         IEC958_AES0_CON_EMPHASIS,
1500 },
1501 {
1502         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1503         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1504         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1505         .info =         snd_rme9652_control_spdif_mask_info,
1506         .get =          snd_rme9652_control_spdif_mask_get,
1507         .private_value = IEC958_AES0_NONAUDIO |
1508                         IEC958_AES0_PROFESSIONAL |
1509                         IEC958_AES0_PRO_EMPHASIS,
1510 },
1511 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1512 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1513 RME9652_SYNC_MODE("Sync Mode", 0),
1514 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1515 {
1516         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1517         .name = "Channels Thru",
1518         .index = 0,
1519         .info = snd_rme9652_info_thru,
1520         .get = snd_rme9652_get_thru,
1521         .put = snd_rme9652_put_thru,
1522 },
1523 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1524 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1525 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1526 RME9652_TC_VALID("Timecode Valid", 0),
1527 RME9652_PASSTHRU("Passthru", 0)
1528 };
1529
1530 static struct snd_kcontrol_new snd_rme9652_adat3_check =
1531 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1532
1533 static struct snd_kcontrol_new snd_rme9652_adat1_input =
1534 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1535
1536 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1537 {
1538         unsigned int idx;
1539         int err;
1540         struct snd_kcontrol *kctl;
1541
1542         for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1543                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1544                         return err;
1545                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1546                         rme9652->spdif_ctl = kctl;
1547         }
1548
1549         if (rme9652->ss_channels == RME9652_NCHANNELS)
1550                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1551                         return err;
1552
1553         if (rme9652->hw_rev >= 15)
1554                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1555                         return err;
1556
1557         return 0;
1558 }
1559
1560 /*------------------------------------------------------------
1561    /proc interface
1562  ------------------------------------------------------------*/
1563
1564 static void
1565 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1566 {
1567         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1568         u32 thru_bits = rme9652->thru_bits;
1569         int show_auto_sync_source = 0;
1570         int i;
1571         unsigned int status;
1572         int x;
1573
1574         status = rme9652_read(rme9652, RME9652_status_register);
1575
1576         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1577         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1578                     rme9652->capture_buffer, rme9652->playback_buffer);
1579         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1580                     rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1581         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1582
1583         snd_iprintf(buffer, "\n");
1584
1585         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1586                                              RME9652_latency));
1587
1588         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1589                     x, (unsigned long) rme9652->period_bytes);
1590         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1591                     rme9652_hw_pointer(rme9652));
1592         snd_iprintf(buffer, "Passthru: %s\n",
1593                     rme9652->passthru ? "yes" : "no");
1594
1595         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1596                 snd_iprintf(buffer, "Clock mode: autosync\n");
1597                 show_auto_sync_source = 1;
1598         } else if (rme9652->control_register & RME9652_wsel) {
1599                 if (status & RME9652_wsel_rd) {
1600                         snd_iprintf(buffer, "Clock mode: word clock\n");
1601                 } else {
1602                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1603                 }
1604         } else {
1605                 snd_iprintf(buffer, "Clock mode: master\n");
1606         }
1607
1608         if (show_auto_sync_source) {
1609                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1610                 case RME9652_SyncPref_ADAT1:
1611                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1612                         break;
1613                 case RME9652_SyncPref_ADAT2:
1614                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1615                         break;
1616                 case RME9652_SyncPref_ADAT3:
1617                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1618                         break;
1619                 case RME9652_SyncPref_SPDIF:
1620                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1621                         break;
1622                 default:
1623                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1624                 }
1625         }
1626
1627         if (rme9652->hw_rev >= 15)
1628                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1629                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1630                             "Internal" : "ADAT1 optical");
1631
1632         snd_iprintf(buffer, "\n");
1633
1634         switch (rme9652_decode_spdif_in(rme9652->control_register &
1635                                         RME9652_inp)) {
1636         case RME9652_SPDIFIN_OPTICAL:
1637                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1638                 break;
1639         case RME9652_SPDIFIN_COAXIAL:
1640                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1641                 break;
1642         case RME9652_SPDIFIN_INTERN:
1643                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1644                 break;
1645         default:
1646                 snd_iprintf(buffer, "IEC958 input: ???\n");
1647                 break;
1648         }
1649
1650         if (rme9652->control_register & RME9652_opt_out) {
1651                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1652         } else {
1653                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1654         }
1655
1656         if (rme9652->control_register & RME9652_PRO) {
1657                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1658         } else {
1659                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1660         }
1661
1662         if (rme9652->control_register & RME9652_EMP) {
1663                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1664         } else {
1665                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1666         }
1667
1668         if (rme9652->control_register & RME9652_Dolby) {
1669                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1670         } else {
1671                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1672         }
1673
1674         i = rme9652_spdif_sample_rate(rme9652);
1675
1676         if (i < 0) {
1677                 snd_iprintf(buffer,
1678                             "IEC958 sample rate: error flag set\n");
1679         } else if (i == 0) {
1680                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1681         } else {
1682                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1683         }
1684
1685         snd_iprintf(buffer, "\n");
1686
1687         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1688                     rme9652_adat_sample_rate(rme9652));
1689
1690         /* Sync Check */
1691
1692         x = status & RME9652_sync_0;
1693         if (status & RME9652_lock_0) {
1694                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1695         } else {
1696                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1697         }
1698
1699         x = status & RME9652_sync_1;
1700         if (status & RME9652_lock_1) {
1701                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1702         } else {
1703                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1704         }
1705
1706         x = status & RME9652_sync_2;
1707         if (status & RME9652_lock_2) {
1708                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1709         } else {
1710                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1711         }
1712
1713         snd_iprintf(buffer, "\n");
1714
1715         snd_iprintf(buffer, "Timecode signal: %s\n",
1716                     (status & RME9652_tc_valid) ? "yes" : "no");
1717
1718         /* thru modes */
1719
1720         snd_iprintf(buffer, "Punch Status:\n\n");
1721
1722         for (i = 0; i < rme9652->ss_channels; i++) {
1723                 if (thru_bits & (1 << i)) {
1724                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1725                 } else {
1726                         snd_iprintf(buffer, "%2d: off ", i + 1);
1727                 }
1728
1729                 if (((i + 1) % 8) == 0) {
1730                         snd_iprintf(buffer, "\n");
1731                 }
1732         }
1733
1734         snd_iprintf(buffer, "\n");
1735 }
1736
1737 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1738 {
1739         struct snd_info_entry *entry;
1740
1741         if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1742                 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1743 }
1744
1745 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1746 {
1747         snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1748         snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1749 }
1750
1751 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1752 {
1753         if (rme9652->irq >= 0)
1754                 rme9652_stop(rme9652);
1755         snd_rme9652_free_buffers(rme9652);
1756
1757         if (rme9652->irq >= 0)
1758                 free_irq(rme9652->irq, (void *)rme9652);
1759         iounmap(rme9652->iobase);
1760         if (rme9652->port)
1761                 pci_release_regions(rme9652->pci);
1762
1763         pci_disable_device(rme9652->pci);
1764         return 0;
1765 }
1766
1767 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1768 {
1769         unsigned long pb_bus, cb_bus;
1770
1771         if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1772             snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1773                 if (rme9652->capture_dma_buf.area)
1774                         snd_dma_free_pages(&rme9652->capture_dma_buf);
1775                 dev_err(rme9652->card->dev,
1776                         "%s: no buffers available\n", rme9652->card_name);
1777                 return -ENOMEM;
1778         }
1779
1780         /* Align to bus-space 64K boundary */
1781
1782         cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1783         pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1784
1785         /* Tell the card where it is */
1786
1787         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1788         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1789
1790         rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1791         rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1792
1793         return 0;
1794 }
1795
1796 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1797 {
1798         unsigned int k;
1799
1800         /* ASSUMPTION: rme9652->lock is either held, or
1801            there is no need to hold it (e.g. during module
1802            initialization).
1803          */
1804
1805         /* set defaults:
1806
1807            SPDIF Input via Coax
1808            autosync clock mode
1809            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1810            which implies 2 4096 sample, 32Kbyte periods).
1811
1812            if rev 1.5, initialize the S/PDIF receiver.
1813
1814          */
1815
1816         rme9652->control_register =
1817             RME9652_inp_0 | rme9652_encode_latency(7);
1818
1819         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1820
1821         rme9652_reset_hw_pointer(rme9652);
1822         rme9652_compute_period_size(rme9652);
1823
1824         /* default: thru off for all channels */
1825
1826         for (k = 0; k < RME9652_NCHANNELS; ++k)
1827                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1828
1829         rme9652->thru_bits = 0;
1830         rme9652->passthru = 0;
1831
1832         /* set a default rate so that the channel map is set up */
1833
1834         rme9652_set_rate(rme9652, 48000);
1835 }
1836
1837 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1838 {
1839         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1840
1841         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1842                 return IRQ_NONE;
1843         }
1844
1845         rme9652_write(rme9652, RME9652_irq_clear, 0);
1846
1847         if (rme9652->capture_substream) {
1848                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1849         }
1850
1851         if (rme9652->playback_substream) {
1852                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1853         }
1854         return IRQ_HANDLED;
1855 }
1856
1857 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1858 {
1859         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1860         return rme9652_hw_pointer(rme9652);
1861 }
1862
1863 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1864                                              int stream,
1865                                              int channel)
1866
1867 {
1868         int mapped_channel;
1869
1870         if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1871                 return NULL;
1872
1873         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1874                 return NULL;
1875         }
1876
1877         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1878                 return rme9652->capture_buffer +
1879                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1880         } else {
1881                 return rme9652->playback_buffer +
1882                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1883         }
1884 }
1885
1886 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1887                                      int channel, unsigned long pos,
1888                                      void __user *src, unsigned long count)
1889 {
1890         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1891         char *channel_buf;
1892
1893         if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1894                 return -EINVAL;
1895
1896         channel_buf = rme9652_channel_buffer_location (rme9652,
1897                                                        substream->pstr->stream,
1898                                                        channel);
1899         if (snd_BUG_ON(!channel_buf))
1900                 return -EIO;
1901         if (copy_from_user(channel_buf + pos, src, count))
1902                 return -EFAULT;
1903         return 0;
1904 }
1905
1906 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1907                                             int channel, unsigned long pos,
1908                                             void *src, unsigned long count)
1909 {
1910         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1911         char *channel_buf;
1912
1913         channel_buf = rme9652_channel_buffer_location(rme9652,
1914                                                       substream->pstr->stream,
1915                                                       channel);
1916         if (snd_BUG_ON(!channel_buf))
1917                 return -EIO;
1918         memcpy(channel_buf + pos, src, count);
1919         return 0;
1920 }
1921
1922 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1923                                     int channel, unsigned long pos,
1924                                     void __user *dst, unsigned long count)
1925 {
1926         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1927         char *channel_buf;
1928
1929         if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1930                 return -EINVAL;
1931
1932         channel_buf = rme9652_channel_buffer_location (rme9652,
1933                                                        substream->pstr->stream,
1934                                                        channel);
1935         if (snd_BUG_ON(!channel_buf))
1936                 return -EIO;
1937         if (copy_to_user(dst, channel_buf + pos, count))
1938                 return -EFAULT;
1939         return 0;
1940 }
1941
1942 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1943                                            int channel, unsigned long pos,
1944                                            void *dst, unsigned long count)
1945 {
1946         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1947         char *channel_buf;
1948
1949         channel_buf = rme9652_channel_buffer_location(rme9652,
1950                                                       substream->pstr->stream,
1951                                                       channel);
1952         if (snd_BUG_ON(!channel_buf))
1953                 return -EIO;
1954         memcpy(dst, channel_buf + pos, count);
1955         return 0;
1956 }
1957
1958 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1959                                   int channel, unsigned long pos,
1960                                   unsigned long count)
1961 {
1962         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1963         char *channel_buf;
1964
1965         channel_buf = rme9652_channel_buffer_location (rme9652,
1966                                                        substream->pstr->stream,
1967                                                        channel);
1968         if (snd_BUG_ON(!channel_buf))
1969                 return -EIO;
1970         memset(channel_buf + pos, 0, count);
1971         return 0;
1972 }
1973
1974 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1975 {
1976         struct snd_pcm_runtime *runtime = substream->runtime;
1977         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1978         struct snd_pcm_substream *other;
1979         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1980                 other = rme9652->capture_substream;
1981         else
1982                 other = rme9652->playback_substream;
1983         if (rme9652->running)
1984                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1985         else
1986                 runtime->status->hw_ptr = 0;
1987         if (other) {
1988                 struct snd_pcm_substream *s;
1989                 struct snd_pcm_runtime *oruntime = other->runtime;
1990                 snd_pcm_group_for_each_entry(s, substream) {
1991                         if (s == other) {
1992                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1993                                 break;
1994                         }
1995                 }
1996         }
1997         return 0;
1998 }
1999
2000 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
2001                                  struct snd_pcm_hw_params *params)
2002 {
2003         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2004         int err;
2005         pid_t this_pid;
2006         pid_t other_pid;
2007
2008         spin_lock_irq(&rme9652->lock);
2009
2010         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2011                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2012                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2013                 this_pid = rme9652->playback_pid;
2014                 other_pid = rme9652->capture_pid;
2015         } else {
2016                 this_pid = rme9652->capture_pid;
2017                 other_pid = rme9652->playback_pid;
2018         }
2019
2020         if ((other_pid > 0) && (this_pid != other_pid)) {
2021
2022                 /* The other stream is open, and not by the same
2023                    task as this one. Make sure that the parameters
2024                    that matter are the same.
2025                  */
2026
2027                 if ((int)params_rate(params) !=
2028                     rme9652_adat_sample_rate(rme9652)) {
2029                         spin_unlock_irq(&rme9652->lock);
2030                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2031                         return -EBUSY;
2032                 }
2033
2034                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2035                         spin_unlock_irq(&rme9652->lock);
2036                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2037                         return -EBUSY;
2038                 }
2039
2040                 /* We're fine. */
2041
2042                 spin_unlock_irq(&rme9652->lock);
2043                 return 0;
2044
2045         } else {
2046                 spin_unlock_irq(&rme9652->lock);
2047         }
2048
2049         /* how to make sure that the rate matches an externally-set one ?
2050          */
2051
2052         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2053                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2054                 return err;
2055         }
2056
2057         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2058                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2059                 return err;
2060         }
2061
2062         return 0;
2063 }
2064
2065 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2066                                     struct snd_pcm_channel_info *info)
2067 {
2068         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2069         int chn;
2070
2071         if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2072                 return -EINVAL;
2073
2074         if ((chn = rme9652->channel_map[info->channel]) < 0) {
2075                 return -EINVAL;
2076         }
2077
2078         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2079         info->first = 0;
2080         info->step = 32;
2081         return 0;
2082 }
2083
2084 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2085                              unsigned int cmd, void *arg)
2086 {
2087         switch (cmd) {
2088         case SNDRV_PCM_IOCTL1_RESET:
2089         {
2090                 return snd_rme9652_reset(substream);
2091         }
2092         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2093         {
2094                 struct snd_pcm_channel_info *info = arg;
2095                 return snd_rme9652_channel_info(substream, info);
2096         }
2097         default:
2098                 break;
2099         }
2100
2101         return snd_pcm_lib_ioctl(substream, cmd, arg);
2102 }
2103
2104 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2105 {
2106         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2107 }
2108
2109 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2110                                int cmd)
2111 {
2112         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2113         struct snd_pcm_substream *other;
2114         int running;
2115         spin_lock(&rme9652->lock);
2116         running = rme9652->running;
2117         switch (cmd) {
2118         case SNDRV_PCM_TRIGGER_START:
2119                 running |= 1 << substream->stream;
2120                 break;
2121         case SNDRV_PCM_TRIGGER_STOP:
2122                 running &= ~(1 << substream->stream);
2123                 break;
2124         default:
2125                 snd_BUG();
2126                 spin_unlock(&rme9652->lock);
2127                 return -EINVAL;
2128         }
2129         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2130                 other = rme9652->capture_substream;
2131         else
2132                 other = rme9652->playback_substream;
2133
2134         if (other) {
2135                 struct snd_pcm_substream *s;
2136                 snd_pcm_group_for_each_entry(s, substream) {
2137                         if (s == other) {
2138                                 snd_pcm_trigger_done(s, substream);
2139                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2140                                         running |= 1 << s->stream;
2141                                 else
2142                                         running &= ~(1 << s->stream);
2143                                 goto _ok;
2144                         }
2145                 }
2146                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2147                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2148                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2149                                 rme9652_silence_playback(rme9652);
2150                 } else {
2151                         if (running &&
2152                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2153                                 rme9652_silence_playback(rme9652);
2154                 }
2155         } else {
2156                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2157                         rme9652_silence_playback(rme9652);
2158         }
2159  _ok:
2160         snd_pcm_trigger_done(substream, substream);
2161         if (!rme9652->running && running)
2162                 rme9652_start(rme9652);
2163         else if (rme9652->running && !running)
2164                 rme9652_stop(rme9652);
2165         rme9652->running = running;
2166         spin_unlock(&rme9652->lock);
2167
2168         return 0;
2169 }
2170
2171 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2172 {
2173         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2174         unsigned long flags;
2175         int result = 0;
2176
2177         spin_lock_irqsave(&rme9652->lock, flags);
2178         if (!rme9652->running)
2179                 rme9652_reset_hw_pointer(rme9652);
2180         spin_unlock_irqrestore(&rme9652->lock, flags);
2181         return result;
2182 }
2183
2184 static struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2185 {
2186         .info =                 (SNDRV_PCM_INFO_MMAP |
2187                                  SNDRV_PCM_INFO_MMAP_VALID |
2188                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2189                                  SNDRV_PCM_INFO_SYNC_START |
2190                                  SNDRV_PCM_INFO_DOUBLE),
2191         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2192         .rates =                (SNDRV_PCM_RATE_44100 |
2193                                  SNDRV_PCM_RATE_48000 |
2194                                  SNDRV_PCM_RATE_88200 |
2195                                  SNDRV_PCM_RATE_96000),
2196         .rate_min =             44100,
2197         .rate_max =             96000,
2198         .channels_min =         10,
2199         .channels_max =         26,
2200         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2201         .period_bytes_min =     (64 * 4) * 10,
2202         .period_bytes_max =     (8192 * 4) * 26,
2203         .periods_min =          2,
2204         .periods_max =          2,
2205         .fifo_size =            0,
2206 };
2207
2208 static struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2209 {
2210         .info =                 (SNDRV_PCM_INFO_MMAP |
2211                                  SNDRV_PCM_INFO_MMAP_VALID |
2212                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2213                                  SNDRV_PCM_INFO_SYNC_START),
2214         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2215         .rates =                (SNDRV_PCM_RATE_44100 |
2216                                  SNDRV_PCM_RATE_48000 |
2217                                  SNDRV_PCM_RATE_88200 |
2218                                  SNDRV_PCM_RATE_96000),
2219         .rate_min =             44100,
2220         .rate_max =             96000,
2221         .channels_min =         10,
2222         .channels_max =         26,
2223         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2224         .period_bytes_min =     (64 * 4) * 10,
2225         .period_bytes_max =     (8192 * 4) * 26,
2226         .periods_min =          2,
2227         .periods_max =          2,
2228         .fifo_size =            0,
2229 };
2230
2231 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2232
2233 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2234         .count = ARRAY_SIZE(period_sizes),
2235         .list = period_sizes,
2236         .mask = 0
2237 };
2238
2239 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2240                                         struct snd_pcm_hw_rule *rule)
2241 {
2242         struct snd_rme9652 *rme9652 = rule->private;
2243         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2244         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2245         return snd_interval_list(c, 2, list, 0);
2246 }
2247
2248 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2249                                              struct snd_pcm_hw_rule *rule)
2250 {
2251         struct snd_rme9652 *rme9652 = rule->private;
2252         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2253         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2254         if (r->min > 48000) {
2255                 struct snd_interval t = {
2256                         .min = rme9652->ds_channels,
2257                         .max = rme9652->ds_channels,
2258                         .integer = 1,
2259                 };
2260                 return snd_interval_refine(c, &t);
2261         } else if (r->max < 88200) {
2262                 struct snd_interval t = {
2263                         .min = rme9652->ss_channels,
2264                         .max = rme9652->ss_channels,
2265                         .integer = 1,
2266                 };
2267                 return snd_interval_refine(c, &t);
2268         }
2269         return 0;
2270 }
2271
2272 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2273                                              struct snd_pcm_hw_rule *rule)
2274 {
2275         struct snd_rme9652 *rme9652 = rule->private;
2276         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2277         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2278         if (c->min >= rme9652->ss_channels) {
2279                 struct snd_interval t = {
2280                         .min = 44100,
2281                         .max = 48000,
2282                         .integer = 1,
2283                 };
2284                 return snd_interval_refine(r, &t);
2285         } else if (c->max <= rme9652->ds_channels) {
2286                 struct snd_interval t = {
2287                         .min = 88200,
2288                         .max = 96000,
2289                         .integer = 1,
2290                 };
2291                 return snd_interval_refine(r, &t);
2292         }
2293         return 0;
2294 }
2295
2296 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2297 {
2298         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2299         struct snd_pcm_runtime *runtime = substream->runtime;
2300
2301         spin_lock_irq(&rme9652->lock);
2302
2303         snd_pcm_set_sync(substream);
2304
2305         runtime->hw = snd_rme9652_playback_subinfo;
2306         runtime->dma_area = rme9652->playback_buffer;
2307         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2308
2309         if (rme9652->capture_substream == NULL) {
2310                 rme9652_stop(rme9652);
2311                 rme9652_set_thru(rme9652, -1, 0);
2312         }
2313
2314         rme9652->playback_pid = current->pid;
2315         rme9652->playback_substream = substream;
2316
2317         spin_unlock_irq(&rme9652->lock);
2318
2319         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2320         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2321         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2322                              snd_rme9652_hw_rule_channels, rme9652,
2323                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2324         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2325                              snd_rme9652_hw_rule_channels_rate, rme9652,
2326                              SNDRV_PCM_HW_PARAM_RATE, -1);
2327         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2328                              snd_rme9652_hw_rule_rate_channels, rme9652,
2329                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2330
2331         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2332         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2333         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2334                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2335         return 0;
2336 }
2337
2338 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2339 {
2340         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2341
2342         spin_lock_irq(&rme9652->lock);
2343
2344         rme9652->playback_pid = -1;
2345         rme9652->playback_substream = NULL;
2346
2347         spin_unlock_irq(&rme9652->lock);
2348
2349         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2350         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2351                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2352         return 0;
2353 }
2354
2355
2356 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2357 {
2358         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2359         struct snd_pcm_runtime *runtime = substream->runtime;
2360
2361         spin_lock_irq(&rme9652->lock);
2362
2363         snd_pcm_set_sync(substream);
2364
2365         runtime->hw = snd_rme9652_capture_subinfo;
2366         runtime->dma_area = rme9652->capture_buffer;
2367         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2368
2369         if (rme9652->playback_substream == NULL) {
2370                 rme9652_stop(rme9652);
2371                 rme9652_set_thru(rme9652, -1, 0);
2372         }
2373
2374         rme9652->capture_pid = current->pid;
2375         rme9652->capture_substream = substream;
2376
2377         spin_unlock_irq(&rme9652->lock);
2378
2379         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2380         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2381         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2382                              snd_rme9652_hw_rule_channels, rme9652,
2383                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2384         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2385                              snd_rme9652_hw_rule_channels_rate, rme9652,
2386                              SNDRV_PCM_HW_PARAM_RATE, -1);
2387         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2388                              snd_rme9652_hw_rule_rate_channels, rme9652,
2389                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2390         return 0;
2391 }
2392
2393 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2394 {
2395         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2396
2397         spin_lock_irq(&rme9652->lock);
2398
2399         rme9652->capture_pid = -1;
2400         rme9652->capture_substream = NULL;
2401
2402         spin_unlock_irq(&rme9652->lock);
2403         return 0;
2404 }
2405
2406 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2407         .open =         snd_rme9652_playback_open,
2408         .close =        snd_rme9652_playback_release,
2409         .ioctl =        snd_rme9652_ioctl,
2410         .hw_params =    snd_rme9652_hw_params,
2411         .prepare =      snd_rme9652_prepare,
2412         .trigger =      snd_rme9652_trigger,
2413         .pointer =      snd_rme9652_hw_pointer,
2414         .copy_user =    snd_rme9652_playback_copy,
2415         .copy_kernel =  snd_rme9652_playback_copy_kernel,
2416         .fill_silence = snd_rme9652_hw_silence,
2417 };
2418
2419 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2420         .open =         snd_rme9652_capture_open,
2421         .close =        snd_rme9652_capture_release,
2422         .ioctl =        snd_rme9652_ioctl,
2423         .hw_params =    snd_rme9652_hw_params,
2424         .prepare =      snd_rme9652_prepare,
2425         .trigger =      snd_rme9652_trigger,
2426         .pointer =      snd_rme9652_hw_pointer,
2427         .copy_user =    snd_rme9652_capture_copy,
2428         .copy_kernel =  snd_rme9652_capture_copy_kernel,
2429 };
2430
2431 static int snd_rme9652_create_pcm(struct snd_card *card,
2432                                   struct snd_rme9652 *rme9652)
2433 {
2434         struct snd_pcm *pcm;
2435         int err;
2436
2437         if ((err = snd_pcm_new(card,
2438                                rme9652->card_name,
2439                                0, 1, 1, &pcm)) < 0) {
2440                 return err;
2441         }
2442
2443         rme9652->pcm = pcm;
2444         pcm->private_data = rme9652;
2445         strcpy(pcm->name, rme9652->card_name);
2446
2447         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2448         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2449
2450         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2451
2452         return 0;
2453 }
2454
2455 static int snd_rme9652_create(struct snd_card *card,
2456                               struct snd_rme9652 *rme9652,
2457                               int precise_ptr)
2458 {
2459         struct pci_dev *pci = rme9652->pci;
2460         int err;
2461         int status;
2462         unsigned short rev;
2463
2464         rme9652->irq = -1;
2465         rme9652->card = card;
2466
2467         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2468
2469         switch (rev & 0xff) {
2470         case 3:
2471         case 4:
2472         case 8:
2473         case 9:
2474                 break;
2475
2476         default:
2477                 /* who knows? */
2478                 return -ENODEV;
2479         }
2480
2481         if ((err = pci_enable_device(pci)) < 0)
2482                 return err;
2483
2484         spin_lock_init(&rme9652->lock);
2485
2486         if ((err = pci_request_regions(pci, "rme9652")) < 0)
2487                 return err;
2488         rme9652->port = pci_resource_start(pci, 0);
2489         rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2490         if (rme9652->iobase == NULL) {
2491                 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2492                         rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2493                 return -EBUSY;
2494         }
2495
2496         if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2497                         KBUILD_MODNAME, rme9652)) {
2498                 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2499                 return -EBUSY;
2500         }
2501         rme9652->irq = pci->irq;
2502         rme9652->precise_ptr = precise_ptr;
2503
2504         /* Determine the h/w rev level of the card. This seems like
2505            a particularly kludgy way to encode it, but its what RME
2506            chose to do, so we follow them ...
2507         */
2508
2509         status = rme9652_read(rme9652, RME9652_status_register);
2510         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2511                 rme9652->hw_rev = 15;
2512         } else {
2513                 rme9652->hw_rev = 11;
2514         }
2515
2516         /* Differentiate between the standard Hammerfall, and the
2517            "Light", which does not have the expansion board. This
2518            method comes from information received from Mathhias
2519            Clausen at RME. Display the EEPROM and h/w revID where
2520            relevant.
2521         */
2522
2523         switch (rev) {
2524         case 8: /* original eprom */
2525                 strcpy(card->driver, "RME9636");
2526                 if (rme9652->hw_rev == 15) {
2527                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2528                 } else {
2529                         rme9652->card_name = "RME Digi9636";
2530                 }
2531                 rme9652->ss_channels = RME9636_NCHANNELS;
2532                 break;
2533         case 9: /* W36_G EPROM */
2534                 strcpy(card->driver, "RME9636");
2535                 rme9652->card_name = "RME Digi9636 (Rev G)";
2536                 rme9652->ss_channels = RME9636_NCHANNELS;
2537                 break;
2538         case 4: /* W52_G EPROM */
2539                 strcpy(card->driver, "RME9652");
2540                 rme9652->card_name = "RME Digi9652 (Rev G)";
2541                 rme9652->ss_channels = RME9652_NCHANNELS;
2542                 break;
2543         case 3: /* original eprom */
2544                 strcpy(card->driver, "RME9652");
2545                 if (rme9652->hw_rev == 15) {
2546                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2547                 } else {
2548                         rme9652->card_name = "RME Digi9652";
2549                 }
2550                 rme9652->ss_channels = RME9652_NCHANNELS;
2551                 break;
2552         }
2553
2554         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2555
2556         pci_set_master(rme9652->pci);
2557
2558         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2559                 return err;
2560         }
2561
2562         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2563                 return err;
2564         }
2565
2566         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2567                 return err;
2568         }
2569
2570         snd_rme9652_proc_init(rme9652);
2571
2572         rme9652->last_spdif_sample_rate = -1;
2573         rme9652->last_adat_sample_rate = -1;
2574         rme9652->playback_pid = -1;
2575         rme9652->capture_pid = -1;
2576         rme9652->capture_substream = NULL;
2577         rme9652->playback_substream = NULL;
2578
2579         snd_rme9652_set_defaults(rme9652);
2580
2581         if (rme9652->hw_rev == 15) {
2582                 rme9652_initialize_spdif_receiver (rme9652);
2583         }
2584
2585         return 0;
2586 }
2587
2588 static void snd_rme9652_card_free(struct snd_card *card)
2589 {
2590         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2591
2592         if (rme9652)
2593                 snd_rme9652_free(rme9652);
2594 }
2595
2596 static int snd_rme9652_probe(struct pci_dev *pci,
2597                              const struct pci_device_id *pci_id)
2598 {
2599         static int dev;
2600         struct snd_rme9652 *rme9652;
2601         struct snd_card *card;
2602         int err;
2603
2604         if (dev >= SNDRV_CARDS)
2605                 return -ENODEV;
2606         if (!enable[dev]) {
2607                 dev++;
2608                 return -ENOENT;
2609         }
2610
2611         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2612                            sizeof(struct snd_rme9652), &card);
2613
2614         if (err < 0)
2615                 return err;
2616
2617         rme9652 = (struct snd_rme9652 *) card->private_data;
2618         card->private_free = snd_rme9652_card_free;
2619         rme9652->dev = dev;
2620         rme9652->pci = pci;
2621
2622         if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2623                 snd_card_free(card);
2624                 return err;
2625         }
2626
2627         strcpy(card->shortname, rme9652->card_name);
2628
2629         sprintf(card->longname, "%s at 0x%lx, irq %d",
2630                 card->shortname, rme9652->port, rme9652->irq);
2631
2632
2633         if ((err = snd_card_register(card)) < 0) {
2634                 snd_card_free(card);
2635                 return err;
2636         }
2637         pci_set_drvdata(pci, card);
2638         dev++;
2639         return 0;
2640 }
2641
2642 static void snd_rme9652_remove(struct pci_dev *pci)
2643 {
2644         snd_card_free(pci_get_drvdata(pci));
2645 }
2646
2647 static struct pci_driver rme9652_driver = {
2648         .name     = KBUILD_MODNAME,
2649         .id_table = snd_rme9652_ids,
2650         .probe    = snd_rme9652_probe,
2651         .remove   = snd_rme9652_remove,
2652 };
2653
2654 module_pci_driver(rme9652_driver);