sound/soc/codecs/wm8991.c

   1 /*
   2  * wm8991.c  --  WM8991 ALSA Soc Audio driver
   3  *
   4  * Copyright 2007-2010 Wolfson Microelectronics PLC.
   5  * Author: Graeme Gregory
   6  *         Graeme.Gregory@wolfsonmicro.com
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/pm.h>
  20 #include <linux/i2c.h>
  21 #include <linux/slab.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29 #include <asm/div64.h>
  30
  31 #include "wm8991.h"
  32
  33 struct wm8991_priv {
  34         enum snd_soc_control_type control_type;
  35         unsigned int pcmclk;
  36 };
  37
  38 static const u16 wm8991_reg_defs[] = {
  39         0x8991,     /* R0  - Reset */
  40         0x0000,     /* R1  - Power Management (1) */
  41         0x6000,     /* R2  - Power Management (2) */
  42         0x0000,     /* R3  - Power Management (3) */
  43         0x4050,     /* R4  - Audio Interface (1) */
  44         0x4000,     /* R5  - Audio Interface (2) */
  45         0x01C8,     /* R6  - Clocking (1) */
  46         0x0000,     /* R7  - Clocking (2) */
  47         0x0040,     /* R8  - Audio Interface (3) */
  48         0x0040,     /* R9  - Audio Interface (4) */
  49         0x0004,     /* R10 - DAC CTRL */
  50         0x00C0,     /* R11 - Left DAC Digital Volume */
  51         0x00C0,     /* R12 - Right DAC Digital Volume */
  52         0x0000,     /* R13 - Digital Side Tone */
  53         0x0100,     /* R14 - ADC CTRL */
  54         0x00C0,     /* R15 - Left ADC Digital Volume */
  55         0x00C0,     /* R16 - Right ADC Digital Volume */
  56         0x0000,     /* R17 */
  57         0x0000,     /* R18 - GPIO CTRL 1 */
  58         0x1000,     /* R19 - GPIO1 & GPIO2 */
  59         0x1010,     /* R20 - GPIO3 & GPIO4 */
  60         0x1010,     /* R21 - GPIO5 & GPIO6 */
  61         0x8000,     /* R22 - GPIOCTRL 2 */
  62         0x0800,     /* R23 - GPIO_POL */
  63         0x008B,     /* R24 - Left Line Input 1&2 Volume */
  64         0x008B,     /* R25 - Left Line Input 3&4 Volume */
  65         0x008B,     /* R26 - Right Line Input 1&2 Volume */
  66         0x008B,     /* R27 - Right Line Input 3&4 Volume */
  67         0x0000,     /* R28 - Left Output Volume */
  68         0x0000,     /* R29 - Right Output Volume */
  69         0x0066,     /* R30 - Line Outputs Volume */
  70         0x0022,     /* R31 - Out3/4 Volume */
  71         0x0079,     /* R32 - Left OPGA Volume */
  72         0x0079,     /* R33 - Right OPGA Volume */
  73         0x0003,     /* R34 - Speaker Volume */
  74         0x0003,     /* R35 - ClassD1 */
  75         0x0000,     /* R36 */
  76         0x0100,     /* R37 - ClassD3 */
  77         0x0000,     /* R38 */
  78         0x0000,     /* R39 - Input Mixer1 */
  79         0x0000,     /* R40 - Input Mixer2 */
  80         0x0000,     /* R41 - Input Mixer3 */
  81         0x0000,     /* R42 - Input Mixer4 */
  82         0x0000,     /* R43 - Input Mixer5 */
  83         0x0000,     /* R44 - Input Mixer6 */
  84         0x0000,     /* R45 - Output Mixer1 */
  85         0x0000,     /* R46 - Output Mixer2 */
  86         0x0000,     /* R47 - Output Mixer3 */
  87         0x0000,     /* R48 - Output Mixer4 */
  88         0x0000,     /* R49 - Output Mixer5 */
  89         0x0000,     /* R50 - Output Mixer6 */
  90         0x0180,     /* R51 - Out3/4 Mixer */
  91         0x0000,     /* R52 - Line Mixer1 */
  92         0x0000,     /* R53 - Line Mixer2 */
  93         0x0000,     /* R54 - Speaker Mixer */
  94         0x0000,     /* R55 - Additional Control */
  95         0x0000,     /* R56 - AntiPOP1 */
  96         0x0000,     /* R57 - AntiPOP2 */
  97         0x0000,     /* R58 - MICBIAS */
  98         0x0000,     /* R59 */
  99         0x0008,     /* R60 - PLL1 */
 100         0x0031,     /* R61 - PLL2 */
 101         0x0026,     /* R62 - PLL3 */
 102 };
 103
 104 #define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
 105
 106 static const unsigned int rec_mix_tlv[] = {
 107         TLV_DB_RANGE_HEAD(1),
 108         0, 7, TLV_DB_LINEAR_ITEM(-1500, 600),
 109 };
 110
 111 static const unsigned int in_pga_tlv[] = {
 112         TLV_DB_RANGE_HEAD(1),
 113         0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000),
 114 };
 115
 116 static const unsigned int out_mix_tlv[] = {
 117         TLV_DB_RANGE_HEAD(1),
 118         0, 7, TLV_DB_LINEAR_ITEM(0, -2100),
 119 };
 120
 121 static const unsigned int out_pga_tlv[] = {
 122         TLV_DB_RANGE_HEAD(1),
 123         0, 127, TLV_DB_LINEAR_ITEM(-7300, 600),
 124 };
 125
 126 static const unsigned int out_omix_tlv[] = {
 127         TLV_DB_RANGE_HEAD(1),
 128         0, 7, TLV_DB_LINEAR_ITEM(-600, 0),
 129 };
 130
 131 static const unsigned int out_dac_tlv[] = {
 132         TLV_DB_RANGE_HEAD(1),
 133         0, 255, TLV_DB_LINEAR_ITEM(-7163, 0),
 134 };
 135
 136 static const unsigned int in_adc_tlv[] = {
 137         TLV_DB_RANGE_HEAD(1),
 138         0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763),
 139 };
 140
 141 static const unsigned int out_sidetone_tlv[] = {
 142         TLV_DB_RANGE_HEAD(1),
 143         0, 31, TLV_DB_LINEAR_ITEM(-3600, 0),
 144 };
 145
 146 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
 147                                       struct snd_ctl_elem_value *ucontrol)
 148 {
 149         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 150         int reg = kcontrol->private_value & 0xff;
 151         int ret;
 152         u16 val;
 153
 154         ret = snd_soc_put_volsw(kcontrol, ucontrol);
 155         if (ret < 0)
 156                 return ret;
 157
 158         /* now hit the volume update bits (always bit 8) */
 159         val = snd_soc_read(codec, reg);
 160         return snd_soc_write(codec, reg, val | 0x0100);
 161 }
 162
 163 static const char *wm8991_digital_sidetone[] =
 164 {"None", "Left ADC", "Right ADC", "Reserved"};
 165
 166 static const struct soc_enum wm8991_left_digital_sidetone_enum =
 167         SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
 168                         WM8991_ADC_TO_DACL_SHIFT,
 169                         WM8991_ADC_TO_DACL_MASK,
 170                         wm8991_digital_sidetone);
 171
 172 static const struct soc_enum wm8991_right_digital_sidetone_enum =
 173         SOC_ENUM_SINGLE(WM8991_DIGITAL_SIDE_TONE,
 174                         WM8991_ADC_TO_DACR_SHIFT,
 175                         WM8991_ADC_TO_DACR_MASK,
 176                         wm8991_digital_sidetone);
 177
 178 static const char *wm8991_adcmode[] =
 179 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
 180
 181 static const struct soc_enum wm8991_right_adcmode_enum =
 182         SOC_ENUM_SINGLE(WM8991_ADC_CTRL,
 183                         WM8991_ADC_HPF_CUT_SHIFT,
 184                         WM8991_ADC_HPF_CUT_MASK,
 185                         wm8991_adcmode);
 186
 187 static const struct snd_kcontrol_new wm8991_snd_controls[] = {
 188         /* INMIXL */
 189         SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
 190         SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
 191         /* INMIXR */
 192         SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
 193         SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
 194
 195         /* LOMIX */
 196         SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
 197                 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
 198         SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
 199                 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
 200         SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
 201                 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
 202         SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
 203                 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
 204         SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
 205                 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
 206         SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
 207                 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
 208
 209         /* ROMIX */
 210         SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
 211                 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
 212         SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
 213                 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
 214         SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
 215                 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
 216         SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
 217                 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
 218         SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
 219                 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
 220         SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
 221                 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
 222
 223         /* LOUT */
 224         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
 225                 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
 226         SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
 227
 228         /* ROUT */
 229         SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
 230                 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
 231         SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
 232
 233         /* LOPGA */
 234         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
 235                 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
 236         SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
 237                 WM8991_LOPGAZC_BIT, 1, 0),
 238
 239         /* ROPGA */
 240         SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
 241                 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
 242         SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
 243                 WM8991_ROPGAZC_BIT, 1, 0),
 244
 245         SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 246                 WM8991_LONMUTE_BIT, 1, 0),
 247         SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 248                 WM8991_LOPMUTE_BIT, 1, 0),
 249         SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
 250                 WM8991_LOATTN_BIT, 1, 0),
 251         SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 252                 WM8991_RONMUTE_BIT, 1, 0),
 253         SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 254                 WM8991_ROPMUTE_BIT, 1, 0),
 255         SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
 256                 WM8991_ROATTN_BIT, 1, 0),
 257
 258         SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
 259                 WM8991_OUT3MUTE_BIT, 1, 0),
 260         SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
 261                 WM8991_OUT3ATTN_BIT, 1, 0),
 262
 263         SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
 264                 WM8991_OUT4MUTE_BIT, 1, 0),
 265         SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
 266                 WM8991_OUT4ATTN_BIT, 1, 0),
 267
 268         SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
 269                 WM8991_CDMODE_BIT, 1, 0),
 270
 271         SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
 272                 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
 273         SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
 274                 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
 275         SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
 276                 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
 277
 278         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
 279                 WM8991_LEFT_DAC_DIGITAL_VOLUME,
 280                 WM8991_DACL_VOL_SHIFT,
 281                 WM8991_DACL_VOL_MASK,
 282                 0,
 283                 out_dac_tlv),
 284
 285         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
 286                 WM8991_RIGHT_DAC_DIGITAL_VOLUME,
 287                 WM8991_DACR_VOL_SHIFT,
 288                 WM8991_DACR_VOL_MASK,
 289                 0,
 290                 out_dac_tlv),
 291
 292         SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
 293         SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
 294
 295         SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
 296                 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
 297                 out_sidetone_tlv),
 298         SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
 299                 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
 300                 out_sidetone_tlv),
 301
 302         SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
 303                 WM8991_ADC_HPF_ENA_BIT, 1, 0),
 304
 305         SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
 306
 307         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
 308                 WM8991_LEFT_ADC_DIGITAL_VOLUME,
 309                 WM8991_ADCL_VOL_SHIFT,
 310                 WM8991_ADCL_VOL_MASK,
 311                 0,
 312                 in_adc_tlv),
 313
 314         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
 315                 WM8991_RIGHT_ADC_DIGITAL_VOLUME,
 316                 WM8991_ADCR_VOL_SHIFT,
 317                 WM8991_ADCR_VOL_MASK,
 318                 0,
 319                 in_adc_tlv),
 320
 321         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
 322                 WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 323                 WM8991_LIN12VOL_SHIFT,
 324                 WM8991_LIN12VOL_MASK,
 325                 0,
 326                 in_pga_tlv),
 327
 328         SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 329                 WM8991_LI12ZC_BIT, 1, 0),
 330
 331         SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 332                 WM8991_LI12MUTE_BIT, 1, 0),
 333
 334         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
 335                 WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 336                 WM8991_LIN34VOL_SHIFT,
 337                 WM8991_LIN34VOL_MASK,
 338                 0,
 339                 in_pga_tlv),
 340
 341         SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 342                 WM8991_LI34ZC_BIT, 1, 0),
 343
 344         SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 345                 WM8991_LI34MUTE_BIT, 1, 0),
 346
 347         SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
 348                 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 349                 WM8991_RIN12VOL_SHIFT,
 350                 WM8991_RIN12VOL_MASK,
 351                 0,
 352                 in_pga_tlv),
 353
 354         SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 355                 WM8991_RI12ZC_BIT, 1, 0),
 356
 357         SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 358                 WM8991_RI12MUTE_BIT, 1, 0),
 359
 360         SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
 361                 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 362                 WM8991_RIN34VOL_SHIFT,
 363                 WM8991_RIN34VOL_MASK,
 364                 0,
 365                 in_pga_tlv),
 366
 367         SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 368                 WM8991_RI34ZC_BIT, 1, 0),
 369
 370         SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 371                 WM8991_RI34MUTE_BIT, 1, 0),
 372 };
 373
 374 /*
 375  * _DAPM_ Controls
 376  */
 377 static int inmixer_event(struct snd_soc_dapm_widget *w,
 378                          struct snd_kcontrol *kcontrol, int event)
 379 {
 380         u16 reg, fakepower;
 381
 382         reg = snd_soc_read(w->codec, WM8991_POWER_MANAGEMENT_2);
 383         fakepower = snd_soc_read(w->codec, WM8991_INTDRIVBITS);
 384
 385         if (fakepower & ((1 << WM8991_INMIXL_PWR_BIT) |
 386                          (1 << WM8991_AINLMUX_PWR_BIT)))
 387                 reg |= WM8991_AINL_ENA;
 388         else
 389                 reg &= ~WM8991_AINL_ENA;
 390
 391         if (fakepower & ((1 << WM8991_INMIXR_PWR_BIT) |
 392                          (1 << WM8991_AINRMUX_PWR_BIT)))
 393                 reg |= WM8991_AINR_ENA;
 394         else
 395                 reg &= ~WM8991_AINR_ENA;
 396
 397         snd_soc_write(w->codec, WM8991_POWER_MANAGEMENT_2, reg);
 398         return 0;
 399 }
 400
 401 static int outmixer_event(struct snd_soc_dapm_widget *w,
 402                           struct snd_kcontrol *kcontrol, int event)
 403 {
 404         u32 reg_shift = kcontrol->private_value & 0xfff;
 405         int ret = 0;
 406         u16 reg;
 407
 408         switch (reg_shift) {
 409         case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
 410                 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1);
 411                 if (reg & WM8991_LDLO) {
 412                         printk(KERN_WARNING
 413                                "Cannot set as Output Mixer 1 LDLO Set\n");
 414                         ret = -1;
 415                 }
 416                 break;
 417
 418         case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
 419                 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2);
 420                 if (reg & WM8991_RDRO) {
 421                         printk(KERN_WARNING
 422                                "Cannot set as Output Mixer 2 RDRO Set\n");
 423                         ret = -1;
 424                 }
 425                 break;
 426
 427         case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
 428                 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
 429                 if (reg & WM8991_LDSPK) {
 430                         printk(KERN_WARNING
 431                                "Cannot set as Speaker Mixer LDSPK Set\n");
 432                         ret = -1;
 433                 }
 434                 break;
 435
 436         case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
 437                 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER);
 438                 if (reg & WM8991_RDSPK) {
 439                         printk(KERN_WARNING
 440                                "Cannot set as Speaker Mixer RDSPK Set\n");
 441                         ret = -1;
 442                 }
 443                 break;
 444         }
 445
 446         return ret;
 447 }
 448
 449 /* INMIX dB values */
 450 static const unsigned int in_mix_tlv[] = {
 451         TLV_DB_RANGE_HEAD(1),
 452         0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
 453 };
 454
 455 /* Left In PGA Connections */
 456 static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
 457         SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
 458         SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
 459 };
 460
 461 static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
 462         SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
 463         SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
 464 };
 465
 466 /* Right In PGA Connections */
 467 static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
 468         SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
 469         SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
 470 };
 471
 472 static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
 473         SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
 474         SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
 475 };
 476
 477 /* INMIXL */
 478 static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
 479         SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
 480                 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
 481         SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
 482                 7, 0, in_mix_tlv),
 483         SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
 484                 1, 0),
 485         SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
 486                 1, 0),
 487 };
 488
 489 /* INMIXR */
 490 static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
 491         SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
 492                 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
 493         SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
 494                 7, 0, in_mix_tlv),
 495         SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
 496                 1, 0),
 497         SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
 498                 1, 0),
 499 };
 500
 501 /* AINLMUX */
 502 static const char *wm8991_ainlmux[] =
 503 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
 504
 505 static const struct soc_enum wm8991_ainlmux_enum =
 506         SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
 507                         ARRAY_SIZE(wm8991_ainlmux), wm8991_ainlmux);
 508
 509 static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
 510         SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
 511
 512 /* DIFFINL */
 513
 514 /* AINRMUX */
 515 static const char *wm8991_ainrmux[] =
 516 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
 517
 518 static const struct soc_enum wm8991_ainrmux_enum =
 519         SOC_ENUM_SINGLE(WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
 520                         ARRAY_SIZE(wm8991_ainrmux), wm8991_ainrmux);
 521
 522 static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
 523         SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
 524
 525 /* RXVOICE */
 526 static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
 527         SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
 528                 WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
 529         SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
 530                 WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
 531 };
 532
 533 /* LOMIX */
 534 static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
 535         SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
 536                 WM8991_LRBLO_BIT, 1, 0),
 537         SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
 538                 WM8991_LLBLO_BIT, 1, 0),
 539         SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
 540                 WM8991_LRI3LO_BIT, 1, 0),
 541         SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
 542                 WM8991_LLI3LO_BIT, 1, 0),
 543         SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
 544                 WM8991_LR12LO_BIT, 1, 0),
 545         SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
 546                 WM8991_LL12LO_BIT, 1, 0),
 547         SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
 548                 WM8991_LDLO_BIT, 1, 0),
 549 };
 550
 551 /* ROMIX */
 552 static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
 553         SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
 554                 WM8991_RLBRO_BIT, 1, 0),
 555         SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
 556                 WM8991_RRBRO_BIT, 1, 0),
 557         SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
 558                 WM8991_RLI3RO_BIT, 1, 0),
 559         SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
 560                 WM8991_RRI3RO_BIT, 1, 0),
 561         SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
 562                 WM8991_RL12RO_BIT, 1, 0),
 563         SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
 564                 WM8991_RR12RO_BIT, 1, 0),
 565         SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
 566                 WM8991_RDRO_BIT, 1, 0),
 567 };
 568
 569 /* LONMIX */
 570 static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
 571         SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
 572                 WM8991_LLOPGALON_BIT, 1, 0),
 573         SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
 574                 WM8991_LROPGALON_BIT, 1, 0),
 575         SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
 576                 WM8991_LOPLON_BIT, 1, 0),
 577 };
 578
 579 /* LOPMIX */
 580 static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
 581         SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
 582                 WM8991_LR12LOP_BIT, 1, 0),
 583         SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
 584                 WM8991_LL12LOP_BIT, 1, 0),
 585         SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
 586                 WM8991_LLOPGALOP_BIT, 1, 0),
 587 };
 588
 589 /* RONMIX */
 590 static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
 591         SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
 592                 WM8991_RROPGARON_BIT, 1, 0),
 593         SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
 594                 WM8991_RLOPGARON_BIT, 1, 0),
 595         SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
 596                 WM8991_ROPRON_BIT, 1, 0),
 597 };
 598
 599 /* ROPMIX */
 600 static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
 601         SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
 602                 WM8991_RL12ROP_BIT, 1, 0),
 603         SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
 604                 WM8991_RR12ROP_BIT, 1, 0),
 605         SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
 606                 WM8991_RROPGAROP_BIT, 1, 0),
 607 };
 608
 609 /* OUT3MIX */
 610 static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
 611         SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
 612                 WM8991_LI4O3_BIT, 1, 0),
 613         SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
 614                 WM8991_LPGAO3_BIT, 1, 0),
 615 };
 616
 617 /* OUT4MIX */
 618 static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
 619         SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
 620                 WM8991_RPGAO4_BIT, 1, 0),
 621         SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
 622                 WM8991_RI4O4_BIT, 1, 0),
 623 };
 624
 625 /* SPKMIX */
 626 static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
 627         SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
 628                 WM8991_LI2SPK_BIT, 1, 0),
 629         SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
 630                 WM8991_LB2SPK_BIT, 1, 0),
 631         SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
 632                 WM8991_LOPGASPK_BIT, 1, 0),
 633         SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
 634                 WM8991_LDSPK_BIT, 1, 0),
 635         SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
 636                 WM8991_RDSPK_BIT, 1, 0),
 637         SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
 638                 WM8991_ROPGASPK_BIT, 1, 0),
 639         SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
 640                 WM8991_RL12ROP_BIT, 1, 0),
 641         SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
 642                 WM8991_RI2SPK_BIT, 1, 0),
 643 };
 644
 645 static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
 646         /* Input Side */
 647         /* Input Lines */
 648         SND_SOC_DAPM_INPUT("LIN1"),
 649         SND_SOC_DAPM_INPUT("LIN2"),
 650         SND_SOC_DAPM_INPUT("LIN3"),
 651         SND_SOC_DAPM_INPUT("LIN4RXN"),
 652         SND_SOC_DAPM_INPUT("RIN3"),
 653         SND_SOC_DAPM_INPUT("RIN4RXP"),
 654         SND_SOC_DAPM_INPUT("RIN1"),
 655         SND_SOC_DAPM_INPUT("RIN2"),
 656         SND_SOC_DAPM_INPUT("Internal ADC Source"),
 657
 658         /* DACs */
 659         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
 660                 WM8991_ADCL_ENA_BIT, 0),
 661         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
 662                 WM8991_ADCR_ENA_BIT, 0),
 663
 664         /* Input PGAs */
 665         SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
 666                 0, &wm8991_dapm_lin12_pga_controls[0],
 667                 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
 668         SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
 669                 0, &wm8991_dapm_lin34_pga_controls[0],
 670                 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
 671         SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
 672                 0, &wm8991_dapm_rin12_pga_controls[0],
 673                 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
 674         SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
 675                 0, &wm8991_dapm_rin34_pga_controls[0],
 676                 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
 677
 678         /* INMIXL */
 679         SND_SOC_DAPM_MIXER_E("INMIXL", WM8991_INTDRIVBITS, WM8991_INMIXL_PWR_BIT, 0,
 680                 &wm8991_dapm_inmixl_controls[0],
 681                 ARRAY_SIZE(wm8991_dapm_inmixl_controls),
 682                 inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 683
 684         /* AINLMUX */
 685         SND_SOC_DAPM_MUX_E("AINLMUX", WM8991_INTDRIVBITS, WM8991_AINLMUX_PWR_BIT, 0,
 686                 &wm8991_dapm_ainlmux_controls, inmixer_event,
 687                 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 688
 689         /* INMIXR */
 690         SND_SOC_DAPM_MIXER_E("INMIXR", WM8991_INTDRIVBITS, WM8991_INMIXR_PWR_BIT, 0,
 691                 &wm8991_dapm_inmixr_controls[0],
 692                 ARRAY_SIZE(wm8991_dapm_inmixr_controls),
 693                 inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 694
 695         /* AINRMUX */
 696         SND_SOC_DAPM_MUX_E("AINRMUX", WM8991_INTDRIVBITS, WM8991_AINRMUX_PWR_BIT, 0,
 697                 &wm8991_dapm_ainrmux_controls, inmixer_event,
 698                 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 699
 700         /* Output Side */
 701         /* DACs */
 702         SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
 703                 WM8991_DACL_ENA_BIT, 0),
 704         SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
 705                 WM8991_DACR_ENA_BIT, 0),
 706
 707         /* LOMIX */
 708         SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
 709                 0, &wm8991_dapm_lomix_controls[0],
 710                 ARRAY_SIZE(wm8991_dapm_lomix_controls),
 711                 outmixer_event, SND_SOC_DAPM_PRE_REG),
 712
 713         /* LONMIX */
 714         SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
 715                 &wm8991_dapm_lonmix_controls[0],
 716                 ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
 717
 718         /* LOPMIX */
 719         SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
 720                 &wm8991_dapm_lopmix_controls[0],
 721                 ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
 722
 723         /* OUT3MIX */
 724         SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
 725                 &wm8991_dapm_out3mix_controls[0],
 726                 ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
 727
 728         /* SPKMIX */
 729         SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
 730                 &wm8991_dapm_spkmix_controls[0],
 731                 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
 732                 SND_SOC_DAPM_PRE_REG),
 733
 734         /* OUT4MIX */
 735         SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
 736                 &wm8991_dapm_out4mix_controls[0],
 737                 ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
 738
 739         /* ROPMIX */
 740         SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
 741                 &wm8991_dapm_ropmix_controls[0],
 742                 ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
 743
 744         /* RONMIX */
 745         SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
 746                 &wm8991_dapm_ronmix_controls[0],
 747                 ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
 748
 749         /* ROMIX */
 750         SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
 751                 0, &wm8991_dapm_romix_controls[0],
 752                 ARRAY_SIZE(wm8991_dapm_romix_controls),
 753                 outmixer_event, SND_SOC_DAPM_PRE_REG),
 754
 755         /* LOUT PGA */
 756         SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
 757                 NULL, 0),
 758
 759         /* ROUT PGA */
 760         SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
 761                 NULL, 0),
 762
 763         /* LOPGA */
 764         SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
 765                 NULL, 0),
 766
 767         /* ROPGA */
 768         SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
 769                 NULL, 0),
 770
 771         /* MICBIAS */
 772         SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1,
 773                             WM8991_MICBIAS_ENA_BIT, 0, NULL, 0),
 774
 775         SND_SOC_DAPM_OUTPUT("LON"),
 776         SND_SOC_DAPM_OUTPUT("LOP"),
 777         SND_SOC_DAPM_OUTPUT("OUT3"),
 778         SND_SOC_DAPM_OUTPUT("LOUT"),
 779         SND_SOC_DAPM_OUTPUT("SPKN"),
 780         SND_SOC_DAPM_OUTPUT("SPKP"),
 781         SND_SOC_DAPM_OUTPUT("ROUT"),
 782         SND_SOC_DAPM_OUTPUT("OUT4"),
 783         SND_SOC_DAPM_OUTPUT("ROP"),
 784         SND_SOC_DAPM_OUTPUT("RON"),
 785         SND_SOC_DAPM_OUTPUT("OUT"),
 786
 787         SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
 788 };
 789
 790 static const struct snd_soc_dapm_route audio_map[] = {
 791         /* Make DACs turn on when playing even if not mixed into any outputs */
 792         {"Internal DAC Sink", NULL, "Left DAC"},
 793         {"Internal DAC Sink", NULL, "Right DAC"},
 794
 795         /* Make ADCs turn on when recording even if not mixed from any inputs */
 796         {"Left ADC", NULL, "Internal ADC Source"},
 797         {"Right ADC", NULL, "Internal ADC Source"},
 798
 799         /* Input Side */
 800         /* LIN12 PGA */
 801         {"LIN12 PGA", "LIN1 Switch", "LIN1"},
 802         {"LIN12 PGA", "LIN2 Switch", "LIN2"},
 803         /* LIN34 PGA */
 804         {"LIN34 PGA", "LIN3 Switch", "LIN3"},
 805         {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
 806         /* INMIXL */
 807         {"INMIXL", "Record Left Volume", "LOMIX"},
 808         {"INMIXL", "LIN2 Volume", "LIN2"},
 809         {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
 810         {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
 811         /* AINLMUX */
 812         {"AINLMUX", "INMIXL Mix", "INMIXL"},
 813         {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
 814         {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
 815         {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
 816         {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
 817         /* ADC */
 818         {"Left ADC", NULL, "AINLMUX"},
 819
 820         /* RIN12 PGA */
 821         {"RIN12 PGA", "RIN1 Switch", "RIN1"},
 822         {"RIN12 PGA", "RIN2 Switch", "RIN2"},
 823         /* RIN34 PGA */
 824         {"RIN34 PGA", "RIN3 Switch", "RIN3"},
 825         {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
 826         /* INMIXL */
 827         {"INMIXR", "Record Right Volume", "ROMIX"},
 828         {"INMIXR", "RIN2 Volume", "RIN2"},
 829         {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
 830         {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
 831         /* AINRMUX */
 832         {"AINRMUX", "INMIXR Mix", "INMIXR"},
 833         {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
 834         {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
 835         {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
 836         {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
 837         /* ADC */
 838         {"Right ADC", NULL, "AINRMUX"},
 839
 840         /* LOMIX */
 841         {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
 842         {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
 843         {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
 844         {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
 845         {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
 846         {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
 847         {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
 848
 849         /* ROMIX */
 850         {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
 851         {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
 852         {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
 853         {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
 854         {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
 855         {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
 856         {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
 857
 858         /* SPKMIX */
 859         {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
 860         {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
 861         {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
 862         {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
 863         {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
 864         {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
 865         {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
 866         {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
 867
 868         /* LONMIX */
 869         {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
 870         {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
 871         {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
 872
 873         /* LOPMIX */
 874         {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
 875         {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
 876         {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
 877
 878         /* OUT3MIX */
 879         {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
 880         {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
 881
 882         /* OUT4MIX */
 883         {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
 884         {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
 885
 886         /* RONMIX */
 887         {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
 888         {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
 889         {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
 890
 891         /* ROPMIX */
 892         {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
 893         {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
 894         {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
 895
 896         /* Out Mixer PGAs */
 897         {"LOPGA", NULL, "LOMIX"},
 898         {"ROPGA", NULL, "ROMIX"},
 899
 900         {"LOUT PGA", NULL, "LOMIX"},
 901         {"ROUT PGA", NULL, "ROMIX"},
 902
 903         /* Output Pins */
 904         {"LON", NULL, "LONMIX"},
 905         {"LOP", NULL, "LOPMIX"},
 906         {"OUT", NULL, "OUT3MIX"},
 907         {"LOUT", NULL, "LOUT PGA"},
 908         {"SPKN", NULL, "SPKMIX"},
 909         {"ROUT", NULL, "ROUT PGA"},
 910         {"OUT4", NULL, "OUT4MIX"},
 911         {"ROP", NULL, "ROPMIX"},
 912         {"RON", NULL, "RONMIX"},
 913 };
 914
 915 /* PLL divisors */
 916 struct _pll_div {
 917         u32 div2;
 918         u32 n;
 919         u32 k;
 920 };
 921
 922 /* The size in bits of the pll divide multiplied by 10
 923  * to allow rounding later */
 924 #define FIXED_PLL_SIZE ((1 << 16) * 10)
 925
 926 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
 927                         unsigned int source)
 928 {
 929         u64 Kpart;
 930         unsigned int K, Ndiv, Nmod;
 931
 932
 933         Ndiv = target / source;
 934         if (Ndiv < 6) {
 935                 source >>= 1;
 936                 pll_div->div2 = 1;
 937                 Ndiv = target / source;
 938         } else
 939                 pll_div->div2 = 0;
 940
 941         if ((Ndiv < 6) || (Ndiv > 12))
 942                 printk(KERN_WARNING
 943                        "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
 944
 945         pll_div->n = Ndiv;
 946         Nmod = target % source;
 947         Kpart = FIXED_PLL_SIZE * (long long)Nmod;
 948
 949         do_div(Kpart, source);
 950
 951         K = Kpart & 0xFFFFFFFF;
 952
 953         /* Check if we need to round */
 954         if ((K % 10) >= 5)
 955                 K += 5;
 956
 957         /* Move down to proper range now rounding is done */
 958         K /= 10;
 959
 960         pll_div->k = K;
 961 }
 962
 963 static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
 964                               int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
 965 {
 966         u16 reg;
 967         struct snd_soc_codec *codec = codec_dai->codec;
 968         struct _pll_div pll_div;
 969
 970         if (freq_in && freq_out) {
 971                 pll_factors(&pll_div, freq_out * 4, freq_in);
 972
 973                 /* Turn on PLL */
 974                 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
 975                 reg |= WM8991_PLL_ENA;
 976                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
 977
 978                 /* sysclk comes from PLL */
 979                 reg = snd_soc_read(codec, WM8991_CLOCKING_2);
 980                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
 981
 982                 /* set up N , fractional mode and pre-divisor if necessary */
 983                 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
 984                               (pll_div.div2 ? WM8991_PRESCALE : 0));
 985                 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
 986                 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
 987         } else {
 988                 /* Turn on PLL */
 989                 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
 990                 reg &= ~WM8991_PLL_ENA;
 991                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
 992         }
 993         return 0;
 994 }
 995
 996 /*
 997  * Set's ADC and Voice DAC format.
 998  */
 999 static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
1000                               unsigned int fmt)
1001 {
1002         struct snd_soc_codec *codec = codec_dai->codec;
1003         u16 audio1, audio3;
1004
1005         audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1006         audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
1007
1008         /* set master/slave audio interface */
1009         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1010         case SND_SOC_DAIFMT_CBS_CFS:
1011                 audio3 &= ~WM8991_AIF_MSTR1;
1012                 break;
1013         case SND_SOC_DAIFMT_CBM_CFM:
1014                 audio3 |= WM8991_AIF_MSTR1;
1015                 break;
1016         default:
1017                 return -EINVAL;
1018         }
1019
1020         audio1 &= ~WM8991_AIF_FMT_MASK;
1021
1022         /* interface format */
1023         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1024         case SND_SOC_DAIFMT_I2S:
1025                 audio1 |= WM8991_AIF_TMF_I2S;
1026                 audio1 &= ~WM8991_AIF_LRCLK_INV;
1027                 break;
1028         case SND_SOC_DAIFMT_RIGHT_J:
1029                 audio1 |= WM8991_AIF_TMF_RIGHTJ;
1030                 audio1 &= ~WM8991_AIF_LRCLK_INV;
1031                 break;
1032         case SND_SOC_DAIFMT_LEFT_J:
1033                 audio1 |= WM8991_AIF_TMF_LEFTJ;
1034                 audio1 &= ~WM8991_AIF_LRCLK_INV;
1035                 break;
1036         case SND_SOC_DAIFMT_DSP_A:
1037                 audio1 |= WM8991_AIF_TMF_DSP;
1038                 audio1 &= ~WM8991_AIF_LRCLK_INV;
1039                 break;
1040         case SND_SOC_DAIFMT_DSP_B:
1041                 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1042                 break;
1043         default:
1044                 return -EINVAL;
1045         }
1046
1047         snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1048         snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1049         return 0;
1050 }
1051
1052 static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1053                                  int div_id, int div)
1054 {
1055         struct snd_soc_codec *codec = codec_dai->codec;
1056         u16 reg;
1057
1058         switch (div_id) {
1059         case WM8991_MCLK_DIV:
1060                 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1061                       ~WM8991_MCLK_DIV_MASK;
1062                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1063                 break;
1064         case WM8991_DACCLK_DIV:
1065                 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1066                       ~WM8991_DAC_CLKDIV_MASK;
1067                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1068                 break;
1069         case WM8991_ADCCLK_DIV:
1070                 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1071                       ~WM8991_ADC_CLKDIV_MASK;
1072                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1073                 break;
1074         case WM8991_BCLK_DIV:
1075                 reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1076                       ~WM8991_BCLK_DIV_MASK;
1077                 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1078                 break;
1079         default:
1080                 return -EINVAL;
1081         }
1082
1083         return 0;
1084 }
1085
1086 /*
1087  * Set PCM DAI bit size and sample rate.
1088  */
1089 static int wm8991_hw_params(struct snd_pcm_substream *substream,
1090                             struct snd_pcm_hw_params *params,
1091                             struct snd_soc_dai *dai)
1092 {
1093         struct snd_soc_codec *codec = dai->codec;
1094         u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1095
1096         audio1 &= ~WM8991_AIF_WL_MASK;
1097         /* bit size */
1098         switch (params_format(params)) {
1099         case SNDRV_PCM_FORMAT_S16_LE:
1100                 break;
1101         case SNDRV_PCM_FORMAT_S20_3LE:
1102                 audio1 |= WM8991_AIF_WL_20BITS;
1103                 break;
1104         case SNDRV_PCM_FORMAT_S24_LE:
1105                 audio1 |= WM8991_AIF_WL_24BITS;
1106                 break;
1107         case SNDRV_PCM_FORMAT_S32_LE:
1108                 audio1 |= WM8991_AIF_WL_32BITS;
1109                 break;
1110         }
1111
1112         snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1113         return 0;
1114 }
1115
1116 static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1117 {
1118         struct snd_soc_codec *codec = dai->codec;
1119         u16 val;
1120
1121         val  = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1122         if (mute)
1123                 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1124         else
1125                 snd_soc_write(codec, WM8991_DAC_CTRL, val);
1126         return 0;
1127 }
1128
1129 static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1130                                  enum snd_soc_bias_level level)
1131 {
1132         u16 val;
1133
1134         switch (level) {
1135         case SND_SOC_BIAS_ON:
1136                 break;
1137
1138         case SND_SOC_BIAS_PREPARE:
1139                 /* VMID=2*50k */
1140                 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1141                       ~WM8991_VMID_MODE_MASK;
1142                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1143                 break;
1144
1145         case SND_SOC_BIAS_STANDBY:
1146                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1147                         snd_soc_cache_sync(codec);
1148                         /* Enable all output discharge bits */
1149                         snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1150                                       WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1151                                       WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1152                                       WM8991_DIS_ROUT);
1153
1154                         /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1155                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1156                                       WM8991_BUFDCOPEN | WM8991_POBCTRL |
1157                                       WM8991_VMIDTOG);
1158
1159                         /* Delay to allow output caps to discharge */
1160                         msleep(300);
1161
1162                         /* Disable VMIDTOG */
1163                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1164                                       WM8991_BUFDCOPEN | WM8991_POBCTRL);
1165
1166                         /* disable all output discharge bits */
1167                         snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1168
1169                         /* Enable outputs */
1170                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1171
1172                         msleep(50);
1173
1174                         /* Enable VMID at 2x50k */
1175                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1176
1177                         msleep(100);
1178
1179                         /* Enable VREF */
1180                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1181
1182                         msleep(600);
1183
1184                         /* Enable BUFIOEN */
1185                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1186                                       WM8991_BUFDCOPEN | WM8991_POBCTRL |
1187                                       WM8991_BUFIOEN);
1188
1189                         /* Disable outputs */
1190                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1191
1192                         /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1193                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1194                 }
1195
1196                 /* VMID=2*250k */
1197                 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1198                       ~WM8991_VMID_MODE_MASK;
1199                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1200                 break;
1201
1202         case SND_SOC_BIAS_OFF:
1203                 /* Enable POBCTRL and SOFT_ST */
1204                 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1205                               WM8991_POBCTRL | WM8991_BUFIOEN);
1206
1207                 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1208                 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1209                               WM8991_BUFDCOPEN | WM8991_POBCTRL |
1210                               WM8991_BUFIOEN);
1211
1212                 /* mute DAC */
1213                 val = snd_soc_read(codec, WM8991_DAC_CTRL);
1214                 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1215
1216                 /* Enable any disabled outputs */
1217                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1218
1219                 /* Disable VMID */
1220                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1221
1222                 msleep(300);
1223
1224                 /* Enable all output discharge bits */
1225                 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1226                               WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1227                               WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1228                               WM8991_DIS_ROUT);
1229
1230                 /* Disable VREF */
1231                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1232
1233                 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1234                 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
1235                 codec->cache_sync = 1;
1236                 break;
1237         }
1238
1239         codec->dapm.bias_level = level;
1240         return 0;
1241 }
1242
1243 static int wm8991_suspend(struct snd_soc_codec *codec)
1244 {
1245         wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1246         return 0;
1247 }
1248
1249 static int wm8991_resume(struct snd_soc_codec *codec)
1250 {
1251         wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1252         return 0;
1253 }
1254
1255 /* power down chip */
1256 static int wm8991_remove(struct snd_soc_codec *codec)
1257 {
1258         wm8991_set_bias_level(codec, SND_SOC_BIAS_OFF);
1259         return 0;
1260 }
1261
1262 static int wm8991_probe(struct snd_soc_codec *codec)
1263 {
1264         struct wm8991_priv *wm8991;
1265         int ret;
1266
1267         wm8991 = snd_soc_codec_get_drvdata(codec);
1268
1269         ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type);
1270         if (ret < 0) {
1271                 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1272                 return ret;
1273         }
1274
1275         ret = wm8991_reset(codec);
1276         if (ret < 0) {
1277                 dev_err(codec->dev, "Failed to issue reset\n");
1278                 return ret;
1279         }
1280
1281         wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1282
1283         snd_soc_update_bits(codec, WM8991_AUDIO_INTERFACE_4,
1284                             WM8991_ALRCGPIO1, WM8991_ALRCGPIO1);
1285
1286         snd_soc_update_bits(codec, WM8991_GPIO1_GPIO2,
1287                             WM8991_GPIO1_SEL_MASK, 1);
1288
1289         snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_1,
1290                             WM8991_VREF_ENA | WM8991_VMID_MODE_MASK,
1291                             WM8991_VREF_ENA | WM8991_VMID_MODE_MASK);
1292
1293         snd_soc_update_bits(codec, WM8991_POWER_MANAGEMENT_2,
1294                             WM8991_OPCLK_ENA, WM8991_OPCLK_ENA);
1295
1296         snd_soc_write(codec, WM8991_DAC_CTRL, 0);
1297         snd_soc_write(codec, WM8991_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
1298         snd_soc_write(codec, WM8991_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
1299
1300         snd_soc_add_codec_controls(codec, wm8991_snd_controls,
1301                              ARRAY_SIZE(wm8991_snd_controls));
1302
1303         snd_soc_dapm_new_controls(&codec->dapm, wm8991_dapm_widgets,
1304                                   ARRAY_SIZE(wm8991_dapm_widgets));
1305         snd_soc_dapm_add_routes(&codec->dapm, audio_map,
1306                                 ARRAY_SIZE(audio_map));
1307         return 0;
1308 }
1309
1310 #define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1311                         SNDRV_PCM_FMTBIT_S24_LE)
1312
1313 static const struct snd_soc_dai_ops wm8991_ops = {
1314         .hw_params = wm8991_hw_params,
1315         .digital_mute = wm8991_mute,
1316         .set_fmt = wm8991_set_dai_fmt,
1317         .set_clkdiv = wm8991_set_dai_clkdiv,
1318         .set_pll = wm8991_set_dai_pll
1319 };
1320
1321 /*
1322  * The WM8991 supports 2 different and mutually exclusive DAI
1323  * configurations.
1324  *
1325  * 1. ADC/DAC on Primary Interface
1326  * 2. ADC on Primary Interface/DAC on secondary
1327  */
1328 static struct snd_soc_dai_driver wm8991_dai = {
1329         /* ADC/DAC on primary */
1330         .name = "wm8991",
1331         .id = 1,
1332         .playback = {
1333                 .stream_name = "Playback",
1334                 .channels_min = 1,
1335                 .channels_max = 2,
1336                 .rates = SNDRV_PCM_RATE_8000_96000,
1337                 .formats = WM8991_FORMATS
1338         },
1339         .capture = {
1340                 .stream_name = "Capture",
1341                 .channels_min = 1,
1342                 .channels_max = 2,
1343                 .rates = SNDRV_PCM_RATE_8000_96000,
1344                 .formats = WM8991_FORMATS
1345         },
1346         .ops = &wm8991_ops
1347 };
1348
1349 static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1350         .probe = wm8991_probe,
1351         .remove = wm8991_remove,
1352         .suspend = wm8991_suspend,
1353         .resume = wm8991_resume,
1354         .set_bias_level = wm8991_set_bias_level,
1355         .reg_cache_size = WM8991_MAX_REGISTER + 1,
1356         .reg_word_size = sizeof(u16),
1357         .reg_cache_default = wm8991_reg_defs
1358 };
1359
1360 static int wm8991_i2c_probe(struct i2c_client *i2c,
1361                             const struct i2c_device_id *id)
1362 {
1363         struct wm8991_priv *wm8991;
1364         int ret;
1365
1366         wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL);
1367         if (!wm8991)
1368                 return -ENOMEM;
1369
1370         wm8991->control_type = SND_SOC_I2C;
1371         i2c_set_clientdata(i2c, wm8991);
1372
1373         ret = snd_soc_register_codec(&i2c->dev,
1374                                      &soc_codec_dev_wm8991, &wm8991_dai, 1);
1375
1376         return ret;
1377 }
1378
1379 static int wm8991_i2c_remove(struct i2c_client *client)
1380 {
1381         snd_soc_unregister_codec(&client->dev);
1382
1383         return 0;
1384 }
1385
1386 static const struct i2c_device_id wm8991_i2c_id[] = {
1387         { "wm8991", 0 },
1388         { }
1389 };
1390 MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1391
1392 static struct i2c_driver wm8991_i2c_driver = {
1393         .driver = {
1394                 .name = "wm8991",
1395                 .owner = THIS_MODULE,
1396         },
1397         .probe = wm8991_i2c_probe,
1398         .remove = wm8991_i2c_remove,
1399         .id_table = wm8991_i2c_id,
1400 };
1401
1402 module_i2c_driver(wm8991_i2c_driver);
1403
1404 MODULE_DESCRIPTION("ASoC WM8991 driver");
1405 MODULE_AUTHOR("Graeme Gregory");
1406 MODULE_LICENSE("GPL");