2 * imx-ssi.c -- ALSA Soc Audio Layer
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 * sane processor vendors have a FIFO per AC97 slot, the i.MX has only
17 * one FIFO which combines all valid receive slots. We cannot even select
18 * which slots we want to receive. The WM9712 with which this driver
19 * was developed with always sends GPIO status data in slot 12 which
20 * we receive in our (PCM-) data stream. The only chance we have is to
21 * manually skip this data in the FIQ handler. With sampling rates different
22 * from 48000Hz not every frame has valid receive data, so the ratio
23 * between pcm data and GPIO status data changes. Our FIQ handler is not
24 * able to handle this, hence this driver only works with 48000Hz sampling
26 * Reading and writing AC97 registers is another challenge. The core
27 * provides us status bits when the read register is updated with *another*
28 * value. When we read the same register two times (and the register still
29 * contains the same value) these status bits are not set. We work
30 * around this by not polling these bits but only wait a fixed delay.
34 #include <linux/clk.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/init.h>
39 #include <linux/interrupt.h>
40 #include <linux/module.h>
41 #include <linux/platform_device.h>
42 #include <linux/slab.h>
44 #include <sound/core.h>
45 #include <sound/initval.h>
46 #include <sound/pcm.h>
47 #include <sound/pcm_params.h>
48 #include <sound/soc.h>
51 #include <mach/hardware.h>
55 #define SSI_SACNT_DEFAULT (SSI_SACNT_AC97EN | SSI_SACNT_FV)
58 * SSI Network Mode or TDM slots configuration.
59 * Should only be called when port is inactive (i.e. SSIEN = 0).
61 static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
62 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
64 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
67 sccr = readl(ssi->base + SSI_STCCR);
68 sccr &= ~SSI_STCCR_DC_MASK;
69 sccr |= SSI_STCCR_DC(slots - 1);
70 writel(sccr, ssi->base + SSI_STCCR);
72 sccr = readl(ssi->base + SSI_SRCCR);
73 sccr &= ~SSI_STCCR_DC_MASK;
74 sccr |= SSI_STCCR_DC(slots - 1);
75 writel(sccr, ssi->base + SSI_SRCCR);
77 writel(tx_mask, ssi->base + SSI_STMSK);
78 writel(rx_mask, ssi->base + SSI_SRMSK);
84 * SSI DAI format configuration.
85 * Should only be called when port is inactive (i.e. SSIEN = 0).
87 static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
89 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
92 scr = readl(ssi->base + SSI_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET);
95 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
96 case SND_SOC_DAIFMT_I2S:
97 /* data on rising edge of bclk, frame low 1clk before data */
98 strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
100 if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
101 scr &= ~SSI_I2S_MODE_MASK;
102 scr |= SSI_SCR_I2S_MODE_SLAVE;
105 case SND_SOC_DAIFMT_LEFT_J:
106 /* data on rising edge of bclk, frame high with data */
107 strcr |= SSI_STCR_TXBIT0;
109 case SND_SOC_DAIFMT_DSP_B:
110 /* data on rising edge of bclk, frame high with data */
111 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0;
113 case SND_SOC_DAIFMT_DSP_A:
114 /* data on rising edge of bclk, frame high 1clk before data */
115 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
119 /* DAI clock inversion */
120 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
121 case SND_SOC_DAIFMT_IB_IF:
122 strcr |= SSI_STCR_TFSI;
123 strcr &= ~SSI_STCR_TSCKP;
125 case SND_SOC_DAIFMT_IB_NF:
126 strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI);
128 case SND_SOC_DAIFMT_NB_IF:
129 strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP;
131 case SND_SOC_DAIFMT_NB_NF:
132 strcr &= ~SSI_STCR_TFSI;
133 strcr |= SSI_STCR_TSCKP;
137 /* DAI clock master masks */
138 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
139 case SND_SOC_DAIFMT_CBM_CFM:
140 scr &= ~SSI_I2S_MODE_MASK;
143 /* Master mode not implemented, needs handling of clocks. */
147 strcr |= SSI_STCR_TFEN0;
149 if (ssi->flags & IMX_SSI_NET)
151 if (ssi->flags & IMX_SSI_SYN)
154 writel(strcr, ssi->base + SSI_STCR);
155 writel(strcr, ssi->base + SSI_SRCR);
156 writel(scr, ssi->base + SSI_SCR);
162 * SSI system clock configuration.
163 * Should only be called when port is inactive (i.e. SSIEN = 0).
165 static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
166 int clk_id, unsigned int freq, int dir)
168 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
171 scr = readl(ssi->base + SSI_SCR);
174 case IMX_SSP_SYS_CLK:
175 if (dir == SND_SOC_CLOCK_OUT)
176 scr |= SSI_SCR_SYS_CLK_EN;
178 scr &= ~SSI_SCR_SYS_CLK_EN;
184 writel(scr, ssi->base + SSI_SCR);
191 * Should only be called when port is inactive (i.e. SSIEN = 0).
193 static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
196 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
199 stccr = readl(ssi->base + SSI_STCCR);
200 srccr = readl(ssi->base + SSI_SRCCR);
203 case IMX_SSI_TX_DIV_2:
204 stccr &= ~SSI_STCCR_DIV2;
207 case IMX_SSI_TX_DIV_PSR:
208 stccr &= ~SSI_STCCR_PSR;
211 case IMX_SSI_TX_DIV_PM:
213 stccr |= SSI_STCCR_PM(div);
215 case IMX_SSI_RX_DIV_2:
216 stccr &= ~SSI_STCCR_DIV2;
219 case IMX_SSI_RX_DIV_PSR:
220 stccr &= ~SSI_STCCR_PSR;
223 case IMX_SSI_RX_DIV_PM:
225 stccr |= SSI_STCCR_PM(div);
231 writel(stccr, ssi->base + SSI_STCCR);
232 writel(srccr, ssi->base + SSI_SRCCR);
237 static int imx_ssi_startup(struct snd_pcm_substream *substream,
238 struct snd_soc_dai *cpu_dai)
240 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
241 struct imx_pcm_dma_params *dma_data;
244 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
245 dma_data = &ssi->dma_params_tx;
247 dma_data = &ssi->dma_params_rx;
249 snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
255 * Should only be called when port is inactive (i.e. SSIEN = 0),
256 * although can be called multiple times by upper layers.
258 static int imx_ssi_hw_params(struct snd_pcm_substream *substream,
259 struct snd_pcm_hw_params *params,
260 struct snd_soc_dai *cpu_dai)
262 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
266 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
271 if (ssi->flags & IMX_SSI_SYN)
274 sccr = readl(ssi->base + reg) & ~SSI_STCCR_WL_MASK;
276 /* DAI data (word) size */
277 switch (params_format(params)) {
278 case SNDRV_PCM_FORMAT_S16_LE:
279 sccr |= SSI_SRCCR_WL(16);
281 case SNDRV_PCM_FORMAT_S20_3LE:
282 sccr |= SSI_SRCCR_WL(20);
284 case SNDRV_PCM_FORMAT_S24_LE:
285 sccr |= SSI_SRCCR_WL(24);
289 writel(sccr, ssi->base + reg);
294 static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
295 struct snd_soc_dai *dai)
297 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(dai);
298 unsigned int sier_bits, sier;
301 scr = readl(ssi->base + SSI_SCR);
302 sier = readl(ssi->base + SSI_SIER);
304 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
305 if (ssi->flags & IMX_SSI_DMA)
306 sier_bits = SSI_SIER_TDMAE | SSI_SIER_TIE | SSI_SIER_TUE0_EN;
308 sier_bits = SSI_SIER_TIE | SSI_SIER_TFE0_EN;
310 if (ssi->flags & IMX_SSI_DMA)
311 sier_bits = SSI_SIER_RDMAE | SSI_SIER_RIE | SSI_SIER_ROE0_EN;
313 sier_bits = SSI_SIER_RIE | SSI_SIER_RFF0_EN;
317 case SNDRV_PCM_TRIGGER_START:
318 case SNDRV_PCM_TRIGGER_RESUME:
319 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
320 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
326 if (++ssi->enabled == 1)
327 scr |= SSI_SCR_SSIEN;
331 case SNDRV_PCM_TRIGGER_STOP:
332 case SNDRV_PCM_TRIGGER_SUSPEND:
333 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
334 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
340 if (--ssi->enabled == 0)
341 scr &= ~SSI_SCR_SSIEN;
348 if (!(ssi->flags & IMX_SSI_USE_AC97))
349 /* rx/tx are always enabled to access ac97 registers */
350 writel(scr, ssi->base + SSI_SCR);
352 writel(sier, ssi->base + SSI_SIER);
357 static const struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = {
358 .startup = imx_ssi_startup,
359 .hw_params = imx_ssi_hw_params,
360 .set_fmt = imx_ssi_set_dai_fmt,
361 .set_clkdiv = imx_ssi_set_dai_clkdiv,
362 .set_sysclk = imx_ssi_set_dai_sysclk,
363 .set_tdm_slot = imx_ssi_set_dai_tdm_slot,
364 .trigger = imx_ssi_trigger,
367 static int imx_ssi_dai_probe(struct snd_soc_dai *dai)
369 struct imx_ssi *ssi = dev_get_drvdata(dai->dev);
372 snd_soc_dai_set_drvdata(dai, ssi);
374 val = SSI_SFCSR_TFWM0(ssi->dma_params_tx.burstsize) |
375 SSI_SFCSR_RFWM0(ssi->dma_params_rx.burstsize);
376 writel(val, ssi->base + SSI_SFCSR);
381 static struct snd_soc_dai_driver imx_ssi_dai = {
382 .probe = imx_ssi_dai_probe,
386 .rates = SNDRV_PCM_RATE_8000_96000,
387 .formats = SNDRV_PCM_FMTBIT_S16_LE,
392 .rates = SNDRV_PCM_RATE_8000_96000,
393 .formats = SNDRV_PCM_FMTBIT_S16_LE,
395 .ops = &imx_ssi_pcm_dai_ops,
398 static struct snd_soc_dai_driver imx_ac97_dai = {
399 .probe = imx_ssi_dai_probe,
402 .stream_name = "AC97 Playback",
405 .rates = SNDRV_PCM_RATE_48000,
406 .formats = SNDRV_PCM_FMTBIT_S16_LE,
409 .stream_name = "AC97 Capture",
412 .rates = SNDRV_PCM_RATE_48000,
413 .formats = SNDRV_PCM_FMTBIT_S16_LE,
415 .ops = &imx_ssi_pcm_dai_ops,
418 static void setup_channel_to_ac97(struct imx_ssi *imx_ssi)
420 void __iomem *base = imx_ssi->base;
422 writel(0x0, base + SSI_SCR);
423 writel(0x0, base + SSI_STCR);
424 writel(0x0, base + SSI_SRCR);
426 writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
428 writel(SSI_SFCSR_RFWM0(8) |
431 SSI_SFCSR_TFWM1(8), base + SSI_SFCSR);
433 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
434 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
436 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
437 writel(SSI_SOR_WAIT(3), base + SSI_SOR);
439 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
440 SSI_SCR_TE | SSI_SCR_RE,
443 writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
444 writel(0xff, base + SSI_SACCDIS);
445 writel(0x300, base + SSI_SACCEN);
448 static struct imx_ssi *ac97_ssi;
450 static void imx_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
453 struct imx_ssi *imx_ssi = ac97_ssi;
454 void __iomem *base = imx_ssi->base;
461 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
464 writel(lreg, base + SSI_SACADD);
467 writel(lval , base + SSI_SACDAT);
469 writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
473 static unsigned short imx_ssi_ac97_read(struct snd_ac97 *ac97,
476 struct imx_ssi *imx_ssi = ac97_ssi;
477 void __iomem *base = imx_ssi->base;
479 unsigned short val = -1;
482 lreg = (reg & 0x7f) << 12 ;
483 writel(lreg, base + SSI_SACADD);
484 writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
488 val = (readl(base + SSI_SACDAT) >> 4) & 0xffff;
490 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
495 static void imx_ssi_ac97_reset(struct snd_ac97 *ac97)
497 struct imx_ssi *imx_ssi = ac97_ssi;
499 if (imx_ssi->ac97_reset)
500 imx_ssi->ac97_reset(ac97);
503 static void imx_ssi_ac97_warm_reset(struct snd_ac97 *ac97)
505 struct imx_ssi *imx_ssi = ac97_ssi;
507 if (imx_ssi->ac97_warm_reset)
508 imx_ssi->ac97_warm_reset(ac97);
511 struct snd_ac97_bus_ops soc_ac97_ops = {
512 .read = imx_ssi_ac97_read,
513 .write = imx_ssi_ac97_write,
514 .reset = imx_ssi_ac97_reset,
515 .warm_reset = imx_ssi_ac97_warm_reset
517 EXPORT_SYMBOL_GPL(soc_ac97_ops);
519 static const struct of_device_id imx_ssi_dt_ids[] = {
520 { .compatible = "fsl,imx-ssi", },
524 static int imx_ssi_of_probe(struct platform_device *pdev,
527 struct device_node *np = pdev->dev.of_node;
528 const unsigned long *prop;
530 ssi->dma_params_rx.dma = ssi->dma_params_tx.dma = -1;
532 prop = of_get_property(np, "rx-dma", NULL);
534 ssi->dma_params_rx.dma = be32_to_cpu(*prop);
537 prop = of_get_property(np, "tx-dma", NULL);
539 ssi->dma_params_tx.dma = be32_to_cpu(*prop);
542 if (ssi->dma_params_rx.dma >= 0 && ssi->dma_params_tx.dma >= 0) {
543 ssi->flags |= IMX_SSI_DMA;
544 } else if ((ssi->dma_params_rx.dma < 0) ^
545 (ssi->dma_params_tx.dma < 0)) {
546 dev_err(&pdev->dev, "Incomplete DMA properties\n");
550 if (of_get_property(np, "i2s-slave-mode", NULL))
551 ssi->flags |= IMX_SSI_USE_I2S_SLAVE;
553 if (of_get_property(np, "ac97-mode", NULL))
554 ssi->flags |= IMX_SSI_USE_AC97;
556 if (of_get_property(np, "i2s-network-mode", NULL))
557 ssi->flags |= IMX_SSI_NET;
559 if (of_get_property(np, "i2s-sync-mode", NULL))
560 ssi->flags |= IMX_SSI_SYN;
565 static int imx_ssi_probe(struct platform_device *pdev)
567 struct resource *res;
569 struct imx_ssi_platform_data *pdata = pdev->dev.platform_data;
571 struct snd_soc_dai_driver *dai;
572 unsigned long mapbase;
574 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
578 ssi->irq = platform_get_irq(pdev, 0);
581 ssi->ac97_reset = pdata->ac97_reset;
582 ssi->ac97_warm_reset = pdata->ac97_warm_reset;
583 ssi->flags = pdata->flags;
585 ret = imx_ssi_of_probe(pdev, ssi);
590 ssi->clk = clk_get(&pdev->dev, NULL);
591 if (IS_ERR(ssi->clk)) {
592 ret = PTR_ERR(ssi->clk);
593 dev_err(&pdev->dev, "Cannot get the '%s' clock: %d\n",
594 dev_name(&pdev->dev), ret);
597 clk_prepare_enable(ssi->clk);
599 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
602 goto failed_get_resource;
605 if (!request_mem_region(res->start, resource_size(res), DRV_NAME)) {
606 dev_err(&pdev->dev, "request_mem_region failed\n");
608 goto failed_get_resource;
611 mapbase = res->start;
612 ssi->base = ioremap(res->start, resource_size(res));
614 dev_err(&pdev->dev, "ioremap failed\n");
619 if (ssi->flags & IMX_SSI_USE_AC97) {
625 setup_channel_to_ac97(ssi);
630 writel(0x0, ssi->base + SSI_SIER);
632 ssi->dma_params_rx.dma_addr = res->start + SSI_SRX0;
633 ssi->dma_params_tx.dma_addr = res->start + SSI_STX0;
635 ssi->dma_params_tx.burstsize = 6;
636 ssi->dma_params_rx.burstsize = 4;
638 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx0");
640 ssi->dma_params_tx.dma = res->start;
642 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx0");
644 ssi->dma_params_rx.dma = res->start;
646 platform_set_drvdata(pdev, ssi);
648 ret = snd_soc_register_dai(&pdev->dev, dai);
650 dev_err(&pdev->dev, "register DAI failed\n");
651 goto failed_register;
654 ssi->soc_platform_pdev_fiq = platform_device_alloc("imx-fiq-pcm-audio",
656 if (!ssi->soc_platform_pdev_fiq) {
658 goto failed_pdev_fiq_alloc;
661 platform_set_drvdata(ssi->soc_platform_pdev_fiq, ssi);
662 ret = platform_device_add(ssi->soc_platform_pdev_fiq);
664 dev_err(&pdev->dev, "failed to add platform device\n");
665 goto failed_pdev_fiq_add;
668 ssi->soc_platform_pdev = platform_device_alloc("imx-pcm-audio",
670 if (!ssi->soc_platform_pdev) {
672 goto failed_pdev_alloc;
675 platform_set_drvdata(ssi->soc_platform_pdev, ssi);
676 ret = platform_device_add(ssi->soc_platform_pdev);
678 dev_err(&pdev->dev, "failed to add platform device\n");
679 goto failed_pdev_add;
682 if (ssi->dma_params_rx.dma >= 0)
683 dev_info(&pdev->dev, "IMX SSI @ 0x%08lx IRQ %u DMA RX: %d TX: %d\n",
684 mapbase, ssi->irq, ssi->dma_params_rx.dma,
685 ssi->dma_params_tx.dma);
687 dev_info(&pdev->dev, "IMX SSI @ 0x%08lx IRQ %u FIQ\n",
693 platform_device_put(ssi->soc_platform_pdev);
695 platform_device_del(ssi->soc_platform_pdev_fiq);
697 platform_device_put(ssi->soc_platform_pdev_fiq);
698 failed_pdev_fiq_alloc:
699 snd_soc_unregister_dai(&pdev->dev);
704 release_mem_region(res->start, resource_size(res));
706 clk_disable_unprepare(ssi->clk);
714 static int __devexit imx_ssi_remove(struct platform_device *pdev)
716 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
717 struct imx_ssi *ssi = platform_get_drvdata(pdev);
719 platform_device_unregister(ssi->soc_platform_pdev);
720 platform_device_unregister(ssi->soc_platform_pdev_fiq);
722 snd_soc_unregister_dai(&pdev->dev);
724 if (ssi->flags & IMX_SSI_USE_AC97)
728 release_mem_region(res->start, resource_size(res));
729 clk_disable_unprepare(ssi->clk);
736 static struct platform_driver imx_ssi_driver = {
737 .probe = imx_ssi_probe,
738 .remove = __devexit_p(imx_ssi_remove),
742 .owner = THIS_MODULE,
743 .of_match_table = imx_ssi_dt_ids,
747 module_platform_driver(imx_ssi_driver);
749 /* Module information */
750 MODULE_AUTHOR("Sascha Hauer, <s.hauer@pengutronix.de>");
751 MODULE_DESCRIPTION("i.MX I2S/ac97 SoC Interface");
752 MODULE_LICENSE("GPL");
753 MODULE_ALIAS("platform:imx-ssi");