]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
clocksources: Switch back to the clksrc table
authorDaniel Lezcano <daniel.lezcano@linaro.org>
Mon, 6 Jun 2016 22:27:44 +0000 (00:27 +0200)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Tue, 28 Jun 2016 08:19:35 +0000 (10:19 +0200)
All the clocksource drivers's init function are now converted to return
an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the
clksrc-of table.

Let's convert back the names:
 - CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE
 - clksrc-of-ret              => clksrc-of

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
For exynos_mct and samsung_pwm_timer:
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
For arch/arc:
Acked-by: Vineet Gupta <vgupta@synopsys.com>
For mediatek driver:
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
For the Rockchip-part
Acked-by: Heiko Stuebner <heiko@sntech.de>
For STi :
Acked-by: Patrice Chotard <patrice.chotard@st.com>
For the mps2-timer.c and versatile.c changes:
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
For the OXNAS part :
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
For LPC32xx driver:
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
For Broadcom Kona timer change:
Acked-by: Ray Jui <ray.jui@broadcom.com>
For Sun4i and Sun5i:
Acked-by: Chen-Yu Tsai <wens@csie.org>
For Meson6:
Acked-by: Carlo Caione <carlo@caione.org>
For Keystone:
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
For NPS:
Acked-by: Noam Camus <noamca@mellanox.com>
For bcm2835:
Acked-by: Eric Anholt <eric@anholt.net>
62 files changed:
arch/arc/kernel/time.c
arch/arm/kernel/smp_twd.c
arch/microblaze/kernel/timer.c
arch/mips/ralink/cevt-rt3352.c
arch/nios2/kernel/time.c
drivers/clocksource/arm_arch_timer.c
drivers/clocksource/arm_global_timer.c
drivers/clocksource/armv7m_systick.c
drivers/clocksource/asm9260_timer.c
drivers/clocksource/bcm2835_timer.c
drivers/clocksource/bcm_kona_timer.c
drivers/clocksource/cadence_ttc_timer.c
drivers/clocksource/clksrc-dbx500-prcmu.c
drivers/clocksource/clksrc-probe.c
drivers/clocksource/clksrc_st_lpc.c
drivers/clocksource/clps711x-timer.c
drivers/clocksource/dw_apb_timer_of.c
drivers/clocksource/exynos_mct.c
drivers/clocksource/fsl_ftm_timer.c
drivers/clocksource/h8300_timer16.c
drivers/clocksource/h8300_timer8.c
drivers/clocksource/h8300_tpu.c
drivers/clocksource/meson6_timer.c
drivers/clocksource/mips-gic-timer.c
drivers/clocksource/moxart_timer.c
drivers/clocksource/mps2-timer.c
drivers/clocksource/mtk_timer.c
drivers/clocksource/mxs_timer.c
drivers/clocksource/nomadik-mtu.c
drivers/clocksource/pxa_timer.c
drivers/clocksource/qcom-timer.c
drivers/clocksource/rockchip_timer.c
drivers/clocksource/samsung_pwm_timer.c
drivers/clocksource/sun4i_timer.c
drivers/clocksource/tango_xtal.c
drivers/clocksource/tegra20_timer.c
drivers/clocksource/time-armada-370-xp.c
drivers/clocksource/time-efm32.c
drivers/clocksource/time-lpc32xx.c
drivers/clocksource/time-orion.c
drivers/clocksource/time-pistachio.c
drivers/clocksource/timer-atlas7.c
drivers/clocksource/timer-atmel-pit.c
drivers/clocksource/timer-atmel-st.c
drivers/clocksource/timer-digicolor.c
drivers/clocksource/timer-imx-gpt.c
drivers/clocksource/timer-integrator-ap.c
drivers/clocksource/timer-keystone.c
drivers/clocksource/timer-nps.c
drivers/clocksource/timer-oxnas-rps.c
drivers/clocksource/timer-prima2.c
drivers/clocksource/timer-sp804.c
drivers/clocksource/timer-stm32.c
drivers/clocksource/timer-sun5i.c
drivers/clocksource/timer-ti-32k.c
drivers/clocksource/timer-u300.c
drivers/clocksource/versatile.c
drivers/clocksource/vf_pit_timer.c
drivers/clocksource/vt8500_timer.c
drivers/clocksource/zevio-timer.c
include/asm-generic/vmlinux.lds.h
include/linux/clocksource.h

index 09de669f4ff0ad0060f2294d7288ef9a8fb16d89..98f22d2eb563aca35247400a3dd79dc0e55f03cb 100644 (file)
@@ -130,7 +130,7 @@ static int __init arc_cs_setup_gfrc(struct device_node *node)
 
        return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
 }
-CLOCKSOURCE_OF_DECLARE_RET(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
+CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
 
 #endif
 
@@ -192,7 +192,7 @@ static int __init arc_cs_setup_rtc(struct device_node *node)
 
        return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
 }
-CLOCKSOURCE_OF_DECLARE_RET(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
+CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
 
 #endif
 
@@ -379,7 +379,7 @@ static int __init arc_of_timer_init(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
+CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
 
 /*
  * Called from start_kernel() - boot CPU only
index 2b24be41d9ccd1bc8eca5bbad4c976edf48c3cab..b6ec65e680091817dd8e139fe7373addc98226b2 100644 (file)
@@ -412,7 +412,7 @@ out:
        WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
        return err;
 }
-CLOCKSOURCE_OF_DECLARE_RET(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
-CLOCKSOURCE_OF_DECLARE_RET(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
-CLOCKSOURCE_OF_DECLARE_RET(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
+CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
+CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
+CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
 #endif
index 7f35e7b50f1b70a12697dc907ab6e14407ff2350..5bbf38b916ef36839396c01cfd5bc105245ae934 100644 (file)
@@ -332,5 +332,5 @@ static int __init xilinx_timer_init(struct device_node *timer)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(xilinx_timer, "xlnx,xps-timer-1.00.a",
+CLOCKSOURCE_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
                       xilinx_timer_init);
index f2d3c790862639caaacfbb0b3db50de9b086a7d4..f24eee04e16af6df0a73266d9f346de9636b33d7 100644 (file)
@@ -150,4 +150,4 @@ static int __init ralink_systick_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(systick, "ralink,cevt-systick", ralink_systick_init);
+CLOCKSOURCE_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
index b75e40e1796381e42210f43f98d39412981e3cb4..d9563ddb337eab4e44d052ebd285206b09788f13 100644 (file)
@@ -352,4 +352,4 @@ void __init time_init(void)
        clocksource_probe();
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
+CLOCKSOURCE_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);
index d0cda68e2c413aba61fafd3bb626aec43fc7ed76..9e33309ad2ea14f0bdb6c9f379f934a521f6e9c1 100644 (file)
@@ -784,8 +784,8 @@ static int __init arch_timer_of_init(struct device_node *np)
 
        return arch_timer_init();
 }
-CLOCKSOURCE_OF_DECLARE_RET(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
-CLOCKSOURCE_OF_DECLARE_RET(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
+CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
+CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
 
 static int __init arch_timer_mem_init(struct device_node *np)
 {
@@ -868,7 +868,7 @@ out:
        of_node_put(best_frame);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(armv7_arch_timer_mem, "arm,armv7-timer-mem",
+CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
                       arch_timer_mem_init);
 
 #ifdef CONFIG_ACPI
index 40104fc93f2418e11055e7540476a847602d1b96..2a9ceb6e93f92b8dd44451c76972ce7f49d5ec6f 100644 (file)
@@ -358,5 +358,5 @@ out_unmap:
 }
 
 /* Only tested on r2p2 and r3p0  */
-CLOCKSOURCE_OF_DECLARE_RET(arm_gt, "arm,cortex-a9-global-timer",
+CLOCKSOURCE_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
                        global_timer_of_register);
index 2b55410edaf65dbcb3739ac9305674b3441239ec..e93af1f6a36cb02f0377d9ab602bc11430f8b6da 100644 (file)
@@ -81,5 +81,5 @@ out_unmap:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(arm_systick, "arm,armv7m-systick",
+CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick",
                        system_timer_of_register);
index d113c0275d06d46491ce19a086db2eb3ef30f15c..1ba871b7fe118454cc80d69e1998e6cfe838ac49 100644 (file)
@@ -238,5 +238,5 @@ static int __init asm9260_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(asm9260_timer, "alphascale,asm9260-timer",
+CLOCKSOURCE_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer",
                asm9260_timer_init);
index 2dcf896b5381eecec08b5646017bc9c1ea5e8644..e71acf231c89a8cc4be7e5afd0d43a63d73054b5 100644 (file)
@@ -142,5 +142,5 @@ static int __init bcm2835_timer_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(bcm2835, "brcm,bcm2835-system-timer",
+CLOCKSOURCE_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
                        bcm2835_timer_init);
index c251aa68993f83fc11fb2b409864bf16cacdef1f..86f87be3d80f0de590af62e1da95b693b8a90973 100644 (file)
@@ -195,9 +195,9 @@ static int __init kona_timer_init(struct device_node *node)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(brcm_kona, "brcm,kona-timer", kona_timer_init);
+CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
 /*
  * bcm,kona-timer is deprecated by brcm,kona-timer
  * being kept here for driver compatibility
  */
-CLOCKSOURCE_OF_DECLARE_RET(bcm_kona, "bcm,kona-timer", kona_timer_init);
+CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
index e2e76311dde21c7027b76cb661c45a335306cbf7..388a77bdc39a4d88c0087999beabd1cedbf1ab91 100644 (file)
@@ -539,4 +539,4 @@ static int __init ttc_timer_init(struct device_node *timer)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(ttc, "cdns,ttc", ttc_timer_init);
+CLOCKSOURCE_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init);
index 5a59d2953388bc5f420376a498177eb048eb6b0d..77a365f573d7f19a385f06ceffb16011a9159d98 100644 (file)
@@ -86,5 +86,5 @@ static int __init clksrc_dbx500_prcmu_init(struct device_node *node)
 #endif
        return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
 }
-CLOCKSOURCE_OF_DECLARE_RET(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
+CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
                       clksrc_dbx500_prcmu_init);
index 5fa6a555b35cd56fbbe309042b0d7c038edbd1e3..bc62be97f0a875a1b4306c5fae14dedb22d303b1 100644 (file)
 #include <linux/clocksource.h>
 
 extern struct of_device_id __clksrc_of_table[];
-extern struct of_device_id __clksrc_ret_of_table[];
 
 static const struct of_device_id __clksrc_of_table_sentinel
        __used __section(__clksrc_of_table_end);
 
-static const struct of_device_id __clksrc_ret_of_table_sentinel
-       __used __section(__clksrc_ret_of_table_end);
-
 void __init clocksource_probe(void)
 {
        struct device_node *np;
        const struct of_device_id *match;
-       of_init_fn_1 init_func;
        of_init_fn_1_ret init_func_ret;
        unsigned clocksources = 0;
        int ret;
@@ -41,15 +36,6 @@ void __init clocksource_probe(void)
                if (!of_device_is_available(np))
                        continue;
 
-               init_func = match->data;
-               init_func(np);
-               clocksources++;
-       }
-
-       for_each_matching_node_and_match(np, __clksrc_ret_of_table, &match) {
-               if (!of_device_is_available(np))
-                       continue;
-
                init_func_ret = match->data;
 
                ret = init_func_ret(np);
index c9022a9eb5931c9f5eb05235b93eb5231e29a429..03cc49217bb49af3021fa9295516c1e24826f094 100644 (file)
@@ -132,4 +132,4 @@ static int __init st_clksrc_of_register(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(ddata, "st,stih407-lpc", st_clksrc_of_register);
+CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
index 3b66198084422781604d26cae9bc748fcf2c013a..84aed78261e46e6cf6427298fdc78a16790bf8d1 100644 (file)
@@ -119,5 +119,5 @@ static int __init clps711x_timer_init(struct device_node *np)
                return -EINVAL;
        }
 }
-CLOCKSOURCE_OF_DECLARE_RET(clps711x, "cirrus,clps711x-timer", clps711x_timer_init);
+CLOCKSOURCE_OF_DECLARE(clps711x, "cirrus,clps711x-timer", clps711x_timer_init);
 #endif
index 4985a2cadad9ac7c70fde71702067451df3247ed..aee6c0d39a7c1e663827560eb763f23a0d6abea4 100644 (file)
@@ -167,7 +167,7 @@ static int __init dw_apb_timer_init(struct device_node *timer)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
+CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);
index f6caed0c36ae5cb317ba7c4536cf83ecb01c784d..0d18dd4b3bd2910d402202979ebbc5305371619f 100644 (file)
@@ -627,5 +627,5 @@ static int __init mct_init_ppi(struct device_node *np)
 {
        return mct_init_dt(np, MCT_INT_PPI);
 }
-CLOCKSOURCE_OF_DECLARE_RET(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
-CLOCKSOURCE_OF_DECLARE_RET(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);
+CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
+CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);
index 9ad4ca32fb2dd9b0007a9cb70a31bcaac05433db..738515b89073ccab553a35d6081ed78787984d12 100644 (file)
@@ -369,4 +369,4 @@ err:
        kfree(priv);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(flextimer, "fsl,ftm-timer", ftm_timer_init);
+CLOCKSOURCE_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);
index 9d99fc85ffad54d813d7a6d5c6667e9d016e069d..07d9d5be9054a6e46aeef0a933e0344b1dcf84dc 100644 (file)
@@ -187,5 +187,5 @@ free_clk:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(h8300_16bit, "renesas,16bit-timer",
+CLOCKSOURCE_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
                           h8300_16timer_init);
index 0292a190761945c4ce33b28a1d9f62d6c41540e4..546bb180f5a4481d6d13f7b68e37537940c3e795 100644 (file)
@@ -215,4 +215,4 @@ free_clk:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
+CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);
index 4faf718b30f30fe3dc4223a1c92d670c32d49ddf..7bdf1991c847448525c3dc9d6fddf4e758361375 100644 (file)
@@ -154,4 +154,4 @@ free_clk:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(h8300_tpu, "renesas,tpu", h8300_tpu_init);
+CLOCKSOURCE_OF_DECLARE(h8300_tpu, "renesas,tpu", h8300_tpu_init);
index 3a6e78f62b1989fe6b11ee816acdd28f60a150f7..52af591a9fc704e7c09650be2ec73509ed9c699f 100644 (file)
@@ -174,5 +174,5 @@ static int __init meson6_timer_init(struct device_node *node)
                                        1, 0xfffe);
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(meson6, "amlogic,meson6-timer",
+CLOCKSOURCE_OF_DECLARE(meson6, "amlogic,meson6-timer",
                       meson6_timer_init);
index b164b8712f392393f76e26c114f08e7e4ffb1d9e..1572c7a778abbb97d729f5ec25bcb0ab1c393d45 100644 (file)
@@ -222,5 +222,5 @@ static void __init gic_clocksource_of_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(mips_gic_timer, "mti,gic-timer",
+CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
                       gic_clocksource_of_init);
index b9c30cd035bf8d54f8197f94593e337eb0161a97..841454417acd9ae3a08840bb932f2bce10635360 100644 (file)
@@ -178,4 +178,4 @@ static int __init moxart_timer_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(moxart, "moxa,moxart-timer", moxart_timer_init);
+CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", moxart_timer_init);
index c303fa9ba87fb86367d5fae24c6c419b370994f3..3e4431ed9aa92a4354d1f5468ce230c964e07770 100644 (file)
@@ -274,4 +274,4 @@ static int __init mps2_timer_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(mps2_timer, "arm,mps2-timer", mps2_timer_init);
+CLOCKSOURCE_OF_DECLARE(mps2_timer, "arm,mps2-timer", mps2_timer_init);
index 432a2c0884a94fca147c600eb1840ff5e6199a8a..90659493c59c4a5a284a16429d306a4d1eae5caa 100644 (file)
@@ -265,4 +265,4 @@ err_kzalloc:
 
        return -EINVAL;
 }
-CLOCKSOURCE_OF_DECLARE_RET(mtk_mt6577, "mediatek,mt6577-timer", mtk_timer_init);
+CLOCKSOURCE_OF_DECLARE(mtk_mt6577, "mediatek,mt6577-timer", mtk_timer_init);
index 17b9d1991178cff9ccd0c7abdc95f42ed421ea34..630a8d3904bbf2b3a51ece22b91eb7aea124086e 100644 (file)
@@ -295,4 +295,4 @@ static int __init mxs_timer_init(struct device_node *np)
 
        return setup_irq(irq, &mxs_timer_irq);
 }
-CLOCKSOURCE_OF_DECLARE_RET(mxs, "fsl,timrot", mxs_timer_init);
+CLOCKSOURCE_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init);
index d2be5b3e0318788d495741f4a4463cf0601948b3..3c124d1ca600b1a212cf75c9efb7fcb7afd1c055 100644 (file)
@@ -284,5 +284,5 @@ static int __init nmdk_timer_of_init(struct device_node *node)
 
        return nmdk_timer_init(base, irq, pclk, clk);
 }
-CLOCKSOURCE_OF_DECLARE_RET(nomadik_mtu, "st,nomadik-mtu",
+CLOCKSOURCE_OF_DECLARE(nomadik_mtu, "st,nomadik-mtu",
                       nmdk_timer_of_init);
index 59af75cc4c745da65d06c58d4d2c5f932b0ecbd9..937e10b84d5850311d878988780fb7aefee069e6 100644 (file)
@@ -213,7 +213,7 @@ static int __init pxa_timer_dt_init(struct device_node *np)
 
        return pxa_timer_common_init(irq, clk_get_rate(clk));
 }
-CLOCKSOURCE_OF_DECLARE_RET(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
+CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
 
 /*
  * Legacy timer init for non device-tree boards.
index 79f73bddc5f4f6ac4b4f2ae7b0d39be19268e0d1..662576339049e4e4b7152dfe8f5810c414059de7 100644 (file)
@@ -273,5 +273,5 @@ static int __init msm_dt_timer_init(struct device_node *np)
 
        return msm_timer_init(freq, 32, irq, !!percpu_offset);
 }
-CLOCKSOURCE_OF_DECLARE_RET(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
+CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
+CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
index 85aee695394471e8f54d494b5916c42f3f53a409..23e267acba25c6c9374d24e6266ed9cc7ceb7cff 100644 (file)
@@ -205,7 +205,7 @@ static int __init rk3399_timer_init(struct device_node *np)
        return rk_timer_init(np, TIMER_CONTROL_REG3399);
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(rk3288_timer, "rockchip,rk3288-timer",
-                          rk3288_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(rk3399_timer, "rockchip,rk3399-timer",
-                          rk3399_timer_init);
+CLOCKSOURCE_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer",
+                      rk3288_timer_init);
+CLOCKSOURCE_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer",
+                      rk3399_timer_init);
index 27a9797e8187c536ff7d74081679a4a97f6264c3..54565bd0093bfc02673d6f27841315c589b8ad70 100644 (file)
@@ -466,7 +466,7 @@ static int __init s3c2410_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s3c24xx_variant);
 }
-CLOCKSOURCE_OF_DECLARE_RET(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
 
 static const struct samsung_pwm_variant s3c64xx_variant = {
        .bits           = 32,
@@ -479,7 +479,7 @@ static int __init s3c64xx_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s3c64xx_variant);
 }
-CLOCKSOURCE_OF_DECLARE_RET(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
 
 static const struct samsung_pwm_variant s5p64x0_variant = {
        .bits           = 32,
@@ -492,7 +492,7 @@ static int __init s5p64x0_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s5p64x0_variant);
 }
-CLOCKSOURCE_OF_DECLARE_RET(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
 
 static const struct samsung_pwm_variant s5p_variant = {
        .bits           = 32,
@@ -505,5 +505,5 @@ static int __init s5p_pwm_clocksource_init(struct device_node *np)
 {
        return samsung_pwm_alloc(np, &s5p_variant);
 }
-CLOCKSOURCE_OF_DECLARE_RET(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
 #endif
index 445373091fe8cc3ca352406f8484ef37e88cf79a..97669ee4df2a6625f9e69b83d6d479898aee8515 100644 (file)
@@ -226,5 +226,5 @@ static int __init sun4i_timer_init(struct device_node *node)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(sun4i, "allwinner,sun4i-a10-timer",
+CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
                       sun4i_timer_init);
index 7dc716cc976fc274d98f35839af1c191b4f8ebad..12fcef8cf2d36758cadf8449c84f33dafde28acc 100644 (file)
@@ -53,4 +53,4 @@ static int __init tango_clocksource_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(tango, "sigma,tick-counter", tango_clocksource_init);
+CLOCKSOURCE_OF_DECLARE(tango, "sigma,tick-counter", tango_clocksource_init);
index 543c37e3a62c2656cb8d27ce49f50ff599cc8553..f960891aa04e730283c1c170b20ab63bc837e18d 100644 (file)
@@ -237,7 +237,7 @@ static int __init tegra20_init_timer(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
+CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
 
 static int __init tegra20_init_rtc(struct device_node *np)
 {
@@ -261,4 +261,4 @@ static int __init tegra20_init_rtc(struct device_node *np)
 
        return register_persistent_clock(NULL, tegra_read_persistent_clock64);
 }
-CLOCKSOURCE_OF_DECLARE_RET(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
+CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
index bc4ab48d4048e8ebada49dc75954f160a17a298e..a4e59239f28e0bae3bf3207a3c69c34b4fa25e37 100644 (file)
@@ -371,7 +371,7 @@ static int __init armada_xp_timer_init(struct device_node *np)
 
        return armada_370_xp_timer_common_init(np);
 }
-CLOCKSOURCE_OF_DECLARE_RET(armada_xp, "marvell,armada-xp-timer",
+CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
                       armada_xp_timer_init);
 
 static int __init armada_375_timer_init(struct device_node *np)
@@ -409,7 +409,7 @@ static int __init armada_375_timer_init(struct device_node *np)
 
        return armada_370_xp_timer_common_init(np);
 }
-CLOCKSOURCE_OF_DECLARE_RET(armada_375, "marvell,armada-375-timer",
+CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer",
                       armada_375_timer_init);
 
 static int __init armada_370_timer_init(struct device_node *np)
@@ -432,5 +432,5 @@ static int __init armada_370_timer_init(struct device_node *np)
 
        return armada_370_xp_timer_common_init(np);
 }
-CLOCKSOURCE_OF_DECLARE_RET(armada_370, "marvell,armada-370-timer",
+CLOCKSOURCE_OF_DECLARE(armada_370, "marvell,armada-370-timer",
                       armada_370_timer_init);
index 6e2f79fd6ad08855a66bca07e6c70e7ce1d86c88..5ac344b383e1c4bee8f3c36913ee09dbea22201c 100644 (file)
@@ -283,5 +283,5 @@ static int __init efm32_timer_init(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(efm32compat, "efm32,timer", efm32_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(efm32, "energymicro,efm32-timer", efm32_timer_init);
+CLOCKSOURCE_OF_DECLARE(efm32compat, "efm32,timer", efm32_timer_init);
+CLOCKSOURCE_OF_DECLARE(efm32, "energymicro,efm32-timer", efm32_timer_init);
index cb5b8665ff823694fbd775963f66574c61ec39f3..9649cfdb92137e24a571b4e5d0871486d8805796 100644 (file)
@@ -311,4 +311,4 @@ static int __init lpc32xx_timer_init(struct device_node *np)
 
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(lpc32xx_timer, "nxp,lpc3220-timer", lpc32xx_timer_init);
+CLOCKSOURCE_OF_DECLARE(lpc32xx_timer, "nxp,lpc3220-timer", lpc32xx_timer_init);
index 5fdeb5dcc4cf73bde162fced85f9954178bf9ded..a28f496e97cfb7df1da8cee1cc0adc07e40164bf 100644 (file)
@@ -167,4 +167,4 @@ static int __init orion_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(orion_timer, "marvell,orion-timer", orion_timer_init);
+CLOCKSOURCE_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
index adaaec5e9abda63a31d41f8139f564636df1d4b3..a7d9a08e4b0e31b24640d4e188746aa25139bc1b 100644 (file)
@@ -214,5 +214,5 @@ static int __init pistachio_clksrc_of_init(struct device_node *node)
        sched_clock_register(pistachio_read_sched_clock, 32, rate);
        return clocksource_register_hz(&pcs_gpt.cs, rate);
 }
-CLOCKSOURCE_OF_DECLARE_RET(pistachio_gptimer, "img,pistachio-gptimer",
+CLOCKSOURCE_OF_DECLARE(pistachio_gptimer, "img,pistachio-gptimer",
                       pistachio_clksrc_of_init);
index 7b1a0071a2112e920457319b71ad065097a38fa9..90f8fbc154a4f5b1c5bdb98021b0144a75751d9e 100644 (file)
@@ -304,4 +304,4 @@ static int __init sirfsoc_of_timer_init(struct device_node *np)
 
        return sirfsoc_atlas7_timer_init(np);
 }
-CLOCKSOURCE_OF_DECLARE_RET(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);
+CLOCKSOURCE_OF_DECLARE(sirfsoc_atlas7_timer, "sirf,atlas7-tick", sirfsoc_of_timer_init);
index ffaca7c2c99606caf9262a12a1ec3eff6ebd5a38..1ffac0cb0cb78496d684e987d7b17f3b99a28775 100644 (file)
@@ -270,5 +270,5 @@ static int __init at91sam926x_pit_dt_init(struct device_node *node)
 
        return at91sam926x_pit_common_init(data);
 }
-CLOCKSOURCE_OF_DECLARE_RET(at91sam926x_pit, "atmel,at91sam9260-pit",
+CLOCKSOURCE_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
                       at91sam926x_pit_dt_init);
index e9331d36965b41fba14047942bf48cc8cac5a572..e90ab5b63a9068ec3901b85cab9b230db67a837c 100644 (file)
@@ -260,5 +260,5 @@ static int __init atmel_st_timer_init(struct device_node *node)
        /* register clocksource */
        return clocksource_register_hz(&clk32k, sclk_rate);
 }
-CLOCKSOURCE_OF_DECLARE_RET(atmel_st_timer, "atmel,at91rm9200-st",
+CLOCKSOURCE_OF_DECLARE(atmel_st_timer, "atmel,at91rm9200-st",
                       atmel_st_timer_init);
index b929061ebe5647ffbed6f80b5a44a2a5fdc9c6b9..10318cc99c0e8f82c5ff9b179a2aacee19b4b7ff 100644 (file)
@@ -202,5 +202,5 @@ static int __init digicolor_timer_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(conexant_digicolor, "cnxt,cx92755-timer",
+CLOCKSOURCE_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer",
                       digicolor_timer_init);
index d5640a7470787f27388461e51ceff0e5ebd81025..f595460bfc589c51474abcef244663334b0316bd 100644 (file)
@@ -545,15 +545,15 @@ static int __init imx6dl_timer_init_dt(struct device_node *np)
        return mxc_timer_init_dt(np, GPT_TYPE_IMX6DL);
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(imx1_timer, "fsl,imx1-gpt", imx1_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx21_timer, "fsl,imx21-gpt", imx21_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx27_timer, "fsl,imx27-gpt", imx21_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx31_timer, "fsl,imx31-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx25_timer, "fsl,imx25-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx50_timer, "fsl,imx50-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx51_timer, "fsl,imx51-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx53_timer, "fsl,imx53-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx6q_timer, "fsl,imx6q-gpt", imx31_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx6dl_timer, "fsl,imx6dl-gpt", imx6dl_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx6sl_timer, "fsl,imx6sl-gpt", imx6dl_timer_init_dt);
-CLOCKSOURCE_OF_DECLARE_RET(imx6sx_timer, "fsl,imx6sx-gpt", imx6dl_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx1_timer, "fsl,imx1-gpt", imx1_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx21_timer, "fsl,imx21-gpt", imx21_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx27_timer, "fsl,imx27-gpt", imx21_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx31_timer, "fsl,imx31-gpt", imx31_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx25_timer, "fsl,imx25-gpt", imx31_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx50_timer, "fsl,imx50-gpt", imx31_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx51_timer, "fsl,imx51-gpt", imx31_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx53_timer, "fsl,imx53-gpt", imx31_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx6q_timer, "fsl,imx6q-gpt", imx31_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx6dl_timer, "fsl,imx6dl-gpt", imx6dl_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx6sl_timer, "fsl,imx6sl-gpt", imx6dl_timer_init_dt);
+CLOCKSOURCE_OF_DECLARE(imx6sx_timer, "fsl,imx6sx-gpt", imx6dl_timer_init_dt);
index 675faceab5d6b1a05db38021aa1fa2af69062719..df6e672afc04c4a41b151b2e2119500e739812fc 100644 (file)
@@ -232,5 +232,5 @@ static int __init integrator_ap_timer_init_of(struct device_node *node)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(integrator_ap_timer, "arm,integrator-timer",
+CLOCKSOURCE_OF_DECLARE(integrator_ap_timer, "arm,integrator-timer",
                       integrator_ap_timer_init_of);
index 4199823b2ec9b167718c187b8fa8651758f649e2..ab68a47ab3b45de8bf8713fcde121403f38fb258 100644 (file)
@@ -226,5 +226,5 @@ err:
        return error;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(keystone_timer, "ti,keystone-timer",
+CLOCKSOURCE_OF_DECLARE(keystone_timer, "ti,keystone-timer",
                           keystone_timer_init);
index b5c7b2bd77bdddcf6ce7b67e251d9b7a0fd51a89..70c149af8ee0f5e3e861b83da2c3aa8ac78454df 100644 (file)
@@ -96,5 +96,5 @@ static int __init nps_timer_init(struct device_node *node)
        return nps_setup_clocksource(node, clk);
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(ezchip_nps400_clksrc, "ezchip,nps400-timer",
-                          nps_timer_init);
+CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
+                      nps_timer_init);
index 0d99f40ee7578577096d97fd7b79d47b8b4ab0a0..bd887e2a8cf8c776e696d0fe8004c049c9f5056c 100644 (file)
@@ -293,5 +293,5 @@ err_alloc:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(ox810se_rps,
-                          "oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
+CLOCKSOURCE_OF_DECLARE(ox810se_rps,
+                      "oxsemi,ox810se-rps-timer", oxnas_rps_timer_init);
index 7b1084d0b45ea093656b6d282ae8da8d84960262..dae8a66301d7d6d8d812e79552846c199fe2d17d 100644 (file)
@@ -246,5 +246,5 @@ static int __init sirfsoc_prima2_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(sirfsoc_prima2_timer,
+CLOCKSOURCE_OF_DECLARE(sirfsoc_prima2_timer,
        "sirf,prima2-tick", sirfsoc_prima2_timer_init);
index 3dc47efc9298670e317674eeb025004061172727..d07863388e05e6920e4fe2fd3e1fc171f3b38bdc 100644 (file)
@@ -287,7 +287,7 @@ err:
        iounmap(base);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(sp804, "arm,sp804", sp804_of_init);
+CLOCKSOURCE_OF_DECLARE(sp804, "arm,sp804", sp804_of_init);
 
 static int __init integrator_cp_of_init(struct device_node *np)
 {
@@ -335,4 +335,4 @@ err:
        iounmap(base);
        return ret;
 }
-CLOCKSOURCE_OF_DECLARE_RET(intcp, "arm,integrator-cp-timer", integrator_cp_of_init);
+CLOCKSOURCE_OF_DECLARE(intcp, "arm,integrator-cp-timer", integrator_cp_of_init);
index d5bf352905c8b6af0a5044fed73169d0aaec0b7b..1b2574c4fb979e4a2597e5ef9e86b9177fcf6b98 100644 (file)
@@ -187,4 +187,4 @@ err_clk_get:
        return ret;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(stm32, "st,stm32-timer", stm32_clockevent_init);
+CLOCKSOURCE_OF_DECLARE(stm32, "st,stm32-timer", stm32_clockevent_init);
index f0a3ffbab431c7c157339f91d0c2e6995923e006..c184eb84101e9f9a72354baf4c87c4d2ada92d19 100644 (file)
@@ -346,7 +346,7 @@ static int __init sun5i_timer_init(struct device_node *node)
 
        return sun5i_setup_clockevent(node, timer_base, clk, irq);
 }
-CLOCKSOURCE_OF_DECLARE_RET(sun5i_a13, "allwinner,sun5i-a13-hstimer",
+CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
                           sun5i_timer_init);
-CLOCKSOURCE_OF_DECLARE_RET(sun7i_a20, "allwinner,sun7i-a20-hstimer",
+CLOCKSOURCE_OF_DECLARE(sun7i_a20, "allwinner,sun7i-a20-hstimer",
                           sun5i_timer_init);
index e4ad3c6e03f91727b3a3d79b9498611fc4139812..92b7e390f6c893bbbdb65af18163419c7820de05 100644 (file)
@@ -124,5 +124,5 @@ static int __init ti_32k_timer_init(struct device_node *np)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(ti_32k_timer, "ti,omap-counter32k",
+CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
                ti_32k_timer_init);
index a6a0dec41faac30064b216c3cf92e53ae82fb302..704e40c6f151307ddaee42c16c869446513fa8d5 100644 (file)
@@ -458,5 +458,5 @@ static int __init u300_timer_init_of(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(u300_timer, "stericsson,u300-apptimer",
+CLOCKSOURCE_OF_DECLARE(u300_timer, "stericsson,u300-apptimer",
                       u300_timer_init_of);
index 8daeffac300bfc8327ac8a5ec4ef0be6f92f72ef..220b490a81428ef8477b3140d49cc85919dbdc10 100644 (file)
@@ -38,7 +38,7 @@ static int __init versatile_sched_clock_init(struct device_node *node)
 
        return 0;
 }
-CLOCKSOURCE_OF_DECLARE_RET(vexpress, "arm,vexpress-sysreg",
+CLOCKSOURCE_OF_DECLARE(vexpress, "arm,vexpress-sysreg",
                       versatile_sched_clock_init);
-CLOCKSOURCE_OF_DECLARE_RET(versatile, "arm,versatile-sysreg",
+CLOCKSOURCE_OF_DECLARE(versatile, "arm,versatile-sysreg",
                       versatile_sched_clock_init);
index ca4dff4d56842e43a9e78d06f5b193f3c6f0b093..55d8d8402d903dcb39eb5ad40b8ba1f285de1596 100644 (file)
@@ -201,4 +201,4 @@ static int __init pit_timer_init(struct device_node *np)
 
        return pit_clockevent_init(clk_rate, irq);
 }
-CLOCKSOURCE_OF_DECLARE_RET(vf610, "fsl,vf610-pit", pit_timer_init);
+CLOCKSOURCE_OF_DECLARE(vf610, "fsl,vf610-pit", pit_timer_init);
index 1bc8707b4f9d32894331b8acb49559ae40d475f7..b15069483fbde1b655fa0932b10a6d6be4fa3d44 100644 (file)
@@ -165,4 +165,4 @@ static int __init vt8500_timer_init(struct device_node *np)
        return 0;
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(vt8500, "via,vt8500-timer", vt8500_timer_init);
+CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);
index cb4cf056d56d6b92df27595d1568de7ed7be5db0..9a53f5ef61571613ff65972a86e8d253ada7340e 100644 (file)
@@ -215,4 +215,4 @@ static int __init zevio_timer_init(struct device_node *node)
        return zevio_timer_add(node);
 }
 
-CLOCKSOURCE_OF_DECLARE_RET(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
+CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
index 8c6c626285c05fe12e8ceb6f3b353229e1f4b46e..6a67ab94b553363934bc9c2e07eb12d6c8a977f7 100644 (file)
        *(__##name##_of_table_end)
 
 #define CLKSRC_OF_TABLES()     OF_TABLE(CONFIG_CLKSRC_OF, clksrc)
-#define CLKSRC_RET_OF_TABLES() OF_TABLE(CONFIG_CLKSRC_OF, clksrc_ret)
 #define IRQCHIP_OF_MATCH_TABLE() OF_TABLE(CONFIG_IRQCHIP, irqchip)
 #define CLK_OF_TABLES()                OF_TABLE(CONFIG_COMMON_CLK, clk)
 #define IOMMU_OF_TABLES()      OF_TABLE(CONFIG_OF_IOMMU, iommu)
        CLK_OF_TABLES()                                                 \
        RESERVEDMEM_OF_TABLES()                                         \
        CLKSRC_OF_TABLES()                                              \
-       CLKSRC_RET_OF_TABLES()                                          \
        IOMMU_OF_TABLES()                                               \
        CPU_METHOD_OF_TABLES()                                          \
        CPUIDLE_METHOD_OF_TABLES()                                      \
index 15c3839850f4afebf68cb8dfedc9558347a6c7ac..08398182f56ecae83ba24fc3be1707a729e0760d 100644 (file)
@@ -244,10 +244,7 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
 extern int clocksource_i8253_init(void);
 
 #define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
-       OF_DECLARE_1(clksrc, name, compat, fn)
-
-#define CLOCKSOURCE_OF_DECLARE_RET(name, compat, fn) \
-       OF_DECLARE_1_RET(clksrc_ret, name, compat, fn)
+       OF_DECLARE_1_RET(clksrc, name, compat, fn)
 
 #ifdef CONFIG_CLKSRC_PROBE
 extern void clocksource_probe(void);