]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
staging: sm750fb: use BIT macro for PLL_CTRL single-bit fields
authorMike Rapoport <mike.rapoport@gmail.com>
Wed, 10 Feb 2016 16:33:57 +0000 (18:33 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 12 Feb 2016 03:52:37 +0000 (19:52 -0800)
Replace complex defintion of PLL_CTRL fields with BIT() macro and use
open-coded implementation for PLL register manipulations.

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/sm750fb/ddk750_chip.c
drivers/staging/sm750fb/ddk750_display.c
drivers/staging/sm750fb/ddk750_reg.h

index 277e5c55f9e7070cef30d1419f271f9df525eaea..467b858c8d4aec849589fda9bf18828d41e45aff 100644 (file)
@@ -363,10 +363,7 @@ unsigned int formatPllReg(pll_value_t *pPLL)
         * register. On returning a 32 bit number, the value can be
         * applied to any PLL in the calling function.
         */
-       reg =
-       FIELD_SET(0, PLL_CTRL, BYPASS, OFF)
-       | FIELD_SET(0, PLL_CTRL, POWER,  ON)
-       | FIELD_SET(0, PLL_CTRL, INPUT,  OSC)
+       reg = PLL_CTRL_POWER
 #ifndef VALIDATION_CHIP
        | FIELD_VALUE(0, PLL_CTRL, POD,    pPLL->POD)
 #endif
index 5d1f9a517388d9f3dbf8f7a16c0159cf0dcc624a..a82253c749c6dee12f4087f9c2aad011d3495a2f 100644 (file)
@@ -126,8 +126,7 @@ static void waitNextVerticalSync(int ctrl, int delay)
 
                /* Do not wait when the Primary PLL is off or display control is already off.
                   This will prevent the software to wait forever. */
-               if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PLL_CTRL, POWER) ==
-                        PLL_CTRL_POWER_OFF) ||
+               if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) ||
                        (FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) ==
                         PANEL_DISPLAY_CTRL_TIMING_DISABLE)) {
                        return;
@@ -149,8 +148,7 @@ static void waitNextVerticalSync(int ctrl, int delay)
 
                /* Do not wait when the Primary PLL is off or display control is already off.
                           This will prevent the software to wait forever. */
-               if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), PLL_CTRL, POWER) ==
-                        PLL_CTRL_POWER_OFF) ||
+               if (!(PEEK32(CRT_PLL_CTRL) & PLL_CTRL_POWER) ||
                        (FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) ==
                         CRT_DISPLAY_CTRL_TIMING_DISABLE)) {
                        return;
index 1ad8d554e2495c37644eede2c01924aba8502855..d13af3983b74e2b990fe1499e07f52721007482d 100644 (file)
 #define PLL_CLK_COUNT_COUNTER                         15:0
 
 #define PANEL_PLL_CTRL                                0x00005C
-#define PLL_CTRL_BYPASS                               18:18
-#define PLL_CTRL_BYPASS_OFF                           0
-#define PLL_CTRL_BYPASS_ON                            1
-#define PLL_CTRL_POWER                                17:17
-#define PLL_CTRL_POWER_OFF                            0
-#define PLL_CTRL_POWER_ON                             1
-#define PLL_CTRL_INPUT                                16:16
-#define PLL_CTRL_INPUT_OSC                            0
-#define PLL_CTRL_INPUT_TESTCLK                        1
+#define PLL_CTRL_BYPASS                               BIT(18)
+#define PLL_CTRL_POWER                                BIT(17)
+#define PLL_CTRL_INPUT                                BIT(16)
 #ifdef VALIDATION_CHIP
     #define PLL_CTRL_OD                               15:14
 #else