]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
authorHuang Shijie <b32955@freescale.com>
Tue, 28 May 2013 06:20:08 +0000 (14:20 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 17 Jun 2013 08:04:29 +0000 (16:04 +0800)
In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.

In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.

The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6dl-sabreauto.dts
arch/arm/boot/dts/imx6q-sabreauto.dts
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi

index 60f3038137dde7aadd4d84075293d2382bcfbcaf..95da71185a4a737031f2fd4b815b6155cfb01211 100644 (file)
                        fsl,pins = <
                                MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
                                MX6DL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
-                               MX6DL_PAD_EIM_D19__GPIO3_IO19   0x80000000
+                       >;
+               };
+       };
+
+       ecspi1 {
+               pinctrl_ecspi1_sabreauto: ecspi1-sabreauto {
+                       fsl,pins = <
+                               MX6DL_PAD_EIM_D19__GPIO3_IO19  0x80000000
                        >;
                };
        };
index 9fb3e998f8345f36f023359d646a97e04c02c891..09a75807bc6d2190fecbf1fb1f251978c8e8197e 100644 (file)
                        fsl,pins = <
                                MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
                                MX6Q_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
-                               MX6Q_PAD_EIM_D19__GPIO3_IO19   0x80000000
+                       >;
+               };
+       };
+
+       ecspi1 {
+               pinctrl_ecspi1_sabreauto: ecspi1-sabreauto {
+                       fsl,pins = <
+                               MX6Q_PAD_EIM_D19__GPIO3_IO19  0x80000000
                        >;
                };
        };
index d6baa51dc83c7f2e187de1babba5f5e411914f73..a4466e6ebe33a1caa6c58681c6ce5fc4ff926d40 100644 (file)
@@ -20,7 +20,7 @@
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio3 19 0>;
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi1_1>;
+       pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>;
        status = "disabled"; /* pin conflict with WEIM NOR */
 
        flash: m25p80@0 {