Merge tag 'v4.4-rc2' into drm-intel-next-queued

Linux 4.4-rc2

Backmerge to get at

commit 1b0e3a049efe471c399674fd954500ce97438d30
Author: Imre Deak <imre.deak@intel.com>
Date:   Thu Nov 5 23:04:11 2015 +0200

    drm/i915/skl: disable display side power well support for now

so that we can proplery re-eanble skl power wells in -next.

Conflicts are just adjacent lines changed, except for intel_fbdev.c
where we need to interleave the changs. Nothing nefarious.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

diff --cc Documentation/DocBook/gpu.tmpl
Simple merge

diff --cc arch/x86/kernel/early-quirks.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_debugfs.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_dma.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_drv.h
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem_fence.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_irq.c
index 78f0ac3d1e7f297df9da720a9e9a56e7f697843e,0d228f909dcb5fa710dc084f69f0e4cb7bf31bed..c8ba94968aaf4ed259fe757af8768ff1d03bd3a2
--- 1/drivers/gpu/drm/i915/i915_irq.c
--- 2/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@@ -663,10 -662,11 +663,10 @@@ static u32 i8xx_get_vblank_counter(stru
  /* Called from drm generic code, passed a 'crtc', which
   * we use as a pipe index
   */
- static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
+ static u32 i915_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
  {
        struct drm_i915_private *dev_priv = dev->dev_private;
 -      unsigned long high_frame;
 -      unsigned long low_frame;
 +      i915_reg_t high_frame, low_frame;
        u32 high1, high2, low, pixel, vbl_start, hsync_start, htotal;
        struct intel_crtc *intel_crtc =
                to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);

diff --cc drivers/gpu/drm/i915/i915_params.c
index 07a79b90315c84edb4782a6037a419a37f1f51e2,4be13a5eb932797b233911c1935d1233dc9354c7..835d6099c7699889cbbe099dbdc768a0cbe028d9
--- 1/drivers/gpu/drm/i915/i915_params.c
--- 2/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@@ -131,9 -126,10 +132,10 @@@ module_param_named_unsafe(preliminary_h
  MODULE_PARM_DESC(preliminary_hw_support,
        "Enable preliminary hardware support.");
  
 -module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0600);
 +module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0400);
  MODULE_PARM_DESC(disable_power_well,
-       "Disable the power well when possible (default: true)");
+       "Disable display power wells when possible "
+       "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
  
  module_param_named_unsafe(enable_ips, i915.enable_ips, int, 0600);
  MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");

diff --cc drivers/gpu/drm/i915/intel_audio.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_crt.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_ddi.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_display.c
index f6a66670bb1cb8c1f3872fc2523652e7a50e3cae,71860f8680f9fb95efae6ea310be6ef450d25e57..33cf197df75344815fe694f69d0c4a1e4ce6737a
--- 1/drivers/gpu/drm/i915/intel_display.c
--- 2/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -2383,23 -2398,26 +2392,25 @@@ intel_pin_and_fence_fb_obj(struct drm_p
         * framebuffer compression.  For simplicity, we always install
         * a fence as the cost is not that onerous.
         */
-       ret = i915_gem_object_get_fence(obj);
-       if (ret == -EDEADLK) {
-               /*
-                * -EDEADLK means there are no free fences
-                * no pending flips.
-                *
-                * This is propagated to atomic, but it uses
-                * -EDEADLK to force a locking recovery, so
-                * change the returned error to -EBUSY.
-                */
-               ret = -EBUSY;
-               goto err_unpin;
-       } else if (ret)
-               goto err_unpin;
+       if (view.type == I915_GGTT_VIEW_NORMAL) {
+               ret = i915_gem_object_get_fence(obj);
+               if (ret == -EDEADLK) {
+                       /*
+                        * -EDEADLK means there are no free fences
+                        * no pending flips.
+                        *
+                        * This is propagated to atomic, but it uses
+                        * -EDEADLK to force a locking recovery, so
+                        * change the returned error to -EBUSY.
+                        */
+                       ret = -EBUSY;
+                       goto err_unpin;
+               } else if (ret)
+                       goto err_unpin;
  
-       i915_gem_object_pin_fence(obj);
+               i915_gem_object_pin_fence(obj);
+       }
  
 -      dev_priv->mm.interruptible = true;
        intel_runtime_pm_put(dev_priv);
        return 0;
  
@@@ -2418,9 -2437,13 +2429,11 @@@ static void intel_unpin_fb_obj(struct d
  
        WARN_ON(!mutex_is_locked(&obj->base.dev->struct_mutex));
  
 -      ret = intel_fill_fb_ggtt_view(&view, fb, plane_state);
 -      WARN_ONCE(ret, "Couldn't get view from plane state!");
 +      intel_fill_fb_ggtt_view(&view, fb, plane_state);
  
-       i915_gem_object_unpin_fence(obj);
+       if (view.type == I915_GGTT_VIEW_NORMAL)
+               i915_gem_object_unpin_fence(obj);
+ 
        i915_gem_object_unpin_from_display_plane(obj, &view);
  }
  
@@@ -14619,21 -14377,17 +14650,22 @@@ static int intel_framebuffer_init(struc
  static struct drm_framebuffer *
  intel_user_framebuffer_create(struct drm_device *dev,
                              struct drm_file *filp,
-                             struct drm_mode_fb_cmd2 *mode_cmd)
+                             struct drm_mode_fb_cmd2 *user_mode_cmd)
  {
 +      struct drm_framebuffer *fb;
        struct drm_i915_gem_object *obj;
+       struct drm_mode_fb_cmd2 mode_cmd = *user_mode_cmd;
  
        obj = to_intel_bo(drm_gem_object_lookup(dev, filp,
-                                               mode_cmd->handles[0]));
+                                               mode_cmd.handles[0]));
        if (&obj->base == NULL)
                return ERR_PTR(-ENOENT);
  
-       fb = intel_framebuffer_create(dev, mode_cmd, obj);
 -      return intel_framebuffer_create(dev, &mode_cmd, obj);
++      fb = intel_framebuffer_create(dev, &mode_cmd, obj);
 +      if (IS_ERR(fb))
 +              drm_gem_object_unreference_unlocked(&obj->base);
 +
 +      return fb;
  }
  
  #ifndef CONFIG_DRM_FBDEV_EMULATION

diff --cc drivers/gpu/drm/i915/intel_dp_mst.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_guc_loader.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_lrc.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_lrc.h
index 97c16d87f33b6e34d6bf47d1f9da914bbbdc0c5e,4e60d54ba66de8f0d1850ab1eb9276f381986090..0b821b91723a61a4766e761ef4975989e9eea61c
--- 1/drivers/gpu/drm/i915/intel_lrc.h
--- 2/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@@ -25,12 -25,14 +25,14 @@@
  #define _INTEL_LRC_H_
  
  #define GEN8_LR_CONTEXT_ALIGN 4096
+ #define GEN8_CSB_ENTRIES 6
+ #define GEN8_CSB_PTR_MASK 0x07
  
  /* Execlists regs */
 -#define RING_ELSP(ring)                       ((ring)->mmio_base+0x230)
 -#define RING_EXECLIST_STATUS_LO(ring) ((ring)->mmio_base+0x234)
 -#define RING_EXECLIST_STATUS_HI(ring) ((ring)->mmio_base+0x234 + 4)
 -#define RING_CONTEXT_CONTROL(ring)    ((ring)->mmio_base+0x244)
 +#define RING_ELSP(ring)                               _MMIO((ring)->mmio_base + 0x230)
 +#define RING_EXECLIST_STATUS_LO(ring)         _MMIO((ring)->mmio_base + 0x234)
 +#define RING_EXECLIST_STATUS_HI(ring)         _MMIO((ring)->mmio_base + 0x234 + 4)
 +#define RING_CONTEXT_CONTROL(ring)            _MMIO((ring)->mmio_base + 0x244)
  #define         CTX_CTRL_INHIBIT_SYN_CTX_SWITCH       (1 << 3)
  #define         CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT   (1 << 0)
  #define   CTX_CTRL_RS_CTX_ENABLE                (1 << 1)

diff --cc drivers/gpu/drm/i915/intel_pm.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_ringbuffer.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_runtime_pm.c
index f8167753f91b7623fb6f6c1d5d4646866220a996,d89c1d0aa1b74793a4328c861c312a91709092e7..a1dc81518995c5ad52f56147fc8c19426da5eac5
--- 1/drivers/gpu/drm/i915/intel_runtime_pm.c
--- 2/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@@ -1831,9 -1808,24 +1831,24 @@@ static struct i915_power_well bxt_power
                .domains = BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS,
                .ops = &skl_power_well_ops,
                .data = SKL_DISP_PW_2,
 -      }
 +      },
  };
  
+ static int
+ sanitize_disable_power_well_option(const struct drm_i915_private *dev_priv,
+                                  int disable_power_well)
+ {
+       if (disable_power_well >= 0)
+               return !!disable_power_well;
+ 
+       if (IS_SKYLAKE(dev_priv)) {
+               DRM_DEBUG_KMS("Disabling display power well support\n");
+               return 0;
+       }
+ 
+       return 1;
+ }
+ 
  #define set_power_wells(power_domains, __power_wells) ({              \
        (power_domains)->power_wells = (__power_wells);                 \
        (power_domains)->power_well_count = ARRAY_SIZE(__power_wells);  \
@@@ -1850,8 -1842,9 +1865,11 @@@ int intel_power_domains_init(struct drm
  {
        struct i915_power_domains *power_domains = &dev_priv->power_domains;
  
+       i915.disable_power_well = sanitize_disable_power_well_option(dev_priv,
+                                                    i915.disable_power_well);
+ 
 +      BUILD_BUG_ON(POWER_DOMAIN_NUM > 31);
 +
        mutex_init(&power_domains->lock);
  
        /*

diff --cc drivers/gpu/drm/i915/intel_uncore.c
Simple merge

diff --cc drivers/pci/quirks.c
Simple merge