]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
KVM: MIPS/T&E: Expose read-only CP0_IntCtl register
authorJames Hogan <james.hogan@imgtec.com>
Mon, 2 Feb 2015 22:55:17 +0000 (22:55 +0000)
committerJames Hogan <james.hogan@imgtec.com>
Fri, 3 Feb 2017 15:21:33 +0000 (15:21 +0000)
Expose the CP0_IntCtl register through the KVM register access API,
which is a required register since MIPS32r2. It is currently read-only
since the VS field isn't implemented due to lack of Config3.VInt or
Config3.VEIC.

It is implemented in trap_emul.c so that a VZ implementation can allow
writes.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Documentation/virtual/kvm/api.txt
arch/mips/include/asm/kvm_host.h
arch/mips/kvm/trap_emul.c

index df4a309ba56ec87a48f2b049c8d72ec1ad71b30e..d34b03c99233715bdc244579f550de700174cf52 100644 (file)
@@ -2073,6 +2073,7 @@ registers, find a list below:
   MIPS  | KVM_REG_MIPS_CP0_ENTRYHI      | 64
   MIPS  | KVM_REG_MIPS_CP0_COMPARE      | 32
   MIPS  | KVM_REG_MIPS_CP0_STATUS       | 32
+  MIPS  | KVM_REG_MIPS_CP0_INTCTL       | 32
   MIPS  | KVM_REG_MIPS_CP0_CAUSE        | 32
   MIPS  | KVM_REG_MIPS_CP0_EPC          | 64
   MIPS  | KVM_REG_MIPS_CP0_PRID         | 32
index 66459ca4af81ff67e8c08bb7ee71778fdf52eca5..ebcc5596394111335609485d99f8760e3f6849b1 100644 (file)
@@ -43,6 +43,7 @@
 #define KVM_REG_MIPS_CP0_ENTRYHI       MIPS_CP0_64(10, 0)
 #define KVM_REG_MIPS_CP0_COMPARE       MIPS_CP0_32(11, 0)
 #define KVM_REG_MIPS_CP0_STATUS                MIPS_CP0_32(12, 0)
+#define KVM_REG_MIPS_CP0_INTCTL                MIPS_CP0_32(12, 1)
 #define KVM_REG_MIPS_CP0_CAUSE         MIPS_CP0_32(13, 0)
 #define KVM_REG_MIPS_CP0_EPC           MIPS_CP0_64(14, 0)
 #define KVM_REG_MIPS_CP0_PRID          MIPS_CP0_32(15, 0)
index 2f9e44b0f17799422530bf1f238a9dc96ed1f8b8..b1fa53b252eab2e94a93ef24c6a9183abff0d37e 100644 (file)
@@ -658,6 +658,7 @@ static u64 kvm_trap_emul_get_one_regs[] = {
        KVM_REG_MIPS_CP0_ENTRYHI,
        KVM_REG_MIPS_CP0_COMPARE,
        KVM_REG_MIPS_CP0_STATUS,
+       KVM_REG_MIPS_CP0_INTCTL,
        KVM_REG_MIPS_CP0_CAUSE,
        KVM_REG_MIPS_CP0_EPC,
        KVM_REG_MIPS_CP0_PRID,
@@ -741,6 +742,9 @@ static int kvm_trap_emul_get_one_reg(struct kvm_vcpu *vcpu,
        case KVM_REG_MIPS_CP0_STATUS:
                *v = (long)kvm_read_c0_guest_status(cop0);
                break;
+       case KVM_REG_MIPS_CP0_INTCTL:
+               *v = (long)kvm_read_c0_guest_intctl(cop0);
+               break;
        case KVM_REG_MIPS_CP0_CAUSE:
                *v = (long)kvm_read_c0_guest_cause(cop0);
                break;
@@ -855,6 +859,9 @@ static int kvm_trap_emul_set_one_reg(struct kvm_vcpu *vcpu,
        case KVM_REG_MIPS_CP0_STATUS:
                kvm_write_c0_guest_status(cop0, v);
                break;
+       case KVM_REG_MIPS_CP0_INTCTL:
+               /* No VInt, so no VS, read-only for now */
+               break;
        case KVM_REG_MIPS_CP0_EPC:
                kvm_write_c0_guest_epc(cop0, v);
                break;