]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
Merge remote-tracking branch 'sound/for-next'
authorStephen Rothwell <sfr@canb.auug.org.au>
Thu, 16 Jan 2014 02:13:52 +0000 (13:13 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Thu, 16 Jan 2014 02:13:52 +0000 (13:13 +1100)
Conflicts:
sound/soc/fsl/fsl_ssi.c

1  2 
include/sound/rcar_snd.h
sound/soc/fsl/fsl_ssi.c
sound/soc/tegra/Kconfig
sound/soc/tegra/tegra20_ac97.c
sound/soc/tegra/tegra_pcm.c

Simple merge
index f43be6d4c549876b0d8c5f18307b46b4c86deb2a,b2ebaf811599d7fd3d94ef08e0e9b9d9bb8e947e..2101fc5c5739aadb43f82b8a61d61efa223c3277
@@@ -143,7 -140,10 +140,11 @@@ struct fsl_ssi_private 
        bool ssi_on_imx;
        bool imx_ac97;
        bool use_dma;
 +      bool use_dual_fifo;
+       bool baudclk_locked;
+       u8 i2s_mode;
+       spinlock_t baudclk_lock;
+       struct clk *baudclk;
        struct clk *clk;
        struct snd_dmaengine_dai_dma_data dma_params_tx;
        struct snd_dmaengine_dai_dma_data dma_params_rx;
@@@ -388,38 -417,9 +418,15 @@@ static int fsl_ssi_setup(struct fsl_ssi
         * because it is also running without an active substream. Normally SSI
         * is only enabled when there is a substream.
         */
-       if (ssi_private->imx_ac97) {
-               /*
-                * Setup the clock control register
-                */
-               write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13),
-                               &ssi->stccr);
-               write_ssi(CCSR_SSI_SxCCR_WL(17) | CCSR_SSI_SxCCR_DC(13),
-                               &ssi->srccr);
-               /*
-                * Enable AC97 mode and startup the SSI
-                */
-               write_ssi(CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV,
-                               &ssi->sacnt);
-               write_ssi(0xff, &ssi->saccdis);
-               write_ssi(0x300, &ssi->saccen);
-               /*
-                * Enable SSI, Transmit and Receive
-                */
-               write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_SSIEN |
-                               CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE);
-               write_ssi(CCSR_SSI_SOR_WAIT(3), &ssi->sor);
-       }
+       if (ssi_private->imx_ac97)
+               fsl_ssi_setup_ac97(ssi_private);
  
 +      if (ssi_private->use_dual_fifo) {
 +              write_ssi_mask(&ssi->srcr, 0, CCSR_SSI_SRCR_RFEN1);
 +              write_ssi_mask(&ssi->stcr, 0, CCSR_SSI_STCR_TFEN1);
 +              write_ssi_mask(&ssi->scr, 0, CCSR_SSI_SCR_TCH_EN);
 +      }
 +
        return 0;
  }
  
@@@ -438,64 -438,19 +445,28 @@@ static int fsl_ssi_startup(struct snd_p
        struct snd_soc_pcm_runtime *rtd = substream->private_data;
        struct fsl_ssi_private *ssi_private =
                snd_soc_dai_get_drvdata(rtd->cpu_dai);
-       int synchronous = ssi_private->cpu_dai_drv.symmetric_rates;
+       unsigned long flags;
  
-       /*
-        * If this is the first stream opened, then request the IRQ
-        * and initialize the SSI registers.
+       /* First, we only do fsl_ssi_setup() when SSI is going to be active.
+        * Second, fsl_ssi_setup was already called by ac97_init earlier if
+        * the driver is in ac97 mode.
         */
-       if (!ssi_private->first_stream) {
-               ssi_private->first_stream = substream;
-               /*
-                * fsl_ssi_setup was already called by ac97_init earlier if
-                * the driver is in ac97 mode.
-                */
-               if (!ssi_private->imx_ac97)
-                       fsl_ssi_setup(ssi_private);
-       } else {
-               if (synchronous) {
-                       struct snd_pcm_runtime *first_runtime =
-                               ssi_private->first_stream->runtime;
-                       /*
-                        * This is the second stream open, and we're in
-                        * synchronous mode, so we need to impose sample
-                        * sample size constraints. This is because STCCR is
-                        * used for playback and capture in synchronous mode,
-                        * so there's no way to specify different word
-                        * lengths.
-                        *
-                        * Note that this can cause a race condition if the
-                        * second stream is opened before the first stream is
-                        * fully initialized.  We provide some protection by
-                        * checking to make sure the first stream is
-                        * initialized, but it's not perfect.  ALSA sometimes
-                        * re-initializes the driver with a different sample
-                        * rate or size.  If the second stream is opened
-                        * before the first stream has received its final
-                        * parameters, then the second stream may be
-                        * constrained to the wrong sample rate or size.
-                        */
-                       if (first_runtime->sample_bits) {
-                               snd_pcm_hw_constraint_minmax(substream->runtime,
-                                               SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
-                               first_runtime->sample_bits,
-                               first_runtime->sample_bits);
-                       }
-               }
-               ssi_private->second_stream = substream;
+       if (!dai->active && !ssi_private->imx_ac97) {
+               fsl_ssi_setup(ssi_private);
+               spin_lock_irqsave(&ssi_private->baudclk_lock, flags);
+               ssi_private->baudclk_locked = false;
+               spin_unlock_irqrestore(&ssi_private->baudclk_lock, flags);
        }
  
 +      /* When using dual fifo mode, it is safer to ensure an even period
 +       * size. If appearing to an odd number while DMA always starts its
 +       * task from fifo0, fifo1 would be neglected at the end of each
 +       * period. But SSI would still access fifo1 with an invalid data.
 +       */
 +      if (ssi_private->use_dual_fifo)
 +              snd_pcm_hw_constraint_step(substream->runtime, 0,
 +                              SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 2);
 +
        return 0;
  }
  
@@@ -962,8 -1151,11 +1167,11 @@@ static int fsl_ssi_probe(struct platfor
                  /* Older 8610 DTs didn't have the fifo-depth property */
                ssi_private->fifo_depth = 8;
  
+       ssi_private->baudclk_locked = false;
+       spin_lock_init(&ssi_private->baudclk_lock);
        if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx21-ssi")) {
 -              u32 dma_events[2];
 +              u32 dma_events[2], dmas[4];
                ssi_private->ssi_on_imx = true;
  
                ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
Simple merge
Simple merge
Simple merge