gma500: The MID devices have the register offset different

This is another small step towards getting Moorestown/Oaktrail support to
work but for Moorestown at least we still need to sort out GEM backed base
framebuffer, which means figuring out why GEM explodes early on at the
moment.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/staging/gma500/psb_drv.c b/drivers/staging/gma500/psb_drv.c
index f98f4f46aeb343af6aaf399d0dee55ae1091c4be..4d0d1fe5b5e26af4a4f7d22303f9eb3910a5d937 100644 (file)
--- a/drivers/staging/gma500/psb_drv.c
+++ b/drivers/staging/gma500/psb_drv.c
@@ -565,7 +565,11 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
        if (!dev_priv->vdc_reg)
                goto out_err;
 
-       dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET,
+       if (IS_MRST(dev))
+               dev_priv->sgx_reg = ioremap(resource_start + MRST_SGX_OFFSET,
+                                                       PSB_SGX_SIZE);
+       else
+               dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET,
                                                        PSB_SGX_SIZE);
 
        if (!dev_priv->sgx_reg)