IPUv3 fb: set pixel clock polarity for ET070001DM6 (Compact-TFT)

diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c
index 4c98d51f13b0bc13045031a04e6fff278bb63f09..6cd90a7148e325bc18099844f463f22f72158f76 100644 (file)
--- a/drivers/video/mxc/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc/mxc_ipuv3_fb.c
@@ -589,7 +589,7 @@ static int mxcfb_set_par(struct fb_info *fbi)
                if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
                        sig_cfg.Vsync_pol = true;
                if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
-                       sig_cfg.clk_pol = true;
+                       sig_cfg.clk_pol = false;
                if (fbi->var.sync & FB_SYNC_DATA_INVERT)
                        sig_cfg.data_pol = true;
                if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))