]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
arm64: dts: r8a7795: Use R-Car Gen 3 fallback binding for i2c nodes
authorSimon Horman <horms+renesas@verge.net.au>
Tue, 13 Dec 2016 11:45:54 +0000 (12:45 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 3 Jan 2017 09:41:35 +0000 (10:41 +0100)
Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7795 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7795 and the
fallback binding for R-Car Gen 3.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a7795.dtsi

index 91a797b18c112994ff6b4a7abc044db7354f39bc..3fe7e0af5989718a28d7013d09638c4845fd3d6e 100644 (file)
                i2c0: i2c@e6500000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe6500000 0 0x40>;
                        interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 931>;
                i2c1: i2c@e6508000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe6508000 0 0x40>;
                        interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 930>;
                i2c2: i2c@e6510000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe6510000 0 0x40>;
                        interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 929>;
                i2c3: i2c@e66d0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66d0000 0 0x40>;
                        interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 928>;
                i2c4: i2c@e66d8000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66d8000 0 0x40>;
                        interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 927>;
                i2c5: i2c@e66e0000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66e0000 0 0x40>;
                        interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 919>;
                i2c6: i2c@e66e8000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       compatible = "renesas,i2c-r8a7795";
+                       compatible = "renesas,i2c-r8a7795",
+                                    "renesas,rcar-gen3-i2c";
                        reg = <0 0xe66e8000 0 0x40>;
                        interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;