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-<!-- Copyright (C) 2003 Red Hat, Inc.                                -->
-<!-- This material may be distributed only subject to the terms      -->
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-<HTML
-><HEAD
-><TITLE
->Architecture, Variant and Platform</TITLE
-><meta name="MSSmartTagsPreventParsing" content="TRUE">
-<META
-NAME="GENERATOR"
-CONTENT="Modular DocBook HTML Stylesheet Version 1.76b+
-"><LINK
-REL="HOME"
-TITLE="eCos Reference Manual"
-HREF="ecos-ref.html"><LINK
-REL="UP"
-TITLE="The eCos Hardware Abstraction Layer (HAL)"
-HREF="the-ecos-hardware-abstraction-layer.html"><LINK
-REL="PREVIOUS"
-TITLE="Introduction"
-HREF="hal-introduction.html"><LINK
-REL="NEXT"
-TITLE="General principles"
-HREF="hal-general-principles.html"></HEAD
-><BODY
-CLASS="CHAPTER"
-BGCOLOR="#FFFFFF"
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->eCos Reference Manual</TH
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-><DIV
-CLASS="CHAPTER"
-><H1
-><A
-NAME="HAL-ARCHITECTURE-VARIANT-AND-PLATFORM">Chapter 7. Architecture, Variant and Platform</H1
-><P
->We have identified three levels at which the HAL must operate.</P
-><P
-></P
-><UL
-><LI
-><P
->    The <I
-CLASS="FIRSTTERM"
->architecture
-    HAL</I
-> abstracts the basic CPU architecture and includes
-    things like interrupt delivery, context switching, CPU startup
-    etc.
-    </P
-></LI
-><LI
-><P
->    The  <I
-CLASS="FIRSTTERM"
->variant HAL</I
->
-    encapsulates features of the CPU variant such as caches, MMU and
-    FPU features. It also deals with any on-chip peripherals such as
-    memory and interrupt controllers. For architectural variations,
-    the actual implementation of the variation is often in the
-    architectural HAL, and the variant HAL simply provides the correct
-    configuration definitions.
-    </P
-></LI
-><LI
-><P
->    The <I
-CLASS="FIRSTTERM"
->platform HAL</I
->
-    abstracts the properties of the current platform and includes
-    things like platform startup, timer devices, I/O register access
-    and interrupt controllers.
-    </P
-></LI
-></UL
-><P
->The boundaries between these three HAL levels are necessarily blurred
-since functionality shifts between levels on a target-by-target basis.
-For example caches and MMU may be either an architecture feature or a
-variant feature. Similarly, memory and interrupt controllers may be
-on-chip and in the variant HAL, or off-chip and in the platform HAL.</P
-><P
->Generally there is a separate package for each of the architecture,
-variant and package HALs for a target. For some of the older targets,
-or where it would be essentially empty, the variant HAL is omitted.</P
-></DIV
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-></TD
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->Next</A
-></TD
-></TR
-><TR
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-WIDTH="33%"
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->Introduction</TD
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