TX53 Release 2011-12-20

[karo-tx-redboot.git] / packages / devs / eth / fec / v2_0 / src / if_fec.c

diff --git a/packages/devs/eth/fec/v2_0/src/if_fec.c b/packages/devs/eth/fec/v2_0/src/if_fec.c
index 8708e63d5088d991c217122b27f8059be9661f21..ff9d2867ddd0eed3599e9ac58f9c15665aa00187 100644 (file)
--- a/packages/devs/eth/fec/v2_0/src/if_fec.c
+++ b/packages/devs/eth/fec/v2_0/src/if_fec.c
@@ -359,8 +359,8 @@ mxc_fec_start(struct eth_drv_sc *sc, unsigned char *enaddr, int flags)
        mxc_fec_set_mac_address(hw_reg, enaddr);
 
        priv->tx_busy = 0;
-       mxc_fec_reg_write(hw_reg, rdar, mxc_fec_reg_read(hw_reg, rdar) | FEC_RX_TX_ACTIVE);
-       mxc_fec_reg_write(hw_reg, ecr, mxc_fec_reg_read(hw_reg, ecr) | FEC_ETHER_EN);
+       mxc_fec_reg_write(hw_reg, rdar, FEC_RX_TX_ACTIVE);
+       mxc_fec_reg_write(hw_reg, ecr, FEC_ETHER_EN);
 }
 
 /*!
@@ -425,19 +425,16 @@ mxc_fec_can_send(struct eth_drv_sc *sc)
 #ifdef CYGPKG_DEVS_ETH_PHY
                unsigned short value;
                value = _eth_phy_state(priv->phy);
+               if (value & ETH_PHY_STAT_LINK) {
+                       mxc_fec_phy_status(priv, value, true);
+               }
 #else
                unsigned short value;
                mxc_fec_mii_read(hw_reg, priv->phy_addr, 1, &value);
-#endif
                if (value & PHY_STATUS_LINK_ST) {
-                       if (!(priv->status & FEC_STATUS_LINK_ON)) {
-                               mxc_fec_phy_status(priv, value, true);
-                       }
-               } else {
-                       if (priv->status & FEC_STATUS_LINK_ON) {
-                               mxc_fec_phy_status(priv, value, true);
-                       }
+                       mxc_fec_phy_status(priv, 0, true);
                }
+#endif
        }
 
        return priv->status & FEC_STATUS_LINK_ON;
@@ -589,7 +586,7 @@ mxc_fec_check_rx_bd(struct eth_drv_sc *sc)
                        p++;
                }
                priv->rx_cur = p;
-               mxc_fec_reg_write(hw_reg, rdar, mxc_fec_reg_read(hw_reg, rdar) | FEC_RX_TX_ACTIVE);
+               mxc_fec_reg_write(hw_reg, rdar, FEC_RX_TX_ACTIVE);
        }
 }
 
@@ -647,20 +644,19 @@ mxc_fec_poll(struct eth_drv_sc *sc)
 #ifdef CYGPKG_DEVS_ETH_PHY
                unsigned short value;
                value = _eth_phy_state(priv->phy);
+               if (!(value & ETH_PHY_STAT_LINK) ^
+                       !(priv->status & FEC_STATUS_LINK_ON)) {
+                       mxc_fec_phy_status(priv, value, true);
+               }
 #else
                unsigned short value;
                mxc_fec_mii_read(hw_reg, priv->phy_addr, 1, &value);
+               if (!(value & PHY_STATUS_LINK_ST) ^
+                       !(priv->status & FEC_STATUS_LINK_ON)) {
+                       mxc_fec_phy_status(priv, 0, true);
+               }
 #endif
                last_poll = 0;
-               if (value & PHY_STATUS_LINK_ST) {
-                       if (!(priv->status & FEC_STATUS_LINK_ON)) {
-                               mxc_fec_phy_status(priv, value, true);
-                       }
-               } else {
-                       if (priv->status & FEC_STATUS_LINK_ON) {
-                               mxc_fec_phy_status(priv, value, true);
-                       }
-               }
        }
 }
 
@@ -715,7 +711,7 @@ mxc_fec_chip_init(mxc_fec_priv_t *dev)
        unsigned long ipg_clk;
        unsigned long clkdiv;
 
-       mxc_fec_reg_write(hw_reg, ecr, mxc_fec_reg_read(hw_reg, ecr) | FEC_RESET);
+       mxc_fec_reg_write(hw_reg, ecr, FEC_RESET);
        while (mxc_fec_reg_read(hw_reg, ecr) & FEC_RESET) {
                hal_delay_us(FEC_COMMON_TICK);
        }
@@ -751,15 +747,15 @@ mxc_fec_chip_init(mxc_fec_priv_t *dev)
        /* must be done before enabling the MII gasket
         * (otherwise MIIGSK_ENR_READY will never assert)
         */
-       mxc_fec_reg_write(hw_reg, ecr, mxc_fec_reg_read(hw_reg, ecr) | FEC_ETHER_EN);
+       mxc_fec_reg_write(hw_reg, ecr, FEC_ETHER_EN);
 }
 
 static void mxc_fec_phy_status(mxc_fec_priv_t *dev, unsigned short value, bool show)
 {
+       int changed = 0;
 #ifdef CYGPKG_DEVS_ETH_PHY
        if (value & ETH_PHY_STAT_LINK) {
-               int changed = !(dev->status & FEC_STATUS_LINK_ON);
-
+               changed = !(dev->status & FEC_STATUS_LINK_ON);
                dev->status |= FEC_STATUS_LINK_ON;
                if (value & ETH_PHY_STAT_FDX) {
                        dev->status |= FEC_STATUS_FULL_DPLX;
@@ -773,14 +769,11 @@ static void mxc_fec_phy_status(mxc_fec_priv_t *dev, unsigned short value, bool s
                        changed |= !!(dev->status & ETH_PHY_STAT_100MB);
                        dev->status &= ~FEC_STATUS_100M;
                }
-               if (changed) {
-                       mxc_fec_mii_setup(dev);
-               }
        } else {
+               changed = !!(dev->status & FEC_STATUS_LINK_ON);
                dev->status &= ~FEC_STATUS_LINK_ON;
        }
 #else
-       int changed = 0;
        mxc_fec_mii_read(dev->hw_reg, dev->phy_addr, PHY_STATUS_REG, &value);
        if (value & PHY_STATUS_LINK_ST) {
                changed |= !(dev->status & FEC_STATUS_LINK_ON);
@@ -803,11 +796,26 @@ static void mxc_fec_phy_status(mxc_fec_priv_t *dev, unsigned short value, bool s
                changed |= dev->status & FEC_STATUS_100M;
                dev->status &= ~FEC_STATUS_100M;
        }
+#endif
        if (changed) {
+               if (dev->status & FEC_STATUS_FULL_DPLX) {
+                       mxc_fec_reg_write(dev->hw_reg, tcr,
+                                                       (mxc_fec_reg_read(dev->hw_reg, tcr) & ~FEC_TCR_HBC) |
+                                                       FEC_TCR_FDEN);
+                       mxc_fec_reg_write(dev->hw_reg, rcr,
+                                                       (mxc_fec_reg_read(dev->hw_reg, rcr) & ~FEC_RCR_DRT) |
+                                                       FEC_RCR_FCE);
+               } else {
+                       mxc_fec_reg_write(dev->hw_reg, tcr,
+                                                       (mxc_fec_reg_read(dev->hw_reg, tcr) & ~FEC_TCR_FDEN) |
+                                                       FEC_TCR_HBC);
+                       mxc_fec_reg_write(dev->hw_reg, rcr,
+                                                       (mxc_fec_reg_read(dev->hw_reg, rcr) & ~FEC_RCR_FCE) |
+                                                       FEC_RCR_DRT);
+               }
                mxc_fec_mii_setup(dev);
        }
-#endif
-       if (!show) {
+       if (!show || !changed) {
                return;
        }
        if (dev->status & FEC_STATUS_LINK_ON) {
@@ -830,7 +838,7 @@ mxc_fec_phy_init(mxc_fec_priv_t *dev)
        unsigned short value = 0;
        unsigned long timeout = FEC_COMMON_TIMEOUT;
 
-       /*Reset PHY*/
+       /* Reset PHY */
        mxc_fec_mii_write(dev->hw_reg, dev->phy_addr, PHY_CTRL_REG, PHY_CTRL_RESET);
        while (timeout--) {
                if (mxc_fec_mii_read(dev->hw_reg, dev->phy_addr, PHY_CTRL_REG, &value)) {
@@ -965,9 +973,9 @@ mxc_fec_phy_init(mxc_fec_priv_t *dev)
        }
 #endif
        diag_printf("FEC: [ %s ] [ %s ] [ %s ]:\n",
-               (dev->status&FEC_STATUS_FULL_DPLX)?"FULL_DUPLEX":"HALF_DUPLEX",
-               (dev->status&FEC_STATUS_LINK_ON)?"connected":"disconnected",
-               (dev->status&FEC_STATUS_100M)?"100M bps":"10M bps");
+               (dev->status & FEC_STATUS_FULL_DPLX) ? "FULL_DUPLEX" : "HALF_DUPLEX",
+               (dev->status & FEC_STATUS_LINK_ON) ? "connected" : "disconnected",
+               (dev->status & FEC_STATUS_100M) ? "100M bps" : "10M bps");
 #endif
        return true;
 }