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(parent: 4f12798) | patch
fsl-ddr: Fix the chip-select interleaving issue
authorDave Liu <daveliu@freescale.com>
Wed, 11 Nov 2009 23:26:37 +0000 (07:26 +0800)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 12 Nov 2009 14:09:49 +0000 (08:09 -0600)
commit3ad95deb30ac73bd57e966d321215a17d3236f9f
tree342daf9b3dfaa0998ae2c1b562a48eb68b407538tree | snapshot
parent4f127980e0d4ba179b4628ebf8e8642210731055commit | diff
fsl-ddr: Fix the chip-select interleaving issue

commit 1542fbdeec0d1e2a6df13189df8dcb1ce8802be3
introduced one new bug to chip-select interleaving.

Single DDR controller also can do the chip-select
interleaving if there is dual-rank or qual-rank DIMMs.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc8xxx/ddr/options.c diff | blob | history
UBoot for KaRo TX COM modules