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t2080qds/ddr: update ddr parameters
authorShengzhou Liu <Shengzhou.Liu@freescale.com>
Mon, 13 Jan 2014 05:01:06 +0000 (13:01 +0800)
committerYork Sun <yorksun@freescale.com>
Tue, 21 Jan 2014 22:02:21 +0000 (14:02 -0800)
commit3fdc827ca8a770848e8104c42cd6d8321d8c86ff
tree82f066b5bc2ddd5d0c09c6fdddefefc70b842ac5tree | snapshot
parenteb6b458cef28c86603d56a27b9ee699b13c60c14commit | diff
t2080qds/ddr: update ddr parameters

- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
  unrelated to DDR3/3L.

Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
board/freescale/t2080qds/ddr.c diff | blob | history
board/freescale/t2080qds/ddr.h diff | blob | history
UBoot for KaRo TX COM modules