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armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.
authorZhichun Hua <zhichun.hua@freescale.com>
Mon, 29 Jun 2015 07:50:42 +0000 (15:50 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Wed, 9 Sep 2015 11:34:25 +0000 (13:34 +0200)
commit91641e295c5c97b4786bcc5133e67efb91669ea7
tree3fca2a0c33b7f91579e1e69982b2fb7d6b127b73tree | snapshot
parent8ef508dc4c7e630b05b33ef903e3739fc6c3611ecommit | diff
armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.

When final MMU table is setup in DDR, TCR attributes must match
those of the memroy for cacheability and shareability.

Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/cpu.c diff | blob | history
UBoot for KaRo TX COM modules