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arm: socfpga: Fix FPGA bitstream programming routine
authorMarek Vasut <marex@denx.de>
Mon, 27 Jul 2015 20:34:54 +0000 (22:34 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 10 Sep 2015 06:17:19 +0000 (08:17 +0200)
commit9d2812859ad26da4ad826233765056bedceb7fff
treedf0173113fd72163aa8fec1983a923e576d38f30tree | snapshot
parent91a5a77e4d31d339f0c167bcb1a3975123f97291commit | diff
arm: socfpga: Fix FPGA bitstream programming routine

In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
drivers/fpga/socfpga.c diff | blob | history
UBoot for KaRo TX COM modules