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(parent: 9ac4ffb) | patch
powerpc/mpc8xxx: Extend DDR registers' fields
authorYork Sun <yorksun@freescale.com>
Mon, 3 Jun 2013 19:39:06 +0000 (12:39 -0700)
committerYork Sun <yorksun@freescale.com>
Mon, 25 Nov 2013 19:43:46 +0000 (11:43 -0800)
commitd4263b8adb5bd940c95cbaebaa0da9eaf759bfed
tree730993df736380d8b77fb4128fd6a0e3f4c0b663tree | snapshot
parent9ac4ffbde1a5015c9929ee8578d3811b716e2fd3commit | diff
powerpc/mpc8xxx: Extend DDR registers' fields

Some DDR registers' fields have expanded to accommodate larger values.
These changes are backward compatible. Some fields are removed for newer
DDR controllers. Writing to those fields are safely ignored.

TIMING_CFG_2 register is fixed. Additive latency is added to RD_TO_PRE
automatically. It was a misunderstanding in commit c360ceac.

Signed-off-by: York Sun <yorksun@freescale.com>
drivers/ddr/fsl/ctrl_regs.c diff | blob | history
UBoot for KaRo TX COM modules