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powerpc/85xx: Implement work-around for P4080 erratum SERDES-A005
authorTimur Tabi <timur@freescale.com>
Fri, 1 Apr 2011 18:19:36 +0000 (13:19 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 29 Apr 2011 03:09:23 +0000 (22:09 -0500)
commitda30b9fd97f031a6b6863359f3d4c6633e5c7035
tree8193ca2746ebc44306440f5e203f954e95d88586tree | snapshot
parent82c9dfdc20b1bf86e732e61e7230cfa7c933247fcommit | diff
powerpc/85xx: Implement work-around for P4080 erratum SERDES-A005

SerDes PLL bandwidth default setting is incorrect when no lanes are
configured as PCI Express.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc85xx/cmd_errata.c diff | blob | history
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c diff | blob | history
arch/powerpc/include/asm/config_mpc85xx.h diff | blob | history
UBoot for KaRo TX COM modules