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(parent: 3de6cd0) | patch
arm: socfpga: spl: enable sdram, timer and uart
authorDinh Nguyen <dinguyen@opensource.altera.com>
Mon, 30 Mar 2015 22:01:05 +0000 (17:01 -0500)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 8 Sep 2015 20:29:19 +0000 (22:29 +0200)
commitf10893bd66a9a598b9202512a654373d26db6b9e
treecdec796299f95cf8c27ba496f6f5e34beeda6279tree | snapshot
parent3de6cd06208f22f724ee7e4842215816ea13a377commit | diff
arm: socfpga: spl: enable sdram, timer and uart

Add the calls in the spl_board_init to enable SDRAM, timer, and UART.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
arch/arm/cpu/armv7/socfpga/spl.c diff | blob | history
UBoot for KaRo TX COM modules