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85xx: Using proper I2C source clock divider for MPC8544
authorKumar Gala <galak@kernel.crashing.org>
Fri, 17 Oct 2008 02:58:50 +0000 (21:58 -0500)
committerWolfgang Denk <wd@denx.de>
Fri, 17 Oct 2008 08:51:35 +0000 (10:51 +0200)
commitf7d190b1c0b3ab7fc53074ad2862f7de99de37ff
tree522784dc12eeb2294ddc7b647889691764a3603dtree | snapshot
parent42653b826adb319a1df06e24ef26096b2a5d9d2acommit | diff
85xx: Using proper I2C source clock divider for MPC8544

The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being
bit 26, instead it should be bit 28.  This caused in incorrect
interpretation of the i2c_clk which is the same as the SEC clk on
MPC8544.  The SEC clk is controlled by cfg_sec_freq that is reported
in PORDEVSR2.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
include/asm-ppc/immap_85xx.h diff | blob | history
UBoot for KaRo TX COM modules