4 - compatible: "samsung,exynos4210-mipi-dsi"
5 - reg: physical base address and length of the registers set for the device
6 - interrupts: should contain DSI interrupt
7 - clocks: list of clock specifiers, must contain an entry for each required
9 - clock-names: should include "bus_clk"and "pll_clk" entries
10 - phys: list of phy specifiers, must contain an entry for each required
12 - phy-names: should include "dsim" entry
13 - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
14 - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
15 - samsung,pll-clock-frequency: specifies frequency of the "pll_clk" clock
16 - #address-cells, #size-cells: should be set respectively to <1> and <0>
17 according to DSI host bindings (see MIPI DSI bindings [1])
20 - samsung,power-domain: a phandle to DSIM power domain node
23 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
26 Device node can contain video interface port nodes according to [2].
27 The following are properties specific to those nodes:
30 - reg: (required) can be 0 for input RGB/I80 port or 1 for DSI port;
32 endpoint node of DSI port (reg = 1):
33 - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
35 - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
37 [1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt
38 [2]: Documentation/devicetree/bindings/media/video-interfaces.txt
43 compatible = "samsung,exynos4210-mipi-dsi";
44 reg = <0x11C80000 0x10000>;
45 interrupts = <0 79 0>;
46 clocks = <&clock 286>, <&clock 143>;
47 clock-names = "bus_clk", "pll_clk";
50 vddcore-supply = <&vusb_reg>;
51 vddio-supply = <&vmipi_reg>;
52 samsung,power-domain = <&pd_lcd0>;
55 samsung,pll-clock-frequency = <24000000>;
62 remote-endpoint = <&dsi_ep>;
74 samsung,burst-clock-frequency = <500000000>;
75 samsung,esc-clock-frequency = <20000000>;
76 remote-endpoint = <&panel_ep>;