arch/arm/boot/dts/am437x-idk-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "am4372.dtsi"
  12 #include <dt-bindings/pinctrl/am43xx.h>
  13 #include <dt-bindings/pwm/pwm.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "TI AM437x Industrial Development Kit";
  19         compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
  20
  21         v24_0d: fixed-regulator-v24_0d {
  22                 compatible = "regulator-fixed";
  23                 regulator-name = "V24_0D";
  24                 regulator-min-microvolt = <24000000>;
  25                 regulator-max-microvolt = <24000000>;
  26                 regulator-always-on;
  27                 regulator-boot-on;
  28         };
  29
  30         v3_3d: fixed-regulator-v3_3d {
  31                 compatible = "regulator-fixed";
  32                 regulator-name = "V3_3D";
  33                 regulator-min-microvolt = <3300000>;
  34                 regulator-max-microvolt = <3300000>;
  35                 regulator-always-on;
  36                 regulator-boot-on;
  37                 vin-supply = <&v24_0d>;
  38         };
  39
  40         vdd_corereg: fixed-regulator-vdd_corereg {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "VDD_COREREG";
  43                 regulator-min-microvolt = <1100000>;
  44                 regulator-max-microvolt = <1100000>;
  45                 regulator-always-on;
  46                 regulator-boot-on;
  47                 vin-supply = <&v24_0d>;
  48         };
  49
  50         vdd_core: fixed-regulator-vdd_core {
  51                 compatible = "regulator-fixed";
  52                 regulator-name = "VDD_CORE";
  53                 regulator-min-microvolt = <1100000>;
  54                 regulator-max-microvolt = <1100000>;
  55                 regulator-always-on;
  56                 regulator-boot-on;
  57                 vin-supply = <&vdd_corereg>;
  58         };
  59
  60         v1_8dreg: fixed-regulator-v1_8dreg{
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "V1_8DREG";
  63                 regulator-min-microvolt = <1800000>;
  64                 regulator-max-microvolt = <1800000>;
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 vin-supply = <&v24_0d>;
  68         };
  69
  70         v1_8d: fixed-regulator-v1_8d{
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "V1_8D";
  73                 regulator-min-microvolt = <1800000>;
  74                 regulator-max-microvolt = <1800000>;
  75                 regulator-always-on;
  76                 regulator-boot-on;
  77                 vin-supply = <&v1_8dreg>;
  78         };
  79
  80         v1_5dreg: fixed-regulator-v1_5dreg{
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "V1_5DREG";
  83                 regulator-min-microvolt = <1500000>;
  84                 regulator-max-microvolt = <1500000>;
  85                 regulator-always-on;
  86                 regulator-boot-on;
  87                 vin-supply = <&v24_0d>;
  88         };
  89
  90         v1_5d: fixed-regulator-v1_5d{
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "V1_5D";
  93                 regulator-min-microvolt = <1500000>;
  94                 regulator-max-microvolt = <1500000>;
  95                 regulator-always-on;
  96                 regulator-boot-on;
  97                 vin-supply = <&v1_5dreg>;
  98         };
  99
 100         gpio_keys: gpio_keys {
 101                 compatible = "gpio-keys";
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&gpio_keys_pins_default>;
 104                 #address-cells = <1>;
 105                 #size-cells = <0>;
 106
 107                 switch@0 {
 108                         label = "power-button";
 109                         linux,code = <KEY_POWER>;
 110                         gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 111                 };
 112         };
 113 };
 114
 115 &am43xx_pinmux {
 116         gpio_keys_pins_default: gpio_keys_pins_default {
 117                 pinctrl-single,pins = <
 118                         0x1b8 (PIN_INPUT | MUX_MODE7)   /* cam0_field.gpio4_2 */
 119                 >;
 120         };
 121
 122         i2c0_pins_default: i2c0_pins_default {
 123                 pinctrl-single,pins = <
 124                         0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
 125                         0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
 126                 >;
 127         };
 128
 129         i2c0_pins_sleep: i2c0_pins_sleep {
 130                 pinctrl-single,pins = <
 131                         0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 132                         0x18c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 133                 >;
 134         };
 135
 136         mmc1_pins_default: pinmux_mmc1_pins_default {
 137                 pinctrl-single,pins = <
 138                         0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
 139                         0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
 140                         0x1f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
 141                         0x1f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
 142                         0x1f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
 143                         0x1fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
 144                         0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 145                 >;
 146         };
 147
 148         mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
 149                 pinctrl-single,pins = <
 150                         0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 151                         0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 152                         0x1f0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 153                         0x1f4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 154                         0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 155                         0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7)
 156                         0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 157                 >;
 158         };
 159
 160         ecap0_pins_default: backlight_pins_default {
 161                 pinctrl-single,pins = <
 162                         0x164 (PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
 163                 >;
 164         };
 165
 166         cpsw_default: cpsw_default {
 167                 pinctrl-single,pins = <
 168                         0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
 169                         0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
 170                         0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
 171                         0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
 172                         0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
 173                         0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
 174                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rmii1_rclk */
 175                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
 176                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
 177                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
 178                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd2 */
 179                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd3 */
 180                 >;
 181         };
 182
 183         cpsw_sleep: cpsw_sleep {
 184                 pinctrl-single,pins = <
 185                         0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 186                         0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 187                         0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 188                         0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 189                         0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 190                         0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 191                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 192                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 193                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 194                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 195                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 196                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 197                 >;
 198         };
 199
 200         davinci_mdio_default: davinci_mdio_default {
 201                 pinctrl-single,pins = <
 202                         /* MDIO */
 203                         0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
 204                         0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
 205                 >;
 206         };
 207
 208         davinci_mdio_sleep: davinci_mdio_sleep {
 209                 pinctrl-single,pins = <
 210                         /* MDIO reset value */
 211                         0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 212                         0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 213                 >;
 214         };
 215
 216         qspi_pins_default: qspi_pins_default {
 217                 pinctrl-single,pins = <
 218                         0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3)    /* gpmc_csn0.qspi_csn */
 219                         0x88 (PIN_OUTPUT | MUX_MODE2)           /* gpmc_csn3.qspi_clk */
 220                         0x90 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_advn_ale.qspi_d0 */
 221                         0x94 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_oen_ren.qspi_d1 */
 222                         0x98 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_wen.qspi_d2 */
 223                         0x9c (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_be0n_cle.qspi_d3 */
 224                 >;
 225         };
 226
 227         qspi_pins_sleep: qspi_pins_sleep{
 228                 pinctrl-single,pins = <
 229                         0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 230                         0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 231                         0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 232                         0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 233                         0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 234                         0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 235                 >;
 236         };
 237 };
 238
 239 &i2c0 {
 240         status = "okay";
 241         pinctrl-names = "default", "sleep";
 242         pinctrl-0 = <&i2c0_pins_default>;
 243         pinctrl-1 = <&i2c0_pins_sleep>;
 244         clock-frequency = <400000>;
 245
 246         at24@50 {
 247                 compatible = "at24,24c256";
 248                 pagesize = <64>;
 249                 reg = <0x50>;
 250         };
 251
 252         tps: tps62362@60 {
 253                 compatible = "ti,tps62362";
 254                 reg = <0x60>;
 255                 regulator-name = "VDD_MPU";
 256                 regulator-min-microvolt = <950000>;
 257                 regulator-max-microvolt = <1330000>;
 258                 regulator-boot-on;
 259                 regulator-always-on;
 260                 ti,vsel0-state-high;
 261                 ti,vsel1-state-high;
 262                 vin-supply = <&v3_3d>;
 263         };
 264 };
 265
 266 &epwmss0 {
 267         status = "okay";
 268 };
 269
 270 &ecap0 {
 271         status = "okay";
 272         pinctrl-names = "default";
 273         pinctrl-0 = <&ecap0_pins_default>;
 274 };
 275
 276 &gpio0 {
 277         status = "okay";
 278 };
 279
 280 &gpio1 {
 281         status = "okay";
 282 };
 283
 284 &gpio4 {
 285         status = "okay";
 286 };
 287
 288 &gpio5 {
 289         status = "okay";
 290 };
 291
 292 &mmc1 {
 293         status = "okay";
 294         pinctrl-names = "default", "sleep";
 295         pinctrl-0 = <&mmc1_pins_default>;
 296         pinctrl-1 = <&mmc1_pins_sleep>;
 297         vmmc-supply = <&v3_3d>;
 298         bus-width = <4>;
 299         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
 300 };
 301
 302 &qspi {
 303         status = "okay";
 304         pinctrl-names = "default", "sleep";
 305         pinctrl-0 = <&qspi_pins_default>;
 306         pinctrl-1 = <&qspi_pins_sleep>;
 307
 308         spi-max-frequency = <48000000>;
 309         m25p80@0 {
 310                 compatible = "mx66l51235l";
 311                 spi-max-frequency = <48000000>;
 312                 reg = <0>;
 313                 spi-cpol;
 314                 spi-cpha;
 315                 spi-tx-bus-width = <1>;
 316                 spi-rx-bus-width = <4>;
 317                 #address-cells = <1>;
 318                 #size-cells = <1>;
 319
 320                 /*
 321                  * MTD partition table.  The ROM checks the first 512KiB for a
 322                  * valid file to boot(XIP).
 323                  */
 324                 partition@0 {
 325                         label = "QSPI.U_BOOT";
 326                         reg = <0x00000000 0x000080000>;
 327                 };
 328                 partition@1 {
 329                         label = "QSPI.U_BOOT.backup";
 330                         reg = <0x00080000 0x00080000>;
 331                 };
 332                 partition@2 {
 333                         label = "QSPI.U-BOOT-SPL_OS";
 334                         reg = <0x00100000 0x00010000>;
 335                 };
 336                 partition@3 {
 337                         label = "QSPI.U_BOOT_ENV";
 338                         reg = <0x00110000 0x00010000>;
 339                 };
 340                 partition@4 {
 341                         label = "QSPI.U-BOOT-ENV.backup";
 342                         reg = <0x00120000 0x00010000>;
 343                 };
 344                 partition@5 {
 345                         label = "QSPI.KERNEL";
 346                         reg = <0x00130000 0x0800000>;
 347                 };
 348                 partition@6 {
 349                         label = "QSPI.FILESYSTEM";
 350                         reg = <0x00930000 0x36D0000>;
 351                 };
 352         };
 353 };
 354
 355 &mac {
 356         pinctrl-names = "default", "sleep";
 357         pinctrl-0 = <&cpsw_default>;
 358         pinctrl-1 = <&cpsw_sleep>;
 359         status = "okay";
 360 };
 361
 362 &davinci_mdio {
 363         pinctrl-names = "default", "sleep";
 364         pinctrl-0 = <&davinci_mdio_default>;
 365         pinctrl-1 = <&davinci_mdio_sleep>;
 366         status = "okay";
 367 };
 368
 369 &cpsw_emac0 {
 370         phy_id = <&davinci_mdio>, <0>;
 371         phy-mode = "rgmii";
 372 };
 373
 374 &rtc {
 375         status = "okay";
 376 };
 377
 378 &wdt {
 379         status = "okay";
 380 };
 381
 382 &cpu {
 383         cpu0-supply = <&tps>;
 384 };