arch/arm/boot/dts/armada-388-db.dts

   1 /*
   2  * Device Tree file for Marvell Armada 388 evaluation board
   3  * (DB-88F6820)
   4  *
   5  *  Copyright (C) 2014 Marvell
   6  *
   7  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 /dts-v1/;
  15 #include "armada-388.dtsi"
  16
  17 / {
  18         model = "Marvell Armada 385 Development Board";
  19         compatible = "marvell,a385-db", "marvell,armada388",
  20                 "marvell,armada385", "marvell,armada380";
  21
  22         chosen {
  23                 bootargs = "console=ttyS0,115200 earlyprintk";
  24         };
  25
  26         memory {
  27                 device_type = "memory";
  28                 reg = <0x00000000 0x10000000>; /* 256 MB */
  29         };
  30
  31         soc {
  32                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  33                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
  34
  35                 internal-regs {
  36                         spi@10600 {
  37                                 status = "okay";
  38
  39                                 spi-flash@0 {
  40                                         #address-cells = <1>;
  41                                         #size-cells = <1>;
  42                                         compatible = "w25q32";
  43                                         reg = <0>; /* Chip select 0 */
  44                                         spi-max-frequency = <108000000>;
  45                                 };
  46                         };
  47
  48                         i2c@11000 {
  49                                 status = "okay";
  50                                 clock-frequency = <100000>;
  51                         };
  52
  53                         i2c@11100 {
  54                                 status = "okay";
  55                                 clock-frequency = <100000>;
  56                         };
  57
  58                         serial@12000 {
  59                                 status = "okay";
  60                         };
  61
  62                         ethernet@30000 {
  63                                 status = "okay";
  64                                 phy = <&phy1>;
  65                                 phy-mode = "rgmii-id";
  66                         };
  67
  68                         usb@50000 {
  69                                 status = "ok";
  70                         };
  71
  72                         ethernet@70000 {
  73                                 status = "okay";
  74                                 phy = <&phy0>;
  75                                 phy-mode = "rgmii-id";
  76                         };
  77
  78                         mdio@72004 {
  79                                 phy0: ethernet-phy@0 {
  80                                         reg = <0>;
  81                                 };
  82
  83                                 phy1: ethernet-phy@1 {
  84                                         reg = <1>;
  85                                 };
  86                         };
  87
  88                         sata@a8000 {
  89                                 status = "okay";
  90                         };
  91
  92                         sata@e0000 {
  93                                 status = "okay";
  94                         };
  95
  96                         flash@d0000 {
  97                                 status = "okay";
  98                                 num-cs = <1>;
  99                                 marvell,nand-keep-config;
 100                                 marvell,nand-enable-arbiter;
 101                                 nand-on-flash-bbt;
 102                                 nand-ecc-strength = <4>;
 103                                 nand-ecc-step-size = <512>;
 104
 105                                 partition@0 {
 106                                         label = "U-Boot";
 107                                         reg = <0 0x800000>;
 108                                 };
 109                                 partition@800000 {
 110                                         label = "Linux";
 111                                         reg = <0x800000 0x800000>;
 112                                 };
 113                                 partition@1000000 {
 114                                         label = "Filesystem";
 115                                         reg = <0x1000000 0x3f000000>;
 116                                 };
 117                         };
 118
 119                         sdhci@d8000 {
 120                                 broken-cd;
 121                                 wp-inverted;
 122                                 bus-width = <8>;
 123                                 status = "okay";
 124                                 no-1-8-v;
 125                         };
 126
 127                         usb3@f0000 {
 128                                 status = "okay";
 129                         };
 130
 131                         usb3@f8000 {
 132                                 status = "okay";
 133                         };
 134                 };
 135
 136                 pcie-controller {
 137                         status = "okay";
 138                         /*
 139                          * The two PCIe units are accessible through
 140                          * standard PCIe slots on the board.
 141                          */
 142                         pcie@1,0 {
 143                                 /* Port 0, Lane 0 */
 144                                 status = "okay";
 145                         };
 146                         pcie@2,0 {
 147                                 /* Port 1, Lane 0 */
 148                                 status = "okay";
 149                         };
 150                 };
 151         };
 152 };