2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
6 * Licensed under GPLv2 or later.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/clk/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Atmel AT91SAM9RL family SoC";
17 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
18 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ej-s";
48 reg = <0x20000000 0x04000000>;
51 slow_xtal: slow_xtal {
52 compatible = "fixed-clock";
54 clock-frequency = <0>;
57 main_xtal: main_xtal {
58 compatible = "fixed-clock";
60 clock-frequency = <0>;
64 compatible = "simple-bus";
69 nand0: nand@40000000 {
70 compatible = "atmel,at91rm9200-nand";
73 reg = <0x40000000 0x10000000>,
75 atmel,nand-addr-offset = <21>;
76 atmel,nand-cmd-offset = <22>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_nand>;
79 gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
80 <&pioB 6 GPIO_ACTIVE_HIGH>,
86 compatible = "simple-bus";
91 tcb0: timer@fffa0000 {
92 compatible = "atmel,at91rm9200-tcb";
93 reg = <0xfffa0000 0x100>;
94 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
95 <17 IRQ_TYPE_LEVEL_HIGH 0>,
96 <18 IRQ_TYPE_LEVEL_HIGH 0>;
97 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
98 clock-names = "t0_clk", "t1_clk", "t2_clk";
102 compatible = "atmel,hsmci";
103 reg = <0xfffa4000 0x600>;
104 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
105 #address-cells = <1>;
107 pinctrl-names = "default";
108 clocks = <&mci0_clk>;
109 clock-names = "mci_clk";
114 compatible = "atmel,at91sam9260-i2c";
115 reg = <0xfffa8000 0x100>;
116 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
117 #address-cells = <1>;
119 clocks = <&twi0_clk>;
124 compatible = "atmel,at91sam9260-i2c";
125 reg = <0xfffac000 0x100>;
126 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
127 #address-cells = <1>;
132 usart0: serial@fffb0000 {
133 compatible = "atmel,at91sam9260-usart";
134 reg = <0xfffb0000 0x200>;
135 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_usart0>;
140 clocks = <&usart0_clk>;
141 clock-names = "usart";
145 usart1: serial@fffb4000 {
146 compatible = "atmel,at91sam9260-usart";
147 reg = <0xfffb4000 0x200>;
148 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_usart1>;
153 clocks = <&usart1_clk>;
154 clock-names = "usart";
158 usart2: serial@fffb8000 {
159 compatible = "atmel,at91sam9260-usart";
160 reg = <0xfffb8000 0x200>;
161 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_usart2>;
166 clocks = <&usart2_clk>;
167 clock-names = "usart";
171 usart3: serial@fffbc000 {
172 compatible = "atmel,at91sam9260-usart";
173 reg = <0xfffbc000 0x200>;
174 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_usart3>;
179 clocks = <&usart3_clk>;
180 clock-names = "usart";
185 compatible = "atmel,at91rm9200-ssc";
186 reg = <0xfffc0000 0x4000>;
187 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
194 compatible = "atmel,at91rm9200-ssc";
195 reg = <0xfffc4000 0x4000>;
196 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
203 #address-cells = <1>;
205 compatible = "atmel,at91rm9200-spi";
206 reg = <0xfffcc000 0x200>;
207 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_spi0>;
210 clocks = <&spi0_clk>;
211 clock-names = "spi_clk";
215 ramc0: ramc@ffffea00 {
216 compatible = "atmel,at91sam9260-sdramc";
217 reg = <0xffffea00 0x200>;
220 aic: interrupt-controller@fffff000 {
221 #interrupt-cells = <3>;
222 compatible = "atmel,at91rm9200-aic";
223 interrupt-controller;
224 reg = <0xfffff000 0x200>;
225 atmel,external-irqs = <31>;
228 dbgu: serial@fffff200 {
229 compatible = "atmel,at91sam9260-usart";
230 reg = <0xfffff200 0x200>;
231 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_dbgu>;
235 clock-names = "usart";
240 #address-cells = <1>;
242 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
243 ranges = <0xfffff400 0xfffff400 0x800>;
247 <0xffffffff 0xe05c6738>, /* pioA */
248 <0xffffffff 0x0000c780>, /* pioB */
249 <0xffffffff 0xe3ffff0e>, /* pioC */
250 <0x003fffff 0x0001ff3c>; /* pioD */
252 /* shared pinctrl settings */
254 pinctrl_dbgu: dbgu-0 {
256 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
257 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
262 pinctrl_i2c_gpio0: i2c_gpio0-0 {
264 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
265 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
270 pinctrl_i2c_gpio1: i2c_gpio1-0 {
272 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
273 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
278 pinctrl_mmc0_clk: mmc0_clk-0 {
280 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
283 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
285 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
286 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
289 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
291 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
292 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
293 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
298 pinctrl_nand: nand-0 {
300 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
301 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
304 pinctrl_nand0_ale_cle: nand_ale_cle-0 {
306 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
307 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
310 pinctrl_nand0_oe_we: nand_oe_we-0 {
312 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
313 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
316 pinctrl_nand0_cs: nand_cs-0 {
318 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
323 pinctrl_ssc0_tx: ssc0_tx-0 {
325 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
326 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
327 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
330 pinctrl_ssc0_rx: ssc0_rx-0 {
332 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
333 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
334 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
339 pinctrl_ssc1_tx: ssc1_tx-0 {
341 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
342 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
343 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
346 pinctrl_ssc1_rx: ssc1_rx-0 {
348 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
349 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
350 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
355 pinctrl_spi0: spi0-0 {
357 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
358 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
359 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
364 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
365 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
368 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
369 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
372 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
373 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
376 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
377 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
380 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
381 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
385 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
388 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
389 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
392 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
393 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
396 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
397 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
402 pinctrl_usart0: usart0-0 {
404 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
405 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
408 pinctrl_usart0_rts: usart0_rts-0 {
410 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
413 pinctrl_usart0_cts: usart0_cts-0 {
415 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
418 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
420 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
421 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
424 pinctrl_usart0_dcd: usart0_dcd-0 {
426 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
429 pinctrl_usart0_ri: usart0_ri-0 {
431 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
434 pinctrl_usart0_sck: usart0_sck-0 {
436 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 pinctrl_usart1: usart1-0 {
443 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
444 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
447 pinctrl_usart1_rts: usart1_rts-0 {
449 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
452 pinctrl_usart1_cts: usart1_cts-0 {
454 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
457 pinctrl_usart1_sck: usart1_sck-0 {
459 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 pinctrl_usart2: usart2-0 {
466 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
467 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
470 pinctrl_usart2_rts: usart2_rts-0 {
472 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
475 pinctrl_usart2_cts: usart2_cts-0 {
477 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
480 pinctrl_usart2_sck: usart2_sck-0 {
482 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
487 pinctrl_usart3: usart3-0 {
489 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
490 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
493 pinctrl_usart3_rts: usart3_rts-0 {
495 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
498 pinctrl_usart3_cts: usart3_cts-0 {
500 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 pinctrl_usart3_sck: usart3_sck-0 {
505 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509 pioA: gpio@fffff400 {
510 compatible = "atmel,at91rm9200-gpio";
511 reg = <0xfffff400 0x200>;
512 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
515 interrupt-controller;
516 #interrupt-cells = <2>;
517 clocks = <&pioA_clk>;
520 pioB: gpio@fffff600 {
521 compatible = "atmel,at91rm9200-gpio";
522 reg = <0xfffff600 0x200>;
523 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
526 interrupt-controller;
527 #interrupt-cells = <2>;
528 clocks = <&pioB_clk>;
531 pioC: gpio@fffff800 {
532 compatible = "atmel,at91rm9200-gpio";
533 reg = <0xfffff800 0x200>;
534 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
537 interrupt-controller;
538 #interrupt-cells = <2>;
539 clocks = <&pioC_clk>;
542 pioD: gpio@fffffa00 {
543 compatible = "atmel,at91rm9200-gpio";
544 reg = <0xfffffa00 0x200>;
545 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
548 interrupt-controller;
549 #interrupt-cells = <2>;
550 clocks = <&pioD_clk>;
555 compatible = "atmel,at91sam9g45-pmc";
556 reg = <0xfffffc00 0x100>;
557 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
558 interrupt-controller;
559 #address-cells = <1>;
561 #interrupt-cells = <1>;
564 compatible = "atmel,at91rm9200-clk-main";
566 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
567 clocks = <&main_xtal>;
571 compatible = "atmel,at91rm9200-clk-pll";
573 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
576 atmel,clk-input-range = <1000000 32000000>;
577 #atmel,pll-clk-output-range-cells = <4>;
578 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
582 compatible = "atmel,at91sam9x5-clk-utmi";
584 interrupt-parent = <&pmc>;
585 interrupts = <AT91_PMC_LOCKU>;
590 compatible = "atmel,at91rm9200-clk-master";
592 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
593 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
594 atmel,clk-output-range = <0 94000000>;
595 atmel,clk-divisors = <1 2 4 3>;
599 compatible = "atmel,at91rm9200-clk-programmable";
600 #address-cells = <1>;
602 interrupt-parent = <&pmc>;
603 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
608 interrupts = <AT91_PMC_PCKRDY(0)>;
614 interrupts = <AT91_PMC_PCKRDY(1)>;
619 compatible = "atmel,at91rm9200-clk-system";
620 #address-cells = <1>;
638 compatible = "atmel,at91rm9200-clk-peripheral";
639 #address-cells = <1>;
663 usart0_clk: usart0_clk {
668 usart1_clk: usart1_clk {
673 usart2_clk: usart2_clk {
678 usart3_clk: usart3_clk {
743 udphs_clk: udphs_clk {
756 compatible = "atmel,at91sam9260-rstc";
757 reg = <0xfffffd00 0x10>;
761 compatible = "atmel,at91sam9260-shdwc";
762 reg = <0xfffffd10 0x10>;
765 pit: timer@fffffd30 {
766 compatible = "atmel,at91sam9260-pit";
767 reg = <0xfffffd30 0xf>;
768 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
773 compatible = "atmel,at91sam9260-wdt";
774 reg = <0xfffffd40 0x10>;
775 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
780 compatible = "atmel,at91sam9x5-sckc";
781 reg = <0xfffffd50 0x4>;
784 compatible = "atmel,at91sam9x5-clk-slow-osc";
786 atmel,startup-time-usec = <1200000>;
787 clocks = <&slow_xtal>;
790 slow_rc_osc: slow_rc_osc {
791 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
793 atmel,startup-time-usec = <75>;
794 clock-frequency = <32768>;
795 clock-accuracy = <50000000>;
799 compatible = "atmel,at91sam9x5-clk-slow";
801 clocks = <&slow_rc_osc &slow_osc>;
808 compatible = "i2c-gpio";
809 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
810 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
811 i2c-gpio,sda-open-drain;
812 i2c-gpio,scl-open-drain;
813 i2c-gpio,delay-us = <2>; /* ~100 kHz */
814 #address-cells = <1>;
816 pinctrl-names = "default";
817 pinctrl-0 = <&pinctrl_i2c_gpio0>;
822 compatible = "i2c-gpio";
823 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
824 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
825 i2c-gpio,sda-open-drain;
826 i2c-gpio,scl-open-drain;
827 i2c-gpio,delay-us = <2>; /* ~100 kHz */
828 #address-cells = <1>;
830 pinctrl-names = "default";
831 pinctrl-0 = <&pinctrl_i2c_gpio1>;