2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
13 #include "imx28-pinfunc.h"
16 interrupt-parent = <&icoll>;
44 compatible = "arm,arm926ej-s";
50 compatible = "simple-bus";
53 reg = <0x80000000 0x80000>;
57 compatible = "simple-bus";
60 reg = <0x80000000 0x3c900>;
63 icoll: interrupt-controller@80000000 {
64 compatible = "fsl,imx28-icoll", "fsl,icoll";
66 #interrupt-cells = <1>;
67 reg = <0x80000000 0x2000>;
70 hsadc: hsadc@80002000 {
71 reg = <0x80002000 0x2000>;
73 dmas = <&dma_apbh 12>;
78 dma_apbh: dma-apbh@80004000 {
79 compatible = "fsl,imx28-dma-apbh";
80 reg = <0x80004000 0x2000>;
81 interrupts = <82 83 84 85
85 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
86 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
87 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
88 "hsadc", "lcdif", "empty", "empty";
94 perfmon: perfmon@80006000 {
95 reg = <0x80006000 0x800>;
100 gpmi: gpmi-nand@8000c000 {
101 compatible = "fsl,imx28-gpmi-nand";
102 #address-cells = <1>;
104 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
105 reg-names = "gpmi-nand", "bch";
107 interrupt-names = "bch";
109 clock-names = "gpmi_io";
110 dmas = <&dma_apbh 4>;
116 #address-cells = <1>;
118 reg = <0x80010000 0x2000>;
121 dmas = <&dma_apbh 0>;
127 #address-cells = <1>;
129 reg = <0x80012000 0x2000>;
132 dmas = <&dma_apbh 1>;
138 #address-cells = <1>;
140 reg = <0x80014000 0x2000>;
143 dmas = <&dma_apbh 2>;
149 #address-cells = <1>;
151 reg = <0x80016000 0x2000>;
154 dmas = <&dma_apbh 3>;
159 pinctrl: pinctrl@80018000 {
160 #address-cells = <1>;
162 compatible = "fsl,imx28-pinctrl", "simple-bus";
163 reg = <0x80018000 0x2000>;
166 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
170 interrupt-controller;
171 #interrupt-cells = <2>;
175 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
179 interrupt-controller;
180 #interrupt-cells = <2>;
184 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
188 interrupt-controller;
189 #interrupt-cells = <2>;
193 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
197 interrupt-controller;
198 #interrupt-cells = <2>;
202 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
206 interrupt-controller;
207 #interrupt-cells = <2>;
210 duart_pins_a: duart@0 {
213 MX28_PAD_PWM0__DUART_RX
214 MX28_PAD_PWM1__DUART_TX
216 fsl,drive-strength = <MXS_DRIVE_4mA>;
217 fsl,voltage = <MXS_VOLTAGE_HIGH>;
218 fsl,pull-up = <MXS_PULL_DISABLE>;
221 duart_pins_b: duart@1 {
224 MX28_PAD_AUART0_CTS__DUART_RX
225 MX28_PAD_AUART0_RTS__DUART_TX
227 fsl,drive-strength = <MXS_DRIVE_4mA>;
228 fsl,voltage = <MXS_VOLTAGE_HIGH>;
229 fsl,pull-up = <MXS_PULL_DISABLE>;
232 duart_4pins_a: duart-4pins@0 {
235 MX28_PAD_AUART0_CTS__DUART_RX
236 MX28_PAD_AUART0_RTS__DUART_TX
237 MX28_PAD_AUART0_RX__DUART_CTS
238 MX28_PAD_AUART0_TX__DUART_RTS
240 fsl,drive-strength = <MXS_DRIVE_4mA>;
241 fsl,voltage = <MXS_VOLTAGE_HIGH>;
242 fsl,pull-up = <MXS_PULL_DISABLE>;
245 gpmi_pins_a: gpmi-nand@0 {
248 MX28_PAD_GPMI_D00__GPMI_D0
249 MX28_PAD_GPMI_D01__GPMI_D1
250 MX28_PAD_GPMI_D02__GPMI_D2
251 MX28_PAD_GPMI_D03__GPMI_D3
252 MX28_PAD_GPMI_D04__GPMI_D4
253 MX28_PAD_GPMI_D05__GPMI_D5
254 MX28_PAD_GPMI_D06__GPMI_D6
255 MX28_PAD_GPMI_D07__GPMI_D7
256 MX28_PAD_GPMI_CE0N__GPMI_CE0N
257 MX28_PAD_GPMI_RDY0__GPMI_READY0
258 MX28_PAD_GPMI_RDN__GPMI_RDN
259 MX28_PAD_GPMI_WRN__GPMI_WRN
260 MX28_PAD_GPMI_ALE__GPMI_ALE
261 MX28_PAD_GPMI_CLE__GPMI_CLE
262 MX28_PAD_GPMI_RESETN__GPMI_RESETN
264 fsl,drive-strength = <MXS_DRIVE_4mA>;
265 fsl,voltage = <MXS_VOLTAGE_HIGH>;
266 fsl,pull-up = <MXS_PULL_DISABLE>;
269 gpmi_status_cfg: gpmi-status-cfg {
271 MX28_PAD_GPMI_RDN__GPMI_RDN
272 MX28_PAD_GPMI_WRN__GPMI_WRN
273 MX28_PAD_GPMI_RESETN__GPMI_RESETN
275 fsl,drive-strength = <MXS_DRIVE_12mA>;
278 auart0_pins_a: auart0@0 {
281 MX28_PAD_AUART0_RX__AUART0_RX
282 MX28_PAD_AUART0_TX__AUART0_TX
283 MX28_PAD_AUART0_CTS__AUART0_CTS
284 MX28_PAD_AUART0_RTS__AUART0_RTS
286 fsl,drive-strength = <MXS_DRIVE_4mA>;
287 fsl,voltage = <MXS_VOLTAGE_HIGH>;
288 fsl,pull-up = <MXS_PULL_DISABLE>;
291 auart0_2pins_a: auart0-2pins@0 {
294 MX28_PAD_AUART0_RX__AUART0_RX
295 MX28_PAD_AUART0_TX__AUART0_TX
297 fsl,drive-strength = <MXS_DRIVE_4mA>;
298 fsl,voltage = <MXS_VOLTAGE_HIGH>;
299 fsl,pull-up = <MXS_PULL_DISABLE>;
302 auart1_pins_a: auart1@0 {
305 MX28_PAD_AUART1_RX__AUART1_RX
306 MX28_PAD_AUART1_TX__AUART1_TX
307 MX28_PAD_AUART1_CTS__AUART1_CTS
308 MX28_PAD_AUART1_RTS__AUART1_RTS
310 fsl,drive-strength = <MXS_DRIVE_4mA>;
311 fsl,voltage = <MXS_VOLTAGE_HIGH>;
312 fsl,pull-up = <MXS_PULL_DISABLE>;
315 auart1_2pins_a: auart1-2pins@0 {
318 MX28_PAD_AUART1_RX__AUART1_RX
319 MX28_PAD_AUART1_TX__AUART1_TX
321 fsl,drive-strength = <MXS_DRIVE_4mA>;
322 fsl,voltage = <MXS_VOLTAGE_HIGH>;
323 fsl,pull-up = <MXS_PULL_DISABLE>;
326 auart2_2pins_a: auart2-2pins@0 {
329 MX28_PAD_SSP2_SCK__AUART2_RX
330 MX28_PAD_SSP2_MOSI__AUART2_TX
332 fsl,drive-strength = <MXS_DRIVE_4mA>;
333 fsl,voltage = <MXS_VOLTAGE_HIGH>;
334 fsl,pull-up = <MXS_PULL_DISABLE>;
337 auart2_2pins_b: auart2-2pins@1 {
340 MX28_PAD_AUART2_RX__AUART2_RX
341 MX28_PAD_AUART2_TX__AUART2_TX
343 fsl,drive-strength = <MXS_DRIVE_4mA>;
344 fsl,voltage = <MXS_VOLTAGE_HIGH>;
345 fsl,pull-up = <MXS_PULL_DISABLE>;
348 auart2_pins_a: auart2-pins@0 {
351 MX28_PAD_AUART2_RX__AUART2_RX
352 MX28_PAD_AUART2_TX__AUART2_TX
353 MX28_PAD_AUART2_CTS__AUART2_CTS
354 MX28_PAD_AUART2_RTS__AUART2_RTS
356 fsl,drive-strength = <MXS_DRIVE_4mA>;
357 fsl,voltage = <MXS_VOLTAGE_HIGH>;
358 fsl,pull-up = <MXS_PULL_DISABLE>;
361 auart3_pins_a: auart3@0 {
364 MX28_PAD_AUART3_RX__AUART3_RX
365 MX28_PAD_AUART3_TX__AUART3_TX
366 MX28_PAD_AUART3_CTS__AUART3_CTS
367 MX28_PAD_AUART3_RTS__AUART3_RTS
369 fsl,drive-strength = <MXS_DRIVE_4mA>;
370 fsl,voltage = <MXS_VOLTAGE_HIGH>;
371 fsl,pull-up = <MXS_PULL_DISABLE>;
374 auart3_2pins_a: auart3-2pins@0 {
377 MX28_PAD_SSP2_MISO__AUART3_RX
378 MX28_PAD_SSP2_SS0__AUART3_TX
380 fsl,drive-strength = <MXS_DRIVE_4mA>;
381 fsl,voltage = <MXS_VOLTAGE_HIGH>;
382 fsl,pull-up = <MXS_PULL_DISABLE>;
385 auart3_2pins_b: auart3-2pins@1 {
388 MX28_PAD_AUART3_RX__AUART3_RX
389 MX28_PAD_AUART3_TX__AUART3_TX
391 fsl,drive-strength = <MXS_DRIVE_4mA>;
392 fsl,voltage = <MXS_VOLTAGE_HIGH>;
393 fsl,pull-up = <MXS_PULL_DISABLE>;
396 auart4_2pins_a: auart4@0 {
399 MX28_PAD_SSP3_SCK__AUART4_TX
400 MX28_PAD_SSP3_MOSI__AUART4_RX
402 fsl,drive-strength = <MXS_DRIVE_4mA>;
403 fsl,voltage = <MXS_VOLTAGE_HIGH>;
404 fsl,pull-up = <MXS_PULL_DISABLE>;
407 mac0_pins_a: mac0@0 {
410 MX28_PAD_ENET0_MDC__ENET0_MDC
411 MX28_PAD_ENET0_MDIO__ENET0_MDIO
412 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
413 MX28_PAD_ENET0_RXD0__ENET0_RXD0
414 MX28_PAD_ENET0_RXD1__ENET0_RXD1
415 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
416 MX28_PAD_ENET0_TXD0__ENET0_TXD0
417 MX28_PAD_ENET0_TXD1__ENET0_TXD1
418 MX28_PAD_ENET_CLK__CLKCTRL_ENET
420 fsl,drive-strength = <MXS_DRIVE_8mA>;
421 fsl,voltage = <MXS_VOLTAGE_HIGH>;
422 fsl,pull-up = <MXS_PULL_ENABLE>;
425 mac1_pins_a: mac1@0 {
428 MX28_PAD_ENET0_CRS__ENET1_RX_EN
429 MX28_PAD_ENET0_RXD2__ENET1_RXD0
430 MX28_PAD_ENET0_RXD3__ENET1_RXD1
431 MX28_PAD_ENET0_COL__ENET1_TX_EN
432 MX28_PAD_ENET0_TXD2__ENET1_TXD0
433 MX28_PAD_ENET0_TXD3__ENET1_TXD1
435 fsl,drive-strength = <MXS_DRIVE_8mA>;
436 fsl,voltage = <MXS_VOLTAGE_HIGH>;
437 fsl,pull-up = <MXS_PULL_ENABLE>;
440 mmc0_8bit_pins_a: mmc0-8bit@0 {
443 MX28_PAD_SSP0_DATA0__SSP0_D0
444 MX28_PAD_SSP0_DATA1__SSP0_D1
445 MX28_PAD_SSP0_DATA2__SSP0_D2
446 MX28_PAD_SSP0_DATA3__SSP0_D3
447 MX28_PAD_SSP0_DATA4__SSP0_D4
448 MX28_PAD_SSP0_DATA5__SSP0_D5
449 MX28_PAD_SSP0_DATA6__SSP0_D6
450 MX28_PAD_SSP0_DATA7__SSP0_D7
451 MX28_PAD_SSP0_CMD__SSP0_CMD
452 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
453 MX28_PAD_SSP0_SCK__SSP0_SCK
455 fsl,drive-strength = <MXS_DRIVE_8mA>;
456 fsl,voltage = <MXS_VOLTAGE_HIGH>;
457 fsl,pull-up = <MXS_PULL_ENABLE>;
460 mmc0_4bit_pins_a: mmc0-4bit@0 {
463 MX28_PAD_SSP0_DATA0__SSP0_D0
464 MX28_PAD_SSP0_DATA1__SSP0_D1
465 MX28_PAD_SSP0_DATA2__SSP0_D2
466 MX28_PAD_SSP0_DATA3__SSP0_D3
467 MX28_PAD_SSP0_CMD__SSP0_CMD
468 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
469 MX28_PAD_SSP0_SCK__SSP0_SCK
471 fsl,drive-strength = <MXS_DRIVE_8mA>;
472 fsl,voltage = <MXS_VOLTAGE_HIGH>;
473 fsl,pull-up = <MXS_PULL_ENABLE>;
476 mmc0_cd_cfg: mmc0-cd-cfg {
478 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
480 fsl,pull-up = <MXS_PULL_DISABLE>;
483 mmc0_sck_cfg: mmc0-sck-cfg {
485 MX28_PAD_SSP0_SCK__SSP0_SCK
487 fsl,drive-strength = <MXS_DRIVE_12mA>;
488 fsl,pull-up = <MXS_PULL_DISABLE>;
491 mmc2_4bit_pins_a: mmc2-4bit@0 {
494 MX28_PAD_SSP0_DATA4__SSP2_D0
495 MX28_PAD_SSP1_SCK__SSP2_D1
496 MX28_PAD_SSP1_CMD__SSP2_D2
497 MX28_PAD_SSP0_DATA5__SSP2_D3
498 MX28_PAD_SSP0_DATA6__SSP2_CMD
499 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
500 MX28_PAD_SSP0_DATA7__SSP2_SCK
502 fsl,drive-strength = <MXS_DRIVE_8mA>;
503 fsl,voltage = <MXS_VOLTAGE_HIGH>;
504 fsl,pull-up = <MXS_PULL_ENABLE>;
507 mmc2_cd_cfg: mmc2-cd-cfg {
509 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
511 fsl,pull-up = <MXS_PULL_DISABLE>;
514 mmc2_sck_cfg: mmc2-sck-cfg {
516 MX28_PAD_SSP0_DATA7__SSP2_SCK
518 fsl,drive-strength = <MXS_DRIVE_12mA>;
519 fsl,pull-up = <MXS_PULL_DISABLE>;
522 i2c0_pins_a: i2c0@0 {
525 MX28_PAD_I2C0_SCL__I2C0_SCL
526 MX28_PAD_I2C0_SDA__I2C0_SDA
528 fsl,drive-strength = <MXS_DRIVE_8mA>;
529 fsl,voltage = <MXS_VOLTAGE_HIGH>;
530 fsl,pull-up = <MXS_PULL_ENABLE>;
533 i2c0_pins_b: i2c0@1 {
536 MX28_PAD_AUART0_RX__I2C0_SCL
537 MX28_PAD_AUART0_TX__I2C0_SDA
539 fsl,drive-strength = <MXS_DRIVE_8mA>;
540 fsl,voltage = <MXS_VOLTAGE_HIGH>;
541 fsl,pull-up = <MXS_PULL_ENABLE>;
544 i2c1_pins_a: i2c1@0 {
547 MX28_PAD_PWM0__I2C1_SCL
548 MX28_PAD_PWM1__I2C1_SDA
550 fsl,drive-strength = <MXS_DRIVE_8mA>;
551 fsl,voltage = <MXS_VOLTAGE_HIGH>;
552 fsl,pull-up = <MXS_PULL_ENABLE>;
555 saif0_pins_a: saif0@0 {
558 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
559 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
560 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
561 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
563 fsl,drive-strength = <MXS_DRIVE_12mA>;
564 fsl,voltage = <MXS_VOLTAGE_HIGH>;
565 fsl,pull-up = <MXS_PULL_ENABLE>;
568 saif0_pins_b: saif0@1 {
571 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
572 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
573 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
575 fsl,drive-strength = <MXS_DRIVE_12mA>;
576 fsl,voltage = <MXS_VOLTAGE_HIGH>;
577 fsl,pull-up = <MXS_PULL_ENABLE>;
580 saif1_pins_a: saif1@0 {
583 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
585 fsl,drive-strength = <MXS_DRIVE_12mA>;
586 fsl,voltage = <MXS_VOLTAGE_HIGH>;
587 fsl,pull-up = <MXS_PULL_ENABLE>;
590 pwm0_pins_a: pwm0@0 {
595 fsl,drive-strength = <MXS_DRIVE_4mA>;
596 fsl,voltage = <MXS_VOLTAGE_HIGH>;
597 fsl,pull-up = <MXS_PULL_DISABLE>;
600 pwm2_pins_a: pwm2@0 {
605 fsl,drive-strength = <MXS_DRIVE_4mA>;
606 fsl,voltage = <MXS_VOLTAGE_HIGH>;
607 fsl,pull-up = <MXS_PULL_DISABLE>;
610 pwm3_pins_a: pwm3@0 {
615 fsl,drive-strength = <MXS_DRIVE_4mA>;
616 fsl,voltage = <MXS_VOLTAGE_HIGH>;
617 fsl,pull-up = <MXS_PULL_DISABLE>;
620 pwm3_pins_b: pwm3@1 {
623 MX28_PAD_SAIF0_MCLK__PWM_3
625 fsl,drive-strength = <MXS_DRIVE_4mA>;
626 fsl,voltage = <MXS_VOLTAGE_HIGH>;
627 fsl,pull-up = <MXS_PULL_DISABLE>;
630 pwm4_pins_a: pwm4@0 {
635 fsl,drive-strength = <MXS_DRIVE_4mA>;
636 fsl,voltage = <MXS_VOLTAGE_HIGH>;
637 fsl,pull-up = <MXS_PULL_DISABLE>;
640 lcdif_24bit_pins_a: lcdif-24bit@0 {
643 MX28_PAD_LCD_D00__LCD_D0
644 MX28_PAD_LCD_D01__LCD_D1
645 MX28_PAD_LCD_D02__LCD_D2
646 MX28_PAD_LCD_D03__LCD_D3
647 MX28_PAD_LCD_D04__LCD_D4
648 MX28_PAD_LCD_D05__LCD_D5
649 MX28_PAD_LCD_D06__LCD_D6
650 MX28_PAD_LCD_D07__LCD_D7
651 MX28_PAD_LCD_D08__LCD_D8
652 MX28_PAD_LCD_D09__LCD_D9
653 MX28_PAD_LCD_D10__LCD_D10
654 MX28_PAD_LCD_D11__LCD_D11
655 MX28_PAD_LCD_D12__LCD_D12
656 MX28_PAD_LCD_D13__LCD_D13
657 MX28_PAD_LCD_D14__LCD_D14
658 MX28_PAD_LCD_D15__LCD_D15
659 MX28_PAD_LCD_D16__LCD_D16
660 MX28_PAD_LCD_D17__LCD_D17
661 MX28_PAD_LCD_D18__LCD_D18
662 MX28_PAD_LCD_D19__LCD_D19
663 MX28_PAD_LCD_D20__LCD_D20
664 MX28_PAD_LCD_D21__LCD_D21
665 MX28_PAD_LCD_D22__LCD_D22
666 MX28_PAD_LCD_D23__LCD_D23
668 fsl,drive-strength = <MXS_DRIVE_4mA>;
669 fsl,voltage = <MXS_VOLTAGE_HIGH>;
670 fsl,pull-up = <MXS_PULL_DISABLE>;
673 lcdif_18bit_pins_a: lcdif-18bit@0 {
676 MX28_PAD_LCD_D00__LCD_D0
677 MX28_PAD_LCD_D01__LCD_D1
678 MX28_PAD_LCD_D02__LCD_D2
679 MX28_PAD_LCD_D03__LCD_D3
680 MX28_PAD_LCD_D04__LCD_D4
681 MX28_PAD_LCD_D05__LCD_D5
682 MX28_PAD_LCD_D06__LCD_D6
683 MX28_PAD_LCD_D07__LCD_D7
684 MX28_PAD_LCD_D08__LCD_D8
685 MX28_PAD_LCD_D09__LCD_D9
686 MX28_PAD_LCD_D10__LCD_D10
687 MX28_PAD_LCD_D11__LCD_D11
688 MX28_PAD_LCD_D12__LCD_D12
689 MX28_PAD_LCD_D13__LCD_D13
690 MX28_PAD_LCD_D14__LCD_D14
691 MX28_PAD_LCD_D15__LCD_D15
692 MX28_PAD_LCD_D16__LCD_D16
693 MX28_PAD_LCD_D17__LCD_D17
695 fsl,drive-strength = <MXS_DRIVE_4mA>;
696 fsl,voltage = <MXS_VOLTAGE_HIGH>;
697 fsl,pull-up = <MXS_PULL_DISABLE>;
700 lcdif_16bit_pins_a: lcdif-16bit@0 {
703 MX28_PAD_LCD_D00__LCD_D0
704 MX28_PAD_LCD_D01__LCD_D1
705 MX28_PAD_LCD_D02__LCD_D2
706 MX28_PAD_LCD_D03__LCD_D3
707 MX28_PAD_LCD_D04__LCD_D4
708 MX28_PAD_LCD_D05__LCD_D5
709 MX28_PAD_LCD_D06__LCD_D6
710 MX28_PAD_LCD_D07__LCD_D7
711 MX28_PAD_LCD_D08__LCD_D8
712 MX28_PAD_LCD_D09__LCD_D9
713 MX28_PAD_LCD_D10__LCD_D10
714 MX28_PAD_LCD_D11__LCD_D11
715 MX28_PAD_LCD_D12__LCD_D12
716 MX28_PAD_LCD_D13__LCD_D13
717 MX28_PAD_LCD_D14__LCD_D14
718 MX28_PAD_LCD_D15__LCD_D15
720 fsl,drive-strength = <MXS_DRIVE_4mA>;
721 fsl,voltage = <MXS_VOLTAGE_HIGH>;
722 fsl,pull-up = <MXS_PULL_DISABLE>;
725 lcdif_sync_pins_a: lcdif-sync@0 {
728 MX28_PAD_LCD_RS__LCD_DOTCLK
729 MX28_PAD_LCD_CS__LCD_ENABLE
730 MX28_PAD_LCD_RD_E__LCD_VSYNC
731 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
733 fsl,drive-strength = <MXS_DRIVE_4mA>;
734 fsl,voltage = <MXS_VOLTAGE_HIGH>;
735 fsl,pull-up = <MXS_PULL_DISABLE>;
738 can0_pins_a: can0@0 {
741 MX28_PAD_GPMI_RDY2__CAN0_TX
742 MX28_PAD_GPMI_RDY3__CAN0_RX
744 fsl,drive-strength = <MXS_DRIVE_4mA>;
745 fsl,voltage = <MXS_VOLTAGE_HIGH>;
746 fsl,pull-up = <MXS_PULL_DISABLE>;
749 can1_pins_a: can1@0 {
752 MX28_PAD_GPMI_CE2N__CAN1_TX
753 MX28_PAD_GPMI_CE3N__CAN1_RX
755 fsl,drive-strength = <MXS_DRIVE_4mA>;
756 fsl,voltage = <MXS_VOLTAGE_HIGH>;
757 fsl,pull-up = <MXS_PULL_DISABLE>;
760 spi2_pins_a: spi2@0 {
763 MX28_PAD_SSP2_SCK__SSP2_SCK
764 MX28_PAD_SSP2_MOSI__SSP2_CMD
765 MX28_PAD_SSP2_MISO__SSP2_D0
766 MX28_PAD_SSP2_SS0__SSP2_D3
768 fsl,drive-strength = <MXS_DRIVE_8mA>;
769 fsl,voltage = <MXS_VOLTAGE_HIGH>;
770 fsl,pull-up = <MXS_PULL_ENABLE>;
773 spi3_pins_a: spi3@0 {
776 MX28_PAD_AUART2_RX__SSP3_D4
777 MX28_PAD_AUART2_TX__SSP3_D5
778 MX28_PAD_SSP3_SCK__SSP3_SCK
779 MX28_PAD_SSP3_MOSI__SSP3_CMD
780 MX28_PAD_SSP3_MISO__SSP3_D0
781 MX28_PAD_SSP3_SS0__SSP3_D3
783 fsl,drive-strength = <MXS_DRIVE_8mA>;
784 fsl,voltage = <MXS_VOLTAGE_HIGH>;
785 fsl,pull-up = <MXS_PULL_DISABLE>;
788 usb0_pins_a: usb0@0 {
791 MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
793 fsl,drive-strength = <MXS_DRIVE_12mA>;
794 fsl,voltage = <MXS_VOLTAGE_HIGH>;
795 fsl,pull-up = <MXS_PULL_DISABLE>;
798 usb0_pins_b: usb0@1 {
801 MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
803 fsl,drive-strength = <MXS_DRIVE_12mA>;
804 fsl,voltage = <MXS_VOLTAGE_HIGH>;
805 fsl,pull-up = <MXS_PULL_DISABLE>;
808 usb1_pins_a: usb1@0 {
811 MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
813 fsl,drive-strength = <MXS_DRIVE_12mA>;
814 fsl,voltage = <MXS_VOLTAGE_HIGH>;
815 fsl,pull-up = <MXS_PULL_DISABLE>;
818 usb0_id_pins_a: usb0id@0 {
821 MX28_PAD_AUART1_RTS__USB0_ID
823 fsl,drive-strength = <MXS_DRIVE_12mA>;
824 fsl,voltage = <MXS_VOLTAGE_HIGH>;
825 fsl,pull-up = <MXS_PULL_ENABLE>;
828 usb0_id_pins_b: usb0id1@0 {
831 MX28_PAD_PWM2__USB0_ID
833 fsl,drive-strength = <MXS_DRIVE_12mA>;
834 fsl,voltage = <MXS_VOLTAGE_HIGH>;
835 fsl,pull-up = <MXS_PULL_ENABLE>;
840 digctl: digctl@8001c000 {
841 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
842 reg = <0x8001c000 0x2000>;
848 reg = <0x80022000 0x2000>;
852 dma_apbx: dma-apbx@80024000 {
853 compatible = "fsl,imx28-dma-apbx";
854 reg = <0x80024000 0x2000>;
855 interrupts = <78 79 66 0
859 interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
860 "saif0", "saif1", "i2c0", "i2c1",
861 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
862 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
869 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
870 reg = <0x80028000 0x2000>;
871 interrupts = <52 53 54>;
876 reg = <0x8002a000 0x2000>;
881 ocotp: ocotp@8002c000 {
882 compatible = "fsl,ocotp";
883 reg = <0x8002c000 0x2000>;
888 reg = <0x8002e000 0x2000>;
892 lcdif: lcdif@80030000 {
893 compatible = "fsl,imx28-lcdif";
894 reg = <0x80030000 0x2000>;
897 dmas = <&dma_apbh 13>;
903 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
904 reg = <0x80032000 0x2000>;
906 clocks = <&clks 58>, <&clks 58>;
907 clock-names = "ipg", "per";
912 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
913 reg = <0x80034000 0x2000>;
915 clocks = <&clks 59>, <&clks 59>;
916 clock-names = "ipg", "per";
920 simdbg: simdbg@8003c000 {
921 reg = <0x8003c000 0x200>;
925 simgpmisel: simgpmisel@8003c200 {
926 reg = <0x8003c200 0x100>;
930 simsspsel: simsspsel@8003c300 {
931 reg = <0x8003c300 0x100>;
935 simmemsel: simmemsel@8003c400 {
936 reg = <0x8003c400 0x100>;
940 gpiomon: gpiomon@8003c500 {
941 reg = <0x8003c500 0x100>;
945 simenet: simenet@8003c700 {
946 reg = <0x8003c700 0x100>;
950 armjtag: armjtag@8003c800 {
951 reg = <0x8003c800 0x100>;
957 compatible = "simple-bus";
958 #address-cells = <1>;
960 reg = <0x80040000 0x40000>;
963 clks: clkctrl@80040000 {
964 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
965 reg = <0x80040000 0x2000>;
969 saif0: saif@80042000 {
970 compatible = "fsl,imx28-saif";
971 reg = <0x80042000 0x2000>;
975 dmas = <&dma_apbx 4>;
980 power: power@80044000 {
981 reg = <0x80044000 0x2000>;
985 saif1: saif@80046000 {
986 compatible = "fsl,imx28-saif";
987 reg = <0x80046000 0x2000>;
990 dmas = <&dma_apbx 5>;
995 lradc: lradc@80050000 {
996 compatible = "fsl,imx28-lradc";
997 reg = <0x80050000 0x2000>;
998 interrupts = <10 14 15 16 17 18 19
1000 status = "disabled";
1001 clocks = <&clks 41>;
1002 #io-channel-cells = <1>;
1005 spdif: spdif@80054000 {
1006 reg = <0x80054000 0x2000>;
1008 dmas = <&dma_apbx 2>;
1010 status = "disabled";
1013 mxs_rtc: rtc@80056000 {
1014 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
1015 reg = <0x80056000 0x2000>;
1019 i2c0: i2c@80058000 {
1020 #address-cells = <1>;
1022 compatible = "fsl,imx28-i2c";
1023 reg = <0x80058000 0x2000>;
1025 clock-frequency = <100000>;
1026 dmas = <&dma_apbx 6>;
1027 dma-names = "rx-tx";
1028 status = "disabled";
1031 i2c1: i2c@8005a000 {
1032 #address-cells = <1>;
1034 compatible = "fsl,imx28-i2c";
1035 reg = <0x8005a000 0x2000>;
1037 clock-frequency = <100000>;
1038 dmas = <&dma_apbx 7>;
1039 dma-names = "rx-tx";
1040 status = "disabled";
1044 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
1045 reg = <0x80064000 0x2000>;
1046 clocks = <&clks 44>;
1048 fsl,pwm-number = <8>;
1049 status = "disabled";
1052 timer: timrot@80068000 {
1053 compatible = "fsl,imx28-timrot", "fsl,timrot";
1054 reg = <0x80068000 0x2000>;
1055 interrupts = <48 49 50 51>;
1056 clocks = <&clks 26>;
1059 auart0: serial@8006a000 {
1060 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1061 reg = <0x8006a000 0x2000>;
1063 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
1064 dma-names = "rx", "tx";
1065 clocks = <&clks 45>;
1066 status = "disabled";
1069 auart1: serial@8006c000 {
1070 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1071 reg = <0x8006c000 0x2000>;
1073 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
1074 dma-names = "rx", "tx";
1075 clocks = <&clks 45>;
1076 status = "disabled";
1079 auart2: serial@8006e000 {
1080 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1081 reg = <0x8006e000 0x2000>;
1083 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
1084 dma-names = "rx", "tx";
1085 clocks = <&clks 45>;
1086 status = "disabled";
1089 auart3: serial@80070000 {
1090 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1091 reg = <0x80070000 0x2000>;
1093 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
1094 dma-names = "rx", "tx";
1095 clocks = <&clks 45>;
1096 status = "disabled";
1099 auart4: serial@80072000 {
1100 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1101 reg = <0x80072000 0x2000>;
1103 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1104 dma-names = "rx", "tx";
1105 clocks = <&clks 45>;
1106 status = "disabled";
1109 duart: serial@80074000 {
1110 compatible = "arm,pl011", "arm,primecell";
1111 reg = <0x80074000 0x1000>;
1113 clocks = <&clks 45>, <&clks 26>;
1114 clock-names = "uart", "apb_pclk";
1115 status = "disabled";
1118 usbphy0: usbphy@8007c000 {
1119 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1120 reg = <0x8007c000 0x2000>;
1121 clocks = <&clks 62>;
1122 status = "disabled";
1125 usbphy1: usbphy@8007e000 {
1126 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1127 reg = <0x8007e000 0x2000>;
1128 clocks = <&clks 63>;
1129 status = "disabled";
1135 compatible = "simple-bus";
1136 #address-cells = <1>;
1138 reg = <0x80080000 0x80000>;
1141 usb0: usb@80080000 {
1142 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1143 reg = <0x80080000 0x10000>;
1145 clocks = <&clks 60>;
1146 fsl,usbphy = <&usbphy0>;
1147 status = "disabled";
1150 usb1: usb@80090000 {
1151 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1152 reg = <0x80090000 0x10000>;
1154 clocks = <&clks 61>;
1155 fsl,usbphy = <&usbphy1>;
1156 status = "disabled";
1159 dflpt: dflpt@800c0000 {
1160 reg = <0x800c0000 0x10000>;
1161 status = "disabled";
1164 mac0: ethernet@800f0000 {
1165 compatible = "fsl,imx28-fec";
1166 reg = <0x800f0000 0x4000>;
1168 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1169 clock-names = "ipg", "ahb", "enet_out";
1170 status = "disabled";
1173 mac1: ethernet@800f4000 {
1174 compatible = "fsl,imx28-fec";
1175 reg = <0x800f4000 0x4000>;
1177 clocks = <&clks 57>, <&clks 57>;
1178 clock-names = "ipg", "ahb";
1179 status = "disabled";
1182 etn_switch: switch@800f8000 {
1183 reg = <0x800f8000 0x8000>;
1184 status = "disabled";
1189 compatible = "iio-hwmon";
1190 io-channels = <&lradc 8>;